* Re: [PATCH v2 1/6] idle: move the cpuidle entry point to the generic idle loop
From: Nicolas Pitre @ 2014-01-29 20:31 UTC (permalink / raw)
To: Olof Johansson, Russell King, Benjamin Herrenschmidt,
Preeti U Murthy, Paul Mundt, Thomas Gleixner, Ingo Molnar,
Peter Zijlstra, Rafael J. Wysocki, Daniel Lezcano
Cc: linaro-kernel, linux-sh, linux-pm, linux-kernel, linuxppc-dev,
linux-arm-kernel
In-Reply-To: <1391017513-12995-2-git-send-email-nicolas.pitre@linaro.org>
On Wed, 29 Jan 2014, Nicolas Pitre wrote:
> In order to integrate cpuidle with the scheduler, we must have a better
> proximity in the core code with what cpuidle is doing and not delegate
> such interaction to arch code.
>
> Architectures implementing arch_cpu_idle() should simply enter
> a cheap idle mode in the absence of a proper cpuidle driver.
>
> Signed-off-by: Nicolas Pitre <nico@linaro.org>
> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
As mentioned in my reply to Olof's comment on patch #5/6, here's a new
version of this patch adding the safety local_irq_enable() to the core
code.
----- >8
From: Nicolas Pitre <nicolas.pitre@linaro.org>
Subject: idle: move the cpuidle entry point to the generic idle loop
In order to integrate cpuidle with the scheduler, we must have a better
proximity in the core code with what cpuidle is doing and not delegate
such interaction to arch code.
Architectures implementing arch_cpu_idle() should simply enter
a cheap idle mode in the absence of a proper cpuidle driver.
In both cases i.e. whether it is a cpuidle driver or the default
arch_cpu_idle(), the calling convention expects IRQs to be disabled
on entry and enabled on exit. There is a warning in place already but
let's add a forced IRQ enable here as well. This will allow for
removing the forced IRQ enable some implementations do locally and
allowing for the warning to trig.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
diff --git a/kernel/cpu/idle.c b/kernel/cpu/idle.c
index 988573a9a3..14ca43430a 100644
--- a/kernel/cpu/idle.c
+++ b/kernel/cpu/idle.c
@@ -3,6 +3,7 @@
*/
#include <linux/sched.h>
#include <linux/cpu.h>
+#include <linux/cpuidle.h>
#include <linux/tick.h>
#include <linux/mm.h>
#include <linux/stackprotector.h>
@@ -95,8 +96,10 @@ static void cpu_idle_loop(void)
if (!current_clr_polling_and_test()) {
stop_critical_timings();
rcu_idle_enter();
- arch_cpu_idle();
- WARN_ON_ONCE(irqs_disabled());
+ if (cpuidle_idle_call())
+ arch_cpu_idle();
+ if (WARN_ON_ONCE(irqs_disabled()))
+ local_irq_enable();
rcu_idle_exit();
start_critical_timings();
} else {
^ permalink raw reply related
* Re: [PATCH v2 5/6] X86: remove redundant cpuidle_idle_call()
From: Nicolas Pitre @ 2014-01-29 20:14 UTC (permalink / raw)
To: Olof Johansson
Cc: linaro-kernel@lists.linaro.org, Russell King, Linux-sh list,
Peter Zijlstra, linux-pm, Daniel Lezcano, Rafael J. Wysocki,
linux-kernel@vger.kernel.org, Paul Mundt, Preeti U Murthy,
Thomas Gleixner, linuxppc-dev, Ingo Molnar,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <CAOesGMjvOkuxCopog91SAV1-gB9GaEYXpuXwhV1EJQor_pKjBA@mail.gmail.com>
On Wed, 29 Jan 2014, Olof Johansson wrote:
> Hi,
>
> On Wed, Jan 29, 2014 at 9:45 AM, Nicolas Pitre <nicolas.pitre@linaro.org> wrote:
> > The core idle loop now takes care of it.
> >
> > Signed-off-by: Nicolas Pitre <nico@linaro.org>
> > Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> > ---
> > arch/x86/kernel/process.c | 5 +----
> > 1 file changed, 1 insertion(+), 4 deletions(-)
> >
> > diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
> > index 3fb8d95ab8..4505e2a950 100644
> > --- a/arch/x86/kernel/process.c
> > +++ b/arch/x86/kernel/process.c
> > @@ -298,10 +298,7 @@ void arch_cpu_idle_dead(void)
> > */
> > void arch_cpu_idle(void)
> > {
> > - if (cpuidle_idle_call())
> > - x86_idle();
> > - else
> > - local_irq_enable();
> > + x86_idle();
>
> You're taking out the local_irq_enable() here but I don't see the
> equivalent of adding it back in the 1/6 patch that moves the
> cpuidle_idle_call() up to common code. It seems that one of the call
> paths through cpuidle_idle_call() don't re-enable it on its own.
When cpuidle_idle_call() returns non-zero, IRQs are left disabled. When
it returns zero then IRQs should be disabled. Same goes for cpuidle
drivers. That's the theory at least.
Looking into some cpuidle drivers for x86 I found at least one that
doesn't respect this convention. Damn.
> Even if this is the right thing to do, why it's OK to do so should
> probably be documented in the patch description.
Better yet, I'm going to amend patch 1/6 with the below to make things
more reliable while still identifying misbehaving drivers.
diff --git a/kernel/cpu/idle.c b/kernel/cpu/idle.c
index ffcd3ee9af..14ca43430a 100644
--- a/kernel/cpu/idle.c
+++ b/kernel/cpu/idle.c
@@ -98,7 +98,8 @@ static void cpu_idle_loop(void)
rcu_idle_enter();
if (cpuidle_idle_call())
arch_cpu_idle();
- WARN_ON_ONCE(irqs_disabled());
+ if (WARN_ON_ONCE(irqs_disabled()))
+ local_irq_enable();
rcu_idle_exit();
start_critical_timings();
} else {
^ permalink raw reply related
* Re: [PATCH v2 5/6] X86: remove redundant cpuidle_idle_call()
From: Olof Johansson @ 2014-01-29 19:02 UTC (permalink / raw)
To: Nicolas Pitre
Cc: linaro-kernel@lists.linaro.org, Russell King, Linux-sh list,
Peter Zijlstra, linux-pm, Daniel Lezcano, Rafael J. Wysocki,
linux-kernel@vger.kernel.org, Paul Mundt, Preeti U Murthy,
Thomas Gleixner, linuxppc-dev, Ingo Molnar,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <1391017513-12995-6-git-send-email-nicolas.pitre@linaro.org>
Hi,
On Wed, Jan 29, 2014 at 9:45 AM, Nicolas Pitre <nicolas.pitre@linaro.org> wrote:
> The core idle loop now takes care of it.
>
> Signed-off-by: Nicolas Pitre <nico@linaro.org>
> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> ---
> arch/x86/kernel/process.c | 5 +----
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
> index 3fb8d95ab8..4505e2a950 100644
> --- a/arch/x86/kernel/process.c
> +++ b/arch/x86/kernel/process.c
> @@ -298,10 +298,7 @@ void arch_cpu_idle_dead(void)
> */
> void arch_cpu_idle(void)
> {
> - if (cpuidle_idle_call())
> - x86_idle();
> - else
> - local_irq_enable();
> + x86_idle();
You're taking out the local_irq_enable() here but I don't see the
equivalent of adding it back in the 1/6 patch that moves the
cpuidle_idle_call() up to common code. It seems that one of the call
paths through cpuidle_idle_call() don't re-enable it on its own.
Even if this is the right thing to do, why it's OK to do so should
probably be documented in the patch description.
-Olof
^ permalink raw reply
* [PATCH v2 6/6] cpu/idle.c: move to sched/idle.c
From: Nicolas Pitre @ 2014-01-29 17:45 UTC (permalink / raw)
To: Russell King, Benjamin Herrenschmidt, Preeti U Murthy, Paul Mundt,
Thomas Gleixner, Ingo Molnar, Peter Zijlstra, Rafael J. Wysocki,
Daniel Lezcano
Cc: linaro-kernel, linux-pm, linux-sh, linux-kernel, linuxppc-dev,
linux-arm-kernel
In-Reply-To: <1391017513-12995-1-git-send-email-nicolas.pitre@linaro.org>
Integration of cpuidle with the scheduler requires that the idle loop be
closely integrated with the scheduler proper. Moving cpu/idle.c into the
sched directory will allow for a smoother integration, and eliminate a
subdirectory which contained only one source file.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
---
kernel/Makefile | 1 -
kernel/cpu/Makefile | 1 -
kernel/sched/Makefile | 2 +-
kernel/{cpu => sched}/idle.c | 0
4 files changed, 1 insertion(+), 3 deletions(-)
delete mode 100644 kernel/cpu/Makefile
rename kernel/{cpu => sched}/idle.c (100%)
diff --git a/kernel/Makefile b/kernel/Makefile
index bc010ee272..6f1c7e5cfc 100644
--- a/kernel/Makefile
+++ b/kernel/Makefile
@@ -22,7 +22,6 @@ obj-y += sched/
obj-y += locking/
obj-y += power/
obj-y += printk/
-obj-y += cpu/
obj-y += irq/
obj-y += rcu/
diff --git a/kernel/cpu/Makefile b/kernel/cpu/Makefile
deleted file mode 100644
index 59ab052ef7..0000000000
--- a/kernel/cpu/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-obj-y = idle.o
diff --git a/kernel/sched/Makefile b/kernel/sched/Makefile
index 7b621409cf..ac3e0ea68f 100644
--- a/kernel/sched/Makefile
+++ b/kernel/sched/Makefile
@@ -11,7 +11,7 @@ ifneq ($(CONFIG_SCHED_OMIT_FRAME_POINTER),y)
CFLAGS_core.o := $(PROFILING) -fno-omit-frame-pointer
endif
-obj-y += core.o proc.o clock.o cputime.o idle_task.o fair.o rt.o stop_task.o
+obj-y += core.o proc.o clock.o cputime.o idle_task.o idle.o fair.o rt.o stop_task.o
obj-y += wait.o completion.o
obj-$(CONFIG_SMP) += cpupri.o
obj-$(CONFIG_SCHED_AUTOGROUP) += auto_group.o
diff --git a/kernel/cpu/idle.c b/kernel/sched/idle.c
similarity index 100%
rename from kernel/cpu/idle.c
rename to kernel/sched/idle.c
--
1.8.4.108.g55ea5f6
^ permalink raw reply related
* [PATCH v2 5/6] X86: remove redundant cpuidle_idle_call()
From: Nicolas Pitre @ 2014-01-29 17:45 UTC (permalink / raw)
To: Russell King, Benjamin Herrenschmidt, Preeti U Murthy, Paul Mundt,
Thomas Gleixner, Ingo Molnar, Peter Zijlstra, Rafael J. Wysocki,
Daniel Lezcano
Cc: linaro-kernel, linux-pm, linux-sh, linux-kernel, linuxppc-dev,
linux-arm-kernel
In-Reply-To: <1391017513-12995-1-git-send-email-nicolas.pitre@linaro.org>
The core idle loop now takes care of it.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
arch/x86/kernel/process.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 3fb8d95ab8..4505e2a950 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -298,10 +298,7 @@ void arch_cpu_idle_dead(void)
*/
void arch_cpu_idle(void)
{
- if (cpuidle_idle_call())
- x86_idle();
- else
- local_irq_enable();
+ x86_idle();
}
/*
--
1.8.4.108.g55ea5f6
^ permalink raw reply related
* [PATCH v2 3/6] PPC: remove redundant cpuidle_idle_call()
From: Nicolas Pitre @ 2014-01-29 17:45 UTC (permalink / raw)
To: Russell King, Benjamin Herrenschmidt, Preeti U Murthy, Paul Mundt,
Thomas Gleixner, Ingo Molnar, Peter Zijlstra, Rafael J. Wysocki,
Daniel Lezcano
Cc: linaro-kernel, linux-pm, linux-sh, linux-kernel, linuxppc-dev,
linux-arm-kernel
In-Reply-To: <1391017513-12995-1-git-send-email-nicolas.pitre@linaro.org>
The core idle loop now takes care of it. However a few things need
checking:
- Invocation of cpuidle_idle_call() in pseries_lpar_idle() happened
through arch_cpu_idle() and was therefore always preceded by a call
to ppc64_runlatch_off(). To preserve this property now that
cpuidle_idle_call() is invoked directly from core code, a call to
ppc64_runlatch_off() has been added to idle_loop_prolog() in
platforms/pseries/processor_idle.c.
- Similarly, cpuidle_idle_call() was followed by ppc64_runlatch_off()
so a call to the later has been added to idle_loop_epilog().
- And since arch_cpu_idle() always made sure to re-enable IRQs if they
were not enabled, this is now
done in idle_loop_epilog() as well.
The above was made in order to keep the execution flow close to the
original. I don't know if that was strictly necessary. Someone well
aquainted with the platform details might find some room for possible
optimizations.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Preeti U Murthy <preeti@linux.vnet.ibm.com>
---
arch/powerpc/platforms/pseries/processor_idle.c | 5 ++++
arch/powerpc/platforms/pseries/setup.c | 34 ++++++++++---------------
2 files changed, 19 insertions(+), 20 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/processor_idle.c b/arch/powerpc/platforms/pseries/processor_idle.c
index a166e38bd6..72ddfe3d2f 100644
--- a/arch/powerpc/platforms/pseries/processor_idle.c
+++ b/arch/powerpc/platforms/pseries/processor_idle.c
@@ -33,6 +33,7 @@ static struct cpuidle_state *cpuidle_state_table;
static inline void idle_loop_prolog(unsigned long *in_purr)
{
+ ppc64_runlatch_off();
*in_purr = mfspr(SPRN_PURR);
/*
* Indicate to the HV that we are idle. Now would be
@@ -49,6 +50,10 @@ static inline void idle_loop_epilog(unsigned long in_purr)
wait_cycles += mfspr(SPRN_PURR) - in_purr;
get_lppaca()->wait_state_cycles = cpu_to_be64(wait_cycles);
get_lppaca()->idle = 0;
+
+ if (irqs_disabled())
+ local_irq_enable();
+ ppc64_runlatch_on();
}
static int snooze_loop(struct cpuidle_device *dev,
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index c1f1908587..7604c19d54 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -39,7 +39,6 @@
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
-#include <linux/cpuidle.h>
#include <linux/of.h>
#include <linux/kexec.h>
@@ -356,29 +355,24 @@ early_initcall(alloc_dispatch_log_kmem_cache);
static void pseries_lpar_idle(void)
{
- /* This would call on the cpuidle framework, and the back-end pseries
- * driver to go to idle states
+ /*
+ * Default handler to go into low thread priority and possibly
+ * low power mode by cedeing processor to hypervisor
*/
- if (cpuidle_idle_call()) {
- /* On error, execute default handler
- * to go into low thread priority and possibly
- * low power mode by cedeing processor to hypervisor
- */
- /* Indicate to hypervisor that we are idle. */
- get_lppaca()->idle = 1;
+ /* Indicate to hypervisor that we are idle. */
+ get_lppaca()->idle = 1;
- /*
- * Yield the processor to the hypervisor. We return if
- * an external interrupt occurs (which are driven prior
- * to returning here) or if a prod occurs from another
- * processor. When returning here, external interrupts
- * are enabled.
- */
- cede_processor();
+ /*
+ * Yield the processor to the hypervisor. We return if
+ * an external interrupt occurs (which are driven prior
+ * to returning here) or if a prod occurs from another
+ * processor. When returning here, external interrupts
+ * are enabled.
+ */
+ cede_processor();
- get_lppaca()->idle = 0;
- }
+ get_lppaca()->idle = 0;
}
/*
--
1.8.4.108.g55ea5f6
^ permalink raw reply related
* [PATCH v2 4/6] SH: remove redundant cpuidle_idle_call()
From: Nicolas Pitre @ 2014-01-29 17:45 UTC (permalink / raw)
To: Russell King, Benjamin Herrenschmidt, Preeti U Murthy, Paul Mundt,
Thomas Gleixner, Ingo Molnar, Peter Zijlstra, Rafael J. Wysocki,
Daniel Lezcano
Cc: linaro-kernel, linux-pm, linux-sh, linux-kernel, linuxppc-dev,
linux-arm-kernel
In-Reply-To: <1391017513-12995-1-git-send-email-nicolas.pitre@linaro.org>
The core idle loop now takes care of it.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
arch/sh/kernel/idle.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
index 2ea4483fd7..be616ee0cf 100644
--- a/arch/sh/kernel/idle.c
+++ b/arch/sh/kernel/idle.c
@@ -16,7 +16,6 @@
#include <linux/thread_info.h>
#include <linux/irqflags.h>
#include <linux/smp.h>
-#include <linux/cpuidle.h>
#include <linux/atomic.h>
#include <asm/pgalloc.h>
#include <asm/smp.h>
@@ -40,8 +39,7 @@ void arch_cpu_idle_dead(void)
void arch_cpu_idle(void)
{
- if (cpuidle_idle_call())
- sh_idle();
+ sh_idle();
}
void __init select_idle_routine(void)
--
1.8.4.108.g55ea5f6
^ permalink raw reply related
* [PATCH v2 2/6] ARM: remove redundant cpuidle_idle_call()
From: Nicolas Pitre @ 2014-01-29 17:45 UTC (permalink / raw)
To: Russell King, Benjamin Herrenschmidt, Preeti U Murthy, Paul Mundt,
Thomas Gleixner, Ingo Molnar, Peter Zijlstra, Rafael J. Wysocki,
Daniel Lezcano
Cc: linaro-kernel, linux-pm, linux-sh, linux-kernel, linuxppc-dev,
linux-arm-kernel
In-Reply-To: <1391017513-12995-1-git-send-email-nicolas.pitre@linaro.org>
The core idle loop now takes care of it.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
arch/arm/kernel/process.c | 16 +++++-----------
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 92f7b15dd2..adabeababe 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -30,7 +30,6 @@
#include <linux/uaccess.h>
#include <linux/random.h>
#include <linux/hw_breakpoint.h>
-#include <linux/cpuidle.h>
#include <linux/leds.h>
#include <linux/reboot.h>
@@ -133,7 +132,11 @@ EXPORT_SYMBOL_GPL(arm_pm_restart);
void (*arm_pm_idle)(void);
-static void default_idle(void)
+/*
+ * Called from the core idle loop.
+ */
+
+void arch_cpu_idle(void)
{
if (arm_pm_idle)
arm_pm_idle();
@@ -168,15 +171,6 @@ void arch_cpu_idle_dead(void)
#endif
/*
- * Called from the core idle loop.
- */
-void arch_cpu_idle(void)
-{
- if (cpuidle_idle_call())
- default_idle();
-}
-
-/*
* Called by kexec, immediately prior to machine_kexec().
*
* This must completely disable all secondary CPUs; simply causing those CPUs
--
1.8.4.108.g55ea5f6
^ permalink raw reply related
* [PATCH v2 1/6] idle: move the cpuidle entry point to the generic idle loop
From: Nicolas Pitre @ 2014-01-29 17:45 UTC (permalink / raw)
To: Russell King, Benjamin Herrenschmidt, Preeti U Murthy, Paul Mundt,
Thomas Gleixner, Ingo Molnar, Peter Zijlstra, Rafael J. Wysocki,
Daniel Lezcano
Cc: linaro-kernel, linux-pm, linux-sh, linux-kernel, linuxppc-dev,
linux-arm-kernel
In-Reply-To: <1391017513-12995-1-git-send-email-nicolas.pitre@linaro.org>
In order to integrate cpuidle with the scheduler, we must have a better
proximity in the core code with what cpuidle is doing and not delegate
such interaction to arch code.
Architectures implementing arch_cpu_idle() should simply enter
a cheap idle mode in the absence of a proper cpuidle driver.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
kernel/cpu/idle.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/kernel/cpu/idle.c b/kernel/cpu/idle.c
index 988573a9a3..ffcd3ee9af 100644
--- a/kernel/cpu/idle.c
+++ b/kernel/cpu/idle.c
@@ -3,6 +3,7 @@
*/
#include <linux/sched.h>
#include <linux/cpu.h>
+#include <linux/cpuidle.h>
#include <linux/tick.h>
#include <linux/mm.h>
#include <linux/stackprotector.h>
@@ -95,7 +96,8 @@ static void cpu_idle_loop(void)
if (!current_clr_polling_and_test()) {
stop_critical_timings();
rcu_idle_enter();
- arch_cpu_idle();
+ if (cpuidle_idle_call())
+ arch_cpu_idle();
WARN_ON_ONCE(irqs_disabled());
rcu_idle_exit();
start_critical_timings();
--
1.8.4.108.g55ea5f6
^ permalink raw reply related
* [PATCH v2 0/6] setting the table for integration of cpuidle with the scheduler
From: Nicolas Pitre @ 2014-01-29 17:45 UTC (permalink / raw)
To: Russell King, Benjamin Herrenschmidt, Preeti U Murthy, Paul Mundt,
Thomas Gleixner, Ingo Molnar, Peter Zijlstra, Rafael J. Wysocki,
Daniel Lezcano
Cc: linaro-kernel, linux-pm, linux-sh, linux-kernel, linuxppc-dev,
linux-arm-kernel
As everyone should know by now, we want to integrate the cpuidle
governor with the scheduler for a more efficient idling of CPUs.
In order to help the transition, this small patch series moves the
existing interaction with cpuidle from architecture code to generic
core code. The ARM, PPC, SH and X86 architectures are concerned.
No functional change should have occurred yet.
@peterz: Are you willing to pick up those patches?
Change from v1:
- dropped removal of arch_cpu_idle_prepare()
arch/arm/kernel/process.c | 16 +++------
arch/powerpc/platforms/pseries/processor_idle.c | 5 +++
arch/powerpc/platforms/pseries/setup.c | 34 ++++++++-----------
arch/sh/kernel/idle.c | 4 +--
arch/x86/kernel/process.c | 5 +--
kernel/Makefile | 1 -
kernel/cpu/Makefile | 1 -
kernel/sched/Makefile | 2 +-
kernel/{cpu => sched}/idle.c | 4 ++-
9 files changed, 30 insertions(+), 42 deletions(-)
Nicolas
^ permalink raw reply
* Re: [RFC PATCH 10/10] PPC: BOOK3S: Disable/Enable TM looking at the ibm,pa-features device tree entry
From: Alexander Graf @ 2014-01-29 17:37 UTC (permalink / raw)
To: Aneesh Kumar K.V; +Cc: paulus, linuxppc-dev, kvm-ppc, kvm
In-Reply-To: <1390927455-3312-11-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On 01/28/2014 05:44 PM, Aneesh Kumar K.V wrote:
> Runtime disable transactional memory feature looking at pa-features
> device tree entry. We need to do this so that we can run a kernel
> built with TM config in PR mode. For PR guest we provide a device
> tree entry with TM feature disabled in pa-features
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
We need to be able to run kernels without this patch, so better fix TM
for good - worst case by always aborting transactions.
Alex
> ---
> arch/powerpc/kernel/prom.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
> index fa0ad8aafbcc..de8c2caf1024 100644
> --- a/arch/powerpc/kernel/prom.c
> +++ b/arch/powerpc/kernel/prom.c
> @@ -160,6 +160,11 @@ static struct ibm_pa_feature {
> {CPU_FTR_NODSISRALIGN, 0, 0, 1, 1, 1},
> {0, MMU_FTR_CI_LARGE_PAGE, 0, 1, 2, 0},
> {CPU_FTR_REAL_LE, PPC_FEATURE_TRUE_LE, 5, 0, 0},
> + /*
> + * We should use CPU_FTR_TM_COMP so that if we disable TM, it won't get
> + * enabled via device tree
> + */
> + {CPU_FTR_TM_COMP, 0, 0, 22, 0, 0},
> };
>
> static void __init scan_features(unsigned long node, unsigned char *ftrs,
^ permalink raw reply
* Re: [RFC PATCH 08/10] KVM: PPC: BOOK3S: PR: Add support for facility unavailable interrupt
From: Alexander Graf @ 2014-01-29 17:35 UTC (permalink / raw)
To: Aneesh Kumar K.V; +Cc: paulus, linuxppc-dev, kvm-ppc, kvm
In-Reply-To: <1390927455-3312-9-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On 01/28/2014 05:44 PM, Aneesh Kumar K.V wrote:
> At this point we allow all the supported facilities except EBB. So
> forward the interrupt to guest as illegal instruction.
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
> ---
> arch/powerpc/include/asm/kvm_asm.h | 4 +++-
> arch/powerpc/kvm/book3s.c | 4 ++++
> arch/powerpc/kvm/book3s_emulate.c | 18 ++++++++++++++++++
> arch/powerpc/kvm/book3s_pr.c | 17 +++++++++++++++++
> 4 files changed, 42 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h
> index 1bd92fd43cfb..799244face51 100644
> --- a/arch/powerpc/include/asm/kvm_asm.h
> +++ b/arch/powerpc/include/asm/kvm_asm.h
> @@ -99,6 +99,7 @@
> #define BOOK3S_INTERRUPT_PERFMON 0xf00
> #define BOOK3S_INTERRUPT_ALTIVEC 0xf20
> #define BOOK3S_INTERRUPT_VSX 0xf40
> +#define BOOK3S_INTERRUPT_FAC_UNAVAIL 0xf60
>
> #define BOOK3S_IRQPRIO_SYSTEM_RESET 0
> #define BOOK3S_IRQPRIO_DATA_SEGMENT 1
> @@ -117,7 +118,8 @@
> #define BOOK3S_IRQPRIO_DECREMENTER 14
> #define BOOK3S_IRQPRIO_PERFORMANCE_MONITOR 15
> #define BOOK3S_IRQPRIO_EXTERNAL_LEVEL 16
> -#define BOOK3S_IRQPRIO_MAX 17
> +#define BOOK3S_IRQPRIO_FAC_UNAVAIL 17
> +#define BOOK3S_IRQPRIO_MAX 18
>
> #define BOOK3S_HFLAG_DCBZ32 0x1
> #define BOOK3S_HFLAG_SLB 0x2
> diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
> index 8912608b7e1b..a9aea28c2677 100644
> --- a/arch/powerpc/kvm/book3s.c
> +++ b/arch/powerpc/kvm/book3s.c
> @@ -143,6 +143,7 @@ static int kvmppc_book3s_vec2irqprio(unsigned int vec)
> case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
> case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
> case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
> + case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
> default: prio = BOOK3S_IRQPRIO_MAX; break;
> }
>
> @@ -273,6 +274,9 @@ int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, unsigned int priority)
> case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
> vec = BOOK3S_INTERRUPT_PERFMON;
> break;
> + case BOOK3S_IRQPRIO_FAC_UNAVAIL:
> + vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
> + break;
> default:
> deliver = 0;
> printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
> diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c
> index 60d0b6b745e7..bf6b11021250 100644
> --- a/arch/powerpc/kvm/book3s_emulate.c
> +++ b/arch/powerpc/kvm/book3s_emulate.c
> @@ -481,6 +481,15 @@ int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
> vcpu->arch.shadow_fscr = vcpu->arch.fscr & host_fscr;
> break;
> }
> + case SPRN_EBBHR:
> + vcpu->arch.ebbhr = spr_val;
> + break;
> + case SPRN_EBBRR:
> + vcpu->arch.ebbrr = spr_val;
> + break;
> + case SPRN_BESCR:
> + vcpu->arch.bescr = spr_val;
> + break;
> unprivileged:
> default:
> printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
> @@ -607,6 +616,15 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val
> case SPRN_FSCR:
> *spr_val = vcpu->arch.fscr;
> break;
> + case SPRN_EBBHR:
> + *spr_val = vcpu->arch.ebbhr;
> + break;
> + case SPRN_EBBRR:
> + *spr_val = vcpu->arch.ebbrr;
> + break;
> + case SPRN_BESCR:
> + *spr_val = vcpu->arch.bescr;
> + break;
> default:
> unprivileged:
> printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
> diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
> index 51d469f8c9fd..828056ec208f 100644
> --- a/arch/powerpc/kvm/book3s_pr.c
> +++ b/arch/powerpc/kvm/book3s_pr.c
> @@ -900,6 +900,23 @@ int kvmppc_handle_exit_pr(struct kvm_run *run, struct kvm_vcpu *vcpu,
> case BOOK3S_INTERRUPT_PERFMON:
> r = RESUME_GUEST;
> break;
> + case BOOK3S_INTERRUPT_FAC_UNAVAIL:
> + {
> + /*
> + * Check for the facility that need to be emulated
> + */
> + ulong fscr_ic = vcpu->arch.shadow_fscr >> 56;
> + if (fscr_ic != FSCR_EBB_LG) {
> + /*
> + * We only disable EBB facility.
> + * So only emulate that.
I don't understand the comment. We emulate nothing at all here. We either
- hit an EBB unavailable in which case we send the guest an illegal
instruction interrupt or we
- hit another facility interrupt in which case we forward the
interrupt to the guest, but not the interrupt cause (fscr_ic).
I think the EBB case should be explicit:
/* We don't allow EBB inside the guest, so something must have gone
terribly wrong */
if (fscr_ic == FSCR_EBB_LG)
BUG();
vcpu->arch.fscr &= ~FSCR_IC_MASK;
vcpu->arch.fscr |= vcpu->arch.shadow_fscr & FSCR_IC_MASK;
kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
r = RESUME_GUEST;
break;
Alex
> + */
> + kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
> + r = RESUME_GUEST;
> + break;
> + }
> + /* Fall through */
> + }
> case BOOK3S_INTERRUPT_PROGRAM:
> case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
> {
^ permalink raw reply
* Re: [RFC PATCH 07/10] KVM: PPC: BOOK3S: PR: Emulate facility status and control register
From: Alexander Graf @ 2014-01-29 17:11 UTC (permalink / raw)
To: Aneesh Kumar K.V; +Cc: paulus, linuxppc-dev, kvm-ppc, kvm
In-Reply-To: <1390927455-3312-8-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On 01/28/2014 05:44 PM, Aneesh Kumar K.V wrote:
> We allow priv-mode update of this. The guest value is saved in fscr,
> and the value actually used is saved in shadow_fscr. shadow_fscr
> only contains values that are allowed by the host. On
> facility unavailable interrupt, if the facility is allowed by fscr
> but disabled in shadow_fscr we need to emulate the support. Currently
> all but EBB is disabled. We still don't support performance monitoring
> in PR guest.
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
> ---
> arch/powerpc/include/asm/kvm_book3s_asm.h | 1 +
> arch/powerpc/include/asm/kvm_host.h | 1 +
> arch/powerpc/kernel/asm-offsets.c | 2 ++
> arch/powerpc/kvm/book3s_emulate.c | 16 ++++++++++++++++
> arch/powerpc/kvm/book3s_interrupts.S | 25 ++++++++++++++++++++++---
> 5 files changed, 42 insertions(+), 3 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/kvm_book3s_asm.h b/arch/powerpc/include/asm/kvm_book3s_asm.h
> index 192917d2239c..abd42523ad93 100644
> --- a/arch/powerpc/include/asm/kvm_book3s_asm.h
> +++ b/arch/powerpc/include/asm/kvm_book3s_asm.h
> @@ -103,6 +103,7 @@ struct kvmppc_host_state {
> #ifdef CONFIG_PPC_BOOK3S_64
> u64 cfar;
> u64 ppr;
> + u64 host_fscr;
> #endif
> };
>
> diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
> index e0b13aca98e6..f4be7be14330 100644
> --- a/arch/powerpc/include/asm/kvm_host.h
> +++ b/arch/powerpc/include/asm/kvm_host.h
> @@ -478,6 +478,7 @@ struct kvm_vcpu_arch {
> ulong ppr;
> ulong pspb;
> ulong fscr;
> + ulong shadow_fscr;
> ulong tfhar;
> ulong tfiar;
> ulong texasr;
> diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
> index 2c2227da6917..7484676b8f25 100644
> --- a/arch/powerpc/kernel/asm-offsets.c
> +++ b/arch/powerpc/kernel/asm-offsets.c
> @@ -525,6 +525,7 @@ int main(void)
> DEFINE(VCPU_CFAR, offsetof(struct kvm_vcpu, arch.cfar));
> DEFINE(VCPU_PPR, offsetof(struct kvm_vcpu, arch.ppr));
> DEFINE(VCPU_FSCR, offsetof(struct kvm_vcpu, arch.fscr));
> + DEFINE(VCPU_SHADOW_FSCR, offsetof(struct kvm_vcpu, arch.shadow_fscr));
> DEFINE(VCPU_PSPB, offsetof(struct kvm_vcpu, arch.pspb));
> DEFINE(VCPU_TFHAR, offsetof(struct kvm_vcpu, arch.tfhar));
> DEFINE(VCPU_TFIAR, offsetof(struct kvm_vcpu, arch.tfiar));
> @@ -626,6 +627,7 @@ int main(void)
> #ifdef CONFIG_PPC_BOOK3S_64
> HSTATE_FIELD(HSTATE_CFAR, cfar);
> HSTATE_FIELD(HSTATE_PPR, ppr);
> + HSTATE_FIELD(HSTATE_FSCR, host_fscr);
> #endif /* CONFIG_PPC_BOOK3S_64 */
>
> #else /* CONFIG_PPC_BOOK3S */
> diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c
> index 7f25adbd2590..60d0b6b745e7 100644
> --- a/arch/powerpc/kvm/book3s_emulate.c
> +++ b/arch/powerpc/kvm/book3s_emulate.c
> @@ -468,6 +468,19 @@ int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
> case SPRN_MSSSR0:
> case SPRN_DABR:
> break;
> + case SPRN_FSCR:
> + {
> + ulong host_fscr = mfspr(SPRN_FSCR);
> + /*
> + * We disable FSCR_EBB for pr guest. TAR and DSCR are always
> + * enabled.
> + */
> + if (spr_val & ~(FSCR_TAR|FSCR_DSCR|FSCR_EBB))
> + pr_info("KVM: invalud FSCR value 0x%lx", spr_val);
Is this worth printing at all? If it is, it's probably more of a
pr_debug(). Also s/invalud/invalid/.
Alex
> + vcpu->arch.fscr = spr_val & (FSCR_TAR|FSCR_DSCR);
> + vcpu->arch.shadow_fscr = vcpu->arch.fscr & host_fscr;
> + break;
> + }
> unprivileged:
> default:
> printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
> @@ -591,6 +604,9 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val
> */
> *spr_val = 0;
> break;
> + case SPRN_FSCR:
> + *spr_val = vcpu->arch.fscr;
> + break;
> default:
> unprivileged:
> printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
> diff --git a/arch/powerpc/kvm/book3s_interrupts.S b/arch/powerpc/kvm/book3s_interrupts.S
> index f779450cb07c..fcbdf4817301 100644
> --- a/arch/powerpc/kvm/book3s_interrupts.S
> +++ b/arch/powerpc/kvm/book3s_interrupts.S
> @@ -107,6 +107,14 @@ kvm_start_lightweight:
> ld r3, VCPU_SHARED(r4)
> ld r3, VCPU_SHARED_SPRG3(r3)
> mtspr SPRN_SPRG3, r3
> +
> +BEGIN_FTR_SECTION
> + mfspr r3,SPRN_FSCR
> + PPC_STL r3, HSTATE_FSCR(r13)
> +
> + PPC_LL r3, VCPU_SHADOW_FSCR(r4)
> + mtspr SPRN_FSCR, r3
> +END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
> #endif /* CONFIG_PPC_BOOK3S_64 */
>
> PPC_LL r4, VCPU_SHADOW_MSR(r4) /* get shadow_msr */
> @@ -148,6 +156,9 @@ kvm_start_lightweight:
> bl FUNC(kvmppc_copy_from_svcpu)
> nop
>
> + /* R7 = vcpu */
> + PPC_LL r7, GPR4(r1)
> +
> #ifdef CONFIG_PPC_BOOK3S_64
> /*
> * Reload kernel SPRG3 value.
> @@ -155,10 +166,18 @@ kvm_start_lightweight:
> */
> ld r3, PACA_SPRG3(r13)
> mtspr SPRN_SPRG3, r3
> -#endif /* CONFIG_PPC_BOOK3S_64 */
> +BEGIN_FTR_SECTION
> + /*
> + * Save the current fscr in shadow fscr
> + */
> + mfspr r3,SPRN_FSCR
> + PPC_STL r3, VCPU_SHADOW_FSCR(r7)
>
> - /* R7 = vcpu */
> - PPC_LL r7, GPR4(r1)
> + PPC_LL r3, HSTATE_FSCR(r13)
> + mtspr SPRN_FSCR, r3
> +END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
> +
> +#endif /* CONFIG_PPC_BOOK3S_64 */
>
> PPC_STL r14, VCPU_GPR(R14)(r7)
> PPC_STL r15, VCPU_GPR(R15)(r7)
^ permalink raw reply
* Re: [RFC PATCH 03/10] KVM: PPC: BOOK3S: PR: Emulate instruction counter
From: Alexander Graf @ 2014-01-29 16:40 UTC (permalink / raw)
To: Aneesh Kumar K.V; +Cc: paulus, linuxppc-dev, kvm-ppc, kvm
In-Reply-To: <1390927455-3312-4-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On 01/28/2014 05:44 PM, Aneesh Kumar K.V wrote:
> Writing to IC is not allowed in the privileged mode.
This is not a patch description.
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
> ---
> arch/powerpc/include/asm/kvm_host.h | 1 +
> arch/powerpc/kvm/book3s_emulate.c | 3 +++
> arch/powerpc/kvm/book3s_pr.c | 2 ++
> 3 files changed, 6 insertions(+)
>
> diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
> index 9ebdd12e50a9..e0b13aca98e6 100644
> --- a/arch/powerpc/include/asm/kvm_host.h
> +++ b/arch/powerpc/include/asm/kvm_host.h
> @@ -509,6 +509,7 @@ struct kvm_vcpu_arch {
> /* Time base value when we entered the guest */
> u64 entry_tb;
> u64 entry_vtb;
> + u64 entry_ic;
> u32 tcr;
> ulong tsr; /* we need to perform set/clr_bits() which requires ulong */
> u32 ivor[64];
> diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c
> index 4b58d8a90cb5..abe6f3057e5b 100644
> --- a/arch/powerpc/kvm/book3s_emulate.c
> +++ b/arch/powerpc/kvm/book3s_emulate.c
> @@ -531,6 +531,9 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val
> case SPRN_VTB:
> *spr_val = vcpu->arch.vtb;
> break;
> + case SPRN_IC:
> + *spr_val = vcpu->arch.ic;
> + break;
> case SPRN_GQR0:
> case SPRN_GQR1:
> case SPRN_GQR2:
> diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
> index b5598e9cdd09..51d469f8c9fd 100644
> --- a/arch/powerpc/kvm/book3s_pr.c
> +++ b/arch/powerpc/kvm/book3s_pr.c
> @@ -121,6 +121,7 @@ void kvmppc_copy_to_svcpu(struct kvmppc_book3s_shadow_vcpu *svcpu,
> */
> vcpu->arch.entry_tb = get_tb();
> vcpu->arch.entry_vtb = get_vtb();
> + vcpu->arch.entry_ic = mfspr(SPRN_IC);
Is this implemented on all systems?
>
> }
>
> @@ -174,6 +175,7 @@ out:
> vcpu->arch.purr += get_tb() - vcpu->arch.entry_tb;
> vcpu->arch.spurr += get_tb() - vcpu->arch.entry_tb;
> vcpu->arch.vtb += get_vtb() - vcpu->arch.entry_vtb;
> + vcpu->arch.ic += mfspr(SPRN_IC) - vcpu->arch.entry_ic;
This is getting quite convoluted. How about we act slightly more fuzzy
and put all of this into vcpu_load/put?
Alex
^ permalink raw reply
* Re: [RFC PATCH 02/10] KVM: PPC: BOOK3S: PR: Emulate virtual timebase register
From: Alexander Graf @ 2014-01-29 16:39 UTC (permalink / raw)
To: Aneesh Kumar K.V; +Cc: paulus, linuxppc-dev, kvm-ppc, kvm
In-Reply-To: <1390927455-3312-3-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On 01/28/2014 05:44 PM, Aneesh Kumar K.V wrote:
> virtual time base register is a per vm register and need to saved
> and restored on vm exit and entry. Writing to VTB is not allowed
> in the privileged mode.
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
> ---
> arch/powerpc/include/asm/kvm_host.h | 1 +
> arch/powerpc/include/asm/reg.h | 7 +++++++
> arch/powerpc/include/asm/time.h | 12 ++++++++++++
> arch/powerpc/kvm/book3s_emulate.c | 3 +++
> arch/powerpc/kvm/book3s_pr.c | 3 +++
> 5 files changed, 26 insertions(+)
>
> diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
> index 0a3785271f34..9ebdd12e50a9 100644
> --- a/arch/powerpc/include/asm/kvm_host.h
> +++ b/arch/powerpc/include/asm/kvm_host.h
> @@ -508,6 +508,7 @@ struct kvm_vcpu_arch {
> #endif
> /* Time base value when we entered the guest */
> u64 entry_tb;
> + u64 entry_vtb;
> u32 tcr;
> ulong tsr; /* we need to perform set/clr_bits() which requires ulong */
> u32 ivor[64];
> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
> index e789f76c9bc2..6c649355b1e9 100644
> --- a/arch/powerpc/include/asm/reg.h
> +++ b/arch/powerpc/include/asm/reg.h
> @@ -1161,6 +1161,13 @@
> #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : \
> : "r" ((unsigned long)(v)) \
> : "memory")
> +#ifdef CONFIG_PPC_BOOK3S_64
> +#define mfvtb() ({unsigned long rval; \
> + asm volatile("mfspr %0, %1" : \
> + "=r" (rval) : "i" (SPRN_VTB)); rval;})
> +#else
> +#define mfvtb() BUG()
> +#endif
static inline mfvtb(unsigned long)
{
#ifdef CONFIG_PPC_BOOK3S_64
return mfspr(SPRN_VTB);
#else
BUG();
#endif
}
is a lot easier to read and get right. But reg.h is Ben's call.
Also could you please give me a pointer to the specification for it? I
tried to look up vtb in the 2.06 ISA and couldn't find it. Is it a CPU
specific register?
>
> #ifdef __powerpc64__
> #if defined(CONFIG_PPC_CELL) || defined(CONFIG_PPC_FSL_BOOK3E)
> diff --git a/arch/powerpc/include/asm/time.h b/arch/powerpc/include/asm/time.h
> index c1f267694acb..1e89dbc665d9 100644
> --- a/arch/powerpc/include/asm/time.h
> +++ b/arch/powerpc/include/asm/time.h
> @@ -101,6 +101,18 @@ static inline u64 get_rtc(void)
> return (u64)hi * 1000000000 + lo;
> }
>
> +#ifdef CONFIG_PPC_BOOK3S_64
> +static inline u64 get_vtb(void)
> +{
> + return mfvtb();
> +}
> +#else
> +static inline u64 get_vtb(void)
> +{
> + return 0;
> +}
> +#endif
Just put the #ifdef inside the function body.
> +
> #ifdef CONFIG_PPC64
> static inline u64 get_tb(void)
> {
> diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c
> index e1f1e5e16449..4b58d8a90cb5 100644
> --- a/arch/powerpc/kvm/book3s_emulate.c
> +++ b/arch/powerpc/kvm/book3s_emulate.c
> @@ -528,6 +528,9 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val
> */
> *spr_val = vcpu->arch.spurr;
> break;
> + case SPRN_VTB:
> + *spr_val = vcpu->arch.vtb;
> + break;
> case SPRN_GQR0:
> case SPRN_GQR1:
> case SPRN_GQR2:
> diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
> index 02231f5193c2..b5598e9cdd09 100644
> --- a/arch/powerpc/kvm/book3s_pr.c
> +++ b/arch/powerpc/kvm/book3s_pr.c
> @@ -120,6 +120,8 @@ void kvmppc_copy_to_svcpu(struct kvmppc_book3s_shadow_vcpu *svcpu,
> * to find the guest purr and spurr value.
> */
> vcpu->arch.entry_tb = get_tb();
> + vcpu->arch.entry_vtb = get_vtb();
> +
> }
>
> /* Copy data touched by real-mode code from shadow vcpu back to vcpu */
> @@ -171,6 +173,7 @@ out:
> */
> vcpu->arch.purr += get_tb() - vcpu->arch.entry_tb;
> vcpu->arch.spurr += get_tb() - vcpu->arch.entry_tb;
> + vcpu->arch.vtb += get_vtb() - vcpu->arch.entry_vtb;
I thought it's per vm? That would contradict the per-vcpu logic you're
implementing here. This way vtb scews with world switches on SMP guests.
Alex
^ permalink raw reply
* [PATCH] Handle vmalloc addresses
From: Nathan Fontenot @ 2014-01-29 16:34 UTC (permalink / raw)
To: linuxppc-dev@lists.ozlabs.org; +Cc: Rong Song Shen
The nx-842 compression driver does not currently handle getting
a physical address for vmalloc addresses. The current driver
uses __pa() for all addresses which does not properly handle
vmalloc addresses and thus causes a failure since we do not pass
a proper physical address to phyp.
This patch adds a routine to convert an address to a physical
address by checking for vmalloc addresses and handling them properly.
Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
---
drivers/crypto/nx/nx-842.c | 29 +++++++++++++++++++----------
1 file changed, 19 insertions(+), 10 deletions(-)
Index: linux/drivers/crypto/nx/nx-842.c
===================================================================
--- linux.orig/drivers/crypto/nx/nx-842.c 2014-01-22 08:52:55.000000000 -0600
+++ linux/drivers/crypto/nx/nx-842.c 2014-01-29 08:25:33.000000000 -0600
@@ -158,6 +158,15 @@
return sl->entry_nr * sizeof(struct nx842_slentry);
}
+static inline unsigned long nx842_get_pa(void *addr)
+{
+ if (is_vmalloc_addr(addr))
+ return page_to_phys(vmalloc_to_page(addr))
+ + offset_in_page(addr);
+ else
+ return __pa(addr);
+}
+
static int nx842_build_scatterlist(unsigned long buf, int len,
struct nx842_scatterlist *sl)
{
@@ -168,7 +177,7 @@
entry = sl->entries;
while (len) {
- entry->ptr = __pa(buf);
+ entry->ptr = nx842_get_pa((void *)buf);
nextpage = ALIGN(buf + 1, NX842_HW_PAGE_SIZE);
if (nextpage < buf + len) {
/* we aren't at the end yet */
@@ -370,8 +379,8 @@
op.flags = NX842_OP_COMPRESS;
csbcpb = &workmem->csbcpb;
memset(csbcpb, 0, sizeof(*csbcpb));
- op.csbcpb = __pa(csbcpb);
- op.out = __pa(slout.entries);
+ op.csbcpb = nx842_get_pa(csbcpb);
+ op.out = nx842_get_pa(slout.entries);
for (i = 0; i < hdr->blocks_nr; i++) {
/*
@@ -401,13 +410,13 @@
*/
if (likely(max_sync_size == NX842_HW_PAGE_SIZE)) {
/* Create direct DDE */
- op.in = __pa(inbuf);
+ op.in = nx842_get_pa((void *)inbuf);
op.inlen = max_sync_size;
} else {
/* Create indirect DDE (scatterlist) */
nx842_build_scatterlist(inbuf, max_sync_size, &slin);
- op.in = __pa(slin.entries);
+ op.in = nx842_get_pa(slin.entries);
op.inlen = -nx842_get_scatterlist_size(&slin);
}
@@ -565,7 +574,7 @@
op.flags = NX842_OP_DECOMPRESS;
csbcpb = &workmem->csbcpb;
memset(csbcpb, 0, sizeof(*csbcpb));
- op.csbcpb = __pa(csbcpb);
+ op.csbcpb = nx842_get_pa(csbcpb);
/*
* max_sync_size may have changed since compression,
@@ -597,12 +606,12 @@
if (likely((inbuf & NX842_HW_PAGE_MASK) ==
((inbuf + hdr->sizes[i] - 1) & NX842_HW_PAGE_MASK))) {
/* Create direct DDE */
- op.in = __pa(inbuf);
+ op.in = nx842_get_pa((void *)inbuf);
op.inlen = hdr->sizes[i];
} else {
/* Create indirect DDE (scatterlist) */
nx842_build_scatterlist(inbuf, hdr->sizes[i] , &slin);
- op.in = __pa(slin.entries);
+ op.in = nx842_get_pa(slin.entries);
op.inlen = -nx842_get_scatterlist_size(&slin);
}
@@ -613,12 +622,12 @@
*/
if (likely(max_sync_size == NX842_HW_PAGE_SIZE)) {
/* Create direct DDE */
- op.out = __pa(outbuf);
+ op.out = nx842_get_pa((void *)outbuf);
op.outlen = max_sync_size;
} else {
/* Create indirect DDE (scatterlist) */
nx842_build_scatterlist(outbuf, max_sync_size, &slout);
- op.out = __pa(slout.entries);
+ op.out = nx842_get_pa(slout.entries);
op.outlen = -nx842_get_scatterlist_size(&slout);
}
^ permalink raw reply
* Re: [RFC PATCH 01/10] KVM: PPC: BOOK3S: PR: Fix PURR and SPURR emulation
From: Alexander Graf @ 2014-01-29 16:32 UTC (permalink / raw)
To: Aneesh Kumar K.V; +Cc: paulus, linuxppc-dev, kvm-ppc, kvm
In-Reply-To: <1390927455-3312-2-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On 01/28/2014 05:44 PM, Aneesh Kumar K.V wrote:
> We definitely don't need to emulate mtspr, because both the registers
> are hypervisor resource.
This patch description doesn't cover what the patch actually does. It
changes the implementation from "always tell the guest it uses 100%" to
"give the guest an accurate amount of cpu time spent inside guest context".
Also, I think we either go with full hyp semantics which means we also
emulate the offset or we go with no hyp awareness in the guest at all
which means we also don't emulate SPURR which is a hyp privileged register.
Otherwise I like the patch :).
Alex
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
> ---
> arch/powerpc/include/asm/kvm_book3s.h | 2 --
> arch/powerpc/include/asm/kvm_host.h | 4 ++--
> arch/powerpc/kvm/book3s_emulate.c | 16 ++++++++--------
> arch/powerpc/kvm/book3s_pr.c | 10 ++++++++++
> 4 files changed, 20 insertions(+), 12 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
> index bc23b1ba7980..396448afa38b 100644
> --- a/arch/powerpc/include/asm/kvm_book3s.h
> +++ b/arch/powerpc/include/asm/kvm_book3s.h
> @@ -83,8 +83,6 @@ struct kvmppc_vcpu_book3s {
> u64 sdr1;
> u64 hior;
> u64 msr_mask;
> - u64 purr_offset;
> - u64 spurr_offset;
> #ifdef CONFIG_PPC_BOOK3S_32
> u32 vsid_pool[VSID_POOL_SIZE];
> u32 vsid_next;
> diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
> index 9a0cdb2c9d58..0a3785271f34 100644
> --- a/arch/powerpc/include/asm/kvm_host.h
> +++ b/arch/powerpc/include/asm/kvm_host.h
> @@ -506,8 +506,8 @@ struct kvm_vcpu_arch {
> #ifdef CONFIG_BOOKE
> u32 decar;
> #endif
> - u32 tbl;
> - u32 tbu;
> + /* Time base value when we entered the guest */
> + u64 entry_tb;
> u32 tcr;
> ulong tsr; /* we need to perform set/clr_bits() which requires ulong */
> u32 ivor[64];
> diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c
> index a7d54aa203d0..e1f1e5e16449 100644
> --- a/arch/powerpc/kvm/book3s_emulate.c
> +++ b/arch/powerpc/kvm/book3s_emulate.c
> @@ -422,12 +422,6 @@ int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
> (mfmsr() & MSR_HV))
> vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
> break;
> - case SPRN_PURR:
> - to_book3s(vcpu)->purr_offset = spr_val - get_tb();
> - break;
> - case SPRN_SPURR:
> - to_book3s(vcpu)->spurr_offset = spr_val - get_tb();
> - break;
> case SPRN_GQR0:
> case SPRN_GQR1:
> case SPRN_GQR2:
> @@ -523,10 +517,16 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val
> *spr_val = 0;
> break;
> case SPRN_PURR:
> - *spr_val = get_tb() + to_book3s(vcpu)->purr_offset;
> + /*
> + * On exit we would have updated purr
> + */
> + *spr_val = vcpu->arch.purr;
> break;
> case SPRN_SPURR:
> - *spr_val = get_tb() + to_book3s(vcpu)->purr_offset;
> + /*
> + * On exit we would have updated spurr
> + */
> + *spr_val = vcpu->arch.spurr;
> break;
> case SPRN_GQR0:
> case SPRN_GQR1:
> diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
> index fdcbabdfb709..02231f5193c2 100644
> --- a/arch/powerpc/kvm/book3s_pr.c
> +++ b/arch/powerpc/kvm/book3s_pr.c
> @@ -115,6 +115,11 @@ void kvmppc_copy_to_svcpu(struct kvmppc_book3s_shadow_vcpu *svcpu,
> svcpu->lr = vcpu->arch.lr;
> svcpu->pc = vcpu->arch.pc;
> svcpu->in_use = true;
> + /*
> + * Now also save the current time base value. We use this
> + * to find the guest purr and spurr value.
> + */
> + vcpu->arch.entry_tb = get_tb();
> }
>
> /* Copy data touched by real-mode code from shadow vcpu back to vcpu */
> @@ -161,6 +166,11 @@ void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu,
>
> out:
> preempt_enable();
> + /*
> + * Update purr and spurr using time base
> + */
> + vcpu->arch.purr += get_tb() - vcpu->arch.entry_tb;
> + vcpu->arch.spurr += get_tb() - vcpu->arch.entry_tb;
> }
>
> static int kvmppc_core_check_requests_pr(struct kvm_vcpu *vcpu)
^ permalink raw reply
* Re: [PATCH] powerpc: enable CONFIG_HAVE_MEMORYLESS_NODES
From: Christoph Lameter @ 2014-01-29 15:55 UTC (permalink / raw)
To: Nishanth Aravamudan
Cc: David Rientjes, Pekka Enberg, linux-mm, Paul Mackerras,
Anton Blanchard, Matt Mackall, Joonsoo Kim, linuxppc-dev,
Wanpeng Li
In-Reply-To: <20140128183457.GA9315@linux.vnet.ibm.com>
On Tue, 28 Jan 2014, Nishanth Aravamudan wrote:
> Anton Blanchard found an issue with an LPAR that had no memory in Node
> 0. Christoph Lameter recommended, as one possible solution, to use
> numa_mem_id() for locality of the nearest memory node-wise. However,
> numa_mem_id() [and the other related APIs] are only useful if
> CONFIG_HAVE_MEMORYLESS_NODES is set. This is only the case for ia64
> currently, but clearly we can have memoryless nodes on ppc64. Add the
> Kconfig option and define it to be the same value as CONFIG_NUMA.
Well this is trivial but if you need encouragement:
Reviewed-by: Christoph Lameter <cl@linux.com>
^ permalink raw reply
* Re: [PATCH] slub: Don't throw away partial remote slabs if there is no local memory
From: Christoph Lameter @ 2014-01-29 15:54 UTC (permalink / raw)
To: Nishanth Aravamudan
Cc: Han Pingtian, mpm, penberg, linux-mm, paulus, Anton Blanchard,
David Rientjes, Joonsoo Kim, linuxppc-dev, Wanpeng Li
In-Reply-To: <20140128182947.GA1591@linux.vnet.ibm.com>
On Tue, 28 Jan 2014, Nishanth Aravamudan wrote:
> This helps about the same as David's patch -- but I found the reason
> why! ppc64 doesn't set CONFIG_HAVE_MEMORYLESS_NODES :) Expect a patch
> shortly for that and one other case I found.
Oww...
^ permalink raw reply
* [PATCH] powerpc/ppc32: fix the bug in the init of non-base exception stack for UP
From: Kevin Hao @ 2014-01-29 10:24 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc
We would allocate one specific exception stack for each kind of
non-base exceptions for every CPU. For ppc32 the CPU hard ID is
used as the subscript to get the specific exception stack for
one CPU. But for an UP kernel, there is only one element in the
each kind of exception stack array. We would get stuck if the
CPU hard ID is not equal to '0'. So in this case we should use the
subscript '0' no matter what the CPU hard ID is.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
---
arch/powerpc/kernel/irq.c | 5 +++++
arch/powerpc/kernel/setup_32.c | 5 +++++
2 files changed, 10 insertions(+)
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 9729b23bfb0a..1d0848bba049 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -559,8 +559,13 @@ void exc_lvl_ctx_init(void)
#ifdef CONFIG_PPC64
cpu_nr = i;
#else
+#ifdef CONFIG_SMP
cpu_nr = get_hard_smp_processor_id(i);
+#else
+ cpu_nr = 0;
#endif
+#endif
+
memset((void *)critirq_ctx[cpu_nr], 0, THREAD_SIZE);
tp = critirq_ctx[cpu_nr];
tp->cpu = cpu_nr;
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 2b0da27eaee4..04cc4fcca78b 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -247,7 +247,12 @@ static void __init exc_lvl_early_init(void)
/* interrupt stacks must be in lowmem, we get that for free on ppc32
* as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
for_each_possible_cpu(i) {
+#ifdef CONFIG_SMP
hw_cpu = get_hard_smp_processor_id(i);
+#else
+ hw_cpu = 0;
+#endif
+
critirq_ctx[hw_cpu] = (struct thread_info *)
__va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
#ifdef CONFIG_BOOKE
--
1.8.5.3
^ permalink raw reply related
* Re: Please pull 'next' branch of 5xxx tree
From: Gerhard Sittig @ 2014-01-29 10:11 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Anatolij Gustschin, linuxppc-dev
In-Reply-To: <1390981569.8524.53.camel@pasglop>
On Wed, Jan 29, 2014 at 18:46 +1100, Benjamin Herrenschmidt wrote:
>
> On Tue, 2014-01-28 at 17:00 +1100, Benjamin Herrenschmidt wrote:
> > On Tue, 2014-01-28 at 06:46 +0100, Anatolij Gustschin wrote:
> > > Hi Ben !
> > >
> > > On Wed, 15 Jan 2014 22:18:59 +0100
> > > Anatolij Gustschin <agust@denx.de> wrote:
> > >
> > > > Hi Ben !
> > > >
> > > > please pull mpc5xxx patches for v3.14:
> > >
> > > Ping.
> >
> > Oops, you sent that while I was on vacation and I missed it.
> >
> > Next time, try to send your pull request earlier if possible, I'd like
> > to have most stuff together before -rc5. I'll try to send this one to
> > Linus after he has pulled my current one.
>
> Hrm, I get a merge conflicts with spi-mpc512x-psc.c, please check that I
> fixed it up properly in powerpc-next and let me know.
Did read the merge commit (git show e9a371100dfd), did a build
and run test of
f878f84373ae powerpc: Wire up sched_setattr and sched_getattr syscalls
and everything looks good. Thank you!
virtually yours
Gerhard Sittig
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de
^ permalink raw reply
* Re: [git pull] Please pull powerpc.git next branch
From: Olaf Hering @ 2014-01-29 8:41 UTC (permalink / raw)
To: Alistair Popple; +Cc: Linus Torvalds, linuxppc-dev, Linux Kernel list
In-Reply-To: <4555187.D5eRSF5r8x@mexican>
On Wed, Jan 29, Alistair Popple wrote:
> Looks like I missed the dart iommu code when changing the iommu table
> initialisation. The patch below should fix it, would you mind testing it Ben?
> +++ b/arch/powerpc/sysdev/dart_iommu.c
> + iommu_table_dart.it_page_shift = IOMMU_PAGE_SHIFT_4K;
Yes, that fixes it for me. Thanks!
Olaf
^ permalink raw reply
* Re: Please pull 'next' branch of 5xxx tree
From: Benjamin Herrenschmidt @ 2014-01-29 7:46 UTC (permalink / raw)
To: Anatolij Gustschin; +Cc: linuxppc-dev
In-Reply-To: <1390888814.8524.13.camel@pasglop>
On Tue, 2014-01-28 at 17:00 +1100, Benjamin Herrenschmidt wrote:
> On Tue, 2014-01-28 at 06:46 +0100, Anatolij Gustschin wrote:
> > Hi Ben !
> >
> > On Wed, 15 Jan 2014 22:18:59 +0100
> > Anatolij Gustschin <agust@denx.de> wrote:
> >
> > > Hi Ben !
> > >
> > > please pull mpc5xxx patches for v3.14:
> >
> > Ping.
>
> Oops, you sent that while I was on vacation and I missed it.
>
> Next time, try to send your pull request earlier if possible, I'd like
> to have most stuff together before -rc5. I'll try to send this one to
> Linus after he has pulled my current one.
Hrm, I get a merge conflicts with spi-mpc512x-psc.c, please check that I
fixed it up properly in powerpc-next and let me know.
If it's good I'll send to Linus tomorrow.
Cheers,
Ben.
^ permalink raw reply
* [PATCH] powerpc: Fix 32-bit frames for signals delivered when transactional
From: Paul Mackerras @ 2014-01-29 5:33 UTC (permalink / raw)
To: linuxppc-dev
Commit d31626f70b61 ("powerpc: Don't corrupt transactional state when
using FP/VMX in kernel") introduced a bug where the uc_link and uc_regs
fields of the ucontext_t that is created to hold the transactional
values of the registers in a 32-bit signal frame didn't get set
correctly. The reason is that we now clear the MSR_TS bits in the MSR
in save_tm_user_regs(), before the code that sets uc_link and uc_regs.
To fix this, we move the setting of uc_link and uc_regs into the same
if statement that selects whether to call save_tm_user_regs() or
save_user_regs().
Signed-off-by: Paul Mackerras <paulus@samba.org>
---
arch/powerpc/kernel/signal_32.c | 19 +++++++------------
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index 6ce69e6..a67e00a 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -1022,29 +1022,24 @@ int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
tm_frame = &rt_sf->uc_transact.uc_mcontext;
if (MSR_TM_ACTIVE(regs->msr)) {
+ if (__put_user((unsigned long)&rt_sf->uc_transact,
+ &rt_sf->uc.uc_link) ||
+ __put_user((unsigned long)tm_frame,
+ &rt_sf->uc_transact.uc_regs))
+ goto badframe;
if (save_tm_user_regs(regs, frame, tm_frame, sigret))
goto badframe;
}
else
#endif
{
+ if (__put_user(0, &rt_sf->uc.uc_link))
+ goto badframe;
if (save_user_regs(regs, frame, tm_frame, sigret, 1))
goto badframe;
}
regs->link = tramp;
-#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
- if (MSR_TM_ACTIVE(regs->msr)) {
- if (__put_user((unsigned long)&rt_sf->uc_transact,
- &rt_sf->uc.uc_link)
- || __put_user((unsigned long)tm_frame, &rt_sf->uc_transact.uc_regs))
- goto badframe;
- }
- else
-#endif
- if (__put_user(0, &rt_sf->uc.uc_link))
- goto badframe;
-
current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
/* create a stack frame for the caller of the handler */
--
1.8.5.2
^ permalink raw reply related
* [PATCH] powerpc/iommu: Fix initialisation of DART iommu table
From: Alistair Popple @ 2014-01-29 4:20 UTC (permalink / raw)
To: linuxppc-dev; +Cc: olaf, linux-kernel, Alistair Popple
Commit d084775738b746648d4102337163a04534a02982 switched the generic
powerpc iommu backend code to use the it_page_shift field to determine
page size. Commit 3a553170d35d69bea3877bffa508489dfa6f133d should have
initiliased this field for all platforms, however the DART iommu table
code was not updated.
This commit initialises the it_page_shift field to 4K for the DART
iommu.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
---
arch/powerpc/sysdev/dart_iommu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index bd968a4..62c47bb 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -292,6 +292,7 @@ static void iommu_table_dart_setup(void)
iommu_table_dart.it_offset = 0;
/* it_size is in number of entries */
iommu_table_dart.it_size = dart_tablesize / sizeof(u32);
+ iommu_table_dart.it_page_shift = IOMMU_PAGE_SHIFT_4K;
/* Initialize the common IOMMU code */
iommu_table_dart.it_base = (unsigned long)dart_vbase;
--
1.7.10.4
^ permalink raw reply related
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