* Re: [GIT PULL 00/15] perf/core improvements and fixes
From: Ingo Molnar @ 2014-10-16 5:18 UTC (permalink / raw)
To: Arnaldo Carvalho de Melo
Cc: Mike Galbraith, Alexander Yarygin, Peter Zijlstra,
Frederic Weisbecker, Stephane Eranian, Masanari Iida,
Paul Mackerras, Jiri Olsa, Anshuman Khandual, Namhyung Kim,
Andi Kleen, Christian Borntraeger, Cody P Schafer, Jean Pihet,
Sukadev Bhattiprolu, Arun Sharma, Arnaldo Carvalho de Melo,
Yasser Shalabi, Michael Ellerman, Kan Liang, Randy Dunlap,
linux-kernel, Taeung Song, David Ahern, linuxppc-dev
In-Reply-To: <1413406368-26245-1-git-send-email-acme@kernel.org>
* Arnaldo Carvalho de Melo <acme@kernel.org> wrote:
> Hi Ingo,
>
> Please consider pulling, I guess the changes are minor of affect just some
> non-core feature, so it is you call if you prefer to pull it into perf/urgent instead.
>
> Best Regards,
>
> - Arnaldo
>
> The following changes since commit ec4212d88a77eb6caec10777ddd629b702a5ebbd:
>
> Merge tag 'perf-core-for-mingo' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/urgent (2014-10-15 11:54:14 +0200)
>
> are available in the git repository at:
>
>
> git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git tags/perf-core-for-mingo
>
> for you to fetch changes up to 673d659f5c5918b7ddbafebf1f129c9eb82973b4:
>
> perf kvm stat live: Enable events copying (2014-10-15 17:39:03 -0300)
>
> ----------------------------------------------------------------
> perf/core improvements and fixes:
>
> User visible:
>
> * Add a visual cue for toggle zeroing of samples in 'perf top' (Taeung Song)
>
> * Fix for double free in 'perf stat' when using some specific invalid
> command line combo (Yasser Shalabi)
>
> Infrastructure:
>
> * Add option to copy events when queuing for sorting across cpu buffers
> and enable it for 'perf kvm stat live', to avoid having events left
> in the queue pointing to the ring buffer be rewritten in high volume
> sessions. (Alexander Yarygin, improving work done by David Ahern):
>
> * Document sysfs events/ interfaces (Cody P Schafer)
>
> * Add support to new style format of kernel PMU event. (Kan Liang)
>
> * Fix typos in perf/Documentation (Masanari Iida)
>
> * Improve callchains when using libunwind (Namhyung Kim)
>
> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
> Lines starting with '#' will be ignored.
>
> ----------------------------------------------------------------
> Alexander Yarygin (2):
> perf session: Add option to copy events when queueing
> perf kvm stat live: Enable events copying
>
> Cody P Schafer (2):
> perf Documentation: sysfs events/ interfaces
> perf Documentation: Remove Ruplicated docs for powerpc cpu specific events
>
> Kan Liang (4):
> Revert "perf tools: Default to cpu// for events v5"
> perf tools: Parse the pmu event prefix and suffix
> perf tools: Add support to new style format of kernel PMU event
> perf test: Add test case for pmu event new style format
>
> Masanari Iida (1):
> perf Documentation: Fix typos in perf/Documentation
>
> Namhyung Kim (4):
> perf report: Set callchain_param.record_mode for future use
> perf callchain: Create an address space per thread
> perf kvm: Use thread_{,_set}_priv helpers
> perf trace: Use thread_{,_set}_priv helpers
>
> Taeung Song (1):
> perf top: Add a visual cue for toggle zeroing of samples
>
> Yasser Shalabi (1):
> perf evlist: Fix for double free in tools/perf stat
>
> .../testing/sysfs-bus-event_source-devices-events | 611 ++-------------------
> tools/perf/Documentation/perf-diff.txt | 6 +-
> tools/perf/Documentation/perf-kvm.txt | 4 +-
> tools/perf/Documentation/perf-list.txt | 2 +-
> tools/perf/Documentation/perf-record.txt | 2 +-
> tools/perf/Documentation/perf-script-perl.txt | 4 +-
> tools/perf/Documentation/perf-script-python.txt | 6 +-
> tools/perf/Documentation/perf-script.txt | 2 +-
> tools/perf/Documentation/perf-test.txt | 2 +-
> tools/perf/Documentation/perf-trace.txt | 2 +-
> tools/perf/builtin-kvm.c | 7 +-
> tools/perf/builtin-report.c | 7 +
> tools/perf/builtin-trace.c | 16 +-
> tools/perf/tests/dwarf-unwind.c | 3 +
> tools/perf/tests/parse-events.c | 36 ++
> tools/perf/ui/browsers/hists.c | 32 +-
> tools/perf/util/evlist.c | 1 +
> tools/perf/util/include/linux/string.h | 1 -
> tools/perf/util/ordered-events.c | 49 +-
> tools/perf/util/ordered-events.h | 10 +-
> tools/perf/util/parse-events.c | 133 ++++-
> tools/perf/util/parse-events.h | 14 +
> tools/perf/util/parse-events.l | 30 +-
> tools/perf/util/parse-events.y | 40 ++
> tools/perf/util/pmu.c | 10 -
> tools/perf/util/pmu.h | 10 +
> tools/perf/util/session.c | 5 +-
> tools/perf/util/string.c | 24 -
> tools/perf/util/thread.c | 6 +
> tools/perf/util/unwind-libunwind.c | 37 +-
> tools/perf/util/unwind.h | 17 +
> 31 files changed, 460 insertions(+), 669 deletions(-)
Pulled, thanks a lot Arnaldo!
Ingo
^ permalink raw reply
* [PATCH] powerpc/pci: Fix IO space breakage after of_pci_range_to_resource() change
From: Michael Ellerman @ 2014-10-16 3:22 UTC (permalink / raw)
To: linuxppc-dev; +Cc: bhelgaas, linus.walleij, Liviu.Dudau, linux-kernel
Commit 0b0b0893d49b "of/pci: Fix the conversion of IO ranges into IO
resources" changed the behaviour of of_pci_range_to_resource().
Previously it simply populated the resource based on the arguments. Now
it calls pci_register_io_range() and pci_address_to_pio(). These both
have two implementations depending on whether PCI_IOBASE is defined,
which it is not for powerpc.
Further complicating matters, both routines are weak, and powerpc
implements it's own version of one - pci_address_to_pio(). However
powerpc's implementation depends on other initialisations which are done
later in boot.
The end result is incorrectly initialised IO space. Often we can get
away with that, because we don't make much use of IO space. However
virtio requires it, so we see eg:
pci_bus 0000:00: root bus resource [io 0xffff] (bus address [0xffffffffffffffff-0xffffffffffffffff])
PCI: Cannot allocate resource region 0 of device 0000:00:01.0, will remap
virtio-pci 0000:00:01.0: can't enable device: BAR 0 [io size 0x0020] not assigned
The simplest fix for now is to just stop using of_pci_range_to_resource(),
and open-code the original implementation, that's all we want it to do.
Fixes: 0b0b0893d49b ("of/pci: Fix the conversion of IO ranges into IO resources")
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/kernel/pci-common.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index bd70a51d5747..e5dad9a9edc0 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -747,7 +747,11 @@ void pci_process_bridge_OF_ranges(struct pci_controller *hose,
break;
}
if (res != NULL) {
- of_pci_range_to_resource(&range, dev, res);
+ res->name = dev->full_name;
+ res->flags = range.flags;
+ res->start = range.cpu_addr;
+ res->end = range.cpu_addr + range.size - 1;
+ res->parent = res->child = res->sibling = NULL;
}
}
}
--
1.9.1
^ permalink raw reply related
* Re: [PATCH v1 10/10] uprobes: Remove "weak" from function declarations
From: Bjorn Helgaas @ 2014-10-15 23:42 UTC (permalink / raw)
To: Jason Wessel, Ralf Baechle, Ingo Molnar, John Stultz, Eric Paris,
H. Peter Anvin, Thomas Gleixner, Andrew Morton
Cc: Russell King, Srikar Dronamraju, Victor Kamensky, Oleg Nesterov,
linux-kernel@vger.kernel.org, Paul Mackerras, David A. Long,
linuxppc-dev, linux-arm
In-Reply-To: <20141015170650.4063.2816.stgit@bhelgaas-glaptop2.roam.corp.google.com>
[+cc Victor, Oleg, David, Srikar, Ananth, Russell, linux-arm-kernel,
Ben, Paul, Michael, linuxppc-dev. arm and powerpc define some of
these functions and are at risk for this issue.]
On Wed, Oct 15, 2014 at 11:06 AM, Bjorn Helgaas <bhelgaas@google.com> wrote:
> For the following interfaces:
>
> set_swbp()
> set_orig_insn()
> is_swbp_insn()
> is_trap_insn()
> uprobe_get_swbp_addr()
> arch_uprobe_ignore()
> arch_uprobe_copy_ixol()
>
> kernel/events/uprobes.c provides default definitions explicitly marked
> "weak". Some architectures provide their own definitions intended to
> override the defaults, but the "weak" attribute on the declarations applied
> to the arch definitions as well, so the linker chose one based on link
> order (see 10629d711ed7 ("PCI: Remove __weak annotation from
> pcibios_get_phb_of_node decl")).
>
> Remove the "weak" attribute from the declarations so we always prefer a
> non-weak definition over the weak one, independent of link order.
>
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> CC: Victor Kamensky <victor.kamensky@linaro.org>
> CC: Oleg Nesterov <oleg@redhat.com>
> CC: David A. Long <dave.long@linaro.org>
> CC: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
> CC: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
> ---
> include/linux/uprobes.h | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/include/linux/uprobes.h b/include/linux/uprobes.h
> index 4f844c6b03ee..60beb5dc7977 100644
> --- a/include/linux/uprobes.h
> +++ b/include/linux/uprobes.h
> @@ -98,11 +98,11 @@ struct uprobes_state {
> struct xol_area *xol_area;
> };
>
> -extern int __weak set_swbp(struct arch_uprobe *aup, struct mm_struct *mm, unsigned long vaddr);
> -extern int __weak set_orig_insn(struct arch_uprobe *aup, struct mm_struct *mm, unsigned long vaddr);
> -extern bool __weak is_swbp_insn(uprobe_opcode_t *insn);
> -extern bool __weak is_trap_insn(uprobe_opcode_t *insn);
> -extern unsigned long __weak uprobe_get_swbp_addr(struct pt_regs *regs);
> +extern int set_swbp(struct arch_uprobe *aup, struct mm_struct *mm, unsigned long vaddr);
> +extern int set_orig_insn(struct arch_uprobe *aup, struct mm_struct *mm, unsigned long vaddr);
> +extern bool is_swbp_insn(uprobe_opcode_t *insn);
> +extern bool is_trap_insn(uprobe_opcode_t *insn);
> +extern unsigned long uprobe_get_swbp_addr(struct pt_regs *regs);
> extern unsigned long uprobe_get_trap_addr(struct pt_regs *regs);
> extern int uprobe_write_opcode(struct mm_struct *mm, unsigned long vaddr, uprobe_opcode_t);
> extern int uprobe_register(struct inode *inode, loff_t offset, struct uprobe_consumer *uc);
> @@ -128,8 +128,8 @@ extern bool arch_uprobe_xol_was_trapped(struct task_struct *tsk);
> extern int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val, void *data);
> extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs);
> extern unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, struct pt_regs *regs);
> -extern bool __weak arch_uprobe_ignore(struct arch_uprobe *aup, struct pt_regs *regs);
> -extern void __weak arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
> +extern bool arch_uprobe_ignore(struct arch_uprobe *aup, struct pt_regs *regs);
> +extern void arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
> void *src, unsigned long len);
> #else /* !CONFIG_UPROBES */
> struct uprobes_state {
>
^ permalink raw reply
* Re: [PATCH v3 4/7] sound/radeon: Add quirk for broken 64-bit MSI
From: Benjamin Herrenschmidt @ 2014-10-15 22:55 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linuxppc-dev, Dave Airlie, Linux PCI, Anton Blanchard,
Takashi Iwai, Yijing Wang, Brian King, Alex Deucher
In-Reply-To: <20141015221914.GD15225@google.com>
On Wed, 2014-10-15 at 16:19 -0600, Bjorn Helgaas wrote:
> PCI/MSI: Add device flag indicating that 64-bit MSIs don't work
>
> I'd be happy to merge it, but given what I know now, I would wait and merge
> it during the v3.19 merge window. It sounds like it's more urgent than
> that and should be merged earlier, but from the changelogs, it looks like
> we're just replacing the powerpc-specific quirk with a more generic one.
>
> So I assume you'll merge it via powerpc unless I hear otherwise.
Either way works but it's easy to keep it all in one series in one tree.
The urgency is that the current powerpc quirk works only with one specific
card (ie, one device ID for gfx and one for audio) and misses the DMA limitation
of the sound driver (which is a somewhat orthogonal issue but the patch for it is
in the series).
Any other radeon card causes the machine to crash at boot (the driver doesn't
recover well from the EEH error triggered by the bad MSI address and the world
falls over from there).
So I want this to go back into distros.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH v3 4/7] sound/radeon: Add quirk for broken 64-bit MSI
From: Bjorn Helgaas @ 2014-10-15 22:19 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, Dave Airlie, Linux PCI, Anton Blanchard,
Takashi Iwai, Yijing Wang, Brian King, Alex Deucher
In-Reply-To: <1412746096.30859.229.camel@pasglop>
On Wed, Oct 08, 2014 at 04:28:16PM +1100, Benjamin Herrenschmidt wrote:
> On Tue, 2014-10-07 at 19:47 -0400, Alex Deucher wrote:
> > > This moves the setting of the quirk flag to the audio driver.
> > >
> > > While recent ASICs have that problem fixed, they don't seem to
> > > be listed in the PCI IDs of the current driver, so let's quirk all
> > > the ATI HDMI for now. The consequences are nil on x86 anyway.
> > >
> > > Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
> > > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > > CC: <stable@vger.kernel.org>
> >
> > Further discussion with the hw teams have revealed that this is still
> > an issue on newer asics so I think your original patch is correct
> > after all. Just disable 64 bit MSIs on all AMD audio PCI ids.
>
> Allright, I won't resend the whole series, I can just pickup my previous
> patch. Takashi, Bjorn, Dave, this series covers your 3 areas of
> maintainership, how do you want to proceed ? I'm happy to merge the
> whole lot via powerpc ASAP (since it's all CC'ed stable) if you guys
> send me the appropriate acks, otherwise, let me know.
It all looks beautiful to me.
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
If I were merging it, I would change this:
pci/msi: Add device flag indicating that 64-bit MSIs don't work
to this:
PCI/MSI: Add device flag indicating that 64-bit MSIs don't work
I'd be happy to merge it, but given what I know now, I would wait and merge
it during the v3.19 merge window. It sounds like it's more urgent than
that and should be merged earlier, but from the changelogs, it looks like
we're just replacing the powerpc-specific quirk with a more generic one.
So I assume you'll merge it via powerpc unless I hear otherwise.
Bjorn
^ permalink raw reply
* [PATCH 03/15] perf Documentation: Remove Ruplicated docs for powerpc cpu specific events
From: Arnaldo Carvalho de Melo @ 2014-10-15 20:52 UTC (permalink / raw)
To: Ingo Molnar
Cc: Andi Kleen, Michael Ellerman, Peter Zijlstra, linuxppc-dev,
linux-kernel, Stephane Eranian, Arnaldo Carvalho de Melo,
Cody P Schafer, Paul Mackerras, Sukadev Bhattiprolu, Jiri Olsa,
Anshuman Khandual
In-Reply-To: <1413406368-26245-1-git-send-email-acme@kernel.org>
From: Cody P Schafer <dev@codyps.com>
Listing specific events doesn't actually help us at all here because:
- these events actually vary between different ppc processors, they
aren't garunteed to be present.
- the documentation of the (generic) file contents is now superceded by the
docs for arbitrary event file contents.
Signed-off-by: Cody P Schafer <dev@codyps.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Cc: Haren Myneni <hbabu@us.ibm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Michael Ellerman <michaele@au1.ibm.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1412143402-26061-5-git-send-email-sukadev@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
---
.../testing/sysfs-bus-event_source-devices-events | 573 ---------------------
1 file changed, 573 deletions(-)
diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-events b/Documentation/ABI/testing/sysfs-bus-event_source-devices-events
index a5226f094159..20979f8b3edb 100644
--- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-events
+++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-events
@@ -27,579 +27,6 @@ Description: Generic performance monitoring events
"basename".
-What: /sys/devices/cpu/events/PM_1PLUS_PPC_CMPL
- /sys/devices/cpu/events/PM_BRU_FIN
- /sys/devices/cpu/events/PM_BR_MPRED
- /sys/devices/cpu/events/PM_CMPLU_STALL
- /sys/devices/cpu/events/PM_CMPLU_STALL_BRU
- /sys/devices/cpu/events/PM_CMPLU_STALL_DCACHE_MISS
- /sys/devices/cpu/events/PM_CMPLU_STALL_DFU
- /sys/devices/cpu/events/PM_CMPLU_STALL_DIV
- /sys/devices/cpu/events/PM_CMPLU_STALL_ERAT_MISS
- /sys/devices/cpu/events/PM_CMPLU_STALL_FXU
- /sys/devices/cpu/events/PM_CMPLU_STALL_IFU
- /sys/devices/cpu/events/PM_CMPLU_STALL_LSU
- /sys/devices/cpu/events/PM_CMPLU_STALL_REJECT
- /sys/devices/cpu/events/PM_CMPLU_STALL_SCALAR
- /sys/devices/cpu/events/PM_CMPLU_STALL_SCALAR_LONG
- /sys/devices/cpu/events/PM_CMPLU_STALL_STORE
- /sys/devices/cpu/events/PM_CMPLU_STALL_THRD
- /sys/devices/cpu/events/PM_CMPLU_STALL_VECTOR
- /sys/devices/cpu/events/PM_CMPLU_STALL_VECTOR_LONG
- /sys/devices/cpu/events/PM_CYC
- /sys/devices/cpu/events/PM_GCT_NOSLOT_BR_MPRED
- /sys/devices/cpu/events/PM_GCT_NOSLOT_BR_MPRED_IC_MISS
- /sys/devices/cpu/events/PM_GCT_NOSLOT_CYC
- /sys/devices/cpu/events/PM_GCT_NOSLOT_IC_MISS
- /sys/devices/cpu/events/PM_GRP_CMPL
- /sys/devices/cpu/events/PM_INST_CMPL
- /sys/devices/cpu/events/PM_LD_MISS_L1
- /sys/devices/cpu/events/PM_LD_REF_L1
- /sys/devices/cpu/events/PM_RUN_CYC
- /sys/devices/cpu/events/PM_RUN_INST_CMPL
- /sys/devices/cpu/events/PM_IC_DEMAND_L2_BR_ALL
- /sys/devices/cpu/events/PM_GCT_UTIL_7_TO_10_SLOTS
- /sys/devices/cpu/events/PM_PMC2_SAVED
- /sys/devices/cpu/events/PM_VSU0_16FLOP
- /sys/devices/cpu/events/PM_MRK_LSU_DERAT_MISS
- /sys/devices/cpu/events/PM_MRK_ST_CMPL
- /sys/devices/cpu/events/PM_NEST_PAIR3_ADD
- /sys/devices/cpu/events/PM_L2_ST_DISP
- /sys/devices/cpu/events/PM_L2_CASTOUT_MOD
- /sys/devices/cpu/events/PM_ISEG
- /sys/devices/cpu/events/PM_MRK_INST_TIMEO
- /sys/devices/cpu/events/PM_L2_RCST_DISP_FAIL_ADDR
- /sys/devices/cpu/events/PM_LSU1_DC_PREF_STREAM_CONFIRM
- /sys/devices/cpu/events/PM_IERAT_WR_64K
- /sys/devices/cpu/events/PM_MRK_DTLB_MISS_16M
- /sys/devices/cpu/events/PM_IERAT_MISS
- /sys/devices/cpu/events/PM_MRK_PTEG_FROM_LMEM
- /sys/devices/cpu/events/PM_FLOP
- /sys/devices/cpu/events/PM_THRD_PRIO_4_5_CYC
- /sys/devices/cpu/events/PM_BR_PRED_TA
- /sys/devices/cpu/events/PM_EXT_INT
- /sys/devices/cpu/events/PM_VSU_FSQRT_FDIV
- /sys/devices/cpu/events/PM_MRK_LD_MISS_EXPOSED_CYC
- /sys/devices/cpu/events/PM_LSU1_LDF
- /sys/devices/cpu/events/PM_IC_WRITE_ALL
- /sys/devices/cpu/events/PM_LSU0_SRQ_STFWD
- /sys/devices/cpu/events/PM_PTEG_FROM_RL2L3_MOD
- /sys/devices/cpu/events/PM_MRK_DATA_FROM_L31_SHR
- /sys/devices/cpu/events/PM_DATA_FROM_L21_MOD
- /sys/devices/cpu/events/PM_VSU1_SCAL_DOUBLE_ISSUED
- /sys/devices/cpu/events/PM_VSU0_8FLOP
- /sys/devices/cpu/events/PM_POWER_EVENT1
- /sys/devices/cpu/events/PM_DISP_CLB_HELD_BAL
- /sys/devices/cpu/events/PM_VSU1_2FLOP
- /sys/devices/cpu/events/PM_LWSYNC_HELD
- /sys/devices/cpu/events/PM_PTEG_FROM_DL2L3_SHR
- /sys/devices/cpu/events/PM_INST_FROM_L21_MOD
- /sys/devices/cpu/events/PM_IERAT_XLATE_WR_16MPLUS
- /sys/devices/cpu/events/PM_IC_REQ_ALL
- /sys/devices/cpu/events/PM_DSLB_MISS
- /sys/devices/cpu/events/PM_L3_MISS
- /sys/devices/cpu/events/PM_LSU0_L1_PREF
- /sys/devices/cpu/events/PM_VSU_SCALAR_SINGLE_ISSUED
- /sys/devices/cpu/events/PM_LSU1_DC_PREF_STREAM_CONFIRM_STRIDE
- /sys/devices/cpu/events/PM_L2_INST
- /sys/devices/cpu/events/PM_VSU0_FRSP
- /sys/devices/cpu/events/PM_FLUSH_DISP
- /sys/devices/cpu/events/PM_PTEG_FROM_L2MISS
- /sys/devices/cpu/events/PM_VSU1_DQ_ISSUED
- /sys/devices/cpu/events/PM_MRK_DATA_FROM_DMEM
- /sys/devices/cpu/events/PM_LSU_FLUSH_ULD
- /sys/devices/cpu/events/PM_PTEG_FROM_LMEM
- /sys/devices/cpu/events/PM_MRK_DERAT_MISS_16M
- /sys/devices/cpu/events/PM_THRD_ALL_RUN_CYC
- /sys/devices/cpu/events/PM_MEM0_PREFETCH_DISP
- /sys/devices/cpu/events/PM_MRK_STALL_CMPLU_CYC_COUNT
- /sys/devices/cpu/events/PM_DATA_FROM_DL2L3_MOD
- /sys/devices/cpu/events/PM_VSU_FRSP
- /sys/devices/cpu/events/PM_MRK_DATA_FROM_L21_MOD
- /sys/devices/cpu/events/PM_PMC1_OVERFLOW
- /sys/devices/cpu/events/PM_VSU0_SINGLE
- /sys/devices/cpu/events/PM_MRK_PTEG_FROM_L3MISS
- /sys/devices/cpu/events/PM_MRK_PTEG_FROM_L31_SHR
- /sys/devices/cpu/events/PM_VSU0_VECTOR_SP_ISSUED
- /sys/devices/cpu/events/PM_VSU1_FEST
- /sys/devices/cpu/events/PM_MRK_INST_DISP
- /sys/devices/cpu/events/PM_VSU0_COMPLEX_ISSUED
- /sys/devices/cpu/events/PM_LSU1_FLUSH_UST
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- /sys/devices/cpu/events/PM_MRK_DATA_FROM_DL2L3_MOD
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- /sys/devices/cpu/events/PM_INST_PTEG_FROM_L21_MOD
- /sys/devices/cpu/events/PM_INST_FROM_RL2L3_MOD
- /sys/devices/cpu/events/PM_SHL_CREATED
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- /sys/devices/cpu/events/PM_DATA_FROM_DMEM
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- /sys/devices/cpu/events/PM_DISP_CLB_HELD_RES
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- /sys/devices/cpu/events/PM_PMC2_REWIND
- /sys/devices/cpu/events/PM_INST_FROM_L2
- /sys/devices/cpu/events/PM_GRP_BR_MPRED_NONSPEC
- /sys/devices/cpu/events/PM_INST_DISP
- /sys/devices/cpu/events/PM_MEM0_RD_CANCEL_TOTAL
- /sys/devices/cpu/events/PM_LSU0_DC_PREF_STREAM_CONFIRM
- /sys/devices/cpu/events/PM_L1_DCACHE_RELOAD_VALID
- /sys/devices/cpu/events/PM_VSU_SCALAR_DOUBLE_ISSUED
- /sys/devices/cpu/events/PM_L3_PREF_HIT
- /sys/devices/cpu/events/PM_MRK_PTEG_FROM_L31_MOD
- /sys/devices/cpu/events/PM_MRK_FXU_FIN
- /sys/devices/cpu/events/PM_PMC4_OVERFLOW
- /sys/devices/cpu/events/PM_MRK_PTEG_FROM_L3
- /sys/devices/cpu/events/PM_LSU0_LMQ_LHR_MERGE
- /sys/devices/cpu/events/PM_BTAC_HIT
- /sys/devices/cpu/events/PM_L3_RD_BUSY
- /sys/devices/cpu/events/PM_LSU0_L1_SW_PREF
- /sys/devices/cpu/events/PM_INST_FROM_L2MISS
- /sys/devices/cpu/events/PM_LSU0_DC_PREF_STREAM_ALLOC
- /sys/devices/cpu/events/PM_L2_ST
- /sys/devices/cpu/events/PM_VSU0_DENORM
- /sys/devices/cpu/events/PM_MRK_DATA_FROM_DL2L3_SHR
- /sys/devices/cpu/events/PM_BR_PRED_CR_TA
- /sys/devices/cpu/events/PM_VSU0_FCONV
- /sys/devices/cpu/events/PM_MRK_LSU_FLUSH_ULD
- /sys/devices/cpu/events/PM_BTAC_MISS
- /sys/devices/cpu/events/PM_MRK_LD_MISS_EXPOSED_CYC_COUNT
- /sys/devices/cpu/events/PM_MRK_DATA_FROM_L2
- /sys/devices/cpu/events/PM_LSU_DCACHE_RELOAD_VALID
- /sys/devices/cpu/events/PM_VSU_FMA
- /sys/devices/cpu/events/PM_LSU0_FLUSH_SRQ
- /sys/devices/cpu/events/PM_LSU1_L1_PREF
- /sys/devices/cpu/events/PM_IOPS_CMPL
- /sys/devices/cpu/events/PM_L2_SYS_PUMP
- /sys/devices/cpu/events/PM_L2_RCLD_BUSY_RC_FULL
- /sys/devices/cpu/events/PM_LSU_LMQ_S0_ALLOC
- /sys/devices/cpu/events/PM_FLUSH_DISP_SYNC
- /sys/devices/cpu/events/PM_MRK_DATA_FROM_DL2L3_MOD_CYC
- /sys/devices/cpu/events/PM_L2_IC_INV
- /sys/devices/cpu/events/PM_MRK_DATA_FROM_L21_MOD_CYC
- /sys/devices/cpu/events/PM_L3_PREF_LDST
- /sys/devices/cpu/events/PM_LSU_SRQ_EMPTY_CYC
- /sys/devices/cpu/events/PM_LSU_LMQ_S0_VALID
- /sys/devices/cpu/events/PM_FLUSH_PARTIAL
- /sys/devices/cpu/events/PM_VSU1_FMA_DOUBLE
- /sys/devices/cpu/events/PM_1PLUS_PPC_DISP
- /sys/devices/cpu/events/PM_DATA_FROM_L2MISS
- /sys/devices/cpu/events/PM_SUSPENDED
- /sys/devices/cpu/events/PM_VSU0_FMA
- /sys/devices/cpu/events/PM_STCX_FAIL
- /sys/devices/cpu/events/PM_VSU0_FSQRT_FDIV_DOUBLE
- /sys/devices/cpu/events/PM_DC_PREF_DST
- /sys/devices/cpu/events/PM_VSU1_SCAL_SINGLE_ISSUED
- /sys/devices/cpu/events/PM_L3_HIT
- /sys/devices/cpu/events/PM_L2_GLOB_GUESS_WRONG
- /sys/devices/cpu/events/PM_MRK_DFU_FIN
- /sys/devices/cpu/events/PM_INST_FROM_L1
- /sys/devices/cpu/events/PM_IC_DEMAND_REQ
- /sys/devices/cpu/events/PM_VSU1_FSQRT_FDIV_DOUBLE
- /sys/devices/cpu/events/PM_VSU1_FMA
- /sys/devices/cpu/events/PM_MRK_LD_MISS_L1
- /sys/devices/cpu/events/PM_VSU0_2FLOP_DOUBLE
- /sys/devices/cpu/events/PM_LSU_DC_PREF_STRIDED_STREAM_CONFIRM
- /sys/devices/cpu/events/PM_INST_PTEG_FROM_L31_SHR
- /sys/devices/cpu/events/PM_MRK_LSU_REJECT_ERAT_MISS
- /sys/devices/cpu/events/PM_MRK_DATA_FROM_L2MISS
- /sys/devices/cpu/events/PM_DATA_FROM_RL2L3_SHR
- /sys/devices/cpu/events/PM_INST_FROM_PREF
- /sys/devices/cpu/events/PM_VSU1_SQ
- /sys/devices/cpu/events/PM_L2_LD_DISP
- /sys/devices/cpu/events/PM_L2_DISP_ALL
- /sys/devices/cpu/events/PM_THRD_GRP_CMPL_BOTH_CYC
- /sys/devices/cpu/events/PM_VSU_FSQRT_FDIV_DOUBLE
- /sys/devices/cpu/events/PM_INST_PTEG_FROM_DL2L3_SHR
- /sys/devices/cpu/events/PM_VSU_1FLOP
- /sys/devices/cpu/events/PM_HV_CYC
- /sys/devices/cpu/events/PM_MRK_LSU_FIN
- /sys/devices/cpu/events/PM_MRK_DATA_FROM_RL2L3_SHR
- /sys/devices/cpu/events/PM_DTLB_MISS_16M
- /sys/devices/cpu/events/PM_LSU1_LMQ_LHR_MERGE
- /sys/devices/cpu/events/PM_IFU_FIN
- /sys/devices/cpu/events/PM_1THRD_CON_RUN_INSTR
- /sys/devices/cpu/events/PM_CMPLU_STALL_COUNT
- /sys/devices/cpu/events/PM_MEM0_PB_RD_CL
- /sys/devices/cpu/events/PM_THRD_1_RUN_CYC
- /sys/devices/cpu/events/PM_THRD_2_CONC_RUN_INSTR
- /sys/devices/cpu/events/PM_THRD_2_RUN_CYC
- /sys/devices/cpu/events/PM_THRD_3_CONC_RUN_INST
- /sys/devices/cpu/events/PM_THRD_3_RUN_CYC
- /sys/devices/cpu/events/PM_THRD_4_CONC_RUN_INST
- /sys/devices/cpu/events/PM_THRD_4_RUN_CYC
-
-Date: 2013/01/08
-
-Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
- Linux Powerpc mailing list <linuxppc-dev@ozlabs.org>
-
-Description: POWER-systems specific performance monitoring events
-
- A collection of performance monitoring events that may be
- supported by the POWER CPU. These events can be monitored
- using the 'perf(1)' tool.
-
- These events may not be supported by other CPUs.
-
- The contents of each file would look like:
-
- event=0xNNNN
-
- where 'N' is a hex digit and the number '0xNNNN' shows the
- "raw code" for the perf event identified by the file's
- "basename".
-
- Further, multiple terms like 'event=0xNNNN' can be specified
- and separated with comma. All available terms are defined in
- the /sys/bus/event_source/devices/<dev>/format file.
-
What: /sys/bus/event_source/devices/<pmu>/events/<event>
Date: 2014/02/24
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
--
1.9.3
^ permalink raw reply related
* [PATCH 02/15] perf Documentation: sysfs events/ interfaces
From: Arnaldo Carvalho de Melo @ 2014-10-15 20:52 UTC (permalink / raw)
To: Ingo Molnar
Cc: Andi Kleen, Michael Ellerman, Peter Zijlstra, linuxppc-dev,
linux-kernel, Stephane Eranian, Arnaldo Carvalho de Melo,
Cody P Schafer, Paul Mackerras, Sukadev Bhattiprolu, Jiri Olsa,
Anshuman Khandual
In-Reply-To: <1413406368-26245-1-git-send-email-acme@kernel.org>
From: Cody P Schafer <dev@codyps.com>
Add documentation for the <event>, <event>.scale, and <event>.unit
files in sysfs.
<event>.scale and <event>.unit were undocumented.
<event> was previously documented only for specific powerpc pmu events.
Signed-off-by: Cody P Schafer <dev@codyps.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Cc: Cody P Schafer <dev@codyps.com>
Cc: Haren Myneni <hbabu@us.ibm.com>
Cc: Haren Myneni <hbabu@us.ibm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Michael Ellerman <michaele@au1.ibm.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1412143402-26061-4-git-send-email-sukadev@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
---
.../testing/sysfs-bus-event_source-devices-events | 60 ++++++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-events b/Documentation/ABI/testing/sysfs-bus-event_source-devices-events
index 7b40a3cbc26a..a5226f094159 100644
--- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-events
+++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-events
@@ -599,3 +599,63 @@ Description: POWER-systems specific performance monitoring events
Further, multiple terms like 'event=0xNNNN' can be specified
and separated with comma. All available terms are defined in
the /sys/bus/event_source/devices/<dev>/format file.
+
+What: /sys/bus/event_source/devices/<pmu>/events/<event>
+Date: 2014/02/24
+Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
+Description: Per-pmu performance monitoring events specific to the running system
+
+ Each file (except for some of those with a '.' in them, '.unit'
+ and '.scale') in the 'events' directory describes a single
+ performance monitoring event supported by the <pmu>. The name
+ of the file is the name of the event.
+
+ File contents:
+
+ <term>[=<value>][,<term>[=<value>]]...
+
+ Where <term> is one of the terms listed under
+ /sys/bus/event_source/devices/<pmu>/format/ and <value> is
+ a number is base-16 format with a '0x' prefix (lowercase only).
+ If a <term> is specified alone (without an assigned value), it
+ is implied that 0x1 is assigned to that <term>.
+
+ Examples (each of these lines would be in a seperate file):
+
+ event=0x2abc
+ event=0x423,inv,cmask=0x3
+ domain=0x1,offset=0x8,starting_index=0xffff
+
+ Each of the assignments indicates a value to be assigned to a
+ particular set of bits (as defined by the format file
+ corresponding to the <term>) in the perf_event structure passed
+ to the perf_open syscall.
+
+What: /sys/bus/event_source/devices/<pmu>/events/<event>.unit
+Date: 2014/02/24
+Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
+Description: Perf event units
+
+ A string specifying the English plural numerical unit that <event>
+ (once multiplied by <event>.scale) represents.
+
+ Example:
+
+ Joules
+
+What: /sys/bus/event_source/devices/<pmu>/events/<event>.scale
+Date: 2014/02/24
+Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
+Description: Perf event scaling factors
+
+ A string representing a floating point value expressed in
+ scientific notation to be multiplied by the event count
+ recieved from the kernel to match the unit specified in the
+ <event>.unit file.
+
+ Example:
+
+ 2.3283064365386962890625e-10
+
+ This is provided to avoid performing floating point arithmetic
+ in the kernel.
--
1.9.3
^ permalink raw reply related
* [GIT PULL 00/15] perf/core improvements and fixes
From: Arnaldo Carvalho de Melo @ 2014-10-15 20:52 UTC (permalink / raw)
To: Ingo Molnar
Cc: Mike Galbraith, Alexander Yarygin, Peter Zijlstra,
Frederic Weisbecker, Stephane Eranian, Masanari Iida,
Paul Mackerras, Jiri Olsa, Anshuman Khandual, Namhyung Kim,
Andi Kleen, Christian Borntraeger, Cody P Schafer, Jean Pihet,
Sukadev Bhattiprolu, Arun Sharma, Arnaldo Carvalho de Melo,
Arnaldo Carvalho de Melo, Yasser Shalabi, Michael Ellerman,
Kan Liang, Randy Dunlap, linux-kernel, Taeung Song, David Ahern,
linuxppc-dev
Hi Ingo,
Please consider pulling, I guess the changes are minor of affect just some
non-core feature, so it is you call if you prefer to pull it into perf/urgent instead.
Best Regards,
- Arnaldo
The following changes since commit ec4212d88a77eb6caec10777ddd629b702a5ebbd:
Merge tag 'perf-core-for-mingo' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/urgent (2014-10-15 11:54:14 +0200)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git tags/perf-core-for-mingo
for you to fetch changes up to 673d659f5c5918b7ddbafebf1f129c9eb82973b4:
perf kvm stat live: Enable events copying (2014-10-15 17:39:03 -0300)
----------------------------------------------------------------
perf/core improvements and fixes:
User visible:
* Add a visual cue for toggle zeroing of samples in 'perf top' (Taeung Song)
* Fix for double free in 'perf stat' when using some specific invalid
command line combo (Yasser Shalabi)
Infrastructure:
* Add option to copy events when queuing for sorting across cpu buffers
and enable it for 'perf kvm stat live', to avoid having events left
in the queue pointing to the ring buffer be rewritten in high volume
sessions. (Alexander Yarygin, improving work done by David Ahern):
* Document sysfs events/ interfaces (Cody P Schafer)
* Add support to new style format of kernel PMU event. (Kan Liang)
* Fix typos in perf/Documentation (Masanari Iida)
* Improve callchains when using libunwind (Namhyung Kim)
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Lines starting with '#' will be ignored.
----------------------------------------------------------------
Alexander Yarygin (2):
perf session: Add option to copy events when queueing
perf kvm stat live: Enable events copying
Cody P Schafer (2):
perf Documentation: sysfs events/ interfaces
perf Documentation: Remove Ruplicated docs for powerpc cpu specific events
Kan Liang (4):
Revert "perf tools: Default to cpu// for events v5"
perf tools: Parse the pmu event prefix and suffix
perf tools: Add support to new style format of kernel PMU event
perf test: Add test case for pmu event new style format
Masanari Iida (1):
perf Documentation: Fix typos in perf/Documentation
Namhyung Kim (4):
perf report: Set callchain_param.record_mode for future use
perf callchain: Create an address space per thread
perf kvm: Use thread_{,_set}_priv helpers
perf trace: Use thread_{,_set}_priv helpers
Taeung Song (1):
perf top: Add a visual cue for toggle zeroing of samples
Yasser Shalabi (1):
perf evlist: Fix for double free in tools/perf stat
.../testing/sysfs-bus-event_source-devices-events | 611 ++-------------------
tools/perf/Documentation/perf-diff.txt | 6 +-
tools/perf/Documentation/perf-kvm.txt | 4 +-
tools/perf/Documentation/perf-list.txt | 2 +-
tools/perf/Documentation/perf-record.txt | 2 +-
tools/perf/Documentation/perf-script-perl.txt | 4 +-
tools/perf/Documentation/perf-script-python.txt | 6 +-
tools/perf/Documentation/perf-script.txt | 2 +-
tools/perf/Documentation/perf-test.txt | 2 +-
tools/perf/Documentation/perf-trace.txt | 2 +-
tools/perf/builtin-kvm.c | 7 +-
tools/perf/builtin-report.c | 7 +
tools/perf/builtin-trace.c | 16 +-
tools/perf/tests/dwarf-unwind.c | 3 +
tools/perf/tests/parse-events.c | 36 ++
tools/perf/ui/browsers/hists.c | 32 +-
tools/perf/util/evlist.c | 1 +
tools/perf/util/include/linux/string.h | 1 -
tools/perf/util/ordered-events.c | 49 +-
tools/perf/util/ordered-events.h | 10 +-
tools/perf/util/parse-events.c | 133 ++++-
tools/perf/util/parse-events.h | 14 +
tools/perf/util/parse-events.l | 30 +-
tools/perf/util/parse-events.y | 40 ++
tools/perf/util/pmu.c | 10 -
tools/perf/util/pmu.h | 10 +
tools/perf/util/session.c | 5 +-
tools/perf/util/string.c | 24 -
tools/perf/util/thread.c | 6 +
tools/perf/util/unwind-libunwind.c | 37 +-
tools/perf/util/unwind.h | 17 +
31 files changed, 460 insertions(+), 669 deletions(-)
^ permalink raw reply
* lockdep warning with 2d65a9f48fcdf7866aab6457bc707ca233e0c791
From: Aneesh Kumar K.V @ 2014-10-15 17:28 UTC (permalink / raw)
To: kvm-ppc@vger.kernel.org, Paul Mackerras, linuxppc-dev
=============================================
[ INFO: possible recursive locking detected ]
3.17.0+ #31 Not tainted
---------------------------------------------
qemu-system-ppc/9112 is trying to acquire lock:
(&(&vcpu->arch.tbacct_lock)->rlock){......}, at: [<d000000011591f84>] .vcore_stolen_time+0x44/0xb0 [kvm_hv]
but task is already holding lock:
(&(&vcpu->arch.tbacct_lock)->rlock){......}, at: [<d000000011592524>] .kvmppc_remove_runnable.part.2+0x34/0xd0 [kvm_hv]
other info that might help us debug this:
Possible unsafe locking scenario:
CPU0
----
lock(&(&vcpu->arch.tbacct_lock)->rlock);
lock(&(&vcpu->arch.tbacct_lock)->rlock);
*** DEADLOCK ***
May be due to missing lock nesting notation
3 locks held by qemu-system-ppc/9112:
#0: (&vcpu->mutex){+.+.+.}, at: [<c00000000008687c>] .vcpu_load+0x2c/0xf0
#1: (&(&vcore->lock)->rlock){+.+...}, at: [<d000000011594790>] .kvmppc_vcpu_run_hv+0x770/0x1720 [kvm_hv]
#2: (&(&vcpu->arch.tbacct_lock)->rlock){......}, at: [<d000000011592524>] .kvmppc_remove_runnable.part.2+0x34/0xd0 [kvm_hv]
stack backtrace:
CPU: 56 PID: 9112 Comm: qemu-system-ppc Not tainted 3.17.0+ #31
Call Trace:
[c000000fe488f330] [c0000000000167dc] .show_stack+0x7c/0x1f0 (unreliable)
[c000000fe488f400] [c0000000008ea148] .dump_stack+0x9c/0xd8
[c000000fe488f480] [c000000000110c6c] .__lock_acquire+0x151c/0x1ef0
[c000000fe488f600] [c000000000111fb0] .lock_acquire+0xd0/0x1b0
[c000000fe488f6d0] [c0000000008ddedc] ._raw_spin_lock_irq+0x5c/0x80
[c000000fe488f760] [d000000011591f84] .vcore_stolen_time+0x44/0xb0 [kvm_hv]
[c000000fe488f7f0] [d00000001159253c] .kvmppc_remove_runnable.part.2+0x4c/0xd0 [kvm_hv]
[c000000fe488f890] [d0000000115950c0] .kvmppc_vcpu_run_hv+0x10a0/0x1720 [kvm_hv]
[c000000fe488f9f0] [c000000000091d1c] .kvmppc_vcpu_run+0x2c/0x40
[c000000fe488fa60] [c00000000008efd4] .kvm_arch_vcpu_ioctl_run+0x54/0x170
[c000000fe488faf0] [c000000000086f78] .kvm_vcpu_ioctl+0x5c8/0x780
[c000000fe488fcb0] [c000000000264b54] .do_vfs_ioctl+0x474/0x770
[c000000fe488fd90] [c000000000264ea8] .SyS_ioctl+0x58/0xb0
[c000000fe488fe30] [c000000000009264] syscall_exit+0x0/0x98
^ permalink raw reply
* [PATCH 1/2] mm: Update generic gup implementation to handle hugepage directory
From: Aneesh Kumar K.V @ 2014-10-15 16:34 UTC (permalink / raw)
To: akpm, Steve Capper, Andrea Arcangeli, benh, mpe
Cc: linux-arch, linux-mm, linuxppc-dev, linux-kernel,
Aneesh Kumar K.V
Update generic gup implementation with powerpc specific details.
On powerpc at pmd level we can have hugepte, normal pmd pointer
or a pointer to the hugepage directory.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
include/linux/hugetlb.h | 1 +
include/linux/mm.h | 26 +++++++++++
mm/gup.c | 113 +++++++++++++++++++++++-------------------------
3 files changed, 81 insertions(+), 59 deletions(-)
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index 6e6d338641fe..65e12a24ce1d 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -138,6 +138,7 @@ static inline void hugetlb_show_meminfo(void)
#define prepare_hugepage_range(file, addr, len) (-EINVAL)
#define pmd_huge(x) 0
#define pud_huge(x) 0
+#define pgd_huge(x) 0
#define is_hugepage_only_range(mm, addr, len) 0
#define hugetlb_free_pgd_range(tlb, addr, end, floor, ceiling) ({BUG(); 0; })
#define hugetlb_fault(mm, vma, addr, flags) ({ BUG(); 0; })
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 02d11ee7f19d..f97732412cb4 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -1219,6 +1219,32 @@ long get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
struct vm_area_struct **vmas);
int get_user_pages_fast(unsigned long start, int nr_pages, int write,
struct page **pages);
+
+#ifdef CONFIG_HAVE_GENERIC_RCU_GUP
+#ifndef is_hugepd
+/*
+ * Some architectures support hugepage directory format that is
+ * required to support different hugetlbfs sizes.
+ */
+typedef struct { unsigned long pd; } hugepd_t;
+#define is_hugepd(hugepd) (0)
+#define __hugepd(x) ((hugepd_t) { (x) })
+static inline int gup_hugepd(hugepd_t hugepd, unsigned long addr,
+ unsigned pdshift, unsigned long end,
+ int write, struct page **pages, int *nr)
+{
+ return 0;
+}
+#else
+extern int gup_hugepd(hugepd_t hugepd, unsigned long addr,
+ unsigned pdshift, unsigned long end,
+ int write, struct page **pages, int *nr);
+#endif
+extern int gup_huge_pte(pte_t orig, pte_t *ptep, unsigned long addr,
+ unsigned long sz, unsigned long end, int write,
+ struct page **pages, int *nr);
+#endif
+
struct kvec;
int get_kernel_pages(const struct kvec *iov, int nr_pages, int write,
struct page **pages);
diff --git a/mm/gup.c b/mm/gup.c
index cd62c8c90d4a..13c560ef9ddf 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -786,65 +786,31 @@ static int gup_pte_range(pmd_t pmd, unsigned long addr, unsigned long end,
}
#endif /* __HAVE_ARCH_PTE_SPECIAL */
-static int gup_huge_pmd(pmd_t orig, pmd_t *pmdp, unsigned long addr,
- unsigned long end, int write, struct page **pages, int *nr)
+int gup_huge_pte(pte_t orig, pte_t *ptep, unsigned long addr,
+ unsigned long sz, unsigned long end, int write,
+ struct page **pages, int *nr)
{
- struct page *head, *page, *tail;
int refs;
+ unsigned long pte_end;
+ struct page *head, *page, *tail;
- if (write && !pmd_write(orig))
- return 0;
-
- refs = 0;
- head = pmd_page(orig);
- page = head + ((addr & ~PMD_MASK) >> PAGE_SHIFT);
- tail = page;
- do {
- VM_BUG_ON_PAGE(compound_head(page) != head, page);
- pages[*nr] = page;
- (*nr)++;
- page++;
- refs++;
- } while (addr += PAGE_SIZE, addr != end);
- if (!page_cache_add_speculative(head, refs)) {
- *nr -= refs;
+ if (write && !pte_write(orig))
return 0;
- }
- if (unlikely(pmd_val(orig) != pmd_val(*pmdp))) {
- *nr -= refs;
- while (refs--)
- put_page(head);
+ if (!pte_present(orig))
return 0;
- }
- /*
- * Any tail pages need their mapcount reference taken before we
- * return. (This allows the THP code to bump their ref count when
- * they are split into base pages).
- */
- while (refs--) {
- if (PageTail(tail))
- get_huge_page_tail(tail);
- tail++;
- }
-
- return 1;
-}
-
-static int gup_huge_pud(pud_t orig, pud_t *pudp, unsigned long addr,
- unsigned long end, int write, struct page **pages, int *nr)
-{
- struct page *head, *page, *tail;
- int refs;
+ pte_end = (addr + sz) & ~(sz-1);
+ if (pte_end < end)
+ end = pte_end;
- if (write && !pud_write(orig))
- return 0;
+ /* hugepages are never "special" */
+ VM_BUG_ON(!pfn_valid(pte_pfn(orig)));
refs = 0;
- head = pud_page(orig);
- page = head + ((addr & ~PUD_MASK) >> PAGE_SHIFT);
+ head = pte_page(orig);
+ page = head + ((addr & (sz-1)) >> PAGE_SHIFT);
tail = page;
do {
VM_BUG_ON_PAGE(compound_head(page) != head, page);
@@ -859,13 +825,18 @@ static int gup_huge_pud(pud_t orig, pud_t *pudp, unsigned long addr,
return 0;
}
- if (unlikely(pud_val(orig) != pud_val(*pudp))) {
+ if (unlikely(pte_val(orig) != pte_val(*ptep))) {
*nr -= refs;
while (refs--)
put_page(head);
return 0;
}
+ /*
+ * Any tail pages need their mapcount reference taken before we
+ * return. (This allows the THP code to bump their ref count when
+ * they are split into base pages).
+ */
while (refs--) {
if (PageTail(tail))
get_huge_page_tail(tail);
@@ -898,10 +869,19 @@ static int gup_pmd_range(pud_t pud, unsigned long addr, unsigned long end,
if (pmd_numa(pmd))
return 0;
- if (!gup_huge_pmd(pmd, pmdp, addr, next, write,
- pages, nr))
+ if (!gup_huge_pte(__pte(pmd_val(pmd)), (pte_t *)pmdp,
+ addr, PMD_SIZE, next,
+ write, pages, nr))
return 0;
+ } else if (unlikely(is_hugepd(__hugepd(pmd_val(pmd))))) {
+ /*
+ * architecture have different format for hugetlbfs
+ * pmd format and THP pmd format
+ */
+ if (!gup_hugepd(__hugepd(pmd_val(pmd)), addr, PMD_SHIFT,
+ next, write, pages, nr))
+ return 0;
} else if (!gup_pte_range(pmd, addr, next, write, pages, nr))
return 0;
} while (pmdp++, addr = next, addr != end);
@@ -909,22 +889,27 @@ static int gup_pmd_range(pud_t pud, unsigned long addr, unsigned long end,
return 1;
}
-static int gup_pud_range(pgd_t *pgdp, unsigned long addr, unsigned long end,
+static int gup_pud_range(pgd_t pgd, unsigned long addr, unsigned long end,
int write, struct page **pages, int *nr)
{
unsigned long next;
pud_t *pudp;
- pudp = pud_offset(pgdp, addr);
+ pudp = pud_offset(&pgd, addr);
do {
pud_t pud = ACCESS_ONCE(*pudp);
next = pud_addr_end(addr, end);
if (pud_none(pud))
return 0;
- if (pud_huge(pud)) {
- if (!gup_huge_pud(pud, pudp, addr, next, write,
- pages, nr))
+ if (unlikely(pud_huge(pud))) {
+ if (!gup_huge_pte(__pte(pud_val(pud)), (pte_t *)pudp,
+ addr, PUD_SIZE, next,
+ write, pages, nr))
+ return 0;
+ } else if (unlikely(is_hugepd(__hugepd(pud_val(pud))))) {
+ if (!gup_hugepd(__hugepd(pud_val(pud)), addr, PUD_SHIFT,
+ next, write, pages, nr))
return 0;
} else if (!gup_pmd_range(pud, addr, next, write, pages, nr))
return 0;
@@ -970,10 +955,21 @@ int __get_user_pages_fast(unsigned long start, int nr_pages, int write,
local_irq_save(flags);
pgdp = pgd_offset(mm, addr);
do {
+ pgd_t pgd = ACCESS_ONCE(*pgdp);
+
next = pgd_addr_end(addr, end);
- if (pgd_none(*pgdp))
+ if (pgd_none(pgd))
break;
- else if (!gup_pud_range(pgdp, addr, next, write, pages, &nr))
+ if (unlikely(pgd_huge(pgd))) {
+ if (!gup_huge_pte(__pte(pgd_val(pgd)), (pte_t *)pgdp,
+ addr, PGDIR_SIZE, next,
+ write, pages, &nr))
+ break;
+ } else if (unlikely(is_hugepd(__hugepd(pgd_val(pgd))))) {
+ if (!gup_hugepd(__hugepd(pgd_val(pgd)), addr, PGDIR_SHIFT,
+ next, write, pages, &nr))
+ break;
+ } else if (!gup_pud_range(pgd, addr, next, write, pages, &nr))
break;
} while (pgdp++, addr = next, addr != end);
local_irq_restore(flags);
@@ -1028,5 +1024,4 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
return ret;
}
-
#endif /* CONFIG_HAVE_GENERIC_RCU_GUP */
--
1.9.1
^ permalink raw reply related
* [PATCH 2/2] arch/powerpc: Switch to generic RCU get_user_pages_fast
From: Aneesh Kumar K.V @ 2014-10-15 16:34 UTC (permalink / raw)
To: akpm, Steve Capper, Andrea Arcangeli, benh, mpe
Cc: linux-arch, linux-mm, linuxppc-dev, linux-kernel,
Aneesh Kumar K.V
In-Reply-To: <1413390888-4934-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
This patch switch the ppc arch to use the generic RCU based
gup implementation.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
arch/powerpc/Kconfig | 1 +
arch/powerpc/include/asm/hugetlb.h | 8 +-
arch/powerpc/include/asm/page.h | 4 +-
arch/powerpc/include/asm/pgtable-ppc64.h | 1 -
arch/powerpc/include/asm/pgtable.h | 5 -
arch/powerpc/mm/Makefile | 2 +-
arch/powerpc/mm/gup.c | 235 -------------------------------
arch/powerpc/mm/hugetlbpage.c | 27 ++--
8 files changed, 21 insertions(+), 262 deletions(-)
delete mode 100644 arch/powerpc/mm/gup.c
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 88eace4e28c3..7af887dc6aed 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -148,6 +148,7 @@ config PPC
select HAVE_ARCH_AUDITSYSCALL
select ARCH_SUPPORTS_ATOMIC_RMW
select DCACHE_WORD_ACCESS if PPC64 && CPU_LITTLE_ENDIAN
+ select HAVE_GENERIC_RCU_GUP
config GENERIC_CSUM
def_bool CPU_LITTLE_ENDIAN
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h
index 623f2971ce0e..7855cce9c969 100644
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -48,7 +48,7 @@ static inline unsigned int hugepd_shift(hugepd_t hpd)
#endif /* CONFIG_PPC_BOOK3S_64 */
-static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr,
+static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr,
unsigned pdshift)
{
/*
@@ -58,9 +58,9 @@ static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr,
*/
unsigned long idx = 0;
- pte_t *dir = hugepd_page(*hpdp);
+ pte_t *dir = hugepd_page(hpd);
#ifndef CONFIG_PPC_FSL_BOOK3E
- idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(*hpdp);
+ idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(hpd);
#endif
return dir + idx;
@@ -193,7 +193,7 @@ static inline void flush_hugetlb_page(struct vm_area_struct *vma,
}
#define hugepd_shift(x) 0
-static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr,
+static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr,
unsigned pdshift)
{
return 0;
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index 26fe1ae15212..aa430ec14895 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -379,12 +379,12 @@ static inline int hugepd_ok(hugepd_t hpd)
}
#endif
-#define is_hugepd(pdep) (hugepd_ok(*((hugepd_t *)(pdep))))
+#define is_hugepd(hpd) (hugepd_ok(hpd))
int pgd_huge(pgd_t pgd);
#else /* CONFIG_HUGETLB_PAGE */
#define is_hugepd(pdep) 0
-#define pgd_huge(pgd) 0
#endif /* CONFIG_HUGETLB_PAGE */
+#define __hugepd(x) ((hugepd_t) { (x) })
struct page;
extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index ae153c40ab7c..29c36242cc6a 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -575,6 +575,5 @@ static inline int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
*/
return true;
}
-
#endif /* __ASSEMBLY__ */
#endif /* _ASM_POWERPC_PGTABLE_PPC64_H_ */
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index 316f9a5da173..4a67c1ddb91b 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -274,11 +274,6 @@ extern void paging_init(void);
*/
extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *);
-extern int gup_hugepd(hugepd_t *hugepd, unsigned pdshift, unsigned long addr,
- unsigned long end, int write, struct page **pages, int *nr);
-
-extern int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
- unsigned long end, int write, struct page **pages, int *nr);
#ifndef CONFIG_TRANSPARENT_HUGEPAGE
#define pmd_large(pmd) 0
#define has_transparent_hugepage() 0
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index 325e861616a1..438dcd3fd0d1 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -6,7 +6,7 @@ subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC)
-obj-y := fault.o mem.o pgtable.o gup.o mmap.o \
+obj-y := fault.o mem.o pgtable.o mmap.o \
init_$(CONFIG_WORD_SIZE).o \
pgtable_$(CONFIG_WORD_SIZE).o
obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \
diff --git a/arch/powerpc/mm/gup.c b/arch/powerpc/mm/gup.c
deleted file mode 100644
index d8746684f606..000000000000
--- a/arch/powerpc/mm/gup.c
+++ /dev/null
@@ -1,235 +0,0 @@
-/*
- * Lockless get_user_pages_fast for powerpc
- *
- * Copyright (C) 2008 Nick Piggin
- * Copyright (C) 2008 Novell Inc.
- */
-#undef DEBUG
-
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/hugetlb.h>
-#include <linux/vmstat.h>
-#include <linux/pagemap.h>
-#include <linux/rwsem.h>
-#include <asm/pgtable.h>
-
-#ifdef __HAVE_ARCH_PTE_SPECIAL
-
-/*
- * The performance critical leaf functions are made noinline otherwise gcc
- * inlines everything into a single function which results in too much
- * register pressure.
- */
-static noinline int gup_pte_range(pmd_t pmd, unsigned long addr,
- unsigned long end, int write, struct page **pages, int *nr)
-{
- unsigned long mask, result;
- pte_t *ptep;
-
- result = _PAGE_PRESENT|_PAGE_USER;
- if (write)
- result |= _PAGE_RW;
- mask = result | _PAGE_SPECIAL;
-
- ptep = pte_offset_kernel(&pmd, addr);
- do {
- pte_t pte = ACCESS_ONCE(*ptep);
- struct page *page;
- /*
- * Similar to the PMD case, NUMA hinting must take slow path
- */
- if (pte_numa(pte))
- return 0;
-
- if ((pte_val(pte) & mask) != result)
- return 0;
- VM_BUG_ON(!pfn_valid(pte_pfn(pte)));
- page = pte_page(pte);
- if (!page_cache_get_speculative(page))
- return 0;
- if (unlikely(pte_val(pte) != pte_val(*ptep))) {
- put_page(page);
- return 0;
- }
- pages[*nr] = page;
- (*nr)++;
-
- } while (ptep++, addr += PAGE_SIZE, addr != end);
-
- return 1;
-}
-
-static int gup_pmd_range(pud_t pud, unsigned long addr, unsigned long end,
- int write, struct page **pages, int *nr)
-{
- unsigned long next;
- pmd_t *pmdp;
-
- pmdp = pmd_offset(&pud, addr);
- do {
- pmd_t pmd = ACCESS_ONCE(*pmdp);
-
- next = pmd_addr_end(addr, end);
- /*
- * If we find a splitting transparent hugepage we
- * return zero. That will result in taking the slow
- * path which will call wait_split_huge_page()
- * if the pmd is still in splitting state
- */
- if (pmd_none(pmd) || pmd_trans_splitting(pmd))
- return 0;
- if (pmd_huge(pmd) || pmd_large(pmd)) {
- /*
- * NUMA hinting faults need to be handled in the GUP
- * slowpath for accounting purposes and so that they
- * can be serialised against THP migration.
- */
- if (pmd_numa(pmd))
- return 0;
-
- if (!gup_hugepte((pte_t *)pmdp, PMD_SIZE, addr, next,
- write, pages, nr))
- return 0;
- } else if (is_hugepd(pmdp)) {
- if (!gup_hugepd((hugepd_t *)pmdp, PMD_SHIFT,
- addr, next, write, pages, nr))
- return 0;
- } else if (!gup_pte_range(pmd, addr, next, write, pages, nr))
- return 0;
- } while (pmdp++, addr = next, addr != end);
-
- return 1;
-}
-
-static int gup_pud_range(pgd_t pgd, unsigned long addr, unsigned long end,
- int write, struct page **pages, int *nr)
-{
- unsigned long next;
- pud_t *pudp;
-
- pudp = pud_offset(&pgd, addr);
- do {
- pud_t pud = ACCESS_ONCE(*pudp);
-
- next = pud_addr_end(addr, end);
- if (pud_none(pud))
- return 0;
- if (pud_huge(pud)) {
- if (!gup_hugepte((pte_t *)pudp, PUD_SIZE, addr, next,
- write, pages, nr))
- return 0;
- } else if (is_hugepd(pudp)) {
- if (!gup_hugepd((hugepd_t *)pudp, PUD_SHIFT,
- addr, next, write, pages, nr))
- return 0;
- } else if (!gup_pmd_range(pud, addr, next, write, pages, nr))
- return 0;
- } while (pudp++, addr = next, addr != end);
-
- return 1;
-}
-
-int __get_user_pages_fast(unsigned long start, int nr_pages, int write,
- struct page **pages)
-{
- struct mm_struct *mm = current->mm;
- unsigned long addr, len, end;
- unsigned long next;
- unsigned long flags;
- pgd_t *pgdp;
- int nr = 0;
-
- pr_devel("%s(%lx,%x,%s)\n", __func__, start, nr_pages, write ? "write" : "read");
-
- start &= PAGE_MASK;
- addr = start;
- len = (unsigned long) nr_pages << PAGE_SHIFT;
- end = start + len;
-
- if (unlikely(!access_ok(write ? VERIFY_WRITE : VERIFY_READ,
- start, len)))
- return 0;
-
- pr_devel(" aligned: %lx .. %lx\n", start, end);
-
- /*
- * XXX: batch / limit 'nr', to avoid large irq off latency
- * needs some instrumenting to determine the common sizes used by
- * important workloads (eg. DB2), and whether limiting the batch size
- * will decrease performance.
- *
- * It seems like we're in the clear for the moment. Direct-IO is
- * the main guy that batches up lots of get_user_pages, and even
- * they are limited to 64-at-a-time which is not so many.
- */
- /*
- * This doesn't prevent pagetable teardown, but does prevent
- * the pagetables from being freed on powerpc.
- *
- * So long as we atomically load page table pointers versus teardown,
- * we can follow the address down to the the page and take a ref on it.
- */
- local_irq_save(flags);
-
- pgdp = pgd_offset(mm, addr);
- do {
- pgd_t pgd = ACCESS_ONCE(*pgdp);
-
- pr_devel(" %016lx: normal pgd %p\n", addr,
- (void *)pgd_val(pgd));
- next = pgd_addr_end(addr, end);
- if (pgd_none(pgd))
- break;
- if (pgd_huge(pgd)) {
- if (!gup_hugepte((pte_t *)pgdp, PGDIR_SIZE, addr, next,
- write, pages, &nr))
- break;
- } else if (is_hugepd(pgdp)) {
- if (!gup_hugepd((hugepd_t *)pgdp, PGDIR_SHIFT,
- addr, next, write, pages, &nr))
- break;
- } else if (!gup_pud_range(pgd, addr, next, write, pages, &nr))
- break;
- } while (pgdp++, addr = next, addr != end);
-
- local_irq_restore(flags);
-
- return nr;
-}
-
-int get_user_pages_fast(unsigned long start, int nr_pages, int write,
- struct page **pages)
-{
- struct mm_struct *mm = current->mm;
- int nr, ret;
-
- start &= PAGE_MASK;
- nr = __get_user_pages_fast(start, nr_pages, write, pages);
- ret = nr;
-
- if (nr < nr_pages) {
- pr_devel(" slow path ! nr = %d\n", nr);
-
- /* Try to get the remaining pages with get_user_pages */
- start += nr << PAGE_SHIFT;
- pages += nr;
-
- down_read(&mm->mmap_sem);
- ret = get_user_pages(current, mm, start,
- nr_pages - nr, write, 0, pages, NULL);
- up_read(&mm->mmap_sem);
-
- /* Have to be a bit careful with return values */
- if (nr > 0) {
- if (ret < 0)
- ret = nr;
- else
- ret += nr;
- }
- }
-
- return ret;
-}
-
-#endif /* __HAVE_ARCH_PTE_SPECIAL */
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 7e70ae968e5f..b8d228ca50fd 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -230,7 +230,7 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr, unsigned long sz
if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr, pdshift, pshift))
return NULL;
- return hugepte_offset(hpdp, addr, pdshift);
+ return hugepte_offset(*hpdp, addr, pdshift);
}
#else
@@ -270,7 +270,7 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr, unsigned long sz
if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr, pdshift, pshift))
return NULL;
- return hugepte_offset(hpdp, addr, pdshift);
+ return hugepte_offset(*hpdp, addr, pdshift);
}
#endif
@@ -538,7 +538,7 @@ static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud,
do {
pmd = pmd_offset(pud, addr);
next = pmd_addr_end(addr, end);
- if (!is_hugepd(pmd)) {
+ if (!is_hugepd(__hugepd(pmd_val(*pmd)))) {
/*
* if it is not hugepd pointer, we should already find
* it cleared.
@@ -587,7 +587,7 @@ static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
do {
pud = pud_offset(pgd, addr);
next = pud_addr_end(addr, end);
- if (!is_hugepd(pud)) {
+ if (!is_hugepd(__hugepd(pud_val(*pud)))) {
if (pud_none_or_clear_bad(pud))
continue;
hugetlb_free_pmd_range(tlb, pud, addr, next, floor,
@@ -653,7 +653,7 @@ void hugetlb_free_pgd_range(struct mmu_gather *tlb,
do {
next = pgd_addr_end(addr, end);
pgd = pgd_offset(tlb->mm, addr);
- if (!is_hugepd(pgd)) {
+ if (!is_hugepd(__hugepd(pgd_val(*pgd)))) {
if (pgd_none_or_clear_bad(pgd))
continue;
hugetlb_free_pud_range(tlb, pgd, addr, next, floor, ceiling);
@@ -713,18 +713,17 @@ static unsigned long hugepte_addr_end(unsigned long addr, unsigned long end,
return (__boundary - 1 < end - 1) ? __boundary : end;
}
-int gup_hugepd(hugepd_t *hugepd, unsigned pdshift,
- unsigned long addr, unsigned long end,
- int write, struct page **pages, int *nr)
+int gup_hugepd(hugepd_t hugepd, unsigned long addr, unsigned pdshift,
+ unsigned long end, int write, struct page **pages, int *nr)
{
pte_t *ptep;
- unsigned long sz = 1UL << hugepd_shift(*hugepd);
+ unsigned long sz = 1UL << hugepd_shift(hugepd);
unsigned long next;
ptep = hugepte_offset(hugepd, addr, pdshift);
do {
next = hugepte_addr_end(addr, end, sz);
- if (!gup_hugepte(ptep, sz, addr, end, write, pages, nr))
+ if (!gup_huge_pte(*ptep, ptep, addr, sz, end, write, pages, nr))
return 0;
} while (ptep++, addr = next, addr != end);
@@ -961,7 +960,7 @@ pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea, unsigned *shift
else if (pgd_huge(pgd)) {
ret_pte = (pte_t *) pgdp;
goto out;
- } else if (is_hugepd(&pgd))
+ } else if (is_hugepd(__hugepd(pgd_val(pgd))))
hpdp = (hugepd_t *)&pgd;
else {
/*
@@ -978,7 +977,7 @@ pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea, unsigned *shift
else if (pud_huge(pud)) {
ret_pte = (pte_t *) pudp;
goto out;
- } else if (is_hugepd(&pud))
+ } else if (is_hugepd(__hugepd(pud_val(pud))))
hpdp = (hugepd_t *)&pud;
else {
pdshift = PMD_SHIFT;
@@ -999,7 +998,7 @@ pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea, unsigned *shift
if (pmd_huge(pmd) || pmd_large(pmd)) {
ret_pte = (pte_t *) pmdp;
goto out;
- } else if (is_hugepd(&pmd))
+ } else if (is_hugepd(__hugepd(pmd_val(pmd))))
hpdp = (hugepd_t *)&pmd;
else
return pte_offset_kernel(&pmd, ea);
@@ -1008,7 +1007,7 @@ pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea, unsigned *shift
if (!hpdp)
return NULL;
- ret_pte = hugepte_offset(hpdp, ea, pdshift);
+ ret_pte = hugepte_offset(*hpdp, ea, pdshift);
pdshift = hugepd_shift(*hpdp);
out:
if (shift)
--
1.9.1
^ permalink raw reply related
* Re: [PATCH V7 00/17] Enable SRIOV on POWER8
From: Bjorn Helgaas @ 2014-10-15 13:52 UTC (permalink / raw)
To: Wei Yang
Cc: linux-pci@vger.kernel.org, Benjamin Herrenschmidt, linuxppc-dev,
Gavin Shan
In-Reply-To: <20141015090014.GA13499@richard>
On Wed, Oct 15, 2014 at 3:00 AM, Wei Yang <weiyang@linux.vnet.ibm.com> wrote:
> On Thu, Oct 02, 2014 at 09:59:43AM -0600, Bjorn Helgaas wrote:
...
>>I haven't seen any more on this series, and I'm assuming you'll post a
>>rebased series (maybe you're waiting for v3.18-rc1?). I'm just checking to
>>make sure you're not waiting for something from me...
>>
>
> Hi, Bjorn
>
> Haven't seen you for a long time :-) I am just back from vocation and the mail
> box doesn't work well for previous two days.
>
> Yep, I am rebasing the code on top of v3.17, is this fine for you?
When I apply your patches, they will be on a branch based on
v3.18-rc1, so the easiest thing for me would be if you generate them
from that base. Here's why:
- Linus released v3.17 on Oct 5, 2014
- Merge window for v3.18 opened when v3.17 released
- All changes intended for v3.18 will be merged during window
(theoretically, at least)
- Merge window closes when Linus releases v3.18-rc1 (probably Oct 19 or 26)
Your changes will miss the v3.18 merge window, so the next chance to
merge them will be during the v3.19 merge window that opens when v3.18
releases. v3.18-rc1 is a close approximation of what v3.18 will
eventually be, so rebasing to v3.18-rc1 will minimize merge conflicts
when we eventually merge your changes on top of v3.18.
v3.18-rc1 isn't out yet, but if you rebase to the current head of
Linus' tree, that should be fairly close. The PCI changes are already
in (80213c03c415), and at least some of the powerpc changes are in
(fd9879b9bb32).
Bjorn
^ permalink raw reply
* [PATCH v3] powerpc/vphn: NUMA node code expects big-endian
From: Greg Kurz @ 2014-10-15 10:42 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nishanth Aravamudan
The associativity domain numbers are obtained from the hypervisor through
registers and written into memory by the guest: the packed array passed to
vphn_unpack_associativity() is then native-endian, unlike what was assumed
in the following commit:
commit b08a2a12e44eaec5024b2b969f4fcb98169d1ca3
Author: Alistair Popple <alistair@popple.id.au>
Date: Wed Aug 7 02:01:44 2013 +1000
powerpc: Make NUMA device node code endian safe
This issue fills the topology with bogus data and makes it unusable. It may
lead to severe performance breakdowns.
We should ideally patch the vphn_unpack_associativity() function to do the
64-bit loads, but this requires some more brain storming.
In the meantime, let's go for a suboptimal and temporary bug fix: this patch
converts each 64-bit value of the packed array to big endian, as expected by
the current parsing code in vphn_unpack_associativity().
Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
---
Changes in v3:
- dropped the complicated bit-shift based solution as requested by Michael
Ellerman
arch/powerpc/mm/numa.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 649666d..b81bfe3 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -1442,8 +1442,11 @@ static long hcall_vphn(unsigned long cpu, __be32 *associativity)
long retbuf[PLPAR_HCALL9_BUFSIZE] = {0};
u64 flags = 1;
int hwcpu = get_hard_smp_processor_id(cpu);
+ int i;
rc = plpar_hcall9(H_HOME_NODE_ASSOCIATIVITY, retbuf, flags, hwcpu);
+ for (i = 0; i < 6; i++)
+ retbuf[i] = cpu_to_be64(retbuf[i]);
vphn_unpack_associativity(retbuf, associativity);
return rc;
^ permalink raw reply related
* Re: [PATCH V7 00/17] Enable SRIOV on POWER8
From: Wei Yang @ 2014-10-15 9:00 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-pci@vger.kernel.org, Wei Yang, Benjamin Herrenschmidt,
linuxppc-dev, Gavin Shan
In-Reply-To: <20141002155943.GA19392@google.com>
On Thu, Oct 02, 2014 at 09:59:43AM -0600, Bjorn Helgaas wrote:
>On Wed, Aug 20, 2014 at 11:35:46AM +0800, Wei Yang wrote:
>> On Tue, Aug 19, 2014 at 10:12:27PM -0500, Bjorn Helgaas wrote:
>> >On Tue, Aug 19, 2014 at 9:34 PM, Wei Yang <weiyang@linux.vnet.ibm.com> wrote:
>> >> On Tue, Aug 19, 2014 at 03:19:42PM -0600, Bjorn Helgaas wrote:
>> >>>On Thu, Jul 24, 2014 at 02:22:10PM +0800, Wei Yang wrote:
>> >>>> This patch set enables the SRIOV on POWER8.
>> >>>>
>> >>>> The gerneral idea is put each VF into one individual PE and allocate required
>> >>>> resources like DMA/MSI.
>> >>>>
>> >>>> One thing special for VF PE is we use M64BT to cover the IOV BAR. M64BT is one
>> >>>> hardware on POWER platform to map MMIO address to PE. By using M64BT, we could
>> >>>> map one individual VF to a VF PE, which introduce more flexiblity to users.
>> >>>>
>> >>>> To achieve this effect, we need to do some hack on pci devices's resources.
>> >>>> 1. Expand the IOV BAR properly.
>> >>>> Done by pnv_pci_ioda_fixup_iov_resources().
>> >>>> 2. Shift the IOV BAR properly.
>> >>>> Done by pnv_pci_vf_resource_shift().
>> >>>> 3. IOV BAR alignment is the total size instead of an individual size on
>> >>>> powernv platform.
>> >>>> Done by pnv_pcibios_sriov_resource_alignment().
>> >>>> 4. Take the IOV BAR alignment into consideration in the sizing and assigning.
>> >>>> This is achieved by commit: "PCI: Take additional IOV BAR alignment in
>> >>>> sizing and assigning"
>> >>>>
>> >>>> Test Environment:
>> >>>> The SRIOV device tested is Emulex Lancer and Mellanox ConnectX-3 on
>> >>>> POWER8.
>> >>>>
>> >>>> Examples on pass through a VF to guest through vfio:
>> >>>> 1. install necessary modules
>> >>>> modprobe vfio
>> >>>> modprobe vfio-pci
>> >>>> 2. retrieve the iommu_group the device belongs to
>> >>>> readlink /sys/bus/pci/devices/0000:06:0d.0/iommu_group
>> >>>> ../../../../kernel/iommu_groups/26
>> >>>> This means it belongs to group 26
>> >>>> 3. see how many devices under this iommu_group
>> >>>> ls /sys/kernel/iommu_groups/26/devices/
>> >>>> 4. unbind the original driver and bind to vfio-pci driver
>> >>>> echo 0000:06:0d.0 > /sys/bus/pci/devices/0000:06:0d.0/driver/unbind
>> >>>> echo 1102 0002 > /sys/bus/pci/drivers/vfio-pci/new_id
>> >>>> Note: this should be done for each device in the same iommu_group
>> >>>> 5. Start qemu and pass device through vfio
>> >>>> /home/ywywyang/git/qemu-impreza/ppc64-softmmu/qemu-system-ppc64 \
>> >>>> -M pseries -m 2048 -enable-kvm -nographic \
>> >>>> -drive file=/home/ywywyang/kvm/fc19.img \
>> >>>> -monitor telnet:localhost:5435,server,nowait -boot cd \
>> >>>> -device "spapr-pci-vfio-host-bridge,id=CXGB3,iommu=26,index=6"
>> >>>>
>> >>>> Verify this is the exact VF response:
>> >>>> 1. ping from a machine in the same subnet(the broadcast domain)
>> >>>> 2. run arp -n on this machine
>> >>>> 9.115.251.20 ether 00:00:c9:df:ed:bf C eth0
>> >>>> 3. ifconfig in the guest
>> >>>> # ifconfig eth1
>> >>>> eth1: flags=4163<UP,BROADCAST,RUNNING,MULTICAST> mtu 1500
>> >>>> inet 9.115.251.20 netmask 255.255.255.0 broadcast 9.115.251.255
>> >>>> inet6 fe80::200:c9ff:fedf:edbf prefixlen 64 scopeid 0x20<link>
>> >>>> ether 00:00:c9:df:ed:bf txqueuelen 1000 (Ethernet)
>> >>>> RX packets 175 bytes 13278 (12.9 KiB)
>> >>>> RX errors 0 dropped 0 overruns 0 frame 0
>> >>>> TX packets 58 bytes 9276 (9.0 KiB)
>> >>>> TX errors 0 dropped 0 overruns 0 carrier 0 collisions 0
>> >>>> 4. They have the same MAC address
>> >>>>
>> >>>> Note: make sure you shutdown other network interfaces in guest.
>> >>>>
>> >>>> ---
>> >>>> v6 -> v7:
>> >>>> 1. add IORESOURCE_ARCH flag for IOV BAR on powernv platform.
>> >>>> 2. when IOV BAR has IORESOURCE_ARCH flag, the size is retrieved from
>> >>>> hardware directly. If not, calculate as usual.
>> >>>> 3. reorder the patch set, group them by subsystem:
>> >>>> PCI, powerpc, powernv
>> >>>> 4. rebase it on 3.16-rc6
>> >>>
>> >>>This doesn't apply for me on v3.16-rc6:
>> >>>
>> >>> 02:48:57 ~/linux$ stg rebase v3.16-rc6
>> >>> Checking for changes in the working directory ... done
>> >>> Rebasing to "v3.16-rc6" ... done
>> >>> No patches applied
>> >>> 02:49:14 ~/linux$ stg import -M --sign m/wy
>> >>> Checking for changes in the working directory ... done
>> >>> Importing patch "pci-iov-export-interface-for" ... done
>> >>> Importing patch "pci-iov-get-vf-bar-size-from" ... done
>> >>> Importing patch "pci-add-weak" ... done
>> >>> Importing patch "pci-take-additional-iov-bar" ... done
>> >>> Importing patch "powerpc-pci-don-t-unset-pci" ... done
>> >>> Importing patch "powerpc-pci-define" ... done
>> >>> Importing patch "powrepc-pci-refactor-pci_dn" ... done
>> >>> Importing patch "powerpc-powernv-use-pci_dn-in" ... error: patch failed:
>> >>> arch/powerpc/platforms/powernv/pci.c:376
>> >>> error: arch/powerpc/platforms/powernv/pci.c: patch does not apply
>> >>> stg import: Diff does not apply cleanly
>> >>>
>> >>>What am I missing?
>> >>>
>> >>>I assume you intend these all to go through my tree just to keep them all
>> >>>together. The ideal rebase target for me would be v3.17-rc1.
>> >>
>> >> Ok, I will rebase it on v3.17-rc1 upstream. While I guess the conflict is due
>> >> to some patches from Gavin, which is not merged at that moment. I will make
>> >> sure it applies to v3.17-rc1.
>> >
>> >I tried applying them on v3.16-rc6 as well as on every change to
>> >arch/powerpc/platforms/powernv/pci.c between v3.16-rc6 and v3.17-rc1,
>> >and none applied cleanly. Patches you post should be based on some
>> >upstream tag, not on something that includes unmerged patches.
>>
>> Sorry about this, I will pay attention to this next time.
>
>I haven't seen any more on this series, and I'm assuming you'll post a
>rebased series (maybe you're waiting for v3.18-rc1?). I'm just checking to
>make sure you're not waiting for something from me...
>
Hi, Bjorn
Haven't seen you for a long time :-) I am just back from vocation and the mail
box doesn't work well for previous two days.
Yep, I am rebasing the code on top of v3.17, is this fine for you?
>Bjorn
--
Richard Yang
Help you, Help me
^ permalink raw reply
* Re: [RFC PATCH v3 1/3] powerpc: Fix warning reported by verify_cpu_node_mapping()
From: Li Zhong @ 2014-10-15 7:34 UTC (permalink / raw)
To: Michael Ellerman
Cc: Nishanth Aravamudan, linuxppc-dev, paulus, Nathan Fontenot
In-Reply-To: <1413261346.19826.0.camel@concordia>
On 二, 2014-10-14 at 15:35 +1100, Michael Ellerman wrote:
> On Tue, 2014-10-14 at 10:39 +0800, Li Zhong wrote:
> > On 二, 2014-10-07 at 08:33 -0700, Nishanth Aravamudan wrote:
> > > On 07.10.2014 [17:28:38 +1100], Michael Ellerman wrote:
> > > > On Fri, 2014-10-03 at 16:26 -0700, Nishanth Aravamudan wrote:
> > > > > On 03.10.2014 [10:50:20 +1000], Michael Ellerman wrote:
> > > > > > On Thu, 2014-10-02 at 14:13 -0700, Nishanth Aravamudan wrote:
> > > > > > > Ben & Michael,
> > > > > > >
> > > > > > > What's the status of these patches?
> > > > > >
> > > > > > Been in my next for a week :)
> > > > > >
> > > > > > https://git.kernel.org/cgit/linux/kernel/git/mpe/linux.git/log/?h=next
> > > > >
> > > > > Ah ok, thanks -- I wasn't following your tree, my fault.
> > > >
> > > > Not really your fault, I hadn't announced my trees existence :)
> > > >
> > > > > Do we want these to go back to 3.17-stable, as they fix some annoying splats
> > > > > during boot (non-fatal afaict, though)?
> > > >
> > > > Up to you really, I don't know how often/bad they were. I haven't added CC
> > > > stable tags to the commits, so if you want them in stable you should send them
> > > > explicitly.
> > >
> > > I think they occur every boot, unconditionally, on pseries. Doesn't
> > > prevent boot, just really noisy. I think it'd be good to get them into
> > > -stable.
> > >
> > > Li Zhong, can you push them once they get sent upstream?
> >
> > I guess I only need to send the first two patches to stable?
>
> Probably. It's not clear from the changelog how serious a problem it fixes.
>
> See Documentation/stable_kernel_rules.txt
OK, I'll send the first two to stable.
Thanks, Zhong
>
> cheers
>
>
>
^ permalink raw reply
* Re: powerpc: Fix Text randomization
From: Vineeth Vijayan @ 2014-10-15 6:38 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <20141015020811.7904E14011B@ozlabs.org>
On Wed, Oct 15, 2014 at 7:38 AM, Michael Ellerman <mpe@ellerman.id.au> wrot=
e:
> On Fri, 2014-10-10 at 05:45:26 UTC, Vineeth Vijayan wrote:
>> Right now there is no way to disable TEXT randomization on a PPC32
>> machine. text randomization happens even in the case of "echo 0 >
>> /proc/sys/kernel/randomize_va_space"
>
> Yeah it seems to happen on ppc64 too.
>
>> This happens due to the incorrect definition of ELF_ET_DYN_BASE at
>> arch/powerpc/include/asm/elf.h
>
> What is incorrect about it? We are not the only arch that does that.
>
I think we are one of the arch which does it.
The same has been tested on x86 and arm, where ELF_ET_DYN_BASE doesn=E2=80=
=99t
use randomize_et_dyn call, and it works properly as per the user-space
definition of randomization;
(i.e when at "echo 0 > /proc/sys/kernel/randomize_va_space", TEXT
randomization should not happen.)
> I'm not clear on what has changed to break this?
>
> cheers
^ permalink raw reply
* Re: [PATCH v3 25/27] Sparc/MSI: Use MSI chip framework to configure MSI/MSI-X irq
From: David Miller @ 2014-10-15 2:36 UTC (permalink / raw)
To: wangyijing
Cc: linux-mips, linux-ia64, linux-pci, Bharat.Bhushan, thierry.reding,
sparclinux, linux-arch, linux-s390, linux, joro, x86, sebott,
xen-devel, arnab.basu, liviu, arnd, konrad.wilk, cmetcalf,
bhelgaas, tglx, linux-arm-kernel, thomas.petazzoni, huxinwei,
tony.luck, sergei.shtylyov, linux-kernel, ralf, iommu,
david.vrabel, wuyun.wu, linuxppc-dev, l.stach
In-Reply-To: <1413342435-7876-26-git-send-email-wangyijing@huawei.com>
From: Yijing Wang <wangyijing@huawei.com>
Date: Wed, 15 Oct 2014 11:07:13 +0800
> Use MSI chip framework instead of arch MSI functions to configure
> MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
>
> Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Acked-by: David S. Miller <davem@davemloft.net>
^ permalink raw reply
* [PATCH v3 25/27] Sparc/MSI: Use MSI chip framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-15 3:07 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Bharat.Bhushan, Yijing Wang,
Thierry Reding, sparclinux, linux-arch, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel, arnab.basu,
Liviu Dudau, Arnd Bergmann, Konrad Rzeszutek Wilk, Chris Metcalf,
Thomas Gleixner, linux-arm-kernel, Thomas Petazzoni, Xinwei Hu,
Tony Luck, Sergei Shtylyov, linux-kernel, Ralf Baechle, iommu,
David Vrabel, Wuyun, linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1413342435-7876-1-git-send-email-wangyijing@huawei.com>
Use MSI chip framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/sparc/kernel/pci.c | 14 ++++++++++++--
arch/sparc/kernel/pci_impl.h | 12 ++++++++++++
2 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index b36365f..a46a148 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -656,6 +656,9 @@ struct pci_bus *pci_scan_one_pbm(struct pci_pbm_info *pbm,
printk("PCI: Scanning PBM %s\n", node->full_name);
+#ifdef CONFIG_PCI_MSI
+ pbm->msi_chip = &sparc_msi_chip;
+#endif
pci_add_resource_offset(&resources, &pbm->io_space,
pbm->io_space.start);
pci_add_resource_offset(&resources, &pbm->mem_space,
@@ -905,7 +908,8 @@ int pci_domain_nr(struct pci_bus *pbus)
EXPORT_SYMBOL(pci_domain_nr);
#ifdef CONFIG_PCI_MSI
-int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
+static int sparc_setup_msi_irq(struct msi_chip *chip,
+ struct pci_dev *pdev, struct msi_desc *desc)
{
struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
unsigned int irq;
@@ -916,7 +920,7 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
return pbm->setup_msi_irq(&irq, pdev, desc);
}
-void arch_teardown_msi_irq(unsigned int irq)
+static void sparc_teardown_msi_irq(struct msi_chip *chip, unsigned int irq)
{
struct msi_desc *entry = irq_get_msi_desc(irq);
struct pci_dev *pdev = entry->dev;
@@ -925,6 +929,12 @@ void arch_teardown_msi_irq(unsigned int irq)
if (pbm->teardown_msi_irq)
pbm->teardown_msi_irq(irq, pdev);
}
+
+struct msi_chip sparc_msi_chip = {
+ .setup_irq = sparc_setup_msi_irq,
+ .teardown_irq = sparc_teardown_msi_irq,
+};
+
#endif /* !(CONFIG_PCI_MSI) */
static void ali_sound_dma_hack(struct pci_dev *pdev, int set_bit)
diff --git a/arch/sparc/kernel/pci_impl.h b/arch/sparc/kernel/pci_impl.h
index 75803c7..073bb4e 100644
--- a/arch/sparc/kernel/pci_impl.h
+++ b/arch/sparc/kernel/pci_impl.h
@@ -55,6 +55,8 @@ struct sparc64_msiq_cookie {
struct pci_pbm_info *pbm;
unsigned long msiqid;
};
+
+extern struct msi_chip sparc_msi_chip;
#endif
struct pci_pbm_info {
@@ -132,6 +134,7 @@ struct pci_pbm_info {
void *msi_queues;
unsigned long *msi_bitmap;
unsigned int *msi_irq_table;
+ struct msi_chip *msi_chip;
int (*setup_msi_irq)(unsigned int *irq_p, struct pci_dev *pdev,
struct msi_desc *entry);
void (*teardown_msi_irq)(unsigned int irq, struct pci_dev *pdev);
@@ -153,6 +156,15 @@ struct pci_pbm_info {
int numa_node;
};
+#ifdef CONFIG_PCI_MSI
+static inline struct msi_chip *pci_msi_chip(struct pci_bus *bus)
+{
+ struct pci_pbm_info *pbm = bus->sysdata;
+
+ return pbm->msi_chip;
+}
+#endif
+
extern struct pci_pbm_info *pci_pbm_root;
extern int pci_num_pbms;
--
1.7.1
^ permalink raw reply related
* [PATCH v3 24/27] IA64/MSI: Use MSI chip framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-15 3:07 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Bharat.Bhushan, Yijing Wang,
Thierry Reding, sparclinux, linux-arch, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel, arnab.basu,
Liviu Dudau, Arnd Bergmann, Konrad Rzeszutek Wilk, Chris Metcalf,
Thomas Gleixner, linux-arm-kernel, Thomas Petazzoni, Xinwei Hu,
Tony Luck, Sergei Shtylyov, linux-kernel, Ralf Baechle, iommu,
David Vrabel, Wuyun, linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1413342435-7876-1-git-send-email-wangyijing@huawei.com>
Use MSI chip framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/ia64/include/asm/pci.h | 10 ++++++++++
arch/ia64/kernel/msi_ia64.c | 14 ++++++++++----
arch/ia64/pci/pci.c | 1 +
3 files changed, 21 insertions(+), 4 deletions(-)
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index 52af5ed..907dcba 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -94,6 +94,7 @@ struct pci_controller {
int segment;
int node; /* nearest node with memory or NUMA_NO_NODE for global allocation */
+ struct msi_chip *msi_chip;
void *platform_data;
};
@@ -101,6 +102,15 @@ struct pci_controller {
#define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata)
#define pci_domain_nr(busdev) (PCI_CONTROLLER(busdev)->segment)
+extern struct msi_chip chip;
+
+static inline struct msi_chip *pci_msi_chip(struct pci_bus *bus)
+{
+ struct pci_controller *ctrl = bus->sysdata;
+
+ return ctrl->msi_chip;
+}
+
extern struct pci_ops pci_root_ops;
static inline int pci_proc_domain(struct pci_bus *bus)
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
index 8c3730c..401fc98 100644
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -112,15 +112,16 @@ static struct irq_chip ia64_msi_chip = {
};
-int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
+static int arch_ia64_setup_msi_irq(struct msi_chip *chip,
+ struct pci_dev *dev, struct msi_desc *desc)
{
if (platform_setup_msi_irq)
- return platform_setup_msi_irq(pdev, desc);
+ return platform_setup_msi_irq(dev, desc);
- return ia64_setup_msi_irq(pdev, desc);
+ return ia64_setup_msi_irq(dev, desc);
}
-void arch_teardown_msi_irq(unsigned int irq)
+static void arch_ia64_teardown_msi_irq(struct msi_chip *chip, unsigned int irq)
{
if (platform_teardown_msi_irq)
return platform_teardown_msi_irq(irq);
@@ -128,6 +129,11 @@ void arch_teardown_msi_irq(unsigned int irq)
return ia64_teardown_msi_irq(irq);
}
+struct msi_chip chip = {
+ .setup_irq = arch_ia64_setup_msi_irq,
+ .teardown_irq = arch_ia64_teardown_msi_irq,
+};
+
#ifdef CONFIG_INTEL_IOMMU
#ifdef CONFIG_SMP
static int dmar_msi_set_affinity(struct irq_data *data,
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 291a582..299b67d 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -437,6 +437,7 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
controller->companion = device;
controller->node = acpi_get_node(device->handle);
+ controller->msi_chip = &chip;
info = kzalloc(sizeof(*info), GFP_KERNEL);
if (!info) {
--
1.7.1
^ permalink raw reply related
* [PATCH v3 26/27] tile/MSI: Use MSI chip framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-15 3:07 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Bharat.Bhushan, Yijing Wang,
Thierry Reding, sparclinux, linux-arch, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel, arnab.basu,
Liviu Dudau, Arnd Bergmann, Konrad Rzeszutek Wilk, Chris Metcalf,
Thomas Gleixner, linux-arm-kernel, Thomas Petazzoni, Xinwei Hu,
Tony Luck, Sergei Shtylyov, linux-kernel, Ralf Baechle, iommu,
David Vrabel, Wuyun, linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1413342435-7876-1-git-send-email-wangyijing@huawei.com>
Use MSI chip framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/tile/include/asm/pci.h | 10 ++++++++++
arch/tile/kernel/pci_gx.c | 13 +++++++++++--
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h
index dfedd7a..d27d9ec 100644
--- a/arch/tile/include/asm/pci.h
+++ b/arch/tile/include/asm/pci.h
@@ -152,6 +152,7 @@ struct pci_controller {
int pio_io_index; /* PIO region index for I/O space access */
#endif
+ struct msi_chip *msi_chip;
/*
* Mem-Map regions for all the memory controllers so that Linux can
* map all of its physical memory space to the PCI bus.
@@ -179,6 +180,15 @@ struct pci_controller {
int irq_intx_table[4];
};
+extern struct msi_chip tilegx_msi;
+
+static inline struct msi_chip *pci_msi_chip(struct pci_bus *bus)
+{
+ struct pci_controller *controller = bus->sysdata;
+
+ return controller->msi_chip;
+}
+
extern struct pci_controller pci_controllers[TILEGX_NUM_TRIO * TILEGX_TRIO_PCIES];
extern gxio_trio_context_t trio_contexts[TILEGX_NUM_TRIO];
extern int num_trio_shims;
diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c
index e39f9c5..ba66517 100644
--- a/arch/tile/kernel/pci_gx.c
+++ b/arch/tile/kernel/pci_gx.c
@@ -887,6 +887,7 @@ int __init pcibios_init(void)
controller->mem_offset);
pci_add_resource(&resources, &controller->io_space);
controller->first_busno = next_busno;
+ controller->msi_chip = &tilegx_msi;
bus = pci_scan_root_bus(NULL, next_busno, controller->ops,
controller, &resources);
controller->root_bus = bus;
@@ -1485,7 +1486,8 @@ static struct irq_chip tilegx_msi_chip = {
/* TBD: support set_affinity. */
};
-int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
+static int tile_setup_msi_irq(struct msi_chip *chip,
+ struct pci_dev *pdev, struct msi_desc *desc)
{
struct pci_controller *controller;
gxio_trio_context_t *trio_context;
@@ -1604,7 +1606,12 @@ is_64_failure:
return ret;
}
-void arch_teardown_msi_irq(unsigned int irq)
+static void tile_teardown_msi_irq(struct msi_chip *chip, unsigned int irq)
{
irq_free_hwirq(irq);
}
+
+struct msi_chip tilegx_msi = {
+ .setup_irq = tile_setup_msi_irq,
+ .teardown_irq = tile_teardown_msi_irq,
+};
--
1.7.1
^ permalink raw reply related
* [PATCH v3 27/27] PCI/MSI: Clean up unused MSI arch functions
From: Yijing Wang @ 2014-10-15 3:07 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Bharat.Bhushan, Yijing Wang,
Thierry Reding, sparclinux, linux-arch, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel, arnab.basu,
Liviu Dudau, Arnd Bergmann, Konrad Rzeszutek Wilk, Chris Metcalf,
Thomas Gleixner, linux-arm-kernel, Thomas Petazzoni, Xinwei Hu,
Tony Luck, Sergei Shtylyov, linux-kernel, Ralf Baechle, iommu,
David Vrabel, Wuyun, linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1413342435-7876-1-git-send-email-wangyijing@huawei.com>
Now we use struct msi_chip in all platforms to configure
MSI/MSI-X. We can clean up the unused arch functions.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
Hi Lucas,
I dropped the reviewed-by, because this version has a lot changes
compared to last one, I guess you may want to check it again.
---
drivers/iommu/irq_remapping.c | 2 +-
drivers/pci/msi.c | 103 +++++++++++++++--------------------------
include/linux/msi.h | 14 ------
include/linux/pci.h | 8 ---
4 files changed, 39 insertions(+), 88 deletions(-)
diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c
index 48d57e9..77160a5 100644
--- a/drivers/iommu/irq_remapping.c
+++ b/drivers/iommu/irq_remapping.c
@@ -92,7 +92,7 @@ error:
/*
* Restore altered MSI descriptor fields and prevent just destroyed
- * IRQs from tearing down again in default_teardown_msi_irqs()
+ * IRQs from tearing down again in teardown_msi_irqs()
*/
msidesc->irq = 0;
msidesc->nvec_used = 0;
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 5cbd774..b9fefe9 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -28,54 +28,31 @@ int pci_msi_ignore_mask;
#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
-/* Arch hooks */
-
-int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
-{
- struct msi_chip *chip;
- int err;
-
- chip = pci_msi_chip(dev->bus);
- if (!chip || !chip->setup_irq)
- return -EINVAL;
-
- err = chip->setup_irq(chip, dev, desc);
- if (err < 0)
- return err;
-
- return 0;
-}
-
-void __weak arch_teardown_msi_irq(unsigned int irq)
-{
- struct msi_desc *entry = irq_get_msi_desc(irq);
- struct msi_chip *chip = pci_msi_chip(entry->dev->bus);
-
- if (!chip || !chip->teardown_irq)
- return;
-
- chip->teardown_irq(chip, irq);
-}
-
-int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+int setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
{
struct msi_desc *entry;
int ret;
struct msi_chip *chip;
chip = pci_msi_chip(dev->bus);
- if (chip && chip->setup_irqs)
+ if (!chip)
+ return -EINVAL;
+
+ if (chip->setup_irqs)
return chip->setup_irqs(chip, dev, nvec, type);
/*
* If an architecture wants to support multiple MSI, it needs to
- * override arch_setup_msi_irqs()
+ * implement chip->setup_irqs().
*/
if (type == PCI_CAP_ID_MSI && nvec > 1)
return 1;
+ if (!chip->setup_irq)
+ return -EINVAL;
+
list_for_each_entry(entry, &dev->msi_list, list) {
- ret = arch_setup_msi_irq(dev, entry);
+ ret = chip->setup_irq(chip, dev, entry);
if (ret < 0)
return ret;
if (ret > 0)
@@ -85,13 +62,20 @@ int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
return 0;
}
-/*
- * We have a default implementation available as a separate non-weak
- * function, as it is used by the Xen x86 PCI code
- */
-void default_teardown_msi_irqs(struct pci_dev *dev)
+static void teardown_msi_irqs(struct pci_dev *dev)
{
struct msi_desc *entry;
+ struct msi_chip *chip;
+
+ chip = pci_msi_chip(dev->bus);
+ if (!chip)
+ return;
+
+ if (chip->teardown_irqs)
+ return chip->teardown_irqs(chip, dev);
+
+ if (!chip->teardown_irq)
+ return;
list_for_each_entry(entry, &dev->msi_list, list) {
int i, nvec;
@@ -102,20 +86,10 @@ void default_teardown_msi_irqs(struct pci_dev *dev)
else
nvec = 1 << entry->msi_attrib.multiple;
for (i = 0; i < nvec; i++)
- arch_teardown_msi_irq(entry->irq + i);
+ chip->teardown_irq(chip, entry->irq + i);
}
}
-void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
-{
- struct msi_chip *chip = pci_msi_chip(dev->bus);
-
- if (chip && chip->teardown_irqs)
- return chip->teardown_irqs(chip, dev);
-
- return default_teardown_msi_irqs(dev);
-}
-
static void default_restore_msi_irq(struct pci_dev *dev, int irq)
{
struct msi_desc *entry;
@@ -134,10 +108,18 @@ static void default_restore_msi_irq(struct pci_dev *dev, int irq)
__write_msi_msg(entry, &entry->msg);
}
-void __weak arch_restore_msi_irqs(struct pci_dev *dev)
+static void default_restore_msi_irqs(struct pci_dev *dev)
{
- struct msi_chip *chip = pci_msi_chip(dev->bus);
+ struct msi_desc *entry = NULL;
+
+ list_for_each_entry(entry, &dev->msi_list, list) {
+ default_restore_msi_irq(dev, entry->irq);
+ }
+}
+static void restore_msi_irqs(struct pci_dev *dev)
+{
+ struct msi_chip *chip = pci_msi_chip(dev->bus);
if (chip && chip->restore_irqs)
return chip->restore_irqs(chip, dev);
@@ -250,15 +232,6 @@ void unmask_msi_irq(struct irq_data *data)
msi_set_mask_bit(data, 0);
}
-void default_restore_msi_irqs(struct pci_dev *dev)
-{
- struct msi_desc *entry;
-
- list_for_each_entry(entry, &dev->msi_list, list) {
- default_restore_msi_irq(dev, entry->irq);
- }
-}
-
void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
{
BUG_ON(entry->dev->current_state != PCI_D0);
@@ -376,7 +349,7 @@ static void free_msi_irqs(struct pci_dev *dev)
BUG_ON(irq_has_action(entry->irq + i));
}
- arch_teardown_msi_irqs(dev);
+ teardown_msi_irqs(dev);
list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) {
if (entry->msi_attrib.is_msix) {
@@ -435,7 +408,7 @@ static void __pci_restore_msi_state(struct pci_dev *dev)
pci_intx_for_msi(dev, 0);
msi_set_enable(dev, 0);
- arch_restore_msi_irqs(dev);
+ restore_msi_irqs(dev);
pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
msi_mask_irq(entry, msi_mask(entry->msi_attrib.multi_cap),
@@ -458,7 +431,7 @@ static void __pci_restore_msix_state(struct pci_dev *dev)
msix_clear_and_set_ctrl(dev, 0,
PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL);
- arch_restore_msi_irqs(dev);
+ restore_msi_irqs(dev);
list_for_each_entry(entry, &dev->msi_list, list) {
msix_mask_irq(entry, entry->masked);
}
@@ -628,7 +601,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
list_add_tail(&entry->list, &dev->msi_list);
/* Configure MSI capability structure */
- ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
+ ret = setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
if (ret) {
msi_mask_irq(entry, mask, ~mask);
free_msi_irqs(dev);
@@ -743,7 +716,7 @@ static int msix_capability_init(struct pci_dev *dev,
if (ret)
return ret;
- ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
+ ret = setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
if (ret)
goto out_avail;
diff --git a/include/linux/msi.h b/include/linux/msi.h
index eb5ae36..65b0927 100644
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -52,20 +52,6 @@ struct msi_desc {
struct msi_msg msg;
};
-/*
- * The arch hooks to setup up msi irqs. Those functions are
- * implemented as weak symbols so that they /can/ be overriden by
- * architecture specific code if needed.
- */
-int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
-void arch_teardown_msi_irq(unsigned int irq);
-int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
-void arch_teardown_msi_irqs(struct pci_dev *dev);
-void arch_restore_msi_irqs(struct pci_dev *dev);
-
-void default_teardown_msi_irqs(struct pci_dev *dev);
-void default_restore_msi_irqs(struct pci_dev *dev);
-
struct msi_chip {
struct module *owner;
struct device *dev;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 7a48b40..b28cc03 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1433,14 +1433,6 @@ static inline int pci_get_new_domain_nr(void) { return -ENOSYS; }
#include <asm/pci.h>
-/* Just avoid compile error, will be clean up later */
-#ifdef CONFIG_PCI_MSI
-
-#ifndef pci_msi_chip
-#define pci_msi_chip(bus) NULL
-#endif
-
-#endif
/* these helpers provide future and backwards compatibility
* for accessing popular PCI BAR info */
--
1.7.1
^ permalink raw reply related
* [PATCH v3 23/27] arm/iop13xx/MSI: Use MSI chip framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-15 3:07 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Bharat.Bhushan, Yijing Wang,
Thierry Reding, sparclinux, linux-arch, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel, arnab.basu,
Liviu Dudau, Arnd Bergmann, Konrad Rzeszutek Wilk, Chris Metcalf,
Thomas Gleixner, linux-arm-kernel, Thomas Petazzoni, Xinwei Hu,
Tony Luck, Sergei Shtylyov, linux-kernel, Ralf Baechle, iommu,
David Vrabel, Wuyun, linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1413342435-7876-1-git-send-email-wangyijing@huawei.com>
Use MSI chip framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/arm/mach-iop13xx/include/mach/pci.h | 4 ++++
arch/arm/mach-iop13xx/iq81340mc.c | 3 +++
arch/arm/mach-iop13xx/iq81340sc.c | 5 ++++-
arch/arm/mach-iop13xx/msi.c | 11 +++++++++--
4 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-iop13xx/include/mach/pci.h b/arch/arm/mach-iop13xx/include/mach/pci.h
index 59f42b5..c87ac3a 100644
--- a/arch/arm/mach-iop13xx/include/mach/pci.h
+++ b/arch/arm/mach-iop13xx/include/mach/pci.h
@@ -11,6 +11,10 @@ void iop13xx_atu_select(struct hw_pci *plat_pci);
void iop13xx_pci_init(void);
void iop13xx_map_pci_memory(void);
+#ifdef CONFIG_PCI_MSI
+extern struct msi_chip iop13xx_msi_chip;
+#endif
+
#define IOP_PCI_STATUS_ERROR (PCI_STATUS_PARITY | \
PCI_STATUS_SIG_TARGET_ABORT | \
PCI_STATUS_REC_TARGET_ABORT | \
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index 9cd07d3..1f499b6 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -59,6 +59,9 @@ static struct hw_pci iq81340mc_pci __initdata = {
.map_irq = iq81340mc_pcix_map_irq,
.scan = iop13xx_scan_bus,
.preinit = iop13xx_pci_init,
+#ifdef CONFIG_PCI_MSI
+ .msi_chip = &iop13xx_msi_chip,
+#endif
};
static int __init iq81340mc_pci_init(void)
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index b3ec11c..8bdfdc5 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -60,7 +60,10 @@ static struct hw_pci iq81340sc_pci __initdata = {
.setup = iop13xx_pci_setup,
.scan = iop13xx_scan_bus,
.map_irq = iq81340sc_atux_map_irq,
- .preinit = iop13xx_pci_init
+ .preinit = iop13xx_pci_init,
+#ifdef CONFIG_PCI_MSI
+ .msi_chip = &iop13xx_msi_chip,
+#endif
};
static int __init iq81340sc_pci_init(void)
diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c
index e7730cf..3135a63 100644
--- a/arch/arm/mach-iop13xx/msi.c
+++ b/arch/arm/mach-iop13xx/msi.c
@@ -132,7 +132,8 @@ static struct irq_chip iop13xx_msi_chip = {
.irq_unmask = unmask_msi_irq,
};
-int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
+static int iop13xx_setup_msi_irq(struct msi_chip *chip,
+ struct pci_dev *dev, struct msi_desc *desc)
{
int id, irq = irq_alloc_desc_from(IRQ_IOP13XX_MSI_0, -1);
struct msi_msg msg;
@@ -159,7 +160,13 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
return 0;
}
-void arch_teardown_msi_irq(unsigned int irq)
+static void iop13xx_teardown_msi_irq(struct msi_chip *chip,
+ unsigned int irq)
{
irq_free_desc(irq);
}
+
+struct msi_chip iop13xx_chip = {
+ .setup_irq = iop13xx_setup_msi_irq,
+ .teardown_irq = iop13xx_teardown_msi_irq,
+};
--
1.7.1
^ permalink raw reply related
* [PATCH v3 19/27] MIPS/Xlp/MSI: Use MSI chip framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-15 3:07 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Bharat.Bhushan, Yijing Wang,
Thierry Reding, sparclinux, linux-arch, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel, arnab.basu,
Liviu Dudau, Arnd Bergmann, Konrad Rzeszutek Wilk, Chris Metcalf,
Thomas Gleixner, linux-arm-kernel, Thomas Petazzoni, Xinwei Hu,
Tony Luck, Sergei Shtylyov, linux-kernel, Ralf Baechle, iommu,
David Vrabel, Wuyun, linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1413342435-7876-1-git-send-email-wangyijing@huawei.com>
Use MSI chip framework instead of arch MSI functions to configure
MSI/MSI-X IRQ. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/mips/include/asm/netlogic/xlp-hal/pcibus.h | 1 +
arch/mips/pci/msi-xlp.c | 11 +++++++++--
arch/mips/pci/pci-xlp.c | 3 +++
3 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/netlogic/xlp-hal/pcibus.h b/arch/mips/include/asm/netlogic/xlp-hal/pcibus.h
index 91540f4..90646ad 100644
--- a/arch/mips/include/asm/netlogic/xlp-hal/pcibus.h
+++ b/arch/mips/include/asm/netlogic/xlp-hal/pcibus.h
@@ -103,6 +103,7 @@
#ifdef CONFIG_PCI_MSI
void xlp_init_node_msi_irqs(int node, int link);
+extern struct msi_chip xlp_chip;
#else
static inline void xlp_init_node_msi_irqs(int node, int link) {}
#endif
diff --git a/arch/mips/pci/msi-xlp.c b/arch/mips/pci/msi-xlp.c
index e469dc7..cca2257 100644
--- a/arch/mips/pci/msi-xlp.c
+++ b/arch/mips/pci/msi-xlp.c
@@ -245,7 +245,8 @@ static struct irq_chip xlp_msix_chip = {
.irq_unmask = unmask_msi_irq,
};
-void arch_teardown_msi_irq(unsigned int irq)
+static void xlp_teardown_msi_irq(struct msi_chip *chip,
+ unsigned int irq)
{
}
@@ -450,7 +451,8 @@ static int xlp_setup_msix(uint64_t lnkbase, int node, int link,
return 0;
}
-int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
+static int xlp_setup_msi_irq(struct msi_chip *chip,
+ struct pci_dev *dev, struct msi_desc *desc)
{
struct pci_dev *lnkdev;
uint64_t lnkbase;
@@ -472,6 +474,11 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
return xlp_setup_msi(lnkbase, node, link, desc);
}
+struct msi_chip xlp_chip = {
+ .setup_irq = xlp_setup_msi_irq,
+ .teardown_irq = xlp_teardown_msi_irq,
+};
+
void __init xlp_init_node_msi_irqs(int node, int link)
{
struct nlm_soc_info *nodep;
diff --git a/arch/mips/pci/pci-xlp.c b/arch/mips/pci/pci-xlp.c
index 7babf01..5d7b6a0 100644
--- a/arch/mips/pci/pci-xlp.c
+++ b/arch/mips/pci/pci-xlp.c
@@ -174,6 +174,9 @@ struct pci_controller nlm_pci_controller = {
.mem_offset = 0x00000000UL,
.io_resource = &nlm_pci_io_resource,
.io_offset = 0x00000000UL,
+#ifdef CONFIG_PCI_MSI
+ .msi_chip = &xlp_chip,
+#endif
};
struct pci_dev *xlp_get_pcie_link(const struct pci_dev *dev)
--
1.7.1
^ permalink raw reply related
* [PATCH v3 17/27] MIPS/Octeon/MSI: Use MSI chip framework to configure MSI/MSI-X irq
From: Yijing Wang @ 2014-10-15 3:07 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Bharat.Bhushan, Yijing Wang,
Thierry Reding, sparclinux, linux-arch, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel, arnab.basu,
Liviu Dudau, Arnd Bergmann, Konrad Rzeszutek Wilk, Chris Metcalf,
Thomas Gleixner, linux-arm-kernel, Thomas Petazzoni, Xinwei Hu,
Tony Luck, Sergei Shtylyov, linux-kernel, Ralf Baechle, iommu,
David Vrabel, Wuyun, linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1413342435-7876-1-git-send-email-wangyijing@huawei.com>
Use MSI chip framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/mips/include/asm/octeon/pci-octeon.h | 4 +++
arch/mips/pci/msi-octeon.c | 31 ++++++++++++++++------------
arch/mips/pci/pci-octeon.c | 3 ++
3 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/arch/mips/include/asm/octeon/pci-octeon.h b/arch/mips/include/asm/octeon/pci-octeon.h
index 64ba56a..27ffe42 100644
--- a/arch/mips/include/asm/octeon/pci-octeon.h
+++ b/arch/mips/include/asm/octeon/pci-octeon.h
@@ -66,4 +66,8 @@ enum octeon_dma_bar_type {
*/
extern enum octeon_dma_bar_type octeon_dma_bar_type;
+#ifdef CONFIG_PCI_MSI
+extern struct msi_chip octeon_msi_chip;
+#endif
+
#endif
diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c
index 63bbe07..fd4d698 100644
--- a/arch/mips/pci/msi-octeon.c
+++ b/arch/mips/pci/msi-octeon.c
@@ -57,7 +57,7 @@ static int msi_irq_size;
*
* Returns 0 on success.
*/
-int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
+static int octeon_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
{
struct msi_msg msg;
u16 control;
@@ -132,12 +132,12 @@ msi_irq_allocated:
/* Make sure the search for available interrupts didn't fail */
if (irq >= 64) {
if (request_private_bits) {
- pr_err("arch_setup_msi_irq: Unable to find %d free interrupts, trying just one",
- 1 << request_private_bits);
+ pr_err("%s: Unable to find %d free interrupts, trying just one",
+ __func__, 1 << request_private_bits);
request_private_bits = 0;
goto try_only_one;
} else
- panic("arch_setup_msi_irq: Unable to find a free MSI interrupt");
+ panic("%s: Unable to find a free MSI interrupt", __func__);
}
/* MSI interrupts start at logical IRQ OCTEON_IRQ_MSI_BIT0 */
@@ -168,7 +168,7 @@ msi_irq_allocated:
msg.address_hi = (0 + CVMX_SLI_PCIE_MSI_RCV) >> 32;
break;
default:
- panic("arch_setup_msi_irq: Invalid octeon_dma_bar_type");
+ panic("%s: Invalid octeon_dma_bar_type", __func__);
}
msg.data = irq - OCTEON_IRQ_MSI_BIT0;
@@ -182,7 +182,8 @@ msi_irq_allocated:
return 0;
}
-int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+static int octeon_setup_msi_irqs(struct msi_chip *chip, struct pci_dev *dev,
+ int nvec, int type)
{
struct msi_desc *entry;
int ret;
@@ -201,7 +202,7 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
return 1;
list_for_each_entry(entry, &dev->msi_list, list) {
- ret = arch_setup_msi_irq(dev, entry);
+ ret = octeon_setup_msi_irq(dev, entry);
if (ret < 0)
return ret;
if (ret > 0)
@@ -210,14 +211,13 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
return 0;
}
-
/**
* Called when a device no longer needs its MSI interrupts. All
* MSI interrupts for the device are freed.
*
* @irq: The devices first irq number. There may be multple in sequence.
*/
-void arch_teardown_msi_irq(unsigned int irq)
+static void octeon_teardown_msi_irq(struct msi_chip *chip, unsigned int irq)
{
int number_irqs;
u64 bitmask;
@@ -226,8 +226,8 @@ void arch_teardown_msi_irq(unsigned int irq)
if ((irq < OCTEON_IRQ_MSI_BIT0)
|| (irq > msi_irq_size + OCTEON_IRQ_MSI_BIT0))
- panic("arch_teardown_msi_irq: Attempted to teardown illegal "
- "MSI interrupt (%d)", irq);
+ panic("%s: Attempted to teardown illegal "
+ "MSI interrupt (%d)", __func__, irq);
irq -= OCTEON_IRQ_MSI_BIT0;
index = irq / 64;
@@ -249,8 +249,8 @@ void arch_teardown_msi_irq(unsigned int irq)
/* Shift the mask to the correct bit location */
bitmask <<= irq0;
if ((msi_free_irq_bitmask[index] & bitmask) != bitmask)
- panic("arch_teardown_msi_irq: Attempted to teardown MSI "
- "interrupt (%d) not in use", irq);
+ panic("%s: Attempted to teardown MSI "
+ "interrupt (%d) not in use", __func__, irq);
/* Checks are done, update the in use bitmask */
spin_lock(&msi_free_irq_bitmask_lock);
@@ -259,6 +259,11 @@ void arch_teardown_msi_irq(unsigned int irq)
spin_unlock(&msi_free_irq_bitmask_lock);
}
+struct msi_chip octeon_msi_chip = {
+ .setup_irqs = octeon_setup_msi_irqs,
+ .teardown_irq = octeon_teardown_msi_irq,
+};
+
static DEFINE_RAW_SPINLOCK(octeon_irq_msi_lock);
static u64 msi_rcv_reg[4];
diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c
index 59cccd9..aefaa8a 100644
--- a/arch/mips/pci/pci-octeon.c
+++ b/arch/mips/pci/pci-octeon.c
@@ -356,6 +356,9 @@ static struct pci_controller octeon_pci_controller = {
.io_resource = &octeon_pci_io_resource,
.io_offset = 0,
.io_map_base = OCTEON_PCI_IOSPACE_BASE,
+#ifdef CONFIG_PCI_MSI
+ .msi_chip = &octeon_msi_chip,
+#endif
};
--
1.7.1
^ permalink raw reply related
* [PATCH v3 18/27] MIPS/Xlp: Remove the dead function destroy_irq() to fix build error
From: Yijing Wang @ 2014-10-15 3:07 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-mips, linux-ia64, linux-pci, Bharat.Bhushan, Yijing Wang,
Thierry Reding, sparclinux, linux-arch, linux-s390, Russell King,
Joerg Roedel, x86, Sebastian Ott, xen-devel, arnab.basu,
Liviu Dudau, Arnd Bergmann, Konrad Rzeszutek Wilk, Chris Metcalf,
Thomas Gleixner, linux-arm-kernel, Thomas Petazzoni, Xinwei Hu,
Tony Luck, Sergei Shtylyov, linux-kernel, Ralf Baechle, iommu,
David Vrabel, Wuyun, linuxppc-dev, David S. Miller, Lucas Stach
In-Reply-To: <1413342435-7876-1-git-send-email-wangyijing@huawei.com>
Commit 465665f78a7 ("mips: Kill pointless destroy_irq()") removed
the destroy_irq(). So remove the leftover one in xlp_setup_msix()
to fix build error.
arch/mips/pci/msi-xlp.c: In function 'xlp_setup_msix':
arch/mips/pci/msi-xlp.c:447:3: error: implicit declaration of function 'destroy_irq'..
cc1: some warnings being treated as errors
make[1]: *** [arch/mips/pci/msi-xlp.o] Error 1
make: *** [arch/mips/pci/] Error 2
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
---
arch/mips/pci/msi-xlp.c | 4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/arch/mips/pci/msi-xlp.c b/arch/mips/pci/msi-xlp.c
index fa374fe..e469dc7 100644
--- a/arch/mips/pci/msi-xlp.c
+++ b/arch/mips/pci/msi-xlp.c
@@ -443,10 +443,8 @@ static int xlp_setup_msix(uint64_t lnkbase, int node, int link,
msg.data = 0xc00 | msixvec;
ret = irq_set_msi_desc(xirq, desc);
- if (ret < 0) {
- destroy_irq(xirq);
+ if (ret < 0)
return ret;
- }
write_msi_msg(xirq, &msg);
return 0;
--
1.7.1
^ permalink raw reply related
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