* [RFC PATCH 02/16] PCI: Use pci_scan_root_bus() instead of pci_scan_bus()
From: Yijing Wang @ 2014-11-17 10:21 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Liviu Dudau, Tony Luck, Russell King, linux-pci, x86,
linux-kernel, Xinwei Hu, Thierry Reding, Yijing Wang,
Suravee.Suthikulpanit, Yijing Wang, linux-ia64, Thomas Gleixner,
Wuyun, linuxppc-dev, linux-arm-kernel
In-Reply-To: <1416219710-26088-1-git-send-email-wangyijing@huawei.com>
From: Yijing Wang <wangyijing0307@gmail.com>
Now we could use pci_scan_root_bus() instead of
pci_scan_bus(), pass NULL resources means use the default
io/mem.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/alpha/include/asm/pci.h | 2 +-
arch/alpha/kernel/sys_nautilus.c | 2 +-
arch/cris/include/asm/pci.h | 2 +-
arch/ia64/include/asm/pci.h | 2 +-
arch/m68k/coldfire/pci.c | 2 +-
arch/mips/include/asm/pci.h | 2 +-
arch/mn10300/include/asm/pci.h | 2 +-
arch/sh/include/asm/pci.h | 2 +-
arch/sparc/include/asm/pci_32.h | 2 +-
arch/sparc/include/asm/pci_64.h | 2 +-
arch/sparc/kernel/pcic.c | 3 ++-
arch/unicore32/kernel/pci.c | 2 +-
arch/x86/include/asm/pci.h | 2 +-
arch/x86/pci/amd_bus.c | 2 +-
arch/xtensa/include/asm/pci.h | 2 +-
drivers/parisc/dino.c | 4 ++--
drivers/pci/hotplug/ibmphp_core.c | 2 +-
17 files changed, 19 insertions(+), 18 deletions(-)
diff --git a/arch/alpha/include/asm/pci.h b/arch/alpha/include/asm/pci.h
index f7f680f..157925a 100644
--- a/arch/alpha/include/asm/pci.h
+++ b/arch/alpha/include/asm/pci.h
@@ -49,7 +49,7 @@ struct pci_controller {
void *sysdata;
};
-/* Override the logic in pci_scan_bus for skipping already-configured
+/* Override the logic in pci_scan_root_bus for skipping already-configured
bus numbers. */
#define pcibios_assign_all_busses() 1
diff --git a/arch/alpha/kernel/sys_nautilus.c b/arch/alpha/kernel/sys_nautilus.c
index 837c0fa..1047ab3 100644
--- a/arch/alpha/kernel/sys_nautilus.c
+++ b/arch/alpha/kernel/sys_nautilus.c
@@ -206,7 +206,7 @@ nautilus_init_pci(void)
unsigned long memtop = max_low_pfn << PAGE_SHIFT;
/* Scan our single hose. */
- bus = pci_scan_bus(0, alpha_mv.pci_ops, hose);
+ bus = pci_scan_root_bus(NULL, 0, alpha_mv.pci_ops, hose, NULL);
hose->bus = bus;
pcibios_claim_one_bus(bus);
diff --git a/arch/cris/include/asm/pci.h b/arch/cris/include/asm/pci.h
index cc2399c..96b33a6 100644
--- a/arch/cris/include/asm/pci.h
+++ b/arch/cris/include/asm/pci.h
@@ -5,7 +5,7 @@
#ifdef __KERNEL__
#include <linux/mm.h> /* for struct page */
-/* Can be used to override the logic in pci_scan_bus for skipping
+/* Can be used to override the logic in pci_scan_root_bus for skipping
already-configured bus numbers - to be used for buggy BIOSes
or architectures with incomplete PCI setup by the loader */
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index 52af5ed..64b34d6 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -20,7 +20,7 @@ struct pci_vector_struct {
};
/*
- * Can be used to override the logic in pci_scan_bus for skipping already-configured bus
+ * Can be used to override the logic in pci_scan_root_bus for skipping already-configured bus
* numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the
* loader.
*/
diff --git a/arch/m68k/coldfire/pci.c b/arch/m68k/coldfire/pci.c
index df96792..4d242fb 100644
--- a/arch/m68k/coldfire/pci.c
+++ b/arch/m68k/coldfire/pci.c
@@ -312,7 +312,7 @@ static int __init mcf_pci_init(void)
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(msecs_to_jiffies(200));
- rootbus = pci_scan_bus(0, &mcf_pci_ops, NULL);
+ rootbus = pci_scan_root_bus(NULL, 0, &mcf_pci_ops, NULL, NULL);
rootbus->resource[0] = &mcf_pci_io;
rootbus->resource[1] = &mcf_pci_mem;
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index 974b0e3..212030a 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -60,7 +60,7 @@ extern void register_pci_controller(struct pci_controller *hose);
extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
-/* Can be used to override the logic in pci_scan_bus for skipping
+/* Can be used to override the logic in pci_scan_root_bus for skipping
already-configured bus numbers - to be used for buggy BIOSes
or architectures with incomplete PCI setup by the loader */
diff --git a/arch/mn10300/include/asm/pci.h b/arch/mn10300/include/asm/pci.h
index 5f70af2..6305f14 100644
--- a/arch/mn10300/include/asm/pci.h
+++ b/arch/mn10300/include/asm/pci.h
@@ -33,7 +33,7 @@ do { \
#define __pcidebug(FMT, BUS, DEVFN, WHERE, ...) do {} while (0)
#endif
-/* Can be used to override the logic in pci_scan_bus for skipping
+/* Can be used to override the logic in pci_scan_root_bus for skipping
* already-configured bus numbers - to be used for buggy BIOSes or
* architectures with incomplete PCI setup by the loader */
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index 5b45115..69bcb78 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -3,7 +3,7 @@
#ifdef __KERNEL__
-/* Can be used to override the logic in pci_scan_bus for skipping
+/* Can be used to override the logic in pci_scan_root_bus for skipping
already-configured bus numbers - to be used for buggy BIOSes
or architectures with incomplete PCI setup by the loader */
diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h
index 53e9b49..4ef6064 100644
--- a/arch/sparc/include/asm/pci_32.h
+++ b/arch/sparc/include/asm/pci_32.h
@@ -5,7 +5,7 @@
#include <linux/dma-mapping.h>
-/* Can be used to override the logic in pci_scan_bus for skipping
+/* Can be used to override the logic in pci_scan_root_bus for skipping
* already-configured bus numbers - to be used for buggy BIOSes
* or architectures with incomplete PCI setup by the loader.
*/
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h
index bd00a62..6e017f9 100644
--- a/arch/sparc/include/asm/pci_64.h
+++ b/arch/sparc/include/asm/pci_64.h
@@ -5,7 +5,7 @@
#include <linux/dma-mapping.h>
-/* Can be used to override the logic in pci_scan_bus for skipping
+/* Can be used to override the logic in pci_scan_root_bus for skipping
* already-configured bus numbers - to be used for buggy BIOSes
* or architectures with incomplete PCI setup by the loader.
*/
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c
index 6cc78c2..64aafac 100644
--- a/arch/sparc/kernel/pcic.c
+++ b/arch/sparc/kernel/pcic.c
@@ -390,7 +390,8 @@ static void __init pcic_pbm_scan_bus(struct linux_pcic *pcic)
{
struct linux_pbm_info *pbm = &pcic->pbm;
- pbm->pci_bus = pci_scan_bus(pbm->pci_first_busno, &pcic_ops, pbm);
+ pbm->pci_bus = pci_scan_root_bus(NULL, pbm->pci_first_busno,
+ &pcic_ops, pbm, NULL);
#if 0 /* deadwood transplanted from sparc64 */
pci_fill_in_pbm_cookies(pbm->pci_bus, pbm, pbm->prom_node);
pci_record_assignments(pbm, pbm->pci_bus);
diff --git a/arch/unicore32/kernel/pci.c b/arch/unicore32/kernel/pci.c
index 374a055..be0f261 100644
--- a/arch/unicore32/kernel/pci.c
+++ b/arch/unicore32/kernel/pci.c
@@ -258,7 +258,7 @@ static int __init pci_common_init(void)
pci_puv3_preinit();
- puv3_bus = pci_scan_bus(0, &pci_puv3_ops, NULL);
+ puv3_bus = pci_scan_root_bus(NULL, 0, &pci_puv3_ops, NULL, NULL);
if (!puv3_bus)
panic("PCI: unable to scan bus!");
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 0892ea0..0540ff7 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -41,7 +41,7 @@ static inline int pci_proc_domain(struct pci_bus *bus)
}
#endif
-/* Can be used to override the logic in pci_scan_bus for skipping
+/* Can be used to override the logic in pci_scan_root_bus for skipping
already-configured bus numbers - to be used for buggy BIOSes
or architectures with incomplete PCI setup by the loader */
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c
index c20d2cc..baf6209 100644
--- a/arch/x86/pci/amd_bus.c
+++ b/arch/x86/pci/amd_bus.c
@@ -52,7 +52,7 @@ static struct pci_root_info __init *find_pci_root_info(int node, int link)
/**
* early_root_info_init()
- * called before pcibios_scan_root and pci_scan_bus
+ * called before pcibios_scan_root and pci_scan_root_bus
* fills the mp_bus_to_cpumask array based according
* to the LDT Bus Number Registers found in the northbridge.
*/
diff --git a/arch/xtensa/include/asm/pci.h b/arch/xtensa/include/asm/pci.h
index 5d52dc4..377fae9 100644
--- a/arch/xtensa/include/asm/pci.h
+++ b/arch/xtensa/include/asm/pci.h
@@ -13,7 +13,7 @@
#ifdef __KERNEL__
-/* Can be used to override the logic in pci_scan_bus for skipping
+/* Can be used to override the logic in pci_scan_root_bus for skipping
* already-configured bus numbers - to be used for buggy BIOSes
* or architectures with incomplete PCI setup by the loader
*/
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index a0580af..67c31bd 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -74,7 +74,7 @@
** assigned a PCI bus number based on "when" it's discovered.
**
** The "secondary" bus number is set to this before calling
-** pci_scan_bus(). If any PPB's are present, the scan will
+** pci_scan_root_bus(). If any PPB's are present, the scan will
** discover them and update the "secondary" and "subordinate"
** fields in Dino's pci_bus structure.
**
@@ -787,7 +787,7 @@ static int __init dino_common_init(struct parisc_device *dev,
pcibios_register_hba(&dino_dev->hba);
- pci_bios = &dino_bios_ops; /* used by pci_scan_bus() */
+ pci_bios = &dino_bios_ops;
pci_port = &dino_port_ops;
/*
diff --git a/drivers/pci/hotplug/ibmphp_core.c b/drivers/pci/hotplug/ibmphp_core.c
index 3efaf4c..b486432 100644
--- a/drivers/pci/hotplug/ibmphp_core.c
+++ b/drivers/pci/hotplug/ibmphp_core.c
@@ -767,7 +767,7 @@ static u8 bus_structure_fixup(u8 busno)
(l != 0x0000) && (l != 0xffff)) {
debug("%s - Inside bus_structure_fixup()\n",
__func__);
- pci_scan_bus(busno, ibmphp_pci_bus->ops, NULL);
+ pci_scan_root_bus(NULL, busno, ibmphp_pci_bus->ops, NULL, NULL);
break;
}
}
--
1.7.1
^ permalink raw reply related
* [RFC PATCH 09/16] PCI: Associate .get_msi_ctrl() with pci_host_bridge
From: Yijing Wang @ 2014-11-17 10:21 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Liviu Dudau, Tony Luck, Russell King, linux-pci, x86,
linux-kernel, Xinwei Hu, Thierry Reding, Yijing Wang,
Suravee.Suthikulpanit, Yijing Wang, linux-ia64, Thomas Gleixner,
Wuyun, linuxppc-dev, linux-arm-kernel
In-Reply-To: <1416219710-26088-1-git-send-email-wangyijing@huawei.com>
From: Yijing Wang <wangyijing0307@gmail.com>
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
drivers/pci/host-bridge.c | 1 +
include/linux/pci.h | 2 ++
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/pci/host-bridge.c b/drivers/pci/host-bridge.c
index 49b6c21..872cae1 100644
--- a/drivers/pci/host-bridge.c
+++ b/drivers/pci/host-bridge.c
@@ -58,6 +58,7 @@ struct pci_host_bridge *pci_create_host_bridge(
host->dev.parent = parent;
INIT_LIST_HEAD(&host->windows);
host->dev.release = pci_release_host_bridge_dev;
+ host->get_msi_ctrl = info->get_msi_ctrl;
/* this is hack, just for build, will be removed later*/
b = kzalloc(sizeof(*b), GFP_KERNEL);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index a51f5f5..af1ee86 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -408,6 +408,7 @@ struct pci_host_bridge {
int domain;
void *sysdata;
struct pci_ops *ops;
+ struct msi_controller *(*get_msi_ctrl)(struct pci_dev *pdev);
void (*release_fn)(struct pci_host_bridge *);
void *release_data;
};
@@ -416,6 +417,7 @@ struct pci_host_info {
u8 res_type;
void *arg;
struct list_head *resources; /*just for build, will clean up later */
+ struct msi_controller *(*get_msi_ctrl)(struct pci_dev *pdev);
int (*init_res)(struct pci_host_bridge *host,
struct pci_host_info *info);
};
--
1.7.1
^ permalink raw reply related
* [RFC PATCH 01/16] PCI: Enhance pci_scan_root_bus() to support default IO/MEM resources
From: Yijing Wang @ 2014-11-17 10:21 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Liviu Dudau, Tony Luck, Russell King, linux-pci, x86,
linux-kernel, Xinwei Hu, Thierry Reding, Yijing Wang,
Suravee.Suthikulpanit, Yijing Wang, linux-ia64, Thomas Gleixner,
Wuyun, linuxppc-dev, linux-arm-kernel
In-Reply-To: <1416219710-26088-1-git-send-email-wangyijing@huawei.com>
From: Yijing Wang <wangyijing0307@gmail.com>
Pci_scan_root_bus(), pci_scan_bus() and pci_scan_bus_parented()
are very similar. But the latter two use the default
io/mem resources. Enhance pci_scan_root_bus() to support
default io/mem resources, then we could use
pci_scan_root_bus() instead of them, and clean them up.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
drivers/pci/probe.c | 20 ++++++++++++++------
1 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 5ed9930..fc99e88 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -2069,15 +2069,23 @@ struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
struct pci_host_bridge_window *window;
bool found = false;
struct pci_bus *b;
+ LIST_HEAD(default_res);
int max;
- list_for_each_entry(window, resources, list)
- if (window->res->flags & IORESOURCE_BUS) {
- found = true;
- break;
- }
+ if (!resources) {
+ pci_add_resource(&default_res, &ioport_resource);
+ pci_add_resource(&default_res, &iomem_resource);
+ pci_add_resource(&default_res, &busn_resource);
+ } else {
+ list_for_each_entry(window, resources, list)
+ if (window->res->flags & IORESOURCE_BUS) {
+ found = true;
+ break;
+ }
+ }
- b = pci_create_root_bus(parent, bus, ops, sysdata, resources);
+ b = pci_create_root_bus(parent, bus, ops, sysdata,
+ resources ? resources : &default_res);
if (!b)
return NULL;
--
1.7.1
^ permalink raw reply related
* Re: [RFC PATCH 0/7] Replace _PAGE_NUMA with PAGE_NONE protections
From: Aneesh Kumar K.V @ 2014-11-17 8:26 UTC (permalink / raw)
To: Mel Gorman, Linux Kernel
Cc: Rik van Riel, Hugh Dickins, linuxppc-dev, Linux-MM, Ingo Molnar,
Paul Mackerras, Mel Gorman, Sasha Levin, Dave Jones,
Linus Torvalds, Kirill Shutemov
In-Reply-To: <1415971986-16143-1-git-send-email-mgorman@suse.de>
Mel Gorman <mgorman@suse.de> writes:
> This is follow up from the "pipe/page fault oddness" thread.
>
> Automatic NUMA balancing depends on being able to protect PTEs to trap a
> fault and gather reference locality information. Very broadly speaking it
> would mark PTEs as not present and use another bit to distinguish between
> NUMA hinting faults and other types of faults. It was universally loved
> by everybody and caused no problems whatsoever. That last sentence might
> be a lie.
>
> This series is very heavily based on patches from Linus and Aneesh to
> replace the existing PTE/PMD NUMA helper functions with normal change
> protections. I did alter and add parts of it but I consider them relatively
> minor contributions. Note that the signed-offs here need addressing. I
> couldn't use "From" or Signed-off-by from the original authors as the
> patches had to be broken up and they were never signed off. I expect the
> two people involved will just stick their signed-off-by on it.
How about the additional change listed below for ppc64 ? One part of the
patch is to make sure that we don't hit the WARN_ON in set_pte and set_pmd
because we find the _PAGE_PRESENT bit set in case of numa fault. I
ended up relaxing the check there.
Second part of the change is to add a WARN_ON to make sure we are
not depending on DSISR_PROTFAULT for anything else. We ideally should not
get a DSISR_PROTFAULT for PROT_NONE or NUMA fault. hash_page_mm do check
whether the access is allowed by pte before inserting a pte into hash
page table. Hence we will never find a PROT_NONE or PROT_NONE_NUMA ptes
in hash page table. But it is good to run with VM_WARN_ON ?
I also added a similar change to handle CAPI.
This will also need an ack from Ben and Paul . (added them to Cc:)
With the below patch you can add
Acked-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
for the respective patches.
diff --git a/arch/powerpc/mm/copro_fault.c b/arch/powerpc/mm/copro_fault.c
index 5a236f082c78..2e208afb7f4c 100644
--- a/arch/powerpc/mm/copro_fault.c
+++ b/arch/powerpc/mm/copro_fault.c
@@ -64,10 +64,14 @@ int copro_handle_mm_fault(struct mm_struct *mm, unsigned long ea,
if (!(vma->vm_flags & VM_WRITE))
goto out_unlock;
} else {
- if (dsisr & DSISR_PROTFAULT)
- goto out_unlock;
if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
goto out_unlock;
+ /*
+ * protfault should only happen due to us
+ * mapping a region readonly temporarily. PROT_NONE
+ * is also covered by the VMA check above.
+ */
+ VM_WARN_ON(dsisr & DSISR_PROTFAULT);
}
ret = 0;
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 50074972d555..6df9483e316f 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -396,17 +396,6 @@ good_area:
#endif /* CONFIG_8xx */
if (is_exec) {
-#ifdef CONFIG_PPC_STD_MMU
- /* Protection fault on exec go straight to failure on
- * Hash based MMUs as they either don't support per-page
- * execute permission, or if they do, it's handled already
- * at the hash level. This test would probably have to
- * be removed if we change the way this works to make hash
- * processors use the same I/D cache coherency mechanism
- * as embedded.
- */
-#endif /* CONFIG_PPC_STD_MMU */
-
/*
* Allow execution from readable areas if the MMU does not
* provide separate controls over reading and executing.
@@ -421,6 +410,14 @@ good_area:
(cpu_has_feature(CPU_FTR_NOEXECUTE) ||
!(vma->vm_flags & (VM_READ | VM_WRITE))))
goto bad_area;
+#ifdef CONFIG_PPC_STD_MMU
+ /*
+ * protfault should only happen due to us
+ * mapping a region readonly temporarily. PROT_NONE
+ * is also covered by the VMA check above.
+ */
+ VM_WARN_ON(error_code & DSISR_PROTFAULT);
+#endif /* CONFIG_PPC_STD_MMU */
/* a write */
} else if (is_write) {
if (!(vma->vm_flags & VM_WRITE))
@@ -430,6 +427,7 @@ good_area:
} else {
if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
goto bad_area;
+ VM_WARN_ON(error_code & DSISR_PROTFAULT);
}
/*
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
index c90e602677c9..75b08098fcf5 100644
--- a/arch/powerpc/mm/pgtable.c
+++ b/arch/powerpc/mm/pgtable.c
@@ -172,9 +172,13 @@ static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
pte_t pte)
{
-#ifdef CONFIG_DEBUG_VM
- WARN_ON(pte_val(*ptep) & _PAGE_PRESENT);
-#endif
+ /*
+ * When handling numa faults, we already have the pte marked
+ * _PAGE_PRESENT, but we can be sure that it is not in hpte.
+ * Hence we can use set_pte_at for them.
+ */
+ VM_WARN_ON((pte_val(*ptep) & (_PAGE_PRESENT | _PAGE_USER)) ==
+ (_PAGE_PRESENT | _PAGE_USER));
/* Note: mm->context.id might not yet have been assigned as
* this context might not have been activated yet when this
* is called.
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index c8d709ab489d..c721c5efb4df 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -710,7 +710,8 @@ void set_pmd_at(struct mm_struct *mm, unsigned long addr,
pmd_t *pmdp, pmd_t pmd)
{
#ifdef CONFIG_DEBUG_VM
- WARN_ON(pmd_val(*pmdp) & _PAGE_PRESENT);
+ WARN_ON((pmd_val(*pmdp) & (_PAGE_PRESENT | _PAGE_USER)) ==
+ (_PAGE_PRESENT | _PAGE_USER));
assert_spin_locked(&mm->page_table_lock);
WARN_ON(!pmd_trans_huge(pmd));
#endif
^ permalink raw reply related
* Re: [PATCH] [powerpc] Fix Text randomization
From: Michael Ellerman @ 2014-11-17 6:53 UTC (permalink / raw)
To: Vineeth Vijayan; +Cc: linuxppc-dev, linux-kernel, Anton Blanchard
In-Reply-To: <1415956325-10124-1-git-send-email-vvijayan@mvista.com>
On Fri, 2014-11-14 at 14:42 +0530, Vineeth Vijayan wrote:
> Now there is no way to disable TEXT randomization on a PPC32/PPC64
> machine. Text randomization happens even in the case of "echo 0 >
> /proc/sys/kernel/randomize_va_space"
>
> This happens due to the incorrect definition of ELF_ET_DYN_BASE
> at arch/powerpc/include/asm/elf.h
>
> The function randomize_et_dyn is redundant and is removed.
The patch looks OK, but for the change log I was thinking something more like
this:
powerpc: Use generic PIE randomization
Back in 2009 we merged 501cb16d3cfd "Randomise PIEs", which added support for
randomizing PIE (Position Independent Executable) binaries.
That commit added randomize_et_dyn(), which correctly randomized the addresses,
but failed to honor PF_RANDOMIZE. That means it was not possible to disable PIE
randomization via the personality flag, or /proc/sys/kernel/randomize_va_space.
Since then there has been generic support for PIE randomization added to
binfmt_elf.c, selectable via ARCH_BINFMT_ELF_RANDOMIZE_PIE.
Enabling that allows us to drop randomize_et_dyn(), which means we start
honoring PF_RANDOMIZE correctly.
It also causes a fairly major change to how we layout PIE binaries.
Currently we will place the binary at 512MB-520MB for 32 bit binaries, or
512MB-1.5GB for 64 bit binaries, eg:
$ cat /proc/$$/maps
4e550000-4e580000 r-xp 00000000 08:02 129813 /bin/dash
4e580000-4e590000 rw-p 00020000 08:02 129813 /bin/dash
10014110000-10014140000 rw-p 00000000 00:00 0 [heap]
3fffaa3f0000-3fffaa5a0000 r-xp 00000000 08:02 921 /lib/powerpc64le-linux-gnu/libc-2.19.so
3fffaa5a0000-3fffaa5b0000 rw-p 001a0000 08:02 921 /lib/powerpc64le-linux-gnu/libc-2.19.so
3fffaa5c0000-3fffaa5d0000 rw-p 00000000 00:00 0
3fffaa5d0000-3fffaa5f0000 r-xp 00000000 00:00 0 [vdso]
3fffaa5f0000-3fffaa620000 r-xp 00000000 08:02 1246 /lib/powerpc64le-linux-gnu/ld-2.19.so
3fffaa620000-3fffaa630000 rw-p 00020000 08:02 1246 /lib/powerpc64le-linux-gnu/ld-2.19.so
3ffffc340000-3ffffc370000 rw-p 00000000 00:00 0 [stack]
With this commit applied we don't do any special randomisation for the binary,
and instead rely on mmap randomisation. This means the binary ends up at high
addresses, eg:
$ cat /proc/$$/maps
3fff99820000-3fff999d0000 r-xp 00000000 08:02 921 /lib/powerpc64le-linux-gnu/libc-2.19.so
3fff999d0000-3fff999e0000 rw-p 001a0000 08:02 921 /lib/powerpc64le-linux-gnu/libc-2.19.so
3fff999f0000-3fff99a00000 rw-p 00000000 00:00 0
3fff99a00000-3fff99a20000 r-xp 00000000 00:00 0 [vdso]
3fff99a20000-3fff99a50000 r-xp 00000000 08:02 1246 /lib/powerpc64le-linux-gnu/ld-2.19.so
3fff99a50000-3fff99a60000 rw-p 00020000 08:02 1246 /lib/powerpc64le-linux-gnu/ld-2.19.so
3fff99a60000-3fff99a90000 r-xp 00000000 08:02 129813 /bin/dash
3fff99a90000-3fff99aa0000 rw-p 00020000 08:02 129813 /bin/dash
3fffc3de0000-3fffc3e10000 rw-p 00000000 00:00 0 [stack]
3fffc55e0000-3fffc5610000 rw-p 00000000 00:00 0 [heap]
Although this should be OK, it's possible it might break badly written
binaries that make assumptions about the address space layout.
cheers
^ permalink raw reply
* Re: [PATCH v3] rtc/tpo: Driver to support rtc and wakeup on PowerNV platform
From: Neelesh Gupta @ 2014-11-17 6:02 UTC (permalink / raw)
To: devicetree, tglx, linuxppc-dev, rtc-linux, a.zummo; +Cc: benh
In-Reply-To: <54476F4B.8050108@linux.vnet.ibm.com>
On 10/22/2014 02:18 PM, Neelesh Gupta wrote:
>
> On 10/14/2014 02:08 PM, Neelesh Gupta wrote:
>> The patch implements the OPAL rtc driver that binds with the rtc
>> driver subsystem. The driver uses the platform device infrastructure
>> to probe the rtc device and register it to rtc class framework. The
>> 'wakeup' is supported depending upon the property 'has-tpo' present
>> in the OF node. It provides a way to load the generic rtc driver in
>> in the absence of an OPAL driver.
>>
>> The patch also moves the existing OPAL rtc get/set time interfaces to
>> the
>> new driver and exposes the necessary OPAL calls using EXPORT_SYMBOL_GPL.
>
> Hi Alessandro,
>
> Awaiting Ack from your side, so that we can take this through the
> powerpc tree.
Hi Alessandro,
Please acknowledge..
- Neelesh
>
> Regards,
> Neelesh
>
>>
>> Test results:
>> -------------
>> Host:
>> [root@tul169p1 ~]# ls -l /sys/class/rtc/
>> total 0
>> lrwxrwxrwx 1 root root 0 Oct 14 03:07 rtc0 ->
>> ../../devices/opal-rtc/rtc/rtc0
>> [root@tul169p1 ~]# cat /sys/devices/opal-rtc/rtc/rtc0/time
>> 08:10:07
>> [root@tul169p1 ~]# echo `date '+%s' -d '+ 2 minutes'` >
>> /sys/class/rtc/rtc0/wakealarm
>> [root@tul169p1 ~]# cat /sys/class/rtc/rtc0/wakealarm
>> 1413274345
>> [root@tul169p1 ~]#
>>
>> FSP:
>> $ smgr mfgState
>> standby
>> $ rtim timeofday
>>
>> System time is valid: 2014/10/14 08:12:04.225115
>>
>> $ smgr mfgState
>> ipling
>> $
>>
>> Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
>> ---
>>
>> Changes in v3
>> =============
>> - Rebased to the latest tree.
>>
>> Changes in v2
>> =============
>> - Added Documentation/devicetree/bindings/rtc/rtc-opal.txt
>> - Explicitly turn off RTC_UIE mode by setting 'rtc->uie_unsupported'
>>
>> Documentation/devicetree/bindings/rtc/rtc-opal.txt | 16 +
>> arch/powerpc/include/asm/opal.h | 7 -
>> arch/powerpc/kernel/time.c | 1
>> arch/powerpc/platforms/powernv/opal-async.c | 3
>> arch/powerpc/platforms/powernv/opal-rtc.c | 65 +----
>> arch/powerpc/platforms/powernv/opal-wrappers.S | 2
>> arch/powerpc/platforms/powernv/opal.c | 6
>> arch/powerpc/platforms/powernv/setup.c | 2
>> drivers/rtc/Kconfig | 11 +
>> drivers/rtc/Makefile | 1
>> drivers/rtc/rtc-opal.c | 261
>> ++++++++++++++++++++
>> 11 files changed, 325 insertions(+), 50 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/rtc/rtc-opal.txt
>> create mode 100644 drivers/rtc/rtc-opal.c
>>
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* Re: [PATCH 3/4] powernv: cpuidle: Redesign idle states management
From: Shreyas B Prabhu @ 2014-11-17 5:49 UTC (permalink / raw)
To: Preeti U Murthy, linux-kernel
Cc: Paul Mackerras, Rafael J. Wysocki, linuxppc-dev, linux-pm
In-Reply-To: <54630362.7050007@linux.vnet.ibm.com>
Hi Preeti,
On Wednesday 12 November 2014 12:21 PM, Preeti U Murthy wrote:
> Hi Shreyas,
>
> On 11/03/2014 09:38 PM, Shreyas B. Prabhu wrote:
>> diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S
>> index 283c603..df11acb 100644
>> --- a/arch/powerpc/kernel/idle_power7.S
>> +++ b/arch/powerpc/kernel/idle_power7.S
>> _GLOBAL(power7_idle)
>> /* Now check if user or arch enabled NAP mode */
>> @@ -141,49 +192,16 @@ _GLOBAL(power7_idle)
>>
>> _GLOBAL(power7_nap)
>> mr r4,r3
>> - li r3,0
>> + li r3,1
>
> The comment at the top of this file states 0 for nap and 1 for sleep.
> You will need to change that. As an alternative I would suggest using
> the macros that you have already defined:PNV_THREAD_NAP and
> PNV_THREAD_SLEEP to write to r3 above and remove the lines that say 0
> for nap and 1 for sleep in the comments.
My bad, I had changed the comment in the next commit. I'll make the change.
>
>> b power7_powersave_common
>> /* No return */
>>
>
> <snip>
>
>> @@ -210,12 +226,91 @@ _GLOBAL(power7_wakeup_tb_loss)
>> BEGIN_FTR_SECTION
>> CHECK_HMI_INTERRUPT
>> END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
>> +
>> + li r7,1
>> + mfspr r8,SPRN_PIR
>> + /*
>> + * The last 3 bits of PIR represents the thread id of a cpu
>> + * in power8. This will need adjusting for power7.
>> + */
>> + andi. r8,r8,0x07 /* Get thread id into r8 */
>> + rotld r7,r7,r8
>> + /* r7 now has 'thread_id'th bit set */
>> +
>> + ld r14,PACA_CORE_IDLE_STATE_PTR(r13)
>> +lwarx_loop2:
>> + lwarx r15,0,r14
>> + andi. r9,r15,PNV_CORE_IDLE_LOCK_BIT
>> + /*
>> + * Lock bit is set in one of the 2 cases-
>> + * a. In the sleep/winkle enter path, the last thread is executing
>> + * fastsleep workaround code.
>> + * b. In the wake up path, another thread is executing fastsleep
>> + * workaround undo code or resyncing timebase or restoring context
>> + * In either case loop until the lock bit is cleared.
>> + */
>> + bne lwarx_loop2
>> +
>> + cmpwi cr2,r15,0
>> + or r15,r15,r7 /* Set thread bit */
>> +
>> + beq cr2,first_thread
>> +
>> + /* Not first thread in core to wake up */
>> + stwcx. r15,0,r14
>> + bne- lwarx_loop2
>> + b common_exit
>> +
>> +first_thread:
>> + /* First thread in core to wakeup */
>> + ori r15,r15,PNV_CORE_IDLE_LOCK_BIT
>> + stwcx. r15,0,r14
>> + bne- lwarx_loop2
>> +
>> + LOAD_REG_ADDR(r3, pnv_need_fastsleep_workaround)
>> + lbz r3,0(r3)
>> + cmpwi r3,1
>> + /* skip fastsleep workaround if its not needed */
>> + bne timebase_resync
>> +
>> + /* Undo fast sleep workaround */
>> + mfcr r16 /* Backup CR into a non-volatile register */
>
> Don't you want to do this ^^ before calling opal_call_realmode for
> timebase resync below also?
>
I am not using any of the CR registers after the timebase resync OPAL
call. Though in the next commit where I do use the CRs, I restore them
after the OPAL call.
>> + li r3,1
>> + li r4,0
>> + li r0,OPAL_CONFIG_CPU_IDLE_STATE
>> + bl opal_call_realmode
>> + mtcr r16 /* Restore CR */
>> +
>> + /* Do timebase resync if we are waking up from sleep. Use cr1 value
>> + * set in exceptions-64s.S */
>> + ble cr1,clear_lock
>> +
>> +timebase_resync:
>> /* Time base re-sync */
>> - li r3,OPAL_RESYNC_TIMEBASE
>> + li r0,OPAL_RESYNC_TIMEBASE
>> bl opal_call_realmode;
>> -
>> diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
>> index 34c6665..980c964 100644
>> --- a/arch/powerpc/platforms/powernv/setup.c
>> +++ b/arch/powerpc/platforms/powernv/setup.c
>> @@ -36,6 +36,8 @@
>> #include <asm/opal.h>
>> #include <asm/kexec.h>
>> #include <asm/smp.h>
>> +#include <asm/cputhreads.h>
>> +#include <asm/cpuidle.h>
>>
>> #include "powernv.h"
>>
>> @@ -292,11 +294,55 @@ static void __init pnv_setup_machdep_rtas(void)
>>
>> static u32 supported_cpuidle_states;
>>
>> +static void pnv_alloc_idle_core_states(void)
>> +{
>> + int i, j;
>> + int nr_cores = cpu_nr_cores();
>> + u32 *core_idle_state;
>> +
>> + /*
>> + * Deep idle states like sleep and winkle are per core idle states.
>> + * A core enters these states only when all the threads enter either
>> + * the particular idle state or a deeper one. There are tasks like
>> + * fastsleep hardware bug workaround and hypervisor core state save
>> + * which have to be done only by the last thread of the core entering
>> + * deep idle state and similarly tasks like timebase resync, hypervisor
>> + * core register restore that have to be done only by the first thread
>> + * waking up from these states. Introducing core_idle_state, a per core
>> + * structure which will keep track threads entering idle states deeper
>> + * than sleep.
>
> Since you already have explained ^^ in the changelog, you do not need to
> elaborate it here.
>
>> + * core_idle_state - First 8 bits track the idle state of each thread
>> + * of the core. The 8th bit is the lock bit. Initially all thread bits
>> + * are set. They are cleared when the thread enters deep idle state
>> + * like sleep and winkle. Initially the lock bit is cleared.
>
> you can simply have the comment about the bits of core_idle_state
> without having to mention about when they are cleared etc..
Okay. Will make the change.
>
>> + * The lock bit has 2 purposes
>> + * a. While the first thread is restoring core state, it prevents
>> + * from other threads in the core from switching to prcoess context.
>> + * b. While the last thread in the core is saving the core state, it
>> + * prevent a different thread from waking up.
>
> The above two points are useful. As far as I see besides explaining the
> bits of core_idle_state structure and the purpose of lock bit the rest
> of the comments is redundant. A git-blame will let people know why all
> this is needed. The comment section should not be used up for this
> purpose IMO.
>
> Regards
> Preeti U Murthy
>
^ permalink raw reply
* [PATCH powerpc] init nvram_pstore_info's buf_lock
From: Li Zhong @ 2014-11-17 2:52 UTC (permalink / raw)
To: PowerPC email list; +Cc: Michael Ellerman, Paul Mackerras
It seems nvram_pstore_info's buf_lock is not initialized before
registering, which causes some strange behavior when trying to obtain
the lock during kdump process.
Signed-off-by: Li Zhong <zhong@linux.vnet.ibm.com>
---
arch/powerpc/platforms/pseries/nvram.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c
index 11a3b61..054a0ed 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -715,6 +715,8 @@ static int nvram_pstore_init(void)
nvram_pstore_info.buf = oops_data;
nvram_pstore_info.bufsize = oops_data_sz;
+ spin_lock_init(&nvram_pstore_info.buf_lock);
+
rc = pstore_register(&nvram_pstore_info);
if (rc != 0)
pr_err("nvram: pstore_register() failed, defaults to "
^ permalink raw reply related
* [PATCH v2] i2c: Driver to expose PowerNV platform i2c busses
From: Neelesh Gupta @ 2014-11-16 17:17 UTC (permalink / raw)
To: linuxppc-dev, linux-i2c, wsa
The patch exposes the available i2c busses on the PowerNV platform
to the kernel and implements the bus driver to support i2c and
smbus commands.
The driver uses the platform device infrastructure to probe the busses
on the platform and registers them with the i2c driver framework.
Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/include/asm/opal.h | 29 ++
arch/powerpc/platforms/powernv/opal-wrappers.S | 1
arch/powerpc/platforms/powernv/opal.c | 11 +
drivers/i2c/busses/Kconfig | 11 +
drivers/i2c/busses/Makefile | 1
drivers/i2c/busses/i2c-opal.c | 295 ++++++++++++++++++++++++
6 files changed, 348 insertions(+)
create mode 100644 drivers/i2c/busses/i2c-opal.c
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 9124b0e..537807b 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -56,6 +56,14 @@ struct opal_sg_list {
#define OPAL_HARDWARE_FROZEN -13
#define OPAL_WRONG_STATE -14
#define OPAL_ASYNC_COMPLETION -15
+#define OPAL_I2C_TIMEOUT -17
+#define OPAL_I2C_INVALID_CMD -18
+#define OPAL_I2C_LBUS_PARITY -19
+#define OPAL_I2C_BKEND_OVERRUN -20
+#define OPAL_I2C_BKEND_ACCESS -21
+#define OPAL_I2C_ARBT_LOST -22
+#define OPAL_I2C_NACK_RCVD -23
+#define OPAL_I2C_STOP_ERR -24
/* API Tokens (in r0) */
#define OPAL_INVALID_CALL -1
@@ -154,6 +162,7 @@ struct opal_sg_list {
#define OPAL_HANDLE_HMI 98
#define OPAL_REGISTER_DUMP_REGION 101
#define OPAL_UNREGISTER_DUMP_REGION 102
+#define OPAL_I2C_REQUEST 109
#ifndef __ASSEMBLY__
@@ -801,6 +810,24 @@ typedef struct oppanel_line {
uint64_t line_len;
} oppanel_line_t;
+/* OPAL I2C request */
+struct opal_i2c_request {
+ uint8_t type;
+#define OPAL_I2C_RAW_READ 0
+#define OPAL_I2C_RAW_WRITE 1
+#define OPAL_I2C_SM_READ 2
+#define OPAL_I2C_SM_WRITE 3
+ uint8_t flags;
+#define OPAL_I2C_ADDR_10 0x01 /* Not supported yet */
+ uint8_t subaddr_sz; /* Max 4 */
+ uint8_t reserved;
+ __be16 addr; /* 7 or 10 bit address */
+ __be16 reserved2;
+ __be32 subaddr; /* Sub-address if any */
+ __be32 size; /* Data size */
+ __be64 buffer_ra; /* Buffer real address */
+};
+
/* /sys/firmware/opal */
extern struct kobject *opal_kobj;
@@ -963,6 +990,8 @@ int64_t opal_handle_hmi(void);
int64_t opal_register_dump_region(uint32_t id, uint64_t start, uint64_t end);
int64_t opal_unregister_dump_region(uint32_t id);
int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number);
+int64_t opal_i2c_request(uint64_t async_token, uint32_t bus_id,
+ struct opal_i2c_request *oreq);
/* Internal functions */
extern int early_init_dt_scan_opal(unsigned long node, const char *uname,
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index feb549a..4673c02 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -250,3 +250,4 @@ OPAL_CALL(opal_handle_hmi, OPAL_HANDLE_HMI);
OPAL_CALL(opal_register_dump_region, OPAL_REGISTER_DUMP_REGION);
OPAL_CALL(opal_unregister_dump_region, OPAL_UNREGISTER_DUMP_REGION);
OPAL_CALL(opal_pci_set_phb_cxl_mode, OPAL_PCI_SET_PHB_CXL_MODE);
+OPAL_CALL(opal_i2c_request, OPAL_I2C_REQUEST);
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index bb90e6e..994975e 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -667,6 +667,14 @@ static void opal_console_create_devs(void)
}
+static void opal_i2c_create_devs(void)
+{
+ struct device_node *np;
+
+ for_each_compatible_node(np, NULL, "ibm,opal-i2c")
+ of_platform_device_create(np, NULL, NULL);
+}
+
static void opal_request_interrupts(void)
{
const __be32 *irqs;
@@ -732,6 +740,9 @@ static int __init opal_init(void)
/* Create console platform devices */
opal_console_create_devs();
+ /* Create i2c platform devices */
+ opal_i2c_create_devs();
+
/* Register OPAL interrupts */
opal_request_interrupts();
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 917c358..71ad6e1 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -1044,4 +1044,15 @@ config SCx200_ACB
This support is also available as a module. If so, the module
will be called scx200_acb.
+config I2C_OPAL
+ tristate "IBM OPAL I2C driver"
+ depends on PPC_POWERNV
+ default y
+ help
+ This exposes the PowerNV platform i2c busses to the linux i2c layer,
+ the driver is based on the OPAL interfaces.
+
+ This driver can also be built as a module. If so, the module will be
+ called as i2c-opal.
+
endmenu
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 78d56c5..350aa86 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -102,5 +102,6 @@ obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o
obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o
obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o
obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
+obj-$(CONFIG_I2C_OPAL) += i2c-opal.o
ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG
diff --git a/drivers/i2c/busses/i2c-opal.c b/drivers/i2c/busses/i2c-opal.c
new file mode 100644
index 0000000..307d391
--- /dev/null
+++ b/drivers/i2c/busses/i2c-opal.c
@@ -0,0 +1,295 @@
+/*
+ * IBM OPAL I2C driver
+ * Copyright (C) 2014 IBM
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.
+ */
+
+#include <linux/device.h>
+#include <linux/i2c.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include <asm/firmware.h>
+#include <asm/opal.h>
+
+static int i2c_opal_translate_error(int rc)
+{
+ switch (rc) {
+ case OPAL_NO_MEM:
+ return -ENOMEM;
+ case OPAL_PARAMETER:
+ return -EINVAL;
+ case OPAL_I2C_ARBT_LOST:
+ return -EAGAIN;
+ case OPAL_I2C_TIMEOUT:
+ return -ETIMEDOUT;
+ case OPAL_I2C_NACK_RCVD:
+ return -ENXIO;
+ case OPAL_I2C_STOP_ERR:
+ return -EBUSY;
+ default:
+ return -EIO;
+ }
+}
+
+static int i2c_opal_send_request(u32 bus_id, struct opal_i2c_request *req)
+{
+ struct opal_msg msg;
+ int token, rc;
+
+ token = opal_async_get_token_interruptible();
+ if (token < 0) {
+ if (token != -ERESTARTSYS)
+ pr_err("Failed to get the async token\n");
+
+ return token;
+ }
+
+ rc = opal_i2c_request(token, bus_id, req);
+ if (rc != OPAL_ASYNC_COMPLETION) {
+ rc = i2c_opal_translate_error(rc);
+ goto exit;
+ }
+
+ rc = opal_async_wait_response(token, &msg);
+ if (rc)
+ goto exit;
+
+ rc = be64_to_cpu(msg.params[1]);
+ if (rc != OPAL_SUCCESS) {
+ rc = i2c_opal_translate_error(rc);
+ goto exit;
+ }
+
+exit:
+ opal_async_release_token(token);
+ return rc;
+}
+
+static int i2c_opal_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
+ int num)
+{
+ unsigned long opal_id = (unsigned long)adap->algo_data;
+ struct opal_i2c_request req;
+ int rc, i;
+
+ /* We only support fairly simple combinations here of one
+ * or two messages
+ */
+ memset(&req, 0, sizeof(req));
+ switch(num) {
+ case 0:
+ return 0;
+ case 1:
+ req.type = (msgs[0].flags & I2C_M_RD) ?
+ OPAL_I2C_RAW_READ : OPAL_I2C_RAW_WRITE;
+ req.addr = cpu_to_be16(msgs[0].addr);
+ req.size = cpu_to_be32(msgs[0].len);
+ req.buffer_ra = cpu_to_be64(__pa(msgs[0].buf));
+ break;
+ case 2:
+ /* For two messages, we basically support only simple
+ * smbus transactions of a write plus a read. We might
+ * want to allow also two writes but we'd have to bounce
+ * the data into a single buffer.
+ */
+ if ((msgs[0].flags & I2C_M_RD) || !(msgs[1].flags & I2C_M_RD))
+ return -EOPNOTSUPP;
+ if (msgs[0].len > 4)
+ return -EOPNOTSUPP;
+ if (msgs[0].addr != msgs[1].addr)
+ return -EOPNOTSUPP;
+ req.type = OPAL_I2C_SM_READ;
+ req.addr = cpu_to_be16(msgs[0].addr);
+ req.subaddr_sz = msgs[0].len;
+ for (i = 0; i < msgs[0].len; i++)
+ req.subaddr = (req.subaddr << 8) | msgs[0].buf[i];
+ req.subaddr = cpu_to_be32(req.subaddr);
+ req.size = cpu_to_be32(msgs[1].len);
+ req.buffer_ra = cpu_to_be64(__pa(msgs[1].buf));
+ break;
+ default:
+ return -EOPNOTSUPP;
+ }
+
+ rc = i2c_opal_send_request(opal_id, &req);
+ if (rc)
+ return rc;
+
+ return num;
+}
+
+static int i2c_opal_smbus_xfer(struct i2c_adapter *adap, u16 addr,
+ unsigned short flags, char read_write,
+ u8 command, int size, union i2c_smbus_data *data)
+{
+ unsigned long opal_id = (unsigned long)adap->algo_data;
+ struct opal_i2c_request req;
+ u8 local[2];
+ int rc;
+
+ memset(&req, 0, sizeof(req));
+
+ req.addr = cpu_to_be16(addr);
+ switch (size) {
+ case I2C_SMBUS_BYTE:
+ req.buffer_ra = cpu_to_be64(__pa(&data->byte));
+ req.size = cpu_to_be32(1);
+ /* Fall through */
+ case I2C_SMBUS_QUICK:
+ req.type = (read_write == I2C_SMBUS_READ) ?
+ OPAL_I2C_RAW_READ : OPAL_I2C_RAW_WRITE;
+ break;
+ case I2C_SMBUS_BYTE_DATA:
+ req.buffer_ra = cpu_to_be64(__pa(&data->byte));
+ req.size = cpu_to_be32(1);
+ req.subaddr = cpu_to_be32(command);
+ req.subaddr_sz = 1;
+ req.type = (read_write == I2C_SMBUS_READ) ?
+ OPAL_I2C_SM_READ : OPAL_I2C_SM_WRITE;
+ break;
+ case I2C_SMBUS_WORD_DATA:
+ if (!read_write) {
+ local[0] = data->word & 0xff;
+ local[1] = (data->word >> 8) & 0xff;
+ }
+ req.buffer_ra = cpu_to_be64(__pa(local));
+ req.size = cpu_to_be32(2);
+ req.subaddr = cpu_to_be32(command);
+ req.subaddr_sz = 1;
+ req.type = (read_write == I2C_SMBUS_READ) ?
+ OPAL_I2C_SM_READ : OPAL_I2C_SM_WRITE;
+ break;
+ case I2C_SMBUS_I2C_BLOCK_DATA:
+ req.buffer_ra = cpu_to_be64(__pa(&data->block[1]));
+ req.size = cpu_to_be32(data->block[0]);
+ req.subaddr = cpu_to_be32(command);
+ req.subaddr_sz = 1;
+ req.type = (read_write == I2C_SMBUS_READ) ?
+ OPAL_I2C_SM_READ : OPAL_I2C_SM_WRITE;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ rc = i2c_opal_send_request(opal_id, &req);
+ if (!rc && read_write && size == I2C_SMBUS_WORD_DATA) {
+ data->word = ((u16)local[1]) << 8;
+ data->word |= local[0];
+ }
+
+ return rc;
+}
+
+static u32 i2c_opal_func(struct i2c_adapter *adapter)
+{
+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
+ I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
+ I2C_FUNC_SMBUS_I2C_BLOCK;
+}
+
+static const struct i2c_algorithm i2c_opal_algo = {
+ .master_xfer = i2c_opal_master_xfer,
+ .smbus_xfer = i2c_opal_smbus_xfer,
+ .functionality = i2c_opal_func,
+};
+
+static int i2c_opal_probe(struct platform_device *pdev)
+{
+ struct i2c_adapter *adapter;
+ const char *pname;
+ u32 opal_id;
+ int rc;
+
+ if (!pdev->dev.of_node)
+ return -ENODEV;
+
+ rc = of_property_read_u32(pdev->dev.of_node, "ibm,opal-id", &opal_id);
+ if (rc) {
+ dev_err(&pdev->dev, "Missing ibm,opal-id property !\n");
+ return -EIO;
+ }
+
+ adapter = devm_kzalloc(&pdev->dev, sizeof(*adapter), GFP_KERNEL);
+ if (!adapter)
+ return -ENOMEM;
+
+ adapter->algo = &i2c_opal_algo;
+ adapter->algo_data = (void *)(unsigned long)opal_id;
+ adapter->dev.parent = &pdev->dev;
+ adapter->dev.of_node = of_node_get(pdev->dev.of_node);
+ pname = of_get_property(pdev->dev.of_node, "ibm,port-name", NULL);
+ if (pname)
+ strlcpy(adapter->name, pname, sizeof(adapter->name));
+ else
+ strlcpy(adapter->name, "opal", sizeof(adapter->name));
+
+ platform_set_drvdata(pdev, adapter);
+ rc = i2c_add_adapter(adapter);
+ if (rc)
+ dev_err(&pdev->dev, "Failed to register the i2c adapter\n");
+
+ return rc;
+}
+
+static int i2c_opal_remove(struct platform_device *pdev)
+{
+ struct i2c_adapter *adapter = platform_get_drvdata(pdev);
+
+ i2c_del_adapter(adapter);
+
+ return 0;
+}
+
+static const struct of_device_id i2c_opal_of_match[] = {
+ {
+ .compatible = "ibm,opal-i2c",
+ },
+ { }
+};
+MODULE_DEVICE_TABLE(of, i2c_opal_of_match);
+
+static struct platform_driver i2c_opal_driver = {
+ .probe = i2c_opal_probe,
+ .remove = i2c_opal_remove,
+ .driver = {
+ .name = "i2c-opal",
+ .owner = THIS_MODULE,
+ .of_match_table = i2c_opal_of_match,
+ },
+};
+
+static int __init i2c_opal_init(void)
+{
+ if (!firmware_has_feature(FW_FEATURE_OPAL))
+ return -ENODEV;
+
+ return platform_driver_register(&i2c_opal_driver);
+}
+module_init(i2c_opal_init);
+
+static void __exit i2c_opal_exit(void)
+{
+ return platform_driver_unregister(&i2c_opal_driver);
+}
+module_exit(i2c_opal_exit);
+
+MODULE_AUTHOR("Neelesh Gupta <neelegup@linux.vnet.ibm.com>");
+MODULE_DESCRIPTION("IBM OPAL I2C driver");
+MODULE_LICENSE("GPL");
^ permalink raw reply related
* [PATCH] mm/hugetlb: sanity check gigantic hugepage count
From: James Yang @ 2014-11-14 18:32 UTC (permalink / raw)
To: benh, scottwood; +Cc: James Yang, linuxppc-dev
Limit the number of gigantic hugepages specified by the
hugepages= parameter to MAX_NUMBER_GPAGES.
Signed-off-by: James Yang <James.Yang@freescale.com>
---
arch/powerpc/mm/hugetlbpage.c | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index d67db4b..5ef84a2 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -362,6 +362,13 @@ static int __init do_gpage_early_setup(char *param, char *val,
if (size != 0) {
if (sscanf(val, "%lu", &npages) <= 0)
npages = 0;
+ if (npages > MAX_NUMBER_GPAGES) {
+ pr_warn("MMU: %lu pages requested for page "
+ "size %llu KB, limiting to "
+ __stringify(MAX_NUMBER_GPAGES) "\n",
+ npages, size / 1024);
+ npages = MAX_NUMBER_GPAGES;
+ }
gpage_npages[shift_to_mmu_psize(__ffs(size))] = npages;
size = 0;
}
--
1.7.0.4
^ permalink raw reply related
* Re: [PATCH] i2c: Driver to expose PowerNV platform i2c busses
From: Neelesh Gupta @ 2014-11-14 16:10 UTC (permalink / raw)
To: Wolfram Sang; +Cc: linuxppc-dev, linux-i2c
In-Reply-To: <20141113075817.GA1288@katana>
[-- Attachment #1: Type: text/plain, Size: 3311 bytes --]
On 11/13/2014 01:28 PM, Wolfram Sang wrote:
> Hi,
>
> I am basically fine if this goes via the powerpc-tree and I was hoping
> that I could ack it right now. However, the driver looks a bit rushed
> and definately needs updates before it is ready to go.
>
> On Mon, Nov 10, 2014 at 11:35:39AM +0530, Neelesh Gupta wrote:
>> The patch exposes the available i2c busses on the PowerNV platform
>> to the kernel and implements the bus driver to support i2c and
>> smbus commands.
>> The driver uses the platform device infrastructure to probe the busses
>> on the platform and registers them with the i2c driver framework.
>>
>> Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
>> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Review for the I2C parts:
>
>> diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
>> index 78d56c5..350aa86 100644
>> --- a/drivers/i2c/busses/Makefile
>> +++ b/drivers/i2c/busses/Makefile
>> @@ -102,5 +102,6 @@ obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o
>> obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o
>> obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o
>> obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
>> +obj-$(CONFIG_I2C_OPAL) += i2c-opal.o
> Please sort it properly, not simply at the end.
I don't find match under any 'comment' in this file so keeping it under
"Other I2C/SMBus bus drivers".
>
>>
>> ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG
>> diff --git a/drivers/i2c/busses/i2c-opal.c b/drivers/i2c/busses/i2c-opal.c
>> new file mode 100644
>> index 0000000..3261716
>> --- /dev/null
>> +++ b/drivers/i2c/busses/i2c-opal.c
>> +
>> + return rc;
>> +}
>> +
>> +static int i2c_opal_remove(struct platform_device *pdev)
>> +{
>> + struct i2c_adapter *adapter = platform_get_drvdata(pdev);
>> +
>> + i2c_del_adapter(adapter);
>> +
>> + kfree(adapter);
>> +
>> + return 0;
>> +}
>> +
>> +static const struct of_device_id i2c_opal_of_match[] = {
>> + {
>> + .compatible = "ibm,power8-i2c-port",
>> + },
>> + { }
>> +};
>> +MODULE_DEVICE_TABLE(of, i2c_opal_of_match);
>> +
>> +static struct platform_driver i2c_opal_driver = {
>> + .probe = i2c_opal_probe,
>> + .remove = i2c_opal_remove,
>> + .driver = {
>> + .name = "i2c-opal",
>> + .owner = THIS_MODULE,
> Not needed.
I didn't get this.
>
>> + .of_match_table = i2c_opal_of_match,
>> + },
>> +};
>> +
>> +static int __init i2c_opal_init(void)
>> +{
>> + if (!firmware_has_feature(FW_FEATURE_OPAL))
>> + return -ENODEV;
>> +
>> + return platform_driver_register(&i2c_opal_driver);
>> +}
>> +
>> +static void __exit i2c_opal_exit(void)
>> +{
>> + return platform_driver_unregister(&i2c_opal_driver);
>> +}
>> +
>> +MODULE_AUTHOR("Neelesh Gupta <neelegup@linux.vnet.ibm.com>");
>> +MODULE_DESCRIPTION("IBM OPAL I2C driver");
>> +MODULE_LICENSE("GPL");
>> +
>> +module_init(i2c_opal_init);
>> +module_exit(i2c_opal_exit);
> Please put thos right below the functions it references.
Okay.
- Neelesh
>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-i2c" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>
>>
>> _______________________________________________
>> Linuxppc-dev mailing list
>> Linuxppc-dev@lists.ozlabs.org
>> https://lists.ozlabs.org/listinfo/linuxppc-dev
[-- Attachment #2: Type: text/html, Size: 5015 bytes --]
^ permalink raw reply
* [PATCH] [v2] power/fsl: add MDIO dt binding for FMan
From: shh.xie @ 2014-11-14 9:53 UTC (permalink / raw)
To: linuxppc-dev, devicetree, scottwood
Cc: Igal.Liberman, Shaohui Xie, Emilian.Medve
From: Shaohui Xie <Shaohui.Xie@freescale.com>
This binding is for FMan MDIO, it covers FMan v2 & FMan v3.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
---
changes in V2:
addressed comments from Scott in V1.
.../devicetree/bindings/powerpc/fsl/fman.txt | 69 ++++++++++++++++++++++
1 file changed, 69 insertions(+)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
index edeea16..1523a87 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
@@ -7,6 +7,7 @@ CONTENTS
- FMan MURAM Node
- FMan dTSEC/XGEC/mEMAC Node
- FMan IEEE 1588 Node
+ - FMan MDIO Node
- Example
=============================================================================
@@ -357,6 +358,68 @@ ptp-timer@fe000 {
};
=============================================================================
+FMan MDIO Node
+
+DESCRIPTION
+
+The MDIO is a bus to which the PHY devices are connected.
+
+PROPERTIES
+
+- compatible
+ Usage: required
+ Value type: <stringlist>
+ Definition: A standard property.
+ Must include "fsl,fman-mdio" for 1 Gb/s MDIO from FMan v2.
+ Must include "fsl,fman-xmdio" for 10 Gb/s MDIO from FMan v2.
+ Must include "fsl,fman-memac-mdio" for 1/10 Gb/s MDIO from
+ FMan v3.
+
+- reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property.
+
+- bus-frequency
+ Usage: optional
+ Value type: <u32>
+ Definition: Specifies external MDIO bus clock speed which is
+ different from MDIO standard 2.5MHz. Should be defined for SoCs
+ on which the standard one cannot work.
+
+- interrupts
+ Usage: optional
+ Value type: <prop-encoded-array>
+ Definition: Event interrupt of external MDIO controller.
+ 1 Gb/s MDIO and 10 Gb/s MDIO has one interrupt respectively.
+
+- fsl,fman-internal-mdio
+ Usage: required for internal MDIO
+ Value type: boolean
+ Definition: Fman has internal MDIO for internal PCS(Physical
+ Coding Sublayer) PHYs and external MDIO for external PHYs.
+ The settings and programming routines for internal/external
+ MDIO are different. Must be included for internal MDIO.
+
+EXAMPLE
+
+Example for FMan v2 external MDIO:
+
+mdio@f1000 {
+ compatible = "fsl,fman-xmdio";
+ reg = <0xf1000 0x1000>;
+ bus-frequency = <20000>;
+};
+
+Example for FMan v3 internal MDIO:
+
+mdio@f1000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0xf1000 0x1000>;
+ fsl,fman-internal-mdio;
+};
+
+=============================================================================
Example
fman@400000 {
@@ -531,4 +594,10 @@ fman@400000 {
compatible = "fsl,fman-ptp-timer";
reg = <0xfe000 0x1000>;
};
+
+ mdio@f1000 {
+ compatible = "fsl,fman-xmdio";
+ reg = <0xf1000 0x1000>;
+ bus-frequency = <20000>;
+ };
};
--
1.8.4.1
^ permalink raw reply related
* Re: [PATCH V4 7/8] powerpc, ptrace: Enable support for miscellaneous debug registers
From: Denis Kirjanov @ 2014-11-14 10:00 UTC (permalink / raw)
To: Anshuman Khandual
Cc: mikey, james.hogan, avagin, Paul.Clothier, davem, peterz, palves,
linux-kernel, oleg, dhowells, linuxppc-dev, davej, tglx, sukadev,
akpm, sam.bobroff
In-Reply-To: <54647DA7.1070000@linux.vnet.ibm.com>
On 11/13/14, Anshuman Khandual <khandual@linux.vnet.ibm.com> wrote:
> On 11/11/2014 10:56 AM, Anshuman Khandual wrote:
>> This patch enables get and set of miscellaneous debug registers through
>> ptrace PTRACE_GETREGSET-PTRACE_SETREGSET interface by implementing new
>> powerpc specific register set REGSET_MISC support corresponding to the
>> new ELF core note NT_PPC_MISC added previously in this regard.
>
> Right now this one does not compile for "ppc64e_defconfig" and
> "pmac32_defconfig" config options. The patch below will fix it
> and would be part of next revision.
It would be great to have a test tool for that under
tools/testing/selftests/ptrace/
> diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
> index 61a2581..be566eb 100644
> --- a/arch/powerpc/kernel/ptrace.c
> +++ b/arch/powerpc/kernel/ptrace.c
> @@ -1326,6 +1326,7 @@ static int tm_cvmx_set(struct task_struct *target,
> }
> #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
>
> +#ifdef CONFIG_PPC64
> /*
> * get_misc_dbg
> *
> @@ -1339,6 +1340,9 @@ static int tm_cvmx_set(struct task_struct *target,
> * unsigned long ppr;
> * unsigned long tar;
> * };
> + *
> + * The data element 'tar' will be valid only if the
> + * kernel has CONFIG_PPC_BOOK3S_64 config option enabled.
> */
> static int get_misc_dbg(struct task_struct *target,
> const struct user_regset *regset, unsigned int pos,
> @@ -1348,7 +1352,10 @@ static int get_misc_dbg(struct task_struct *target,
>
> /* Build test */
> BUILD_BUG_ON(TSO(dscr) + 2 * sizeof(unsigned long) != TSO(ppr));
> +
> +#ifdef CONFIG_PPC_BOOK3S_64
> BUILD_BUG_ON(TSO(ppr) + sizeof(unsigned long) != TSO(tar));
> +#endif
>
> /* DSCR register */
> ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> @@ -1362,12 +1369,14 @@ static int get_misc_dbg(struct task_struct *target,
> sizeof(unsigned long),
> 2 * sizeof(unsigned long));
>
> +#ifdef CONFIG_PPC_BOOK3S_64
> /* TAR register */
> if (!ret)
> ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> &target->thread.tar,
> 2 * sizeof(unsigned long),
> 3 * sizeof(unsigned long));
> +#endif
> return ret;
> }
>
> @@ -1384,6 +1393,9 @@ static int get_misc_dbg(struct task_struct *target,
> * unsigned long ppr;
> * unsigned long tar;
> * };
> + *
> + * The data element 'tar' will be valid only if the
> + * kernel has CONFIG_PPC_BOOK3S_64 config option enabled.
> */
> static int set_misc_dbg(struct task_struct *target,
> const struct user_regset *regset, unsigned int pos,
> @@ -1394,7 +1406,10 @@ static int set_misc_dbg(struct task_struct *target,
>
> /* Build test */
> BUILD_BUG_ON(TSO(dscr) + 2 * sizeof(unsigned long) != TSO(ppr));
> +
> +#ifdef CONFIG_PPC_BOOK3S_64
> BUILD_BUG_ON(TSO(ppr) + sizeof(unsigned long) != TSO(tar));
> +#endif
>
> /* DSCR register */
> ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
> @@ -1407,15 +1422,17 @@ static int set_misc_dbg(struct task_struct *target,
> &target->thread.ppr,
> sizeof(unsigned long),
> 2 * sizeof(unsigned long));
> -
> +#ifdef CONFIG_PPC_BOOK3S_64
> /* TAR register */
> if (!ret)
> ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
> &target->thread.tar,
> 2 * sizeof(unsigned long),
> 3 * sizeof(unsigned long));
> +#endif
> return ret;
> }
> +#endif /* CONFIG_PPC64 */
>
> /*
> * These are our native regset flavors.
> @@ -1438,7 +1455,9 @@ enum powerpc_regset {
> REGSET_TM_CFPR, /* TM checkpointed FPR registers */
> REGSET_TM_CVMX, /* TM checkpointed VMX registers */
> #endif
> +#ifdef CONFIG_PPC64
> REGSET_MISC /* Miscellaneous debug registers */
> +#endif
> };
>
> static const struct user_regset native_regsets[] = {
> @@ -1495,11 +1514,13 @@ static const struct user_regset native_regsets[] = {
> .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set
> },
> #endif
> +#ifdef CONFIG_PPC64
> [REGSET_MISC] = {
> .core_note_type = NT_PPC_MISC, .n = ELF_NMISCREG,
> .size = sizeof(u64), .align = sizeof(u64),
> .get = get_misc_dbg, .set = set_misc_dbg
> },
> +#endif
> };
>
> static const struct user_regset_view user_ppc_native_view = {
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
--
Regards,
Denis
^ permalink raw reply
* [PATCH] [powerpc] Fix Text randomization
From: Vineeth Vijayan @ 2014-11-14 9:12 UTC (permalink / raw)
To: Michael Ellerman, benh, linuxppc-dev, linux-kernel; +Cc: Vineeth Vijayan
Now there is no way to disable TEXT randomization on a PPC32/PPC64
machine. Text randomization happens even in the case of "echo 0 >
/proc/sys/kernel/randomize_va_space"
This happens due to the incorrect definition of ELF_ET_DYN_BASE
at arch/powerpc/include/asm/elf.h
The function randomize_et_dyn is redundant and is removed.
Signed-off-by: Vineeth Vijayan <vvijayan@mvista.com>
---
arch/powerpc/Kconfig | 1 +
arch/powerpc/include/asm/elf.h | 3 +--
arch/powerpc/kernel/process.c | 9 ---------
3 files changed, 2 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 88eace4..868a3c4 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -88,6 +88,7 @@ config PPC
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_MIGHT_HAVE_PC_SERIO
select BINFMT_ELF
+ select ARCH_BINFMT_ELF_RANDOMIZE_PIE
select OF
select OF_EARLY_FLATTREE
select OF_RESERVED_MEM
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index 888d8f3..3793675 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -28,8 +28,7 @@
the loader. We need to make sure that it is out of the way of the program
that it will "exec", and that there is sufficient room for the brk. */
-extern unsigned long randomize_et_dyn(unsigned long base);
-#define ELF_ET_DYN_BASE (randomize_et_dyn(0x20000000))
+#define ELF_ET_DYN_BASE (0x20000000)
#define ELF_CORE_EFLAGS (is_elf2_task() ? 2 : 0)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 923cd2d..e50467e 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1665,12 +1665,3 @@ unsigned long arch_randomize_brk(struct mm_struct *mm)
return ret;
}
-unsigned long randomize_et_dyn(unsigned long base)
-{
- unsigned long ret = PAGE_ALIGN(base + brk_rnd());
-
- if (ret < base)
- return base;
-
- return ret;
-}
--
1.7.9.5
^ permalink raw reply related
* Re: powerpc: Fix Text randomization
From: Vineeth Vijayan @ 2014-11-14 8:48 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <1415946050.26378.3.camel@concordia>
On Fri, Nov 14, 2014 at 11:50 AM, Michael Ellerman <mpe@ellerman.id.au> wrote:
> On Fri, 2014-11-14 at 11:03 +0530, Vineeth Vijayan wrote:
>> ping !
>>
>> any update on this ? As i understand, only powerpc and s390 uses the
>> randomize_et_dyn call; for all other architecture this is an obsolete
>> function call.
>
> I asked:
>
>> >> I'm not clear on what has changed to break this?
>
Disabling PIE randomization was added in the commit
a3defbe5c337dbc6da911f8cc49ae3cc3b49b453
(binfmt_elf: fix PIE execution with randomization disabled). The
randomization is decided as
per the randomize_va_space sysctl flag.
As i understand, the randomization of the base address is implemented
at elf_map and not from the
arch/<>/include/asm/elf.h
Now, for powerpc, there's no support to disable the PIE randomization,
even after we disable the
same form randomize_va_space sysctl.This patch gives the support to
disable PIE randomization in
case it is disabled from this sysctl.
> And you didn't tell me.
>
>> this call for another patch where randomize_et_dyn is removed.
>
> Patches welcome :)
>
i will follow up with the patch.
> cheers
>
>
^ permalink raw reply
* Re: [PATCH] i2c-qoriq: modified compatibility for correct prescaler
From: Wolfram Sang @ 2014-11-14 8:28 UTC (permalink / raw)
To: Valentin Longchamp
Cc: Linux device trees, Boschung, Rainer, Brunck, Holger, Linux I2C,
Scott Wood, Linux PowerPC Kernel
In-Reply-To: <5465B285.7070005@keymile.com>
[-- Attachment #1: Type: text/plain, Size: 647 bytes --]
> >
> > If we're going to change the device tree I'd rather just add a property
> > to say what the prescaler is.
>
> We would however, leave the boards' device trees that use things like
> "fsl,mpc8543-i2c" as is and introduce the prescaler for the others requiring it.
>
>
> Now the drawback is that the driver would require a change, to parse this
> prescaler new prescaler property. Would this be OK from your point of view
> Wolfram ? If yes, I will send the patches for it.
I don't think it is OK. I'd think it can be deduced from the compatible
property. Let's ask the DT experts here. I'll follow their suggestion.
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]
^ permalink raw reply
* Re: [PATCH] i2c-qoriq: modified compatibility for correct prescaler
From: Valentin Longchamp @ 2014-11-14 7:43 UTC (permalink / raw)
To: Wolfram Sang
Cc: Linux device trees, Boschung, Rainer, Brunck, Holger, Linux I2C,
Scott Wood, Linux PowerPC Kernel
In-Reply-To: <20141113003418.GE2062@katana>
On 11/13/2014 01:34 AM, Wolfram Sang wrote:
>
>> If we wanted to be on the safe side and strict (since we are not sure that the
>> hardware is 100% compatible), we maybe should add a fsl,qoriq-i2c compatible to
>> the driver that does the same as mpc8543-i2c.
>
> Or you leave the driver as is and use both compatibles:
>
> compatible = "fsl,qoriq-i2c", "fsl,mpc8543-i2c", "fsl-i2c";
>
> ?
>
I like Scott's proposition to add the prescaler in the device tree more. From
the hardware description point of view, it makes more sense: the devices are all
just fsl-i2c, with a different prescaler. I just quote it below as a reminder.
>
> If we're going to change the device tree I'd rather just add a property
> to say what the prescaler is.
We would however, leave the boards' device trees that use things like
"fsl,mpc8543-i2c" as is and introduce the prescaler for the others requiring it.
Now the drawback is that the driver would require a change, to parse this
prescaler new prescaler property. Would this be OK from your point of view
Wolfram ? If yes, I will send the patches for it.
Valentin
^ permalink raw reply
* [PATCH] cxl: Name interrupts in /proc/interrupt
From: Ian Munsie @ 2014-11-14 7:09 UTC (permalink / raw)
To: mpe
Cc: cbe-oss-dev, mikey, arnd, Aneesh Kumar K.V, greg, linux-kernel,
linuxppc-dev, anton, imunsie, jk
From: Michael Neuling <mikey@neuling.org>
Currently all interrupts generated by cxl are named "cxl". This is not very
informative as we can't distinguish between cards, AFUs, error interrupts, user
contexts and user interrupts numbers. Being able to distinguish them is useful
for setting affinity.
This patch gives each of these names in /proc/interrupts.
A two card CAPI system, with afu0.0 having 2 active contexts each with 4 user
IRQs each, will now look like this:
% grep cxl /proc/interrupts
444: 0 OPAL ICS 141312 Level cxl-card1-err
445: 0 OPAL ICS 141313 Level cxl-afu1.0-err
446: 0 OPAL ICS 141314 Level cxl-afu1.0
462: 0 OPAL ICS 2052 Level cxl-afu0.0-pe0-1
463: 75517 OPAL ICS 2053 Level cxl-afu0.0-pe0-2
468: 0 OPAL ICS 2054 Level cxl-afu0.0-pe0-3
469: 0 OPAL ICS 2055 Level cxl-afu0.0-pe0-4
470: 0 OPAL ICS 2056 Level cxl-afu0.0-pe1-1
471: 75506 OPAL ICS 2057 Level cxl-afu0.0-pe1-2
472: 0 OPAL ICS 2058 Level cxl-afu0.0-pe1-3
473: 0 OPAL ICS 2059 Level cxl-afu0.0-pe1-4
502: 1066 OPAL ICS 2050 Level cxl-afu0.0
514: 0 OPAL ICS 2048 Level cxl-card0-err
515: 0 OPAL ICS 2049 Level cxl-afu0.0-err
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
---
drivers/misc/cxl/cxl.h | 13 +++++--
drivers/misc/cxl/irq.c | 98 ++++++++++++++++++++++++++++++++++++++++++++------
2 files changed, 98 insertions(+), 13 deletions(-)
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index 64a4aa3..b5b6bda 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -336,6 +336,8 @@ struct cxl_sste {
struct cxl_afu {
irq_hw_number_t psl_hwirq;
irq_hw_number_t serr_hwirq;
+ char *err_irq_name;
+ char *psl_irq_name;
unsigned int serr_virq;
void __iomem *p1n_mmio;
void __iomem *p2n_mmio;
@@ -379,6 +381,12 @@ struct cxl_afu {
bool enabled;
};
+
+struct cxl_irq_name {
+ struct list_head list;
+ char *name;
+};
+
/*
* This is a cxl context. If the PSL is in dedicated mode, there will be one
* of these per AFU. If in AFU directed there can be lots of these.
@@ -403,6 +411,7 @@ struct cxl_context {
unsigned long *irq_bitmap; /* Accessed from IRQ context */
struct cxl_irq_ranges irqs;
+ struct list_head irq_names;
u64 fault_addr;
u64 fault_dsisr;
u64 afu_err;
@@ -444,6 +453,7 @@ struct cxl {
struct dentry *trace;
struct dentry *psl_err_chk;
struct dentry *debugfs;
+ char *irq_name;
struct bin_attribute cxl_attr;
int adapter_num;
int user_irqs;
@@ -563,9 +573,6 @@ int _cxl_afu_deactivate_mode(struct cxl_afu *afu, int mode);
int cxl_afu_deactivate_mode(struct cxl_afu *afu);
int cxl_afu_select_best_mode(struct cxl_afu *afu);
-unsigned int cxl_map_irq(struct cxl *adapter, irq_hw_number_t hwirq,
- irq_handler_t handler, void *cookie);
-void cxl_unmap_irq(unsigned int virq, void *cookie);
int cxl_register_psl_irq(struct cxl_afu *afu);
void cxl_release_psl_irq(struct cxl_afu *afu);
int cxl_register_psl_err_irq(struct cxl *adapter);
diff --git a/drivers/misc/cxl/irq.c b/drivers/misc/cxl/irq.c
index 35fcb3d..08fb4a7 100644
--- a/drivers/misc/cxl/irq.c
+++ b/drivers/misc/cxl/irq.c
@@ -255,7 +255,7 @@ static irqreturn_t cxl_irq_afu(int irq, void *data)
}
unsigned int cxl_map_irq(struct cxl *adapter, irq_hw_number_t hwirq,
- irq_handler_t handler, void *cookie)
+ irq_handler_t handler, void *cookie, const char *name)
{
unsigned int virq;
int result;
@@ -271,7 +271,7 @@ unsigned int cxl_map_irq(struct cxl *adapter, irq_hw_number_t hwirq,
pr_devel("hwirq %#lx mapped to virq %u\n", hwirq, virq);
- result = request_irq(virq, handler, 0, "cxl", cookie);
+ result = request_irq(virq, handler, 0, name, cookie);
if (result) {
dev_warn(&adapter->dev, "cxl_map_irq: request_irq failed: %i\n", result);
return 0;
@@ -290,14 +290,15 @@ static int cxl_register_one_irq(struct cxl *adapter,
irq_handler_t handler,
void *cookie,
irq_hw_number_t *dest_hwirq,
- unsigned int *dest_virq)
+ unsigned int *dest_virq,
+ const char *name)
{
int hwirq, virq;
if ((hwirq = cxl_alloc_one_irq(adapter)) < 0)
return hwirq;
- if (!(virq = cxl_map_irq(adapter, hwirq, handler, cookie)))
+ if (!(virq = cxl_map_irq(adapter, hwirq, handler, cookie, name)))
goto err;
*dest_hwirq = hwirq;
@@ -314,10 +315,19 @@ int cxl_register_psl_err_irq(struct cxl *adapter)
{
int rc;
+ adapter->irq_name = kasprintf(GFP_KERNEL,"cxl-%s-err",
+ dev_name(&adapter->dev));
+ if (!adapter->irq_name)
+ return -ENOMEM;
+
if ((rc = cxl_register_one_irq(adapter, cxl_irq_err, adapter,
&adapter->err_hwirq,
- &adapter->err_virq)))
+ &adapter->err_virq,
+ adapter->irq_name))) {
+ kfree(adapter->irq_name);
+ adapter->irq_name = NULL;
return rc;
+ }
cxl_p1_write(adapter, CXL_PSL_ErrIVTE, adapter->err_hwirq & 0xffff);
@@ -329,6 +339,7 @@ void cxl_release_psl_err_irq(struct cxl *adapter)
cxl_p1_write(adapter, CXL_PSL_ErrIVTE, 0x0000000000000000);
cxl_unmap_irq(adapter->err_virq, adapter);
cxl_release_one_irq(adapter, adapter->err_hwirq);
+ kfree(adapter->irq_name);
}
int cxl_register_serr_irq(struct cxl_afu *afu)
@@ -336,10 +347,18 @@ int cxl_register_serr_irq(struct cxl_afu *afu)
u64 serr;
int rc;
+ afu->err_irq_name = kasprintf(GFP_KERNEL,"cxl-%s-err",
+ dev_name(&afu->dev));
+ if (!afu->err_irq_name)
+ return -ENOMEM;
+
if ((rc = cxl_register_one_irq(afu->adapter, cxl_slice_irq_err, afu,
&afu->serr_hwirq,
- &afu->serr_virq)))
+ &afu->serr_virq, afu->err_irq_name))) {
+ kfree(afu->err_irq_name);
+ afu->err_irq_name = NULL;
return rc;
+ }
serr = cxl_p1n_read(afu, CXL_PSL_SERR_An);
serr = (serr & 0x00ffffffffff0000ULL) | (afu->serr_hwirq & 0xffff);
@@ -353,24 +372,50 @@ void cxl_release_serr_irq(struct cxl_afu *afu)
cxl_p1n_write(afu, CXL_PSL_SERR_An, 0x0000000000000000);
cxl_unmap_irq(afu->serr_virq, afu);
cxl_release_one_irq(afu->adapter, afu->serr_hwirq);
+ kfree(afu->err_irq_name);
}
int cxl_register_psl_irq(struct cxl_afu *afu)
{
- return cxl_register_one_irq(afu->adapter, cxl_irq_multiplexed, afu,
- &afu->psl_hwirq, &afu->psl_virq);
+ int rc;
+
+ afu->psl_irq_name = kasprintf(GFP_KERNEL,"cxl-%s",
+ dev_name(&afu->dev));
+ if (!afu->psl_irq_name)
+ return -ENOMEM;
+
+ if ((rc = cxl_register_one_irq(afu->adapter, cxl_irq_multiplexed, afu,
+ &afu->psl_hwirq, &afu->psl_virq,
+ afu->psl_irq_name))) {
+ kfree(afu->psl_irq_name);
+ afu->psl_irq_name = NULL;
+ }
+ return rc;
}
void cxl_release_psl_irq(struct cxl_afu *afu)
{
cxl_unmap_irq(afu->psl_virq, afu);
cxl_release_one_irq(afu->adapter, afu->psl_hwirq);
+ kfree(afu->psl_irq_name);
+}
+
+void afu_irq_name_free(struct cxl_context *ctx)
+{
+ struct cxl_irq_name *irq_name, *tmp;
+
+ list_for_each_entry_safe(irq_name, tmp, &ctx->irq_names, list) {
+ kfree(irq_name->name);
+ list_del(&irq_name->list);
+ kfree(irq_name);
+ }
}
int afu_register_irqs(struct cxl_context *ctx, u32 count)
{
irq_hw_number_t hwirq;
- int rc, r, i;
+ int rc, r, i, j = 1;
+ struct cxl_irq_name *irq_name;
if ((rc = cxl_alloc_irq_ranges(&ctx->irqs, ctx->afu->adapter, count)))
return rc;
@@ -384,15 +429,47 @@ int afu_register_irqs(struct cxl_context *ctx, u32 count)
sizeof(*ctx->irq_bitmap), GFP_KERNEL);
if (!ctx->irq_bitmap)
return -ENOMEM;
+
+ /*
+ * Allocate names first. If any fail, bail out before allocating
+ * actual hardware IRQs.
+ */
+ INIT_LIST_HEAD(&ctx->irq_names);
+ for (r = 1; r < CXL_IRQ_RANGES; r++) {
+ for (i = 0; i < ctx->irqs.range[r]; hwirq++, i++) {
+ irq_name = kmalloc(sizeof(struct cxl_irq_name),
+ GFP_KERNEL);
+ if (!irq_name)
+ goto out;
+ irq_name->name = kasprintf(GFP_KERNEL, "cxl-%s-pe%i-%i",
+ dev_name(&ctx->afu->dev),
+ ctx->pe, j);
+ if (!irq_name->name) {
+ kfree(irq_name);
+ goto out;
+ }
+ /* Add to tail so next look get the correct order */
+ list_add_tail(&irq_name->list, &ctx->irq_names);
+ j++;
+ }
+ }
+
+ /* We've allocated all memory now, so let's do the irq allocations */
+ irq_name = list_first_entry(&ctx->irq_names, struct cxl_irq_name, list);
for (r = 1; r < CXL_IRQ_RANGES; r++) {
hwirq = ctx->irqs.offset[r];
for (i = 0; i < ctx->irqs.range[r]; hwirq++, i++) {
cxl_map_irq(ctx->afu->adapter, hwirq,
- cxl_irq_afu, ctx);
+ cxl_irq_afu, ctx, irq_name->name);
+ irq_name = list_next_entry(irq_name, list);
}
}
return 0;
+
+out:
+ afu_irq_name_free(ctx);
+ return -ENOMEM;
}
void afu_release_irqs(struct cxl_context *ctx)
@@ -410,5 +487,6 @@ void afu_release_irqs(struct cxl_context *ctx)
}
}
+ afu_irq_name_free(ctx);
cxl_release_irq_ranges(&ctx->irqs, ctx->afu->adapter);
}
--
2.1.1
^ permalink raw reply related
* [PATCH v3] of/base: Fix PowerPC address parsing hack
From: Benjamin Herrenschmidt @ 2014-11-14 6:55 UTC (permalink / raw)
To: Grant Likely
Cc: Stephen Rothwell, Arnd Bergmann, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linuxppc-dev, Rob Herring,
Olof Johansson
In-Reply-To: <1415883227.666.6.camel@kernel.crashing.org>
We have a historical hack that treats missing ranges properties as the
equivalent of an empty one. This is needed for ancient PowerMac "bad"
device-trees, and shouldn't be enabled for any other PowerPC platform,
otherwise we get some nasty layout of devices in sysfs or even
duplication when a set of otherwise identically named devices is
created multiple times under a different parent node with no ranges
property.
This fix is needed for the PowerNV i2c busses to be exposed properly
and will fix a number of other embedded cases.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: <stable@vger.kernel.org>
---
V2: Make it less horrendously ugly
V3: use IS_ENABLED()
drivers/of/address.c | 19 ++++++++++++++++---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/of/address.c b/drivers/of/address.c
index e371825..42e416a 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
@@ -403,6 +403,21 @@ static struct of_bus *of_match_bus(struct device_node *np)
return NULL;
}
+static int of_empty_ranges_quirk(void)
+{
+ if (IS_ENABLED(CONFIG_PPC)) {
+ /* To save cycles, we cache the result */
+ static int quirk_state = -1;
+
+ if (quirk_state < 0)
+ quirk_state =
+ of_machine_is_compatible("Power Macintosh") ||
+ of_machine_is_compatible("MacRISC");
+ return quirk_state;
+ }
+ return false;
+}
+
static int of_translate_one(struct device_node *parent, struct of_bus *bus,
struct of_bus *pbus, __be32 *addr,
int na, int ns, int pna, const char *rprop)
@@ -428,12 +443,10 @@ static int of_translate_one(struct device_node *parent, struct of_bus *bus,
* This code is only enabled on powerpc. --gcl
*/
ranges = of_get_property(parent, rprop, &rlen);
-#if !defined(CONFIG_PPC)
- if (ranges == NULL) {
+ if (ranges == NULL && !of_empty_ranges_quirk()) {
pr_err("OF: no ranges; cannot translate\n");
return 1;
}
-#endif /* !defined(CONFIG_PPC) */
if (ranges == NULL || rlen == 0) {
offset = of_read_number(addr, na);
memset(addr, 0, pna * 4);
^ permalink raw reply related
* [PATCH] CXL: Return error to PSL if IRQ demultiplexing fails & print clearer warning
From: Ian Munsie @ 2014-11-14 6:37 UTC (permalink / raw)
To: mpe
Cc: cbe-oss-dev, mikey, arnd, Aneesh Kumar K.V, greg, linux-kernel,
linuxppc-dev, anton, imunsie, jk
From: Ian Munsie <imunsie@au1.ibm.com>
If an AFU has a hardware bug that causes it to acknowledge a context
terminate or remove while that context has outstanding transactions, it
is possible for the kernel to receive an interrupt for that context
after we have removed it from the context list.
The kernel will not be able to demultiplex the interrupt (or worse - if
we have already reallocated the process handle we could mis-attribute it
to the new context), and printed a big scary warning.
It did not acknowledge the interrupt, which would effectively halt
further translation fault processing on the PSL.
This patch makes the warning clearer about the likely cause of the issue
(i.e. hardware bug) to make it obvious to future AFU designers of what
needs to be fixed. It also prints out the process handle which can then
be matched up with hardware and software traces for debugging.
It also acknowledges the interrupt to the PSL with either an address
error or acknowledge, so that the PSL can continue with other
translations.
Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
---
drivers/misc/cxl/cxl.h | 2 +-
drivers/misc/cxl/irq.c | 46 +++++++++++++++++++++++++++++-----------------
drivers/misc/cxl/native.c | 14 +++++++-------
3 files changed, 37 insertions(+), 25 deletions(-)
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index 3a8dd05..fe07b6f 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -620,7 +620,7 @@ int cxl_attach_process(struct cxl_context *ctx, bool kernel, u64 wed,
u64 amr);
int cxl_detach_process(struct cxl_context *ctx);
-int cxl_get_irq(struct cxl_context *ctx, struct cxl_irq_info *info);
+int cxl_get_irq(struct cxl_afu *afu, struct cxl_irq_info *info);
int cxl_ack_irq(struct cxl_context *ctx, u64 tfc, u64 psl_reset_mask);
int cxl_check_error(struct cxl_afu *afu);
diff --git a/drivers/misc/cxl/irq.c b/drivers/misc/cxl/irq.c
index c239272..2858151 100644
--- a/drivers/misc/cxl/irq.c
+++ b/drivers/misc/cxl/irq.c
@@ -92,20 +92,13 @@ static irqreturn_t schedule_cxl_fault(struct cxl_context *ctx, u64 dsisr, u64 da
return IRQ_HANDLED;
}
-static irqreturn_t cxl_irq(int irq, void *data)
+static irqreturn_t cxl_irq(int irq, void *data, struct cxl_irq_info *irq_info)
{
struct cxl_context *ctx = data;
- struct cxl_irq_info irq_info;
u64 dsisr, dar;
- int result;
- if ((result = cxl_get_irq(ctx, &irq_info))) {
- WARN(1, "Unable to get CXL IRQ Info: %i\n", result);
- return IRQ_HANDLED;
- }
-
- dsisr = irq_info.dsisr;
- dar = irq_info.dar;
+ dsisr = irq_info->dsisr;
+ dar = irq_info->dar;
pr_devel("CXL interrupt %i for afu pe: %i DSISR: %#llx DAR: %#llx\n", irq, ctx->pe, dsisr, dar);
@@ -149,9 +142,9 @@ static irqreturn_t cxl_irq(int irq, void *data)
if (dsisr & CXL_PSL_DSISR_An_UR)
pr_devel("CXL interrupt: AURP PTE not found\n");
if (dsisr & CXL_PSL_DSISR_An_PE)
- return handle_psl_slice_error(ctx, dsisr, irq_info.errstat);
+ return handle_psl_slice_error(ctx, dsisr, irq_info->errstat);
if (dsisr & CXL_PSL_DSISR_An_AE) {
- pr_devel("CXL interrupt: AFU Error %.llx\n", irq_info.afu_err);
+ pr_devel("CXL interrupt: AFU Error %.llx\n", irq_info->afu_err);
if (ctx->pending_afu_err) {
/*
@@ -163,10 +156,10 @@ static irqreturn_t cxl_irq(int irq, void *data)
*/
dev_err_ratelimited(&ctx->afu->dev, "CXL AFU Error "
"undelivered to pe %i: %.llx\n",
- ctx->pe, irq_info.afu_err);
+ ctx->pe, irq_info->afu_err);
} else {
spin_lock(&ctx->lock);
- ctx->afu_err = irq_info.afu_err;
+ ctx->afu_err = irq_info->afu_err;
ctx->pending_afu_err = 1;
spin_unlock(&ctx->lock);
@@ -182,24 +175,43 @@ static irqreturn_t cxl_irq(int irq, void *data)
return IRQ_HANDLED;
}
+static irqreturn_t fail_psl_irq(struct cxl_afu *afu, struct cxl_irq_info *irq_info)
+{
+ if (irq_info->dsisr & CXL_PSL_DSISR_TRANS)
+ cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_AE);
+ else
+ cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_A);
+
+ return IRQ_HANDLED;
+}
+
static irqreturn_t cxl_irq_multiplexed(int irq, void *data)
{
struct cxl_afu *afu = data;
struct cxl_context *ctx;
+ struct cxl_irq_info irq_info;
int ph = cxl_p2n_read(afu, CXL_PSL_PEHandle_An) & 0xffff;
int ret;
+ if ((ret = cxl_get_irq(afu, &irq_info))) {
+ WARN(1, "Unable to get CXL IRQ Info: %i\n", ret);
+ return fail_psl_irq(afu, &irq_info);
+ }
+
rcu_read_lock();
ctx = idr_find(&afu->contexts_idr, ph);
if (ctx) {
- ret = cxl_irq(irq, ctx);
+ ret = cxl_irq(irq, ctx, &irq_info);
rcu_read_unlock();
return ret;
}
rcu_read_unlock();
- WARN(1, "Unable to demultiplex CXL PSL IRQ\n");
- return IRQ_HANDLED;
+ WARN(1, "Unable to demultiplex CXL PSL IRQ for PE %i DSISR %.16llx DAR"
+ " %.16llx\n(Possible AFU HW issue - was a term/remove acked"
+ " with outstanding transactions?)\n", ph, irq_info.dsisr,
+ irq_info.dar);
+ return fail_psl_irq(afu, &irq_info);
}
static irqreturn_t cxl_irq_afu(int irq, void *data)
diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index d47532e..9a5a442 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -637,18 +637,18 @@ int cxl_detach_process(struct cxl_context *ctx)
return detach_process_native_afu_directed(ctx);
}
-int cxl_get_irq(struct cxl_context *ctx, struct cxl_irq_info *info)
+int cxl_get_irq(struct cxl_afu *afu, struct cxl_irq_info *info)
{
u64 pidtid;
- info->dsisr = cxl_p2n_read(ctx->afu, CXL_PSL_DSISR_An);
- info->dar = cxl_p2n_read(ctx->afu, CXL_PSL_DAR_An);
- info->dsr = cxl_p2n_read(ctx->afu, CXL_PSL_DSR_An);
- pidtid = cxl_p2n_read(ctx->afu, CXL_PSL_PID_TID_An);
+ info->dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An);
+ info->dar = cxl_p2n_read(afu, CXL_PSL_DAR_An);
+ info->dsr = cxl_p2n_read(afu, CXL_PSL_DSR_An);
+ pidtid = cxl_p2n_read(afu, CXL_PSL_PID_TID_An);
info->pid = pidtid >> 32;
info->tid = pidtid & 0xffffffff;
- info->afu_err = cxl_p2n_read(ctx->afu, CXL_AFU_ERR_An);
- info->errstat = cxl_p2n_read(ctx->afu, CXL_PSL_ErrStat_An);
+ info->afu_err = cxl_p2n_read(afu, CXL_AFU_ERR_An);
+ info->errstat = cxl_p2n_read(afu, CXL_PSL_ErrStat_An);
return 0;
}
--
2.1.1
^ permalink raw reply related
* Re: powerpc: Fix Text randomization
From: Michael Ellerman @ 2014-11-14 6:20 UTC (permalink / raw)
To: Vineeth Vijayan; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <CAOpNGcsQX1d4=MpHKKKnBotBb11dq55_kQp4PG8OA++U6peqKg@mail.gmail.com>
On Fri, 2014-11-14 at 11:03 +0530, Vineeth Vijayan wrote:
> ping !
>
> any update on this ? As i understand, only powerpc and s390 uses the
> randomize_et_dyn call; for all other architecture this is an obsolete
> function call.
I asked:
> >> I'm not clear on what has changed to break this?
And you didn't tell me.
> this call for another patch where randomize_et_dyn is removed.
Patches welcome :)
cheers
^ permalink raw reply
* [PATCH] powerpc/fsl_msi: mark the msi cascade handler IRQF_NO_THREAD
From: Kevin Hao @ 2014-11-14 5:51 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Scott Wood, Laurentiu Tudor
The commit 543c043cbae7 ("powerpc/fsl_msi: change the irq handler from
chained to normal") changes the msi cascade handler from chained to
normal. Since cascade handler must run in hard interrupt context, this
will cause kernel panic if we force threading of all the interrupt
handler via kernel command parameter 'threadirqs'. So mark the irq
handler IRQF_NO_THREAD explicitly.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
---
arch/powerpc/sysdev/fsl_msi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index a5a6c24577fe..5997c5378c84 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -360,7 +360,7 @@ static int fsl_msi_setup_hwirq(struct fsl_msi *msi, struct platform_device *dev,
cascade_data->virq = virt_msir;
msi->cascade_array[irq_index] = cascade_data;
- ret = request_irq(virt_msir, fsl_msi_cascade, 0,
+ ret = request_irq(virt_msir, fsl_msi_cascade, IRQF_NO_THREAD,
"fsl-msi-cascade", cascade_data);
if (ret) {
dev_err(&dev->dev, "failed to request_irq(%d), ret = %d\n",
--
1.9.3
^ permalink raw reply related
* Re: powerpc: Fix Text randomization
From: Vineeth Vijayan @ 2014-11-14 5:33 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <CAOpNGcsgX0wVOgMN77+RuKVsb_iHQ7XQk8U_05-up__wC6zuZQ@mail.gmail.com>
ping !
any update on this ? As i understand, only powerpc and s390 uses the
randomize_et_dyn call; for all other architecture this is an obsolete
function call.
this call for another patch where randomize_et_dyn is removed.
On Wed, Oct 15, 2014 at 12:08 PM, Vineeth Vijayan <vvijayan@mvista.com> wro=
te:
> On Wed, Oct 15, 2014 at 7:38 AM, Michael Ellerman <mpe@ellerman.id.au> wr=
ote:
>> On Fri, 2014-10-10 at 05:45:26 UTC, Vineeth Vijayan wrote:
>>> Right now there is no way to disable TEXT randomization on a PPC32
>>> machine. text randomization happens even in the case of "echo 0 >
>>> /proc/sys/kernel/randomize_va_space"
>>
>> Yeah it seems to happen on ppc64 too.
>>
>>> This happens due to the incorrect definition of ELF_ET_DYN_BASE at
>>> arch/powerpc/include/asm/elf.h
>>
>> What is incorrect about it? We are not the only arch that does that.
>>
>
> I think we are one of the arch which does it.
> The same has been tested on x86 and arm, where ELF_ET_DYN_BASE doesn=E2=
=80=99t
> use randomize_et_dyn call, and it works properly as per the user-space
> definition of randomization;
>
> (i.e when at "echo 0 > /proc/sys/kernel/randomize_va_space", TEXT
> randomization should not happen.)
>
>> I'm not clear on what has changed to break this?
>>
>> cheers
^ permalink raw reply
* Re: powerpc: Fix Text randomization
From: Vineeth Vijayan @ 2014-11-14 5:31 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <CAOpNGcsgX0wVOgMN77+RuKVsb_iHQ7XQk8U_05-up__wC6zuZQ@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 1332 bytes --]
ping !
any update on this ? As i understand, only powerpc and s390 uses the
randomize_et_dyn call; for all other architecture this is an obsolete
function call.
this call for another patch where randomize_et_dyn is removed.
Vineeth
On Wed, Oct 15, 2014 at 12:08 PM, Vineeth Vijayan <vvijayan@mvista.com>
wrote:
> On Wed, Oct 15, 2014 at 7:38 AM, Michael Ellerman <mpe@ellerman.id.au>
> wrote:
> > On Fri, 2014-10-10 at 05:45:26 UTC, Vineeth Vijayan wrote:
> >> Right now there is no way to disable TEXT randomization on a PPC32
> >> machine. text randomization happens even in the case of "echo 0 >
> >> /proc/sys/kernel/randomize_va_space"
> >
> > Yeah it seems to happen on ppc64 too.
> >
> >> This happens due to the incorrect definition of ELF_ET_DYN_BASE at
> >> arch/powerpc/include/asm/elf.h
> >
> > What is incorrect about it? We are not the only arch that does that.
> >
>
> I think we are one of the arch which does it.
> The same has been tested on x86 and arm, where ELF_ET_DYN_BASE doesn’t
> use randomize_et_dyn call, and it works properly as per the user-space
> definition of randomization;
>
> (i.e when at "echo 0 > /proc/sys/kernel/randomize_va_space", TEXT
> randomization should not happen.)
>
> > I'm not clear on what has changed to break this?
> >
> > cheers
>
[-- Attachment #2: Type: text/html, Size: 1922 bytes --]
^ permalink raw reply
* Re: [PATCH] i2c: Driver to expose PowerNV platform i2c busses
From: Benjamin Herrenschmidt @ 2014-11-14 5:17 UTC (permalink / raw)
To: Wolfram Sang; +Cc: Neelesh Gupta, linuxppc-dev, linux-i2c
In-Reply-To: <1415912020.666.17.camel@kernel.crashing.org>
On Fri, 2014-11-14 at 07:53 +1100, Benjamin Herrenschmidt wrote:
> > > > > + adapter->dev.parent = &pdev->dev;
> > > > > + adapter->dev.of_node = of_node_get(pdev->dev.of_node);
> > > > > + pname = of_get_property(pdev->dev.of_node, "port-name", NULL);
> > > >
> > > > I have never seen this binding before, it looks fishy. Where is it documented?
> > >
> > > We made it up, like pretty every SoC vendor out there. What's fishy
> > > about it ? It's a very good way to get fixed i2c port names on the
> > > system, the firmware defines them.
> >
> > But the SoC vendors prefix it with their company name and add
> > documentation for the binding.
>
> Why do we need to prefix arbitrary props for a very specific device ?
> When adding things to an existing more/less generic device it makes some
> sense but here I don't see much point. I can whip up a "binding"
> document for this adapter and make "port-name" be part of it if you
> want :) In fact a better name for the property might be "bus-id"...
Note: We've slipped in a last minute update to the FW which isn't
deployed yet to turn that into ibm,port-name and change the compatible
match to the more generic "ibm,opal-i2c" since the underlying HW
implementation doesn't have to be P8 (and in fact we'll soon also expose
the i2c bus off the Centaur memory buffer chips that goes to the DIMMs).
This is the only parts of the "binding" linux cares about. The actual
DT representation for that device is a bit more complete, there's a
parent node for the i2c master engine and a node per port, but clients
like Linux only care about the ports. The clock frequencies are in
standard properties but here too, only the FW use them for its own
internal use, this is an abstract FW API (server world ....)
Cheers,
Ben.
^ permalink raw reply
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