* [PATCH V6 7/9] selftests, powerpc: Add test case for TM related ptrace interface
From: Anshuman Khandual @ 2014-12-02 7:56 UTC (permalink / raw)
To: linux-kernel, linuxppc-dev
Cc: shuahkh, mikey, james.hogan, avagin, Paul.Clothier, peterz,
palves, oleg, davem, dhowells, kirjanov, davej, akpm, sukadev,
tglx, sam.bobroff
In-Reply-To: <1417507013-11948-1-git-send-email-khandual@linux.vnet.ibm.com>
This patch adds one more test case called 'tm-ptrace' targeting TM
related ptrace interface. This test creates one child process to
run some basic TM transactions and the parent process attaches the
child to do some ptrace probing using the recently added regset
interfaces. The parent process then compares the received values
against the expected values to verify whether it has passed the
given test or not.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
tools/testing/selftests/powerpc/tm/Makefile | 2 +-
tools/testing/selftests/powerpc/tm/tm-ptrace.c | 542 +++++++++++++++++++++++++
2 files changed, 543 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/tm/tm-ptrace.c
diff --git a/tools/testing/selftests/powerpc/tm/Makefile b/tools/testing/selftests/powerpc/tm/Makefile
index 2cede23..71d400a 100644
--- a/tools/testing/selftests/powerpc/tm/Makefile
+++ b/tools/testing/selftests/powerpc/tm/Makefile
@@ -1,4 +1,4 @@
-PROGS := tm-resched-dscr
+PROGS := tm-resched-dscr tm-ptrace
all: $(PROGS)
diff --git a/tools/testing/selftests/powerpc/tm/tm-ptrace.c b/tools/testing/selftests/powerpc/tm/tm-ptrace.c
new file mode 100644
index 0000000..7a6c7d3
--- /dev/null
+++ b/tools/testing/selftests/powerpc/tm/tm-ptrace.c
@@ -0,0 +1,542 @@
+/*
+ * Test program for TM ptrace interface
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * Copyright 2014 IBM Corporation
+ *
+ * Author: Anshuman Khandual <khandual@linux.vnet.ibm.com>
+ */
+#include <inttypes.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <string.h>
+#include <malloc.h>
+#include <errno.h>
+#include <sys/ptrace.h>
+#include <sys/uio.h>
+#include <sys/types.h>
+#include <sys/wait.h>
+#include <sys/signal.h>
+#include <sys/user.h>
+#include <linux/elf.h>
+#include <linux/types.h>
+
+#include "utils.h"
+
+#define TEST_PASS 0
+#define TEST_FAIL 1
+
+#define MAX_STR_LENGTH 100
+
+/* ELF core notes */
+#define NT_PPC_TM_SPR 0x103 /* PowerPC TM special registers */
+#define NT_PPC_TM_CGPR 0x104 /* PowerpC TM checkpointed GPR */
+#define NT_PPC_TM_CFPR 0x105 /* PowerPC TM checkpointed FPR */
+#define NT_PPC_TM_CVMX 0x106 /* PowerPC TM checkpointed VMX */
+#define NT_PPC_MISC 0x107 /* PowerPC miscellaneous registers */
+
+/* TM instructions */
+#define TBEGIN ".long 0x7C00051D ;"
+#define TEND ".long 0x7C00055D ;"
+
+/* SPR number */
+#define SPRN_DSCR 3
+#define SPRN_TAR 815
+#define SPRN_PPR 896
+
+#define C_DSCR 10 /* TM checkpointed DSCR */
+#define C_TAR 20 /* TM checkpointed TAR */
+#define C_PPR 0x8000000000000 /* TM checkpointed PPR */
+
+#define DSCR 50 /* TM running DSCR */
+#define TAR 60 /* TM running TAR */
+#define PPR 0x4000000000000 /* TM running PPR */
+
+/* Values for GPR-FPR[0..31] */
+#define VAL0 0
+#define VAL1 1
+#define VAL2 2
+#define VAL3 3
+#define VAL4 4
+#define VAL5 5
+#define VAL6 6
+#define VAL7 7
+#define VAL8 8
+#define VAL9 9
+#define VAL10 10
+#define VAL11 11
+#define VAL12 12
+#define VAL13 13
+#define VAL14 14
+#define VAL15 15
+#define VAL_MAX 16
+
+/* Standard data types */
+typedef unsigned int u32;
+typedef __vector128 vector128;
+
+/* NT_PPC_TM_SPR buffer layout */
+struct tm_spr_regs {
+ u64 tm_tfhar;
+ u64 tm_texasr;
+ u64 tm_tfiar;
+ u64 tm_orig_msr;
+ u64 tm_tar;
+ u64 tm_ppr;
+ u64 tm_dscr;
+};
+
+/*
+ * NT_PPC_TM_CGPR buffer layout
+ *
+ * Same as that of struct pt_regs
+ */
+
+/* NT_PPC_TM_CFPR buffer layout */
+struct tm_cfpr {
+ u64 fpr[32];
+ u64 fpscr;
+};
+
+/* NT_PPC_TM_CVMX buffer layout */
+struct tm_cvmx {
+ vector128 vr[32] __attribute__((aligned(16)));
+ vector128 vscr __attribute__((aligned(16)));
+ u32 vrsave;
+};
+
+/* NT_PPC_MISC buffer layout */
+struct misc_regs {
+ u64 dscr;
+ u64 ppr;
+ u64 tar;
+};
+
+/*
+ * do_tm_transaction
+ *
+ * This functions sets the values for TAR, DSCR, PPR, GPR[0..31],
+ * FPR[0..31] registers before starting the trasanction which will
+ * enable the kernel to save them as checkpointed values. Then it
+ * starts the transaction where it loads a different set of values
+ * into the same registers again thus enabling the kernel to save
+ * them off as running values for this transaction. Then the function
+ * gets stuck forcing the process to loop at one single instruction.
+ * The transaction never finishes, thus giving the parent process
+ * the opportunity to trace the running and checkpointed values of
+ * various registers.
+ */
+void do_tm_transaction(void)
+{
+ asm __volatile__(
+ /* TM checkpointed values */
+
+ /* SPR */
+ "li 0, %[c_tar];" /* TAR */
+ "mtspr %[sprn_tar], 0;"
+ "li 0, %[c_dscr];" /* DSCR */
+ "mtspr %[sprn_dscr], 0;"
+ "or 1,1,1;" /* PPR (0x8000000000000) */
+
+ /* GPR[0..31] */
+ "li 0, %[val0];" /* GPR[0] */
+ "li 1, %[val1];" /* GPR[1] */
+ "li 2, %[val2];" /* GPR[2] */
+ "li 3, %[val3];" /* GPR[3] */
+ "li 4, %[val4];" /* GPR[4] */
+ "li 5, %[val5];" /* GPR[5] */
+ "li 6, %[val6];" /* GPR[6] */
+ "li 7, %[val7];" /* GPR[7] */
+ "li 8, %[val8];" /* GPR[8] */
+ "li 9, %[val9];" /* GPR[9] */
+ "li 10, %[val10];" /* GPR[10] */
+ "li 11, %[val11];" /* GPR[11] */
+ "li 12, %[val12];" /* GPR[12] */
+ "li 13, %[val13];" /* GPR[13] */
+ "li 14, %[val14];" /* GPR[14] */
+ "li 15, %[val15];" /* GPR[15] */
+ "li 16, %[val0];" /* GPR[16] */
+ "li 17, %[val1];" /* GPR[17] */
+ "li 18, %[val2];" /* GPR[18] */
+ "li 19, %[val3];" /* GPR[19] */
+ "li 20, %[val4];" /* GPR[20] */
+ "li 21, %[val5];" /* GPR[21] */
+ "li 22, %[val6];" /* GPR[22] */
+ "li 23, %[val7];" /* GPR[23] */
+ "li 24, %[val8];" /* GPR[24] */
+ "li 25, %[val9];" /* GPR[25] */
+ "li 26, %[val10];" /* GPR[26] */
+ "li 27, %[val11];" /* GPR[27] */
+ "li 28, %[val12];" /* GPR[28] */
+ "li 29, %[val13];" /* GPR[29] */
+ "li 30, %[val14];" /* GPR[30] */
+ "li 31, %[val15];" /* GPR[31] */
+
+ /* FPR[0..31] */
+ ".long 0x7C000166;" /* GPR[0] --> FPR[0] */
+ ".long 0x7C210166;" /* GPR[1] --> FPR[1] */
+ ".long 0x7C420166;" /* GPR[0] --> FPR[2] */
+ ".long 0x7C630166;" /* GPR[3] --> FPR[3] */
+ ".long 0x7C840166;" /* GPR[4] --> FPR[4] */
+ ".long 0x7CA50166;" /* GPR[5] --> FPR[5] */
+ ".long 0x7CC60166;" /* GPR[6] --> FPR[6] */
+ ".long 0x7CE70166;" /* GPR[7] --> FPR[7] */
+ ".long 0x7D080166;" /* GPR[8] --> FPR[8] */
+ ".long 0x7D290166;" /* GPR[9] --> FPR[9] */
+ ".long 0x7d4a0166;" /* GPR[10] --> FPR[10] */
+ ".long 0x7d6b0166;" /* GPR[11] --> FPR[11] */
+ ".long 0x7d8c0166;" /* GPR[12] --> FPR[12] */
+ ".long 0x7dad0166;" /* GPR[13] --> FPR[13] */
+ ".long 0x7dce0166;" /* GPR[14] --> FPR[14] */
+ ".long 0x7def0166;" /* GPR[15] --> FPR[15] */
+ ".long 0x7e100166;" /* GPR[16] --> FPR[16] */
+ ".long 0x7e310166;" /* GPR[17] --> FPR[17] */
+ ".long 0x7e520166;" /* GPR[18] --> FPR[18] */
+ ".long 0x7e730166;" /* GPR[19] --> FPR[19] */
+ ".long 0x7e940166;" /* GPR[20] --> FPR[20] */
+ ".long 0x7eb50166;" /* GPR[21] --> FPR[21] */
+ ".long 0x7ed60166;" /* GPR[22] --> FPR[22] */
+ ".long 0x7ef70166;" /* GPR[23] --> FPR[23] */
+ ".long 0x7f180166;" /* GPR[24] --> FPR[24] */
+ ".long 0x7f390166;" /* GPR[25] --> FPR[25] */
+ ".long 0x7f5a0166;" /* GPR[26] --> FPR[26] */
+ ".long 0x7f7b0166;" /* GPR[27] --> FPR[27] */
+ ".long 0x7f9c0166;" /* GPR[28] --> FPR[28] */
+ ".long 0x7fbd0166;" /* GPR[29] --> FPR[29] */
+ ".long 0x7fde0166;" /* GPR[30] --> FPR[30] */
+ ".long 0x7fff0166;" /* GPR[31] --> FPR[31] */
+
+ /* TM running values */
+
+ "1: ;"
+ TBEGIN
+ "beq 2f;"
+
+ /* SPR */
+ "li 0, %[tar];" /* TAR */
+ "mtspr %[sprn_tar], 0;"
+ "li 0, %[dscr];" /* DSCR */
+ "mtspr %[sprn_dscr], 0;"
+ "or 31,31,31;" /* PPR (0x4000000000000) */
+
+ /* GPR[0..31] */
+ "li 0, %[val15];" /* GPR[0] */
+ "li 1, %[val14];" /* GPR[1] */
+ "li 2, %[val13];" /* GPR[2] */
+ "li 3, %[val12];" /* GPR[3] */
+ "li 4, %[val11];" /* GPR[4] */
+ "li 5, %[val10];" /* GPR[5] */
+ "li 6, %[val9];" /* GPR[6] */
+ "li 7, %[val8];" /* GPR[7] */
+ "li 8, %[val7];" /* GPR[8] */
+ "li 9, %[val6];" /* GPR[9] */
+ "li 10, %[val5];" /* GPR[10] */
+ "li 11, %[val4];" /* GPR[11] */
+ "li 12, %[val3];" /* GPR[12] */
+ "li 13, %[val2];" /* GPR[13] */
+ "li 14, %[val1];" /* GPR[14] */
+ "li 15, %[val0];" /* GPR[15] */
+ "li 16, %[val15];" /* GPR[16] */
+ "li 17, %[val14];" /* GPR[17] */
+ "li 18, %[val13];" /* GPR[18] */
+ "li 19, %[val12];" /* GPR[19] */
+ "li 20, %[val11];" /* GPR[20] */
+ "li 21, %[val10];" /* GPR[21] */
+ "li 22, %[val9];" /* GPR[22] */
+ "li 23, %[val8];" /* GPR[23] */
+ "li 24, %[val7];" /* GPR[24] */
+ "li 25, %[val6];" /* GPR[25] */
+ "li 26, %[val5];" /* GPR[26] */
+ "li 27, %[val4];" /* GPR[27] */
+ "li 28, %[val3];" /* GPR[28] */
+ "li 29, %[val2];" /* GPR[29] */
+ "li 30, %[val1];" /* GPR[30] */
+ "li 31, %[val0];" /* GPR[31] */
+
+ /* FPR[0..31] */
+ ".long 0x7C000166;" /* GPR[0] --> FPR[0] */
+ ".long 0x7C210166;" /* GPR[1] --> FPR[1] */
+ ".long 0x7C420166;" /* GPR[2] --> FPR[2] */
+ ".long 0x7C630166;" /* GPR[3] --> FPR[3] */
+ ".long 0x7C840166;" /* GPR[4] --> FPR[4] */
+ ".long 0x7CA50166;" /* GPR[5] --> FPR[5] */
+ ".long 0x7CC60166;" /* GPR[6] --> FPR[6] */
+ ".long 0x7CE70166;" /* GPR[7] --> FPR[7] */
+ ".long 0x7D080166;" /* GPR[8] --> FPR[8] */
+ ".long 0x7D290166;" /* GPR[9] --> FPR[9] */
+ ".long 0x7d4a0166;" /* GPR[10] --> FPR[10] */
+ ".long 0x7d6b0166;" /* GPR[11] --> FPR[11] */
+ ".long 0x7d8c0166;" /* GPR[12] --> FPR[12] */
+ ".long 0x7dad0166;" /* GPR[13] --> FPR[13] */
+ ".long 0x7dce0166;" /* GPR[14] --> FPR[14] */
+ ".long 0x7def0166;" /* GPR[15] --> FPR[15] */
+ ".long 0x7e100166;" /* GPR[16] --> FPR[16] */
+ ".long 0x7e310166;" /* GPR[17] --> FPR[17] */
+ ".long 0x7e520166;" /* GPR[18] --> FPR[18] */
+ ".long 0x7e730166;" /* GPR[19] --> FPR[19] */
+ ".long 0x7e940166;" /* GPR[20] --> FPR[20] */
+ ".long 0x7eb50166;" /* GPR[21] --> FPR[21] */
+ ".long 0x7ed60166;" /* GPR[22] --> FPR[22] */
+ ".long 0x7ef70166;" /* GPR[23] --> FPR[23] */
+ ".long 0x7f180166;" /* GPR[24] --> FPR[24] */
+ ".long 0x7f390166;" /* GPR[25] --> FPR[25] */
+ ".long 0x7f5a0166;" /* GPR[26] --> FPR[26] */
+ ".long 0x7f7b0166;" /* GPR[27] --> FPR[27] */
+ ".long 0x7f9c0166;" /* GPR[28] --> FPR[28] */
+ ".long 0x7fbd0166;" /* GPR[29] --> FPR[29] */
+ ".long 0x7fde0166;" /* GPR[30] --> FPR[30] */
+ ".long 0x7fff0166;" /* GPR[31] --> FPR[31] */
+
+ "b .;" /* Get stuck here */
+ TEND
+
+ /* Transaction abort handler */
+ "2: ;"
+ "b 1b;" /* Start from TBEGIN */
+
+ :: [sprn_dscr]"i"(SPRN_DSCR), [sprn_tar]"i"(SPRN_TAR),
+ [sprn_ppr]"i"(SPRN_PPR), [val0]"i"(VAL0),
+ [val1]"i"(VAL1), [val2]"i"(VAL2), [val3]"i"(VAL3),
+ [val4]"i"(VAL4), [val5]"i"(VAL5), [val6]"i"(VAL6),
+ [val7]"i"(VAL7), [val8]"i"(VAL8), [val9]"i"(VAL9),
+ [val10]"i"(VAL10), [val11]"i"(VAL11), [val12]"i"(VAL12),
+ [val13]"i"(VAL13), [val14]"i"(VAL14), [val15]"i"(VAL15),
+ [c_tar]"i"(C_TAR), [c_dscr]"i"(C_DSCR), [tar]"i"(TAR),
+ [dscr]"i"(DSCR), [ppr]"i"(PPR), [c_ppr]"i"(C_PPR)
+ : "memory", "r7");
+}
+
+void test_result(const u64 variable, const u64 value, const char *str)
+{
+ if (variable == value)
+ printf("%s: %llx (PASSED)\n", str, variable);
+ else
+ printf("%s: %llx (FAILED)\n", str, variable);
+}
+
+int trace_tm_transaction(pid_t child)
+{
+ struct tm_spr_regs *tmspr;
+ struct pt_regs *cregs, *regs;
+ struct tm_cfpr *cfpr, *fpr;
+ struct misc_regs *mregs;
+ struct iovec iov;
+ char str[MAX_STR_LENGTH];
+ int ret, i, j;
+
+ regs = (struct pt_regs *) malloc(sizeof(struct pt_regs));
+ fpr = (struct tm_cfpr *) malloc(sizeof(struct tm_cfpr));
+
+ /* Wait till the tracee hits "b ." instruction */
+ sleep(3);
+
+ ret = ptrace(PTRACE_ATTACH, child, NULL, NULL);
+ if (ret) {
+ printf("ptrace(PTRACE_ATTACH) Failed: %s\n", strerror(errno));
+ return TEST_FAIL;
+ }
+
+ ret = waitpid(child, NULL, 0);
+ if (ret != child) {
+ printf("PID mismatch: %s\n", strerror(errno));
+ return TEST_FAIL;
+ }
+
+ /* TM specific SPR */
+ printf("Testing TM specific SPR:\n");
+ iov.iov_base = (struct tm_spr_regs *)
+ malloc(sizeof(struct tm_spr_regs));
+ iov.iov_len = sizeof(struct tm_spr_regs);
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_SPR, &iov);
+ if (ret) {
+ printf("ptrace(NT_PPC_TM_SPR) Failed: %s\n", strerror(errno));
+ return TEST_FAIL;
+ }
+
+ if (iov.iov_len != sizeof(struct tm_spr_regs)) {
+ printf("ptrace(NT_PPC_TM_SPR): Returned wrong length\n");
+ return TEST_FAIL;
+ }
+
+ tmspr = iov.iov_base;
+
+ printf("TFHAR: %llx\n", tmspr->tm_tfhar);
+ printf("TEXASR: %llx\n", tmspr->tm_texasr);
+ printf("TFIAR: %llx\n", tmspr->tm_tfiar);
+ printf("TM ORIG_MSR: %llx\n", tmspr->tm_orig_msr);
+
+ test_result(tmspr->tm_dscr, C_DSCR, "TM CH DSCR");
+ test_result(tmspr->tm_tar, C_TAR, "TM CH TAR");
+ test_result(tmspr->tm_ppr, C_PPR, "TM CH PPR");
+
+ /* TM checkpointed GPR */
+ printf("Testing TM checkpointed GPR:\n");
+ iov.iov_base = (struct pt_regs *) malloc(sizeof(struct pt_regs));
+ iov.iov_len = sizeof(struct pt_regs);
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_CGPR, &iov);
+ if (ret) {
+ printf("ptrace(NT_PPC_TM_CGPR) Failed: %s\n", strerror(errno));
+ return TEST_FAIL;
+ }
+
+ if (iov.iov_len != sizeof(struct pt_regs)) {
+ printf("ptrace(NT_PPC_TM_CGPR): Returned wrong length\n");
+ return TEST_FAIL;
+ }
+
+ cregs = iov.iov_base;
+
+ printf("TM CH NIP: %lx\n", cregs->nip);
+ printf("TM CH LINK: %lx\n", cregs->link);
+ printf("TM CH CCR: %lx\n", cregs->ccr);
+
+ for (i = 0; i < VAL_MAX; i++) {
+ sprintf(str, "TM CH GPR[%d]", i);
+ test_result(cregs->gpr[i], i, str);
+ }
+
+ for (j = 0; i < VAL_MAX * 2; j++, i++) {
+ sprintf(str, "TM CH GPR[%d]", i);
+ test_result(cregs->gpr[i], j, str);
+ }
+
+ /* TM checkpointed FPR */
+ printf("Testing TM checkpointed FPR:\n");
+ iov.iov_base = (struct tm_cfpr *) malloc(sizeof(struct tm_cfpr));
+ iov.iov_len = sizeof(struct tm_cfpr);
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_CFPR, &iov);
+ if (ret) {
+ printf("ptrace(NT_PPC_TM_CFPR) Failed: %s\n", strerror(errno));
+ return TEST_FAIL;
+ }
+
+ if (iov.iov_len != sizeof(struct tm_cfpr)) {
+ printf("ptrace(NT_PPC_TM_CFPR): Returned wrong length\n");
+ return TEST_FAIL;
+ }
+
+ cfpr = iov.iov_base;
+ printf("TM CH FPSCR: %llx\n", cfpr->fpscr);
+
+ for (i = 0; i < VAL_MAX; i++) {
+ sprintf(str, "TM CH FPR[%d]", i);
+ test_result(cfpr->fpr[i], i, str);
+ }
+
+ for (j = 0; i < VAL_MAX * 2; j++, i++) {
+ sprintf(str, "TM CH FPR[%d]", i);
+ test_result(cfpr->fpr[i], j, str);
+ }
+
+ /* TM running GPR */
+ printf("Testing TM running GPR:\n");
+ ret = ptrace(PTRACE_GETREGS, child, NULL, regs);
+ if (ret) {
+ printf("ptrace(PTRACE_GETREGS) Failed: %s\n", strerror(errno));
+ return TEST_FAIL;
+ }
+
+ printf("TM RN NIP: %lx\n", regs->nip);
+ printf("TM RN LINK: %lx\n", regs->link);
+ printf("TM RN CCR: %lx\n", regs->ccr);
+
+ for (i = 0, j = VAL_MAX - 1; i < VAL_MAX; i++, j--) {
+ sprintf(str, "TM RN GPR[%d]", i);
+ test_result(regs->gpr[i], j, str);
+ }
+
+ for (j = VAL_MAX - 1 ; i < VAL_MAX * 2; i++, j--) {
+ sprintf(str, "TM RN GPR[%d]", i);
+ test_result(regs->gpr[i], j, str);
+ }
+
+ /* TM running FPR */
+ printf("Testing TM running FPR:\n");
+ ret = ptrace(PTRACE_GETFPREGS, child, NULL, fpr);
+ if (ret) {
+ printf("ptrace(PTRACE_GETFPREGS) Failed: %s\n",
+ strerror(errno));
+ return TEST_FAIL;
+ }
+
+ printf("TM RN FPSCR: %llx\n", fpr->fpscr);
+
+ for (i = 0, j = VAL_MAX - 1; i < VAL_MAX; i++, j--) {
+ sprintf(str, "TM RN FPR[%d]", i);
+ test_result(fpr->fpr[i], j, str);
+ }
+
+ for (j = VAL_MAX - 1; i < VAL_MAX * 2; i++, j--) {
+ sprintf(str, "TM RN FPR[%d]", i);
+ test_result(fpr->fpr[i], j, str);
+ }
+
+ /* TM running MISC debug registers */
+ printf("Testing TM running MISC debug registers:\n");
+ iov.iov_base = (struct misc_regs *) malloc(sizeof(struct misc_regs));
+ iov.iov_len = sizeof(struct misc_regs);
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_MISC, &iov);
+ if (ret) {
+ printf("ptrace(NT_PPC_MISC): Failed: %s\n", strerror(errno));
+ return TEST_FAIL;
+ }
+
+ if (iov.iov_len != sizeof(struct misc_regs)) {
+ printf("ptrace(NT_PPC_TM_MISC): Returned wrong length\n");
+ return TEST_FAIL;
+ }
+
+ mregs = iov.iov_base;
+ test_result(mregs->dscr, DSCR, "TM RN DSCR");
+ test_result(mregs->tar, TAR, "TM RN TAR");
+ test_result(mregs->ppr, PPR, "TM RN PPR");
+
+ ret = ptrace(PTRACE_DETACH, child, NULL, NULL);
+ if (ret) {
+ printf("ptrace(PTRACE_DETACH) Failed: %s\n", strerror(errno));
+ return 1;
+ }
+
+ if (kill(child, SIGTERM)) {
+ printf("kill() Failed\n");
+ return TEST_FAIL;
+ }
+
+ ret = waitpid(child, NULL, 0);
+ if (ret != child) {
+ printf("PID mismatch: %s\n", strerror(errno));
+ return TEST_FAIL;
+ }
+ return TEST_PASS;
+}
+
+int tm_ptrace_test(void)
+{
+ pid_t child;
+
+ printf("===Testing TM based PTRACE Interface===\n");
+ fflush(stdout);
+ child = fork();
+ if (child < 0) {
+ printf("fork() Failed: %s\n", strerror(errno));
+ return TEST_FAIL;
+ }
+
+ /* Child to run the transaction */
+ if (child == 0)
+ do_tm_transaction();
+
+ /* Parent to trace the child */
+ if (child)
+ trace_tm_transaction(child);
+ return TEST_PASS;
+}
+
+int main(void)
+{
+ return test_harness(tm_ptrace_test, "tm_ptrace");
+}
--
1.9.3
^ permalink raw reply related
* [PATCH V6 8/9] selftests, powerpc: Make GIT ignore all binaries related to TM
From: Anshuman Khandual @ 2014-12-02 7:56 UTC (permalink / raw)
To: linux-kernel, linuxppc-dev
Cc: shuahkh, mikey, james.hogan, avagin, Paul.Clothier, peterz,
palves, oleg, davem, dhowells, kirjanov, davej, akpm, sukadev,
tglx, sam.bobroff
In-Reply-To: <1417507013-11948-1-git-send-email-khandual@linux.vnet.ibm.com>
This patch includes all the TM test binaries into the .gitignore
file listing in the same directory. This will make sure that GIT
ignores all of them while displaying status.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
tools/testing/selftests/powerpc/tm/.gitignore | 2 ++
1 file changed, 2 insertions(+)
create mode 100644 tools/testing/selftests/powerpc/tm/.gitignore
diff --git a/tools/testing/selftests/powerpc/tm/.gitignore b/tools/testing/selftests/powerpc/tm/.gitignore
new file mode 100644
index 0000000..71f9f9d
--- /dev/null
+++ b/tools/testing/selftests/powerpc/tm/.gitignore
@@ -0,0 +1,2 @@
+tm-ptrace
+tm-resched-dscr
--
1.9.3
^ permalink raw reply related
* [PATCH V6 9/9] selftests: Make GIT ignore all binaries in powerpc test suite
From: Anshuman Khandual @ 2014-12-02 7:56 UTC (permalink / raw)
To: linux-kernel, linuxppc-dev
Cc: shuahkh, mikey, james.hogan, avagin, Paul.Clothier, peterz,
palves, oleg, davem, dhowells, kirjanov, davej, akpm, sukadev,
tglx, sam.bobroff
In-Reply-To: <1417507013-11948-1-git-send-email-khandual@linux.vnet.ibm.com>
This patch includes all of the powerpc test binaries into the
.gitignore file listing in their respective directories. This
will make sure that GIT ignores all of these test binaries while
displaying status.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
.../testing/selftests/powerpc/copyloops/.gitignore | 4 ++++
tools/testing/selftests/powerpc/mm/.gitignore | 1 +
tools/testing/selftests/powerpc/pmu/.gitignore | 3 +++
tools/testing/selftests/powerpc/pmu/ebb/.gitignore | 22 ++++++++++++++++++++++
.../selftests/powerpc/primitives/.gitignore | 1 +
5 files changed, 31 insertions(+)
create mode 100644 tools/testing/selftests/powerpc/copyloops/.gitignore
create mode 100644 tools/testing/selftests/powerpc/mm/.gitignore
create mode 100644 tools/testing/selftests/powerpc/pmu/.gitignore
create mode 100644 tools/testing/selftests/powerpc/pmu/ebb/.gitignore
create mode 100644 tools/testing/selftests/powerpc/primitives/.gitignore
diff --git a/tools/testing/selftests/powerpc/copyloops/.gitignore b/tools/testing/selftests/powerpc/copyloops/.gitignore
new file mode 100644
index 0000000..25a192f
--- /dev/null
+++ b/tools/testing/selftests/powerpc/copyloops/.gitignore
@@ -0,0 +1,4 @@
+copyuser_64
+copyuser_power7
+memcpy_64
+memcpy_power7
diff --git a/tools/testing/selftests/powerpc/mm/.gitignore b/tools/testing/selftests/powerpc/mm/.gitignore
new file mode 100644
index 0000000..156f4e8
--- /dev/null
+++ b/tools/testing/selftests/powerpc/mm/.gitignore
@@ -0,0 +1 @@
+hugetlb_vs_thp_test
diff --git a/tools/testing/selftests/powerpc/pmu/.gitignore b/tools/testing/selftests/powerpc/pmu/.gitignore
new file mode 100644
index 0000000..e748f33
--- /dev/null
+++ b/tools/testing/selftests/powerpc/pmu/.gitignore
@@ -0,0 +1,3 @@
+count_instructions
+l3_bank_test
+per_event_excludes
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/.gitignore b/tools/testing/selftests/powerpc/pmu/ebb/.gitignore
new file mode 100644
index 0000000..42bddbe
--- /dev/null
+++ b/tools/testing/selftests/powerpc/pmu/ebb/.gitignore
@@ -0,0 +1,22 @@
+reg_access_test
+event_attributes_test
+cycles_test
+cycles_with_freeze_test
+pmc56_overflow_test
+ebb_vs_cpu_event_test
+cpu_event_vs_ebb_test
+cpu_event_pinned_vs_ebb_test
+task_event_vs_ebb_test
+task_event_pinned_vs_ebb_test
+multi_ebb_procs_test
+multi_counter_test
+pmae_handling_test
+close_clears_pmcc_test
+instruction_count_test
+fork_cleanup_test
+ebb_on_child_test
+ebb_on_willing_child_test
+back_to_back_ebbs_test
+lost_exception_test
+no_handler_test
+cycles_with_mmcr2_test
diff --git a/tools/testing/selftests/powerpc/primitives/.gitignore b/tools/testing/selftests/powerpc/primitives/.gitignore
new file mode 100644
index 0000000..4cc4e31
--- /dev/null
+++ b/tools/testing/selftests/powerpc/primitives/.gitignore
@@ -0,0 +1 @@
+load_unaligned_zeropad
--
1.9.3
^ permalink raw reply related
* Re: [PATCH V3] powerpc, powernv: Add OPAL platform event driver
From: Anshuman Khandual @ 2014-12-02 8:04 UTC (permalink / raw)
To: linuxppc-dev, Michael Ellerman; +Cc: mikey
In-Reply-To: <1416921665-15855-1-git-send-email-khandual@linux.vnet.ibm.com>
On 11/25/2014 06:51 PM, Anshuman Khandual wrote:
> This patch creates a new OPAL platform event character driver
> which will give userspace clients the access to these events
> and process them effectively. Following platforms events are
> currently supported with this platform driver.
>
> (1) Environmental and Power Warning (EPOW)
> (2) Delayed Power Off (DPO)
>
> The user interface for this driver is /dev/opal_event character
> device file where the user space clients can poll and read for
> new opal platform events. The expected sequence of events driven
> from user space should be like the following.
>
> (1) Open the character device file
> (2) Poll on the file for POLLIN event
> (3) When unblocked, must attempt to read PLAT_EVENT_MAX_SIZE size
> (4) Kernel driver will pass at most one opal_plat_event structure
> (5) Poll again for more new events
>
> The driver registers for OPAL messages notifications corresponding to
> individual OPAL events. When any of those event messages arrive in the
> kernel, the callbacks are called to process them which in turn unblocks
> the polling thread on the character device file. The driver also registers
> a timer function which will be called after a threshold amount of time to
> shutdown the system. The user space client receives the timeout value for
> all individual OPAL platform events and hence must prepare the system and
> eventually shutdown. In case the user client does not shutdown the system,
> the timer function will be called after the threshold and shutdown the
> system explicitly.
>
> Reviewed-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> ---
> Changes in V3:
> - Rebased the patch against the mainline
>
> Changes in V2:
> - Changed the function fetch_dpo_timeout
> - Export opal_platform_events.h for user space consumption
> - Posted here https://patchwork.ozlabs.org/patch/396725/
>
> Original V1:
> - Original patch
> - Posted here http://patchwork.ozlabs.org/patch/394340/
Hey Michael,
Do you have any updates on this patch yet ? Thanks !
^ permalink raw reply
* [PATCH V6 1/9] elf: Add new powerpc specifc core note sections
From: Anshuman Khandual @ 2014-12-02 7:56 UTC (permalink / raw)
To: linux-kernel, linuxppc-dev
Cc: shuahkh, mikey, james.hogan, avagin, Paul.Clothier, peterz,
palves, oleg, davem, dhowells, kirjanov, davej, akpm, sukadev,
tglx, sam.bobroff
In-Reply-To: <1417507013-11948-1-git-send-email-khandual@linux.vnet.ibm.com>
This patch adds four new ELF core note sections for powerpc
transactional memory and one new ELF core note section for
powerpc general miscellaneous debug registers. These addition
of new ELF core note sections extends the existing ELF ABI
without affecting it in any manner.
Acked-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
include/uapi/linux/elf.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h
index ea9bf25..2260fc0 100644
--- a/include/uapi/linux/elf.h
+++ b/include/uapi/linux/elf.h
@@ -379,6 +379,11 @@ typedef struct elf64_shdr {
#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
#define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */
#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
+#define NT_PPC_TM_SPR 0x103 /* PowerPC TM special registers */
+#define NT_PPC_TM_CGPR 0x104 /* PowerpC TM checkpointed GPR */
+#define NT_PPC_TM_CFPR 0x105 /* PowerPC TM checkpointed FPR */
+#define NT_PPC_TM_CVMX 0x106 /* PowerPC TM checkpointed VMX */
+#define NT_PPC_MISC 0x107 /* PowerPC miscellaneous registers */
#define NT_386_TLS 0x200 /* i386 TLS slots (struct user_desc) */
#define NT_386_IOPERM 0x201 /* x86 io permission bitmap (1=deny) */
#define NT_X86_XSTATE 0x202 /* x86 extended state using xsave */
--
1.9.3
^ permalink raw reply related
* Re: powerpc/book3s: Fix flush_tlb cpu_spec hook to take a generic argument.
From: Mahesh Jagannath Salgaonkar @ 2014-12-02 9:01 UTC (permalink / raw)
To: Michael Ellerman, linuxppc-dev, Paul Mackerras,
Benjamin Herrenschmidt
In-Reply-To: <20141128223838.B21E51401B1@ozlabs.org>
On 11/29/2014 04:08 AM, Michael Ellerman wrote:
> On Tue, 2014-23-09 at 03:53:54 UTC, Mahesh Salgaonkar wrote:
>> From: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
>>
>> The flush_tlb hook in cpu_spec was introduced as a generic function hook
>> to invalidate TLBs. But the current implementation of flush_tlb hook
>> takes IS (invalidation selector) as an argument which is architecture
>> dependent. Hence, It is not right to have a generic routine where caller
>> has to pass non-generic argument.
>>
>> This patch fixes this and makes flush_tlb hook as high level API.
>>
>> The old code used to call flush_tlb hook with IS=0 (single page) resulting
>> partial invalidation of TLBs which is not right. This fix now makes
>> sure that whole TLB is invalidated to be able to successfully recover from
>> TLB and ERAT errors.
>
> Which old code? You mean the MCE code I think. That's a bug fix, so it should
> be a separate patch.
Yes. MCE code. Since this patch re-factors the code that takes IS as
direct argument, having a separate fix patch does not make any sense and
would get overwritten by this patch anyway.
>
>> diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
>> index daa5af9..ae3e74f 100644
>> --- a/arch/powerpc/include/asm/cputable.h
>> +++ b/arch/powerpc/include/asm/cputable.h
>> @@ -100,7 +100,7 @@ struct cpu_spec {
>> /*
>> * Processor specific routine to flush tlbs.
>> */
>> - void (*flush_tlb)(unsigned long inval_selector);
>> + void (*flush_tlb)(unsigned int action);
>>
>> };
>>
>> diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
>> index d765144..068ac8b 100644
>> --- a/arch/powerpc/include/asm/mmu-hash64.h
>> +++ b/arch/powerpc/include/asm/mmu-hash64.h
>> @@ -112,6 +112,11 @@
>> #define TLBIEL_INVAL_SET_SHIFT 12
>>
>> #define POWER7_TLB_SETS 128 /* # sets in POWER7 TLB */
>> +#define POWER8_TLB_SETS 512 /* # sets in POWER8 TLB */
>> +
>> +/* TLB flush actions. Used as argument to cpu_spec.flush_tlb() hook */
>> +#define FLUSH_TLB_ALL 0 /* invalidate all TLBs */
>> +#define FLUSH_TLB_LPID 1 /* invalidate TLBs for current LPID */
>
> Now that these are generic actions then they should go in cputable.h with the
> flush hook.
Sure, I will move them.
>
>> diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
>> index 4673353..9c9b741 100644
>> --- a/arch/powerpc/kernel/cpu_setup_power.S
>> +++ b/arch/powerpc/kernel/cpu_setup_power.S
>> @@ -137,15 +137,11 @@ __init_HFSCR:
>> /*
>> * Clear the TLB using the specified IS form of tlbiel instruction
>> * (invalidate by congruence class). P7 has 128 CCs., P8 has 512.
>> - *
>> - * r3 = IS field
>> */
>> __init_tlb_power7:
>> - li r3,0xc00 /* IS field = 0b11 */
>> -_GLOBAL(__flush_tlb_power7)
>> li r6,128
>> mtctr r6
>> - mr r7,r3 /* IS field */
>> + li r7,0xc00 /* IS field = 0b11 */
>> ptesync
>> 2: tlbiel r7
>> addi r7,r7,0x1000
>
> So the current version is:
>
> _GLOBAL(__flush_tlb_power7)
> li r6,128
> mtctr r6
> mr r7,r3 /* IS field */
> ptesync
> 2: tlbiel r7
> addi r7,r7,0x1000
> bdnz 2b
> ptesync
> 1: blr
>
> ie. a loop preceeded and followed by ptesync.
>
> Your new version is:
>
>> +static void _flush_tlb(uint32_t tlb_set, unsigned long inval_selector)
>> +{
>> + unsigned long i, rb;
>> +
>> + rb = inval_selector;
>> + for (i = 0; i < tlb_set; i++) {
>> + asm volatile("tlbiel %0" : : "r" (rb));
>> + rb += 1 << TLBIEL_INVAL_SET_SHIFT;
>> + }
>> +}
>
> ie. no ptesyncs at all.
>
> But there's no mention of that in the changelog. You need to explain why it is
> OK to drop the ptesyncs.
You are right. I should put ptesyncs in _flush_tlb(). Will make this
change in v2. Thanks for catching this.
>
>> +/*
>> + * Generic routine to flush TLB on power7. This routine is used as
>> + * flush_tlb hook in cpu_spec for Power7 processor.
>> + *
>> + * action => FLUSH_TLB_ALL: Invalidate all TLBs.
>> + * FLUSH_TLB_LPID: Invalidate TLB for current LPID.
>> + */
>> +void __flush_tlb_power7(unsigned int action)
>> +{
>> + switch (action) {
>> + case FLUSH_TLB_ALL:
>> + _flush_tlb(POWER7_TLB_SETS, TLBIEL_INVAL_SET);
>> + break;
>> + case FLUSH_TLB_LPID:
>> + _flush_tlb(POWER7_TLB_SETS, TLBIEL_INVAL_SET_LPID);
>> + break;
>> + default:
>> + break;
>> + }
>> +}
>> +
>> +/*
>> + * Generic routine to flush TLB on power8. This routine is used as
>> + * flush_tlb hook in cpu_spec for power8 processor.
>> + *
>> + * action => FLUSH_TLB_ALL: Invalidate all TLBs.
>> + * FLUSH_TLB_LPID: Invalidate TLB for current LPID.
>> + */
>> +void __flush_tlb_power8(unsigned int action)
>> +{
>> + switch (action) {
>> + case FLUSH_TLB_ALL:
>> + _flush_tlb(POWER8_TLB_SETS, TLBIEL_INVAL_SET);
>> + break;
>> + case FLUSH_TLB_LPID:
>> + _flush_tlb(POWER8_TLB_SETS, TLBIEL_INVAL_SET_LPID);
>> + break;
>> + default:
>> + break;
>> + }
>> +}
>
> How about this:
>
> void flush_tlb_206(unsigned num_sets, unsigned int action)
> {
> unsigned long rb;
> int i;
>
> switch (action) {
> case FLUSH_TLB_ALL:
> rb = TLBIEL_INVAL_SET;
> break;
> case FLUSH_TLB_LPID:
> rb = TLBIEL_INVAL_SET_LPID;
> break;
> default:
> BUG();
> }
>
> for (i = 0; i < num_sets; i++) {
> asm volatile("tlbiel %0" : : "r" (rb));
> rb += 1 << TLBIEL_INVAL_SET_SHIFT;
> }
> }
>
> void flush_tlb_power8(unsigned int action)
> {
> flush_tlb_206(POWER8_TLB_SETS, action);
> }
>
> void flush_tlb_power7(unsigned int action)
> {
> flush_tlb_206(POWER7_TLB_SETS, action);
> }
>
Agree. Will roll out v2 with above suggested changes.
Thanks,
-Mahesh.
^ permalink raw reply
* Re: [PATCH 02/10] mm: Add p[te|md] protnone helpers for use by NUMA balancing
From: Mel Gorman @ 2014-12-02 10:12 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: Rik van Riel, Linus Torvalds, Hugh Dickins, Linux Kernel,
Linux-MM, Ingo Molnar, Paul Mackerras, Aneesh Kumar, Sasha Levin,
Dave Jones, LinuxPPC-dev, Kirill Shutemov
In-Reply-To: <1417473519.7182.6.camel@kernel.crashing.org>
On Tue, Dec 02, 2014 at 09:38:39AM +1100, Benjamin Herrenschmidt wrote:
> On Fri, 2014-11-21 at 13:57 +0000, Mel Gorman wrote:
>
> > #ifdef CONFIG_NUMA_BALANCING
> > +/*
> > + * These work without NUMA balancing but the kernel does not care. See the
> > + * comment in include/asm-generic/pgtable.h
> > + */
> > +static inline int pte_protnone(pte_t pte)
> > +{
> > + return (pte_val(pte) &
> > + (_PAGE_PRESENT | _PAGE_USER)) == _PAGE_PRESENT;
> > +}
>
> I would add a comment clarifying that this only works for user pages,
> ie, this accessor will always return "true" for a kernel page on ppc.
>
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index 490bd6d..7b889a3 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -41,7 +41,8 @@ static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PA
#ifdef CONFIG_NUMA_BALANCING
/*
* These work without NUMA balancing but the kernel does not care. See the
- * comment in include/asm-generic/pgtable.h
+ * comment in include/asm-generic/pgtable.h . On powerpc, this will only
+ * work for user pages and always return true for kernel pages.
*/
static inline int pte_protnone(pte_t pte)
{
--
Mel Gorman
SUSE Labs
^ permalink raw reply related
* Re: Disabled LocalPlus Controller (LPC) clock on MPC512x
From: Matteo Facchinetti @ 2014-12-02 10:47 UTC (permalink / raw)
To: alex.popov; +Cc: Gerhard Sittig, linuxppc-dev, linux-kernel
In-Reply-To: <5475BE5A.4090503@linux.com>
On 26/11/2014 12:49, Alexander Popov wrote:
> Hello.
>
Hi.
> My Freescale TWR-MPC5125 board instantly reboots if I touch
> any physical address on the LocalPlus Bus (LPB) for the first time
> when Linux has already booted.
>
> This effect is reproduced by using /dev/mem or loading a kernel module
> which works with any peripherals on LPB.
>
> It took me some time to find out that such crash is caused by
> clk_disable_unused() in drivers/clk/clk.c, which disables
> LocalPlus Controller (LPC) clock if I don't touch LPB addresses in the
> previous initcalls. So starting Linux with clk_ignore_unused bootparam
> or inserting dummy LPB reading to some initcall is a temporary fix.
>
> Is it correct to gate LPC clock?
For me yes, because it's physically present on SoC and could not be muxed.
> If yes, how to avoid the mentioned
> crashes properly?
>
> There's a piece of code in arch/powerpc/platforms/512x/clock-commonclk.c
> which is doubtful for me:
>
> /*
> * pre-enable those "internal" clock items which never get
> * claimed by any peripheral driver, to not have the clock
> * subsystem disable them late at startup
> */
> clk_prepare_enable(clks[MPC512x_CLK_DUMMY]);
> clk_prepare_enable(clks[MPC512x_CLK_E300]); /* PowerPC CPU */
> clk_prepare_enable(clks[MPC512x_CLK_DDR]); /* DRAM */
> clk_prepare_enable(clks[MPC512x_CLK_MEM]); /* SRAM */
> clk_prepare_enable(clks[MPC512x_CLK_IPS]); /* SoC periph */
> clk_prepare_enable(clks[MPC512x_CLK_LPC]); /* boot media */
>
> Does it mean that these clocks should be registered with
> CLK_IGNORE_UNUSED flag?
>
Yes, in my opinion this groups of clocks may be considered as "always on",
but I don't think that MPC512x_CLK_LPC is an "internal" clock and then
It could be enable if really used only.
In detail:
- may be good to enable MPC512x_CLK_LPC only when localbus is enabled
by the dts
- if enabled, MPC512x_CLK_LPC have to setup with CLK_IGNORE_UNUSED
flag because never get claimed by any driver.
I put in CC "Gerhard Sittig" also beacuse it might be interesting to
know his point of view as the author of mpc512x common clock driver.
Regards,
Matteo
> Thanks a lot.
> Best regards,
> Alexander
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* RE: [PATCH] Documentation: bindings: net: DPAA corenet binding document
From: Madalin-Cristian Bucur @ 2014-12-02 12:12 UTC (permalink / raw)
To: Scott Wood
Cc: devicetree@vger.kernel.org, netdev@vger.kernel.org, Emilian Medve,
Igal.Liberman@freescale.com, galak@codeaurora.org,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <1417495189.15957.209.camel@freescale.com>
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PiBTZW50OiBUdWVzZGF5LCBEZWNlbWJlciAwMiwgMjAxNCA2OjQwIEFNDQo+IE9uIEZyaSwgMjAx
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IG5vZGVzLg0KDQpNYWRhbGluDQo=
^ permalink raw reply
* Re: [RFC PATCH v1 1/1] powerpc/85xx: Add support for Emerson/Artesyn MVME2500.
From: Alessio Igor Bogani @ 2014-12-02 14:55 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <1417496585.15957.210.camel@freescale.com>
Hi Scott,
On 2 December 2014 at 06:03, Scott Wood <scottwood@freescale.com> wrote:
[...]
> I was referring to the final ranges entry:
>
>> + 0x5 0x0 0x0 0xffdf0000 0x00001000>;
>
> The localbus ranges should reflect what was programmed into BRn/ORn.
> The smallest size that can be programmed into ORn is 32 KiB.
Sorry I'll use 0x8000 instead of 0x1000.
>> The pq3-gpio-0.dtsi defines an gpio controller in this way:
>>
>> gpio-controller@f000 {
>> reg = <0xf000 0x100>;
>> [...]
>>
>> But MVME2500 board requires a slightly different definition:
>>
>> reg = <0xfc00 0x100>;
>
> The GPIO CCSR registers on a P2010 don't change based on what board you
> put it on. It looks like pq3-gpio-0.dtsi is just wrong, for all chips
> that use it. It should be fixed there.
I have to admit that I'm not using GPIO at the moment so a typo into
board's manufacturer manual is more probable.
>> > Better still would be if we could have address map tweaks be kconfig
>> > fragments that get mixed in by the user, with merge_config.sh.
>>
>> Personally I would prefer see something more simple like this:
>>
>> %_defconfig: scripts/kconfig/conf
>> # Grab the platform generic config file (for a SoC family)
>> $(Q)$< --defconfig=arch/$(SRCARCH)/configs/mpc$(shell dirname
>> $@)_defconfig Kconfig
>
> What is the dirname here trying to do?
Extract string "85xx" from "make 85xx/mvme2500_defconfig" command.
So the above mentioned Makefile snip grabs
arch/powerpc/configs/mpc85xx_defconfig and applies (using
merge_config.sh) options present in
arch/powerpc/configs/85xx/mvme2500_defconfig.
It should reduces the size of the board specific defconfig without
using any other fragments and without change anything in user habits.
In my humble opinion that hardware is so rigid that flexibility given
by config fragments don't seem very useful.
Using this approach the mvme2500_defconfig file could looks like this:
CONFIG_MVME2500=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCIEAER=y
# CONFIG_PCIEASPM is not set
CONFIG_SERIAL_8250_NR_UARTS=6
CONFIG_SERIAL_8250_RUNTIME_UARTS=6
CONFIG_BROADCOM_PHY=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_M25P80=y
CONFIG_HWMON=m
CONFIG_SENSORS_LM90=m
CONFIG_EDAC_MPC85XX=y
CONFIG_ADVANCED_OPTIONS=y
CONFIG_LOWMEM_SIZE_BOOL=y
CONFIG_LOWMEM_SIZE=0x40000000
CONFIG_PAGE_OFFSET_BOOL=y
CONFIG_PAGE_OFFSET=0x80000000
CONFIG_KERNEL_START_BOOL=y
CONFIG_TASK_SIZE_BOOL=y
CONFIG_TASK_SIZE=0x80000000
CONFIG_STAGING=y
CONFIG_VME_BUS=y
CONFIG_VME_TSI148=y
CONFIG_VME_USER=y
I know it is a very stupid idea so feel free to ignore me on this point :)
>> > I gues the point here is to avoid using highmem just for the last 256
>> > MiB?
>>
>> Yes. Can you suggest me a better solution, please?
>
> Not if the performance benefit from getting rid of highmem is worth
> carrying this around... But it would still be good if the board support
> were build in the standard defconfig as well. It's unlikely to get much
> build coverage (by people who don't use this board) in a board-specific
> defconfig.
Ok I changed mpc85xx_defconfig and it works with few addiction. So we
have two possibilities: use mpc85xx_defconfig (but without VME_USER
and Highmem tweak) or add mvme2500_defconfig: Which do you prefer? I
would prefer the mvme2500_defconfig but I think that my vote doesn't
count (rightly).
What do you think about move board setup code from
platform/85xx/mvme2500.c to platform/platforms/85xx/mpc85xx_ds.c?
Thank you very much.
Ciao,
Alessio
^ permalink raw reply
* Re: [PATCH V6 9/9] selftests: Make GIT ignore all binaries in powerpc test suite
From: Shuah Khan @ 2014-12-02 18:23 UTC (permalink / raw)
To: Anshuman Khandual, linux-kernel, linuxppc-dev
Cc: Shuah Khan, mikey, james.hogan, avagin, Paul.Clothier, peterz,
palves, oleg, davem, dhowells, kirjanov, davej, akpm, sukadev,
tglx, sam.bobroff
In-Reply-To: <1417507013-11948-10-git-send-email-khandual@linux.vnet.ibm.com>
On 12/02/2014 12:56 AM, Anshuman Khandual wrote:
> This patch includes all of the powerpc test binaries into the
> .gitignore file listing in their respective directories. This
> will make sure that GIT ignores all of these test binaries while
> displaying status.
>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> ---
> .../testing/selftests/powerpc/copyloops/.gitignore | 4 ++++
> tools/testing/selftests/powerpc/mm/.gitignore | 1 +
> tools/testing/selftests/powerpc/pmu/.gitignore | 3 +++
> tools/testing/selftests/powerpc/pmu/ebb/.gitignore | 22 ++++++++++++++++++++++
> .../selftests/powerpc/primitives/.gitignore | 1 +
> 5 files changed, 31 insertions(+)
> create mode 100644 tools/testing/selftests/powerpc/copyloops/.gitignore
> create mode 100644 tools/testing/selftests/powerpc/mm/.gitignore
> create mode 100644 tools/testing/selftests/powerpc/pmu/.gitignore
> create mode 100644 tools/testing/selftests/powerpc/pmu/ebb/.gitignore
> create mode 100644 tools/testing/selftests/powerpc/primitives/.gitignore
>
Creating a single .gitignore at tools/testing/selftests/powerpc will
make this simpler without having to add one .gitignore for each
directory underneath.
Thanks for taking on the task to add .gitignore for all powerpc
binaries.
-- Shuah
--
Shuah Khan
Sr. Linux Kernel Developer
Samsung Research America (Silicon Valley)
shuahkh@osg.samsung.com | (970) 217-8978
^ permalink raw reply
* Re: [PATCH 03/10] mm: Convert p[te|md]_numa users to p[te|md]_protnone_numa
From: Benjamin Herrenschmidt @ 2014-12-02 20:11 UTC (permalink / raw)
To: Aneesh Kumar K.V
Cc: Rik van Riel, Linus Torvalds, Hugh Dickins, Linux Kernel,
Linux-MM, Ingo Molnar, Paul Mackerras, Mel Gorman, Sasha Levin,
Dave Jones, LinuxPPC-dev, Kirill Shutemov
In-Reply-To: <87k32ah5q3.fsf@linux.vnet.ibm.com>
On Tue, 2014-12-02 at 12:57 +0530, Aneesh Kumar K.V wrote:
> Now, hash_preload can possibly insert an hpte in hash page table even if
> the access is not allowed by the pte permissions. But i guess even that
> is ok. because we will fault again, end-up calling hash_page_mm where we
> handle that part correctly.
I think we need a test case...
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH 03/10] mm: Convert p[te|md]_numa users to p[te|md]_protnone_numa
From: Benjamin Herrenschmidt @ 2014-12-02 20:13 UTC (permalink / raw)
To: Aneesh Kumar K.V
Cc: Rik van Riel, Linus Torvalds, Hugh Dickins, Linux Kernel,
Linux-MM, Ingo Molnar, Paul Mackerras, Mel Gorman, Sasha Levin,
Dave Jones, LinuxPPC-dev, Kirill Shutemov
In-Reply-To: <87h9xeh5im.fsf@linux.vnet.ibm.com>
On Tue, 2014-12-02 at 13:01 +0530, Aneesh Kumar K.V wrote:
> Benjamin Herrenschmidt <benh@kernel.crashing.org> writes:
>
> > On Fri, 2014-11-21 at 13:57 +0000, Mel Gorman wrote:
> >> void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
> >> pte_t pte)
> >> {
> >> -#ifdef CONFIG_DEBUG_VM
> >> - WARN_ON(pte_val(*ptep) & _PAGE_PRESENT);
> >> -#endif
> >> + /*
> >> + * When handling numa faults, we already have the pte marked
> >> + * _PAGE_PRESENT, but we can be sure that it is not in hpte.
> >> + * Hence we can use set_pte_at for them.
> >> + */
> >> + VM_WARN_ON((pte_val(*ptep) & (_PAGE_PRESENT | _PAGE_USER)) ==
> >> + (_PAGE_PRESENT | _PAGE_USER));
> >> +
> >
> > His is that going to fare with set_pte_at() called for kernel pages ?
> >
>
> Yes, we won't capture those errors now. But is there any other debug
> check i could use to capture the wrong usage of set_pte_at ?
Actually the above is fine, for some reason I mis-read the test as
blowing on kernel pages, it doesn't.
We probably do need to make sure however that protnone isn't used for
kernel pages.
Cheers,
Ben.
> -aneesh
>
> --
> To unsubscribe, send a message with 'unsubscribe linux-mm' in
> the body to majordomo@kvack.org. For more info on Linux MM,
> see: http://www.linux-mm.org/ .
> Don't email: <a href=mailto:"dont@kvack.org"> email@kvack.org </a>
^ permalink raw reply
* [PATCH] powerpc: add little endian flag to syscall_get_arch()
From: Richard Guy Briggs @ 2014-12-02 21:27 UTC (permalink / raw)
To: linux-audit, linux-kernel, linuxppc-dev, linux-api
Cc: Richard Guy Briggs, eparis, sgrubb, pmoore, tonyj
Since both ppc and ppc64 have LE variants which are now reported by uname, add
that flag (__AUDIT_ARCH_LE) to syscall_get_arch() and add AUDIT_ARCH_PPC*LE
variants.
Without this, perf trace and auditctl fail.
Mainline kernel reports ppc64le (per a058801) but there is no matching
AUDIT_ARCH_PPC64LE.
See:
https://www.redhat.com/archives/linux-audit/2014-August/msg00082.html
https://www.redhat.com/archives/linux-audit/2014-December/msg00004.html
Signed-off-by: Richard Guy Briggs <rgb@redhat.com>
---
arch/powerpc/include/asm/syscall.h | 6 +++++-
include/uapi/linux/audit.h | 2 ++
2 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/syscall.h b/arch/powerpc/include/asm/syscall.h
index 6fa2708..a58acab 100644
--- a/arch/powerpc/include/asm/syscall.h
+++ b/arch/powerpc/include/asm/syscall.h
@@ -90,6 +90,10 @@ static inline void syscall_set_arguments(struct task_struct *task,
static inline int syscall_get_arch(void)
{
- return is_32bit_task() ? AUDIT_ARCH_PPC : AUDIT_ARCH_PPC64;
+ int arch = is_32bit_task() ? AUDIT_ARCH_PPC : AUDIT_ARCH_PPC64;
+#ifdef __LITTLE_ENDIAN__
+ arch |= __AUDIT_ARCH_LE
+#endif
+ return arch;
}
#endif /* _ASM_SYSCALL_H */
diff --git a/include/uapi/linux/audit.h b/include/uapi/linux/audit.h
index 4d100c8..fe29a99 100644
--- a/include/uapi/linux/audit.h
+++ b/include/uapi/linux/audit.h
@@ -364,7 +364,9 @@ enum {
#define AUDIT_ARCH_PARISC (EM_PARISC)
#define AUDIT_ARCH_PARISC64 (EM_PARISC|__AUDIT_ARCH_64BIT)
#define AUDIT_ARCH_PPC (EM_PPC)
+#define AUDIT_ARCH_PPCLE (EM_PPC|__AUDIT_ARCH_LE)
#define AUDIT_ARCH_PPC64 (EM_PPC64|__AUDIT_ARCH_64BIT)
+#define AUDIT_ARCH_PPC64LE (EM_PPC64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
#define AUDIT_ARCH_S390 (EM_S390)
#define AUDIT_ARCH_S390X (EM_S390|__AUDIT_ARCH_64BIT)
#define AUDIT_ARCH_SH (EM_SH)
--
1.7.1
^ permalink raw reply related
* Re: [PATCH] powerpc: add little endian flag to syscall_get_arch()
From: Tony Jones @ 2014-12-02 21:54 UTC (permalink / raw)
To: Richard Guy Briggs, linux-audit, linux-kernel, linuxppc-dev,
linux-api
Cc: pmoore, eparis, sgrubb
In-Reply-To: <fbe03529d720e75aa8663f8b521af5b11b33d52f.1417553967.git.rgb@redhat.com>
On 12/02/2014 01:27 PM, Richard Guy Briggs wrote:
> Since both ppc and ppc64 have LE variants which are now reported by uname, add
> that flag (__AUDIT_ARCH_LE) to syscall_get_arch() and add AUDIT_ARCH_PPC*LE
> variants.
>
> Without this, perf trace and auditctl fail.
>
> Mainline kernel reports ppc64le (per a058801) but there is no matching
> AUDIT_ARCH_PPC64LE.
>
> See:
> https://www.redhat.com/archives/linux-audit/2014-August/msg00082.html
> https://www.redhat.com/archives/linux-audit/2014-December/msg00004.html
>
> Signed-off-by: Richard Guy Briggs <rgb@redhat.com>
> ---
> arch/powerpc/include/asm/syscall.h | 6 +++++-
> include/uapi/linux/audit.h | 2 ++
> 2 files changed, 7 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/syscall.h b/arch/powerpc/include/asm/syscall.h
> index 6fa2708..a58acab 100644
> --- a/arch/powerpc/include/asm/syscall.h
> +++ b/arch/powerpc/include/asm/syscall.h
> @@ -90,6 +90,10 @@ static inline void syscall_set_arguments(struct task_struct *task,
>
> static inline int syscall_get_arch(void)
> {
> - return is_32bit_task() ? AUDIT_ARCH_PPC : AUDIT_ARCH_PPC64;
> + int arch = is_32bit_task() ? AUDIT_ARCH_PPC : AUDIT_ARCH_PPC64;
> +#ifdef __LITTLE_ENDIAN__
> + arch |= __AUDIT_ARCH_LE
> +#endif
> + return arch;
> }
> #endif /* _ASM_SYSCALL_H */
> diff --git a/include/uapi/linux/audit.h b/include/uapi/linux/audit.h
> index 4d100c8..fe29a99 100644
> --- a/include/uapi/linux/audit.h
> +++ b/include/uapi/linux/audit.h
> @@ -364,7 +364,9 @@ enum {
> #define AUDIT_ARCH_PARISC (EM_PARISC)
> #define AUDIT_ARCH_PARISC64 (EM_PARISC|__AUDIT_ARCH_64BIT)
> #define AUDIT_ARCH_PPC (EM_PPC)
> +#define AUDIT_ARCH_PPCLE (EM_PPC|__AUDIT_ARCH_LE)
> #define AUDIT_ARCH_PPC64 (EM_PPC64|__AUDIT_ARCH_64BIT)
> +#define AUDIT_ARCH_PPC64LE (EM_PPC64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
> #define AUDIT_ARCH_S390 (EM_S390)
> #define AUDIT_ARCH_S390X (EM_S390|__AUDIT_ARCH_64BIT)
> #define AUDIT_ARCH_SH (EM_SH)
IBM would know for certain but I wasn't aware there was a PPCLE (32bit compat).
^ permalink raw reply
* [PATCH] ALSA: i2sbus: Deletion of unnecessary checks before the function call "release_and_free_resource"
From: SF Markus Elfring @ 2014-12-02 21:55 UTC (permalink / raw)
To: Jaroslav Kysela, Johannes Berg, Takashi Iwai, alsa-devel,
linuxppc-dev
Cc: Julia Lawall, kernel-janitors, LKML
In-Reply-To: <5317A59D.4@users.sourceforge.net>
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Tue, 2 Dec 2014 22:50:24 +0100
The release_and_free_resource() function tests whether its argument is NULL
and then returns immediately. Thus the test around the call is not needed.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
---
sound/aoa/soundbus/i2sbus/core.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/sound/aoa/soundbus/i2sbus/core.c b/sound/aoa/soundbus/i2sbus/core.c
index a80d5ea..4e2b4fb 100644
--- a/sound/aoa/soundbus/i2sbus/core.c
+++ b/sound/aoa/soundbus/i2sbus/core.c
@@ -79,8 +79,7 @@ static void i2sbus_release_dev(struct device *dev)
if (i2sdev->out.dbdma) iounmap(i2sdev->out.dbdma);
if (i2sdev->in.dbdma) iounmap(i2sdev->in.dbdma);
for (i = aoa_resource_i2smmio; i <= aoa_resource_rxdbdma; i++)
- if (i2sdev->allocated_resource[i])
- release_and_free_resource(i2sdev->allocated_resource[i]);
+ release_and_free_resource(i2sdev->allocated_resource[i]);
free_dbdma_descriptor_ring(i2sdev, &i2sdev->out.dbdma_ring);
free_dbdma_descriptor_ring(i2sdev, &i2sdev->in.dbdma_ring);
for (i = aoa_resource_i2smmio; i <= aoa_resource_rxdbdma; i++)
@@ -323,8 +322,7 @@ static int i2sbus_add_dev(struct macio_dev *macio,
if (dev->out.dbdma) iounmap(dev->out.dbdma);
if (dev->in.dbdma) iounmap(dev->in.dbdma);
for (i=0;i<3;i++)
- if (dev->allocated_resource[i])
- release_and_free_resource(dev->allocated_resource[i]);
+ release_and_free_resource(dev->allocated_resource[i]);
mutex_destroy(&dev->lock);
kfree(dev);
return 0;
--
2.1.3
^ permalink raw reply related
* Re: [PATCH] powerpc: add little endian flag to syscall_get_arch()
From: Andy Lutomirski @ 2014-12-02 22:08 UTC (permalink / raw)
To: Richard Guy Briggs
Cc: Tony Jones, Linux API, linux-kernel@vger.kernel.org, Paul Moore,
linux-audit, Eric Paris, Steve Grubb, linuxppc-dev
In-Reply-To: <fbe03529d720e75aa8663f8b521af5b11b33d52f.1417553967.git.rgb@redhat.com>
On Tue, Dec 2, 2014 at 1:27 PM, Richard Guy Briggs <rgb@redhat.com> wrote:
> Since both ppc and ppc64 have LE variants which are now reported by uname, add
> that flag (__AUDIT_ARCH_LE) to syscall_get_arch() and add AUDIT_ARCH_PPC*LE
> variants.
>
> Without this, perf trace and auditctl fail.
>
> Mainline kernel reports ppc64le (per a058801) but there is no matching
> AUDIT_ARCH_PPC64LE.
>
There's no seccomp filter support for powerpc, so there's no risk that
this breaks it.
--Andy
> See:
> https://www.redhat.com/archives/linux-audit/2014-August/msg00082.html
> https://www.redhat.com/archives/linux-audit/2014-December/msg00004.html
>
> Signed-off-by: Richard Guy Briggs <rgb@redhat.com>
> ---
> arch/powerpc/include/asm/syscall.h | 6 +++++-
> include/uapi/linux/audit.h | 2 ++
> 2 files changed, 7 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/syscall.h b/arch/powerpc/include/asm/syscall.h
> index 6fa2708..a58acab 100644
> --- a/arch/powerpc/include/asm/syscall.h
> +++ b/arch/powerpc/include/asm/syscall.h
> @@ -90,6 +90,10 @@ static inline void syscall_set_arguments(struct task_struct *task,
>
> static inline int syscall_get_arch(void)
> {
> - return is_32bit_task() ? AUDIT_ARCH_PPC : AUDIT_ARCH_PPC64;
> + int arch = is_32bit_task() ? AUDIT_ARCH_PPC : AUDIT_ARCH_PPC64;
> +#ifdef __LITTLE_ENDIAN__
> + arch |= __AUDIT_ARCH_LE
> +#endif
> + return arch;
> }
> #endif /* _ASM_SYSCALL_H */
> diff --git a/include/uapi/linux/audit.h b/include/uapi/linux/audit.h
> index 4d100c8..fe29a99 100644
> --- a/include/uapi/linux/audit.h
> +++ b/include/uapi/linux/audit.h
> @@ -364,7 +364,9 @@ enum {
> #define AUDIT_ARCH_PARISC (EM_PARISC)
> #define AUDIT_ARCH_PARISC64 (EM_PARISC|__AUDIT_ARCH_64BIT)
> #define AUDIT_ARCH_PPC (EM_PPC)
> +#define AUDIT_ARCH_PPCLE (EM_PPC|__AUDIT_ARCH_LE)
> #define AUDIT_ARCH_PPC64 (EM_PPC64|__AUDIT_ARCH_64BIT)
> +#define AUDIT_ARCH_PPC64LE (EM_PPC64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
> #define AUDIT_ARCH_S390 (EM_S390)
> #define AUDIT_ARCH_S390X (EM_S390|__AUDIT_ARCH_64BIT)
> #define AUDIT_ARCH_SH (EM_SH)
> --
> 1.7.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-api" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Andy Lutomirski
AMA Capital Management, LLC
^ permalink raw reply
* Re: [RFC PATCH v1 1/1] powerpc/85xx: Add support for Emerson/Artesyn MVME2500.
From: Scott Wood @ 2014-12-02 22:46 UTC (permalink / raw)
To: Alessio Igor Bogani; +Cc: linuxppc-dev
In-Reply-To: <CAPk1OjE7pAdLucb3+54MnONsNiBgzjvxsA_o-jOdXk9W2CVJAw@mail.gmail.com>
On Tue, 2014-12-02 at 15:55 +0100, Alessio Igor Bogani wrote:
> Hi Scott,
>
> On 2 December 2014 at 06:03, Scott Wood <scottwood@freescale.com> wrote:
> [...]
> >> The pq3-gpio-0.dtsi defines an gpio controller in this way:
> >>
> >> gpio-controller@f000 {
> >> reg = <0xf000 0x100>;
> >> [...]
> >>
> >> But MVME2500 board requires a slightly different definition:
> >>
> >> reg = <0xfc00 0x100>;
> >
> > The GPIO CCSR registers on a P2010 don't change based on what board you
> > put it on. It looks like pq3-gpio-0.dtsi is just wrong, for all chips
> > that use it. It should be fixed there.
>
> I have to admit that I'm not using GPIO at the moment so a typo into
> board's manufacturer manual is more probable.
The various chip manuals also say that the registers start at offset
0xc00 in the gpio block. Testing suggests that the registers actually
repeat every 0x100 bytes within the 4K page, but it would be good to fix
the device tree to match the documented location.
> >> > Better still would be if we could have address map tweaks be kconfig
> >> > fragments that get mixed in by the user, with merge_config.sh.
> >>
> >> Personally I would prefer see something more simple like this:
> >>
> >> %_defconfig: scripts/kconfig/conf
> >> # Grab the platform generic config file (for a SoC family)
> >> $(Q)$< --defconfig=arch/$(SRCARCH)/configs/mpc$(shell dirname
> >> $@)_defconfig Kconfig
> >
> > What is the dirname here trying to do?
>
> Extract string "85xx" from "make 85xx/mvme2500_defconfig" command.
>
> So the above mentioned Makefile snip grabs
> arch/powerpc/configs/mpc85xx_defconfig and applies (using
> merge_config.sh) options present in
> arch/powerpc/configs/85xx/mvme2500_defconfig.
But mpc85xx_defconfig isn't a suitable base for all 85xx (SMP, corenet,
etc). Plus, hardcoding "mpc" in front of it in generic infrastructure
would not be appropriate (even on PPC you have the 40x and 44x
directories).
The right way to do this would be to have a metaconfig file that lists
the base config and a set of fragments to apply, which the user can use
like an ordinary defconfig.
> It should reduces the size of the board specific defconfig without
> using any other fragments and without change anything in user habits.
>
> In my humble opinion that hardware is so rigid that flexibility given
> by config fragments don't seem very useful.
Which hardware? The MVME2500? It looked like you were proposing a more
general solution. Note that many config options have nothing to do with
the hardware (filesystems, debug options, network protocols,
virtualization, etc).
In any case, we don't want a defconfig for every board. We want a small
set of defconfigs that provide wide build coverage and the ability to
run on a wide variety of boards. Nothing stops users or board vendors
from maintaining more targeted configs out of tree.
> >> > I gues the point here is to avoid using highmem just for the last 256
> >> > MiB?
> >>
> >> Yes. Can you suggest me a better solution, please?
> >
> > Not if the performance benefit from getting rid of highmem is worth
> > carrying this around... But it would still be good if the board support
> > were build in the standard defconfig as well. It's unlikely to get much
> > build coverage (by people who don't use this board) in a board-specific
> > defconfig.
>
> Ok I changed mpc85xx_defconfig and it works with few addiction. So we
> have two possibilities: use mpc85xx_defconfig (but without VME_USER
> and Highmem tweak) or add mvme2500_defconfig: Which do you prefer? I
> would prefer the mvme2500_defconfig but I think that my vote doesn't
> count (rightly).
If it were just the highmem tweak I'd say that falls into the realm of
user config -- it's no different from any other board with 1 GiB of RAM.
I don't want to turn on staging drivers in the main defconfigs (unless
it's for something needed by most boards covered by the defconfig),
since it makes it easier for users to enable other staging drivers
without realizing it.
So, put everything but VME and the highmem tweak in mpc85xx_defconfig.
If you want, add an 85xx/mvme2500.config fragment that adds VME and the
highmem tweak (separate config fragments for each would be better, but
without a metaconfig mechanism it's less friendly to users who won't
know what the best starting point is for this board).
> What do you think about move board setup code from
> platform/85xx/mvme2500.c to platform/platforms/85xx/mpc85xx_ds.c?
It's not a DS board, but it'd be good to have a
platforms/85xx/mpc85xx_generic.c (similar to
platforms/85xx/corenet_generic.c) for platforms that don't need anything
special in the board file.
-Scott
^ permalink raw reply
* Re: [PATCH] Documentation: bindings: net: DPAA corenet binding document
From: Scott Wood @ 2014-12-02 23:03 UTC (permalink / raw)
To: Bucur Madalin-Cristian-B32716
Cc: devicetree@vger.kernel.org, netdev@vger.kernel.org,
Medve Emilian-EMMEDVE1, Liberman Igal-B31950,
galak@codeaurora.org, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <BL2PR03MB545CC342CA6A408D2FD5CF6E67A0@BL2PR03MB545.namprd03.prod.outlook.com>
On Tue, 2014-12-02 at 06:12 -0600, Bucur Madalin-Cristian-B32716 wrote:
> > -----Original Message-----
> > From: Wood Scott-B07421
> > Sent: Tuesday, December 02, 2014 6:40 AM
> > On Fri, 2014-11-28 at 12:10 +0200, Madalin Bucur wrote:
> > > Add the device tree binding document for the DPAA corenet node
> > > and DPAA Ethernet nodes.
> > >
> > > Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com>
> > > ---
> > > Documentation/devicetree/bindings/net/fsl-dpaa.txt | 31
> > ++++++++++++++++++++++
> > > 1 file changed, 31 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/net/fsl-dpaa.txt
> > >
> > > diff --git a/Documentation/devicetree/bindings/net/fsl-dpaa.txt
> > b/Documentation/devicetree/bindings/net/fsl-dpaa.txt
> > > new file mode 100644
> > > index 0000000..822c668
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/net/fsl-dpaa.txt
> > > @@ -0,0 +1,31 @@
> > > +*DPAA corenet
> > > +
> > > +The corenet bus containing all DPAA Ethernet nodes.
> >
> > What does this have to do with corenet?
> >
> The corenet-generic platform code uses this compatible.
That doesn't make it a "corenet bus". It's not a bus at all.
> > > +Required property
> > > + - compatible: string property. Must include "fsl,dpaa". Can include
> > > + also "fsl,<SoC>-dpaa".
> >
> > No need for the <SoC> part. As we previously discussed, the only
> > purpose of this node is backwards compatibility with the U-Boot MAC
> > address fixup -- if U-Boot doesn't look for the <SoC> version, then
> > don't complicate things.
> >
> > Though, I can't find where U-Boot references this node. Are you sure
> > it's not using the ethernet%d aliases like everything else, in which
> > case why do we need this node at all?
> >
> > -Scott
> >
>
> The initial (Freescale SDK) binding document contained those compatibles,
> not sure what the initial intent was for the <SoC> variants.
>
> The "fsl,dpaa" node is of interest to the DPAA Ethernet because it is
> the parent of the "fsl,dpa-ethernet" nodes.
I'm not interested in what the SDK binding says, or what the SDK kernel
does. I'm interested in whether there's a U-Boot compatibility issue,
as was previously alleged. If there isn't, then there's no need for
fsl,dpaa *or* fsl,dpa-ethernet.
-Scott
^ permalink raw reply
* Re: [PATCH v2] powerpc: Remove more traces of bootmem
From: Michael Ellerman @ 2014-12-02 23:43 UTC (permalink / raw)
To: Tony Breeds; +Cc: linuxppc-dev, David.Laight
In-Reply-To: <20141120023319.GA71013@thor.bakeyournoodle.com>
On Thu, 2014-11-20 at 13:33 +1100, Tony Breeds wrote:
> On Thu, Nov 20, 2014 at 11:07:38AM +1100, Michael Ellerman wrote:
> > --- a/arch/powerpc/lib/alloc.c
> > +++ b/arch/powerpc/lib/alloc.c
> > @@ -13,9 +13,7 @@ void * __init_refok zalloc_maybe_bootmem(size_t size, gfp_t mask)
> > if (mem_init_done)
> > p = kzalloc(size, mask);
> > else {
> > - p = alloc_bootmem(size);
> > - if (p)
> > - memset(p, 0, size);
> > + p = memblock_virt_alloc(size, 0);
> > }
>
> You knew someone would ask but ...
> Do you want to remove the {} form the else clause so that the style matches the if()
Actually I was going to do a follow-up that just returns directly without p at
all, thanks for the reminder :)
cheers
^ permalink raw reply
* Re: [PATCH v3 1/4] powerpc/mpc85xx: Create dts components for the FSL QorIQ DPAA BMan
From: Scott Wood @ 2014-12-03 0:28 UTC (permalink / raw)
To: Emil Medve; +Cc: linuxppc-dev, Geoff Thorpe, devicetree
In-Reply-To: <1417428135-12895-2-git-send-email-Emilian.Medve@Freescale.com>
On Mon, 2014-12-01 at 04:02 -0600, Emil Medve wrote:
> +bman: bman@31a000 {
> + compatible = "fsl,bman";
> + reg = <0x31a000 0x1000>;
> + interrupts = <16 2 1 2>;
> + fsl,bman-portals = &bportals;
> + memory-region = <&bman_fbpr>;
Shouldn't it be <&bportals>?
And I don't see fsl,bman-portals in the binding...
-Scott
^ permalink raw reply
* Re: [PATCH v3 3/4] powerpc/mpc85xx: Add FSL QorIQ DPAA BMan support to device tree(s)
From: Scott Wood @ 2014-12-03 0:32 UTC (permalink / raw)
To: Emil Medve
Cc: devicetree, Poonam Aggrwal, Geoff Thorpe, linuxppc-dev,
Chunhe Lan
In-Reply-To: <1417428135-12895-4-git-send-email-Emilian.Medve@Freescale.com>
On Mon, 2014-12-01 at 04:02 -0600, Emil Medve wrote:
> diff --git a/arch/powerpc/boot/dts/t4240rdb.dts b/arch/powerpc/boot/dts/t4240rdb.dts
> index 53761d4..431bf4e 100644
> --- a/arch/powerpc/boot/dts/t4240rdb.dts
> +++ b/arch/powerpc/boot/dts/t4240rdb.dts
> @@ -69,10 +69,27 @@
> device_type = "memory";
> };
>
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + bman_fbpr: bman-fbpr {
> + compatible = "fsl,bman-fbpr";
> + alloc-ranges = <0 0 0xffff 0xffffffff>;
> + size = <0 0x1000000>;
> + alignment = <0 0x1000000>;
> + };
> + };
Can't this be done at the SoC level rather than board level?
-Scott
^ permalink raw reply
* Re: [PATCH v2 0/3] fix a kernel panic on fsl corenet board when CONFIG_CLK_PPC_CORENET is enabled
From: Scott Wood @ 2014-12-03 0:38 UTC (permalink / raw)
To: Tang Yuantian-B29983
Cc: Kevin Hao, linuxppc-dev@lists.ozlabs.org, Gerhard Sittig,
Mike Turquette, Lu Jingchang-B35083
In-Reply-To: <DM2PR03MB574DB4A270F85EB73EB76CDFA710@DM2PR03MB574.namprd03.prod.outlook.com>
If the current code panics as of commit da788acb2838, then the revert
(but not the other patches) should go to stable as well.
-Scott
On Wed, 2014-11-26 at 21:30 -0600, Tang Yuantian-B29983 wrote:
> Hello Mike,
>
> Could you please apply this patch?
> This patch has been acked for a while.
>
> Thanks,
> Yuantian
>
> > -----Original Message-----
> > From: Linuxppc-dev
> > [mailto:linuxppc-dev-bounces+b29983=freescale.com@lists.ozlabs.org] On
> > Behalf Of Scott Wood
> > Sent: Friday, November 07, 2014 12:08 PM
> > To: Kevin Hao
> > Cc: Mike Turquette; Gerhard Sittig; Lu Jingchang-B35083;
> > linuxppc-dev@lists.ozlabs.org
> > Subject: Re: [PATCH v2 0/3] fix a kernel panic on fsl corenet board when
> > CONFIG_CLK_PPC_CORENET is enabled
> >
> > On Sun, 2014-10-19 at 14:11 +0800, Kevin Hao wrote:
> > > Hi,
> > >
> > > I have done a boot test on p2014rdb and t4240qds boards. I don't have
> > > an access to mpc512x board, so only build test for that.
> > >
> > > v2:
> > > - Revert the commit da788acb2838 first.
> > > - Invoke of_clk_init() from a common place.
> > >
> > > v1
> > > This tries to fix a kernel panic introduced by commit da788acb2838
> > > ("clk: ppc-corenet: Fix Section mismatch warning").
> > >
> > > Kevin Hao (3):
> > > Revert "clk: ppc-corenet: Fix Section mismatch warning"
> > > powerpc: call of_clk_init() from time_init()
> > > clk: ppc-corenet: fix section mismatch warning
> > >
> > > arch/powerpc/kernel/time.c | 5 ++++
> > > arch/powerpc/platforms/512x/clock-commonclk.c | 11 ++++---
> > > drivers/clk/clk-ppc-corenet.c | 43 ++++-----------------------
> > > 3 files changed, 16 insertions(+), 43 deletions(-)
> > >
> >
> > Acked-by: Scott Wood <scottwood@freescale.com>
> >
> > Whose tree should this go through?
> >
> > -Scott
> >
> >
> > _______________________________________________
> > Linuxppc-dev mailing list
> > Linuxppc-dev@lists.ozlabs.org
> > https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* [PATCH v5 0/6]: Make 24x7 and GPCI events available in sysfs
From: Sukadev Bhattiprolu @ 2014-12-03 2:03 UTC (permalink / raw)
To: Arnaldo Carvalho de Melo, Jiri Olsa, Michael Ellerman,
Paul Mackerras
Cc: peterz, linuxppc-dev, dev, linux-kernel
The current support for the 24x7 and GPCI counters in the kernel requires
users to specify the domain and offset of the event numerically, which is
obviously hard to use:
perf stat -C 0 -e \
'hv_24x7/domain=2,offset=0xd58,starting_index=0,lpar=0xffffffff/' \
sleep 1
This patchset exports the 24x7 and GPCI counters info in sysfs so users can
specify the events by name:
$ cd /sys/bus/event_source/devices/hv_24x7/events
$ cat HPM_CS_FROM_L4_LDATA__PHYS_CORE
domain=0x2,offset=0xd58,starting_index=$core,lpar=0x0
$ cat HPM_TLBIE__VCPU_HOME_CHIP
domain=0x4,offset=0x358,starting_index=$vcpu,lpar=$sibling_guest_id
perf stat -C 0 -e \
'hv_24x7/HPM_CS_FROM_L4_LDATA__PHYS_CORE,starting_index=0'
sleep 1
This patchset adds the kernel support to export events in sysfs. A follow-on
patchset will add support to the perf tool to parse the event parameters like
'lpar=$sibling_guest_id' and display them via 'perf list'.
Changelog[v5]
- [Jiri Olsa, Peter Zijlstra] Use '$arg' notation rather than ?
to indicate event parameters.
- [Michael Ellerman] Separate the kernel and tool patches in the
patchset into different patchsets.
Changelog[v4]
- [Jiri Olsa Rebase to perf/core tree to fix small merge conflict.
Changelog[v3]
- [Jiri Olsa] Changed the event parameters are specified. If
event file specifes 'param=val' make the usage 'param=123'
rather than 'val=123'. (patch 1,2/10)
- Shortened event names using "PHYS" and "VCPU" (patch 4/10)
- Print help message if invalid parameter is specified or required
parameter is missing.
- Moved 3 patches that are unrelated to parametrized events into
a separate patchset.
- Reordered patches so code changes come first.
Changelog[v2]
- [Joe Perches, David Laight] Use beNN_to_cpu() instead of guessing
the size from type.
- Use kmem_cache_free() to free page allocated with kmem_cache_alloc().
- Rebase to recent kernel
Cody P Schafer (6):
perf: provide sysfs_show for struct perf_pmu_events_attr
perf: add PMU_EVENT_ATTR_STRING() helper
powerpc/perf/hv-24x7: parse catalog and populate sysfs with events
powerpc/perf/{hv-gpci, hv-common}: generate requests with counters
annotated
powerpc/perf/hv-gpci: add the remaining gpci requests
powerpc/perf/hv-24x7: Document sysfs event description entries
.../testing/sysfs-bus-event_source-devices-hv_24x7 | 22 +
arch/powerpc/perf/hv-24x7-catalog.h | 25 +
arch/powerpc/perf/hv-24x7-domains.h | 28 +
arch/powerpc/perf/hv-24x7.c | 787 ++++++++++++++++++++-
arch/powerpc/perf/hv-24x7.h | 12 +-
arch/powerpc/perf/hv-common.c | 10 +-
arch/powerpc/perf/hv-gpci-requests.h | 262 +++++++
arch/powerpc/perf/hv-gpci.c | 8 +
arch/powerpc/perf/hv-gpci.h | 37 +-
arch/powerpc/perf/req-gen/_begin.h | 13 +
arch/powerpc/perf/req-gen/_clear.h | 5 +
arch/powerpc/perf/req-gen/_end.h | 4 +
arch/powerpc/perf/req-gen/_request-begin.h | 15 +
arch/powerpc/perf/req-gen/_request-end.h | 8 +
arch/powerpc/perf/req-gen/perf.h | 155 ++++
include/linux/perf_event.h | 10 +
kernel/events/core.c | 8 +
17 files changed, 1365 insertions(+), 44 deletions(-)
create mode 100644 arch/powerpc/perf/hv-24x7-domains.h
create mode 100644 arch/powerpc/perf/hv-gpci-requests.h
create mode 100644 arch/powerpc/perf/req-gen/_begin.h
create mode 100644 arch/powerpc/perf/req-gen/_clear.h
create mode 100644 arch/powerpc/perf/req-gen/_end.h
create mode 100644 arch/powerpc/perf/req-gen/_request-begin.h
create mode 100644 arch/powerpc/perf/req-gen/_request-end.h
create mode 100644 arch/powerpc/perf/req-gen/perf.h
--
1.8.3.1
^ permalink raw reply
* [PATCH v5 1/6] perf: provide sysfs_show for struct perf_pmu_events_attr
From: Sukadev Bhattiprolu @ 2014-12-03 2:03 UTC (permalink / raw)
To: Arnaldo Carvalho de Melo, Jiri Olsa, Michael Ellerman,
Paul Mackerras
Cc: peterz, linuxppc-dev, dev, linux-kernel
In-Reply-To: <1417572235-8197-1-git-send-email-sukadev@linux.vnet.ibm.com>
From: Cody P Schafer <cody@linux.vnet.ibm.com>
(struct perf_pmu_events_attr) is defined in include/linux/perf_event.h,
but the only "show" for it is in x86 and contains x86 specific stuff.
Make a generic one for those of us who are just using the event_str.
CC: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
CC: Haren Myneni <hbabu@us.ibm.com>
CC: Cody P Schafer <dev@codyps.com>
Signed-off-by: Cody P Schafer <cody@linux.vnet.ibm.com>
---
include/linux/perf_event.h | 3 +++
kernel/events/core.c | 8 ++++++++
2 files changed, 11 insertions(+)
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 486e84c..58f59bd 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -897,6 +897,9 @@ struct perf_pmu_events_attr {
const char *event_str;
};
+ssize_t perf_event_sysfs_show(struct device *dev, struct device_attribute *attr,
+ char *page);
+
#define PMU_EVENT_ATTR(_name, _var, _id, _show) \
static struct perf_pmu_events_attr _var = { \
.attr = __ATTR(_name, 0444, _show, NULL), \
diff --git a/kernel/events/core.c b/kernel/events/core.c
index 3e19d3e..1e92387 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -8276,6 +8276,14 @@ void __init perf_event_init(void)
!= 1024);
}
+ssize_t perf_event_sysfs_show(struct device *dev, struct device_attribute *attr,
+ char *page)
+{
+ struct perf_pmu_events_attr *pmu_attr =
+ container_of(attr, struct perf_pmu_events_attr, attr);
+ return sprintf(page, "%s\n", pmu_attr->event_str);
+}
+
static int __init perf_event_sysfs_init(void)
{
struct pmu *pmu;
--
1.8.3.1
^ permalink raw reply related
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