* [PATCH v9 2/2] cxl: read PHB indications from the device tree
From: Philippe Bergheaud @ 2018-02-20 15:51 UTC (permalink / raw)
To: linuxppc-dev; +Cc: fbarrat, clombard, benh, Philippe Bergheaud
In-Reply-To: <20180220155111.20459-1-felix@linux.vnet.ibm.com>
Configure the P9 XSL_DSNCTL register with PHB indications found
in the device tree, or else use legacy hard-coded values.
Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com>
---
Changelog:
v2: New patch. Use the new device tree property "ibm,phb-indications".
v3: No change.
v4: No functional change.
Drop cosmetic fix in comment.
v5: get_phb_indications():
- make static variables local to function.
- return static variable values by arguments.
v6: get_phb_indications():
- acquire a mutex before setting the phb indications.
v7: get_phb_indications():
cxl_get_xsl9_dsnctl():
- return -ENODEV instead of -1.
v8: get_phb_indications():
- stay on the safe side: acquire the mutex unconditionally
v9: No change.
This patch depends on the following skiboot patch:
https://patchwork.ozlabs.org/patch/874415/
---
drivers/misc/cxl/cxl.h | 2 +-
drivers/misc/cxl/cxllib.c | 2 +-
drivers/misc/cxl/pci.c | 48 ++++++++++++++++++++++++++++++++++++++++++-----
3 files changed, 45 insertions(+), 7 deletions(-)
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index 4f015da78f28..a7689944b351 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -1065,7 +1065,7 @@ int cxl_psl_purge(struct cxl_afu *afu);
int cxl_calc_capp_routing(struct pci_dev *dev, u64 *chipid,
u32 *phb_index, u64 *capp_unit_id);
int cxl_slot_is_switched(struct pci_dev *dev);
-int cxl_get_xsl9_dsnctl(u64 capp_unit_id, u64 *reg);
+int cxl_get_xsl9_dsnctl(struct pci_dev *dev, u64 capp_unit_id, u64 *reg);
u64 cxl_calculate_sr(bool master, bool kernel, bool real_mode, bool p9);
void cxl_native_irq_dump_regs_psl9(struct cxl_context *ctx);
diff --git a/drivers/misc/cxl/cxllib.c b/drivers/misc/cxl/cxllib.c
index 30ccba436b3b..bea1eb004b49 100644
--- a/drivers/misc/cxl/cxllib.c
+++ b/drivers/misc/cxl/cxllib.c
@@ -99,7 +99,7 @@ int cxllib_get_xsl_config(struct pci_dev *dev, struct cxllib_xsl_config *cfg)
if (rc)
return rc;
- rc = cxl_get_xsl9_dsnctl(capp_unit_id, &cfg->dsnctl);
+ rc = cxl_get_xsl9_dsnctl(dev, capp_unit_id, &cfg->dsnctl);
if (rc)
return rc;
if (cpu_has_feature(CPU_FTR_POWER9_DD1)) {
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 758842f65a1b..8d179e64a296 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -407,21 +407,59 @@ int cxl_calc_capp_routing(struct pci_dev *dev, u64 *chipid,
return 0;
}
-int cxl_get_xsl9_dsnctl(u64 capp_unit_id, u64 *reg)
+static DEFINE_MUTEX(indications_mutex);
+
+static int get_phb_indications(struct pci_dev *dev, u64 *capiind, u64 *asnind,
+ u64 *nbwind)
+{
+ static u64 nbw, asn, capi = 0;
+ struct device_node *np;
+ const __be32 *prop;
+
+ mutex_lock(&indications_mutex);
+ if (!capi) {
+ if (!(np = pnv_pci_get_phb_node(dev))) {
+ mutex_unlock(&indications_mutex);
+ return -ENODEV;
+ }
+
+ prop = of_get_property(np, "ibm,phb-indications", NULL);
+ if (!prop) {
+ nbw = 0x0300UL; /* legacy values */
+ asn = 0x0400UL;
+ capi = 0x0200UL;
+ } else {
+ nbw = (u64)be32_to_cpu(prop[2]);
+ asn = (u64)be32_to_cpu(prop[1]);
+ capi = (u64)be32_to_cpu(prop[0]);
+ }
+ of_node_put(np);
+ }
+ *capiind = capi;
+ *asnind = asn;
+ *nbwind = nbw;
+ mutex_unlock(&indications_mutex);
+ return 0;
+}
+
+int cxl_get_xsl9_dsnctl(struct pci_dev *dev, u64 capp_unit_id, u64 *reg)
{
u64 xsl_dsnctl;
+ u64 capiind, asnind, nbwind;
/*
* CAPI Identifier bits [0:7]
* bit 61:60 MSI bits --> 0
* bit 59 TVT selector --> 0
*/
+ if (get_phb_indications(dev, &capiind, &asnind, &nbwind))
+ return -ENODEV;
/*
* Tell XSL where to route data to.
* The field chipid should match the PHB CAPI_CMPM register
*/
- xsl_dsnctl = ((u64)0x2 << (63-7)); /* Bit 57 */
+ xsl_dsnctl = (capiind << (63-15)); /* Bit 57 */
xsl_dsnctl |= (capp_unit_id << (63-15));
/* nMMU_ID Defaults to: b’000001001’*/
@@ -435,14 +473,14 @@ int cxl_get_xsl9_dsnctl(u64 capp_unit_id, u64 *reg)
* nbwind=0x03, bits [57:58], must include capi indicator.
* Not supported on P9 DD1.
*/
- xsl_dsnctl |= ((u64)0x03 << (63-47));
+ xsl_dsnctl |= (nbwind << (63-55));
/*
* Upper 16b address bits of ASB_Notify messages sent to the
* system. Need to match the PHB’s ASN Compare/Mask Register.
* Not supported on P9 DD1.
*/
- xsl_dsnctl |= ((u64)0x04 << (63-55));
+ xsl_dsnctl |= asnind;
}
*reg = xsl_dsnctl;
@@ -462,7 +500,7 @@ static int init_implementation_adapter_regs_psl9(struct cxl *adapter,
if (rc)
return rc;
- rc = cxl_get_xsl9_dsnctl(capp_unit_id, &xsl_dsnctl);
+ rc = cxl_get_xsl9_dsnctl(dev, capp_unit_id, &xsl_dsnctl);
if (rc)
return rc;
--
2.16.1
^ permalink raw reply related
* [PATCH 4/6] powerpc: numa: Restrict fake NUMA enulation to CONFIG_NUMA systems
From: Jonathan Neuschäfer @ 2018-02-20 16:14 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-kernel, Michael Ellerman, linux-mm, Joel Stanley,
Jonathan Neuschäfer, Benjamin Herrenschmidt, Paul Mackerras,
Nathan Fontenot, Michael Bringmann, Thomas Gleixner,
Thiago Jung Bauermann, Kees Cook
In-Reply-To: <20180220161424.5421-1-j.neuschaefer@gmx.net>
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
---
arch/powerpc/mm/numa.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index df03a65b658f..dfe279529463 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -738,7 +738,8 @@ static void __init setup_nonnuma(void)
start_pfn = memblock_region_memory_base_pfn(reg);
end_pfn = memblock_region_memory_end_pfn(reg);
- fake_numa_create_new_node(end_pfn, &nid);
+ if (IS_ENABLED(CONFIG_NUMA))
+ fake_numa_create_new_node(end_pfn, &nid);
memblock_set_node(PFN_PHYS(start_pfn),
PFN_PHYS(end_pfn - start_pfn),
&memblock.memory, nid);
--
2.16.1
^ permalink raw reply related
* Re: [RFC][PATCH bpf v2 1/2] bpf: allow 64-bit offsets for bpf function calls
From: Naveen N. Rao @ 2018-02-20 19:22 UTC (permalink / raw)
To: ast, Daniel Borkmann, Michael Ellerman, Sandipan Das
Cc: Michael Holzheu, linuxppc-dev, netdev
In-Reply-To: <87po50roup.fsf@concordia.ellerman.id.au>
Michael Ellerman wrote:
> "Naveen N. Rao" <naveen.n.rao@linux.vnet.ibm.com> writes:
>> Daniel Borkmann wrote:
>>> On 02/15/2018 05:25 PM, Daniel Borkmann wrote:
>>>> On 02/13/2018 05:05 AM, Sandipan Das wrote:
>>>>> The imm field of a bpf_insn is a signed 32-bit integer. For
>>>>> JIT-ed bpf-to-bpf function calls, it stores the offset from
>>>>> __bpf_call_base to the start of the callee function.
>>>>>
>>>>> For some architectures, such as powerpc64, it was found that
>>>>> this offset may be as large as 64 bits because of which this
>>>>> cannot be accomodated in the imm field without truncation.
>>>>>
>>>>> To resolve this, we additionally make aux->func within each
>>>>> bpf_prog associated with the functions to point to the list
>>>>> of all function addresses determined by the verifier.
>>>>>
>>>>> We keep the value assigned to the off field of the bpf_insn
>>>>> as a way to index into aux->func and also set aux->func_cnt
>>>>> so that this can be used for performing basic upper bound
>>>>> checks for the off field.
>>>>>
>>>>> Signed-off-by: Sandipan Das <sandipan@linux.vnet.ibm.com>
>>>>> ---
>>>>> v2: Make aux->func point to the list of functions determined
>>>>> by the verifier rather than allocating a separate callee
>>>>> list for each function.
>>>>=20
>>>> Approach looks good to me; do you know whether s390x JIT would
>>>> have similar requirement? I think one limitation that would still
>>>> need to be addressed later with such approach would be regarding the
>>>> xlated prog dump in bpftool, see 'BPF calls via JIT' in 7105e828c087
>>>> ("bpf: allow for correlation of maps and helpers in dump"). Any
>>>> ideas for this (potentially if we could use off + imm for calls,
>>>> we'd get to 48 bits, but that seems still not be enough as you say)?
>>
>> All good points. I'm not really sure how s390x works, so I can't comment=
=20
>> on that, but I'm copying Michael Holzheu for his consideration.
>>
>> With the existing scheme, 48 bits won't be enough, so we rejected that=20
>> approach. I can also see how this will be a problem with bpftool, but I=20
>> haven't looked into it in detail. I wonder if we can annotate the output=
=20
>> to indicate the function being referred to?
>>
>>>=20
>>> One other random thought, although I'm not sure how feasible this
>>> is for ppc64 JIT to realize ... but idea would be to have something
>>> like the below:
>>>=20
>>> diff --git a/kernel/bpf/core.c b/kernel/bpf/core.c
>>> index 29ca920..daa7258 100644
>>> --- a/kernel/bpf/core.c
>>> +++ b/kernel/bpf/core.c
>>> @@ -512,6 +512,11 @@ int bpf_get_kallsym(unsigned int symnum, unsigned =
long *value, char *type,
>>> return ret;
>>> }
>>>=20
>>> +void * __weak bpf_jit_image_alloc(unsigned long size)
>>> +{
>>> + return module_alloc(size);
>>> +}
>>> +
>>> struct bpf_binary_header *
>>> bpf_jit_binary_alloc(unsigned int proglen, u8 **image_ptr,
>>> unsigned int alignment,
>>> @@ -525,7 +530,7 @@ bpf_jit_binary_alloc(unsigned int proglen, u8 **ima=
ge_ptr,
>>> * random section of illegal instructions.
>>> */
>>> size =3D round_up(proglen + sizeof(*hdr) + 128, PAGE_SIZE);
>>> - hdr =3D module_alloc(size);
>>> + hdr =3D bpf_jit_image_alloc(size);
>>> if (hdr =3D=3D NULL)
>>> return NULL;
>>>=20
>>> And ppc64 JIT could override bpf_jit_image_alloc() in a similar way
>>> like some archs would override the module_alloc() helper through a
>>> custom implementation, usually via __vmalloc_node_range(), so we
>>> could perhaps fit the range for BPF JITed images in a way that they
>>> could use the 32bit imm in the end? There are not that many progs
>>> loaded typically, so the range could be a bit narrower in such case
>>> anyway. (Not sure if this would work out though, but I thought to
>>> bring it up.)
>>
>> That'd be a good option to consider. I don't think we want to allocate=20
>> anything from the linear memory range since users could load=20
>> unprivileged BPF programs and consume a lot of memory that way. I doubt=20
>> if we can map vmalloc'ed memory into the 0xc0 address range, but I'm not=
=20
>> entirely sure.
>>
>> Michael,
>> Is the above possible? The question is if we can have BPF programs be=20
>> allocated within 4GB of __bpf_call_base (which is a kernel symbol), so=20
>> that calls to those programs can be encoded in a 32-bit immediate field=20
>> in a BPF instruction.
>=20
> Hmmm.
>=20
> It's not technically impossible, but I don't think it's really a good
> option.
>=20
> The 0xc range is a linear mapping of RAM, and the kernel tends to be
> near the start of RAM for reasons. That means there generally isn't a
> hole in the 0xc range within 4GB for you to map BPF programs.
>=20
> You could create a hole by making the 0xc mapping non linear, ie.
> mapping some RAM near the kernel elsewhere in the 0xc range, to make a
> hole that you can then remap BPF programs into. But I think that would
> cause a lot of bugs, it's a pretty fundamental assumption that the
> linear mapping is 1:1.
>=20
>> As an extension, we may be able to extend it to=20
>> 48-bits by combining with another BPF instruction field (offset). In=20
>> either case, the vmalloc'ed address range won't work.
>=20
> 48-bits could possibly work, we don't have systems with that much RAM
> *yet*. So you could remap the BPF programs at the end of the 0xc range,
> or somewhere we have a gap in RAM.
>=20
> That would probably still confuse some things, ie. the 0xc mapping would
> be a 1:1 mapping of RAM plus some other stuff, but it might be tractable
> to fix.
>=20
> We don't have page tables for the 0xc range when using the hash MMU, so
> we'd need to either fix that or use some bespoke data structure for
> keeping track of the mappings.
>=20
> It doesn't really appeal :)
Thanks for the detailed explanation. That does look gross :)
>=20
> We load modules in the 0xd range, and they call functions in the kernel,
> we handle that with trampolines. Can you do something similar?
Yes, we already handle this in our JIT. The scenario being considered=20
here is in how the BPF core informs the BPF JIT engine when it has to=20
call out to a different BPF JIT'ed function. The existing approach=20
encodes an offset from __bpf_call_base() in the imm32 field of the BPF=20
instruction itself. For powerpc64 though, I think we'll have to have the=20
address of the JIT'ed BPF functions passed in through other means.
>=20
> You obviously still need a 64-bit branch somewhere, but perhaps you only
> need one, or one per BPF program, rather than one per function call.
We may have more than a single branch depending on how the program is=20
laid out. We are looking to see if it is worth detecting that a call is=20
close-by to do a relative branch, rather than loading a full 64-bit=20
address and branching to that. For BPF-to-BPF calls, we should also be=20
able to skip all the r12/r2 GEP/TOC handling. We may need to emit an=20
additional branch to skip over some instructions (or emit nops) just so=20
we consistently emit a fixed number of instructions each pass.
>=20
>> The alternative is to pass the full 64-bit address of the BPF program in=
=20
>> an auxiliary field (as proposed in this patch set) but we need to fix it=
=20
>> up for 'bpftool' as well.
>=20
> OK. You'll have to explain to me how bpftool is related, I thought it
> was just for loading/examining BPF programs.
It is, and it can also dump loaded BPF programs. When such programs call=20
out to other BPF programs, bpftool currently figures out the address of=20
the target BPF function by essentially doing (__bpf_call_base + imm32)=20
and looking up kallsyms. Since we've established that imm32 is not=20
enough for us, this won't work on powerpc64.
However, if bpf_jit_kallsyms is not enabled, it looks like bpftool will=20
still fail to resolve the call, and only print out an address today. I'm=20
wondering if we can instead encode the bpf prog id in imm32. That way,=20
we should be able to indicate the BPF function being called into. =20
Daniel, is that something we can consider?
Thanks!
- Naveen
=
^ permalink raw reply
* Re: [PATCH v2] watchdog: add SPDX identifiers for watchdog subsystem
From: Marcus Folkesson @ 2018-02-20 18:45 UTC (permalink / raw)
To: William Breathitt Gray
Cc: Guenter Roeck, Wim Van Sebroeck, Joel Stanley, Nicolas Ferre,
Alexandre Belloni, Florian Fainelli, Ray Jui, Scott Branden,
bcm-kernel-feedback-list, Eric Anholt, Stefan Wahren,
Linus Walleij, Support Opensource, Baruch Siach, Jimmy Vance,
Keguang Zhang, Joachim Eastwood, Tomas Winkler,
Johannes Thumshirn, Andreas Werner, Carlo Caione, Kevin Hilman,
Matthias Brugger, Wan ZongShun, Michal Simek, Vladimir Zapolskiy,
Sylvain Lemieux, Kukjin Kim, Krzysztof Kozlowski, Zwane Mwaikambo,
Jim Cromie, Barry Song, Patrice Chotard, Maxime Ripard,
Chen-Yu Tsai, Marc Gonzalez, Mans Rullgard, Thierry Reding,
Jonathan Hunter, Masahiro Yamada, Benjamin Herrenschmidt,
Paul Mackerras, Michael Ellerman, Jun Nie, Baoyou Xie, Shawn Guo,
linux-watchdog, linux-kernel, linux-arm-kernel, linux-rpi-kernel,
adi-buildroot-devel, linux-mips, linux-amlogic, linux-mediatek,
linux-samsung-soc, linux-tegra, linuxppc-dev, patches
In-Reply-To: <20180220181427.GA25467@sophia>
[-- Attachment #1: Type: text/plain, Size: 4784 bytes --]
On Tue, Feb 20, 2018 at 01:14:27PM -0500, William Breathitt Gray wrote:
> On Tue, Feb 20, 2018 at 04:33:26PM +0100, Marcus Folkesson wrote:
> >On Tue, Feb 20, 2018 at 07:13:43AM -0800, Guenter Roeck wrote:
> >> On 02/20/2018 05:21 AM, Marcus Folkesson wrote:
> >> > Hello William,
> >> >
> >> > On Tue, Feb 20, 2018 at 07:49:55AM -0500, William Breathitt Gray wrote:
> >> > > On Tue, Feb 20, 2018 at 11:45:31AM +0100, Marcus Folkesson wrote:
> >> > > > - Add SPDX identifier
> >> > > > - Remove boiler plate license text
> >> > > > - If MODULE_LICENSE and boiler plate does not match, go for boiler plate
> >> > > > license
> >> > > >
> >> > > > Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
> >> > > > Acked-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
> >> > > > Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
> >> > > > Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> >> > > > Acked-by: Michal Simek <michal.simek@xilinx.com>
> >> > > > ---
> >> > > >
> >> > > > Notes:
> >> > > > v2:
> >> > > > - Put back removed copyright texts for meson_gxbb_wdt and coh901327_wdt
> >> > > > - Change to BSD-3-Clause for meson_gxbb_wdt
> >> > > > v1: Please have an extra look at meson_gxbb_wdt.c
> >> > >
> >> > > [...]
> >> > >
> >> > > > diff --git a/drivers/watchdog/ebc-c384_wdt.c b/drivers/watchdog/ebc-c384_wdt.c
> >> > > > index 2170b275ea01..c173b6f5c866 100644
> >> > > > --- a/drivers/watchdog/ebc-c384_wdt.c
> >> > > > +++ b/drivers/watchdog/ebc-c384_wdt.c
> >> > > > @@ -1,15 +1,8 @@
> >> > > > +// SPDX-License-Identifier: GPL-2.0
> >> > > > /*
> >> > > > * Watchdog timer driver for the WinSystems EBC-C384
> >> > > > * Copyright (C) 2016 William Breathitt Gray
> >> > > > *
> >
> >The copyright is untouched?
> >
> >> > > > - * This program is free software; you can redistribute it and/or modify
> >> > > > - * it under the terms of the GNU General Public License, version 2, as
> >> > > > - * published by the Free Software Foundation.
> >> > > > - *
> >> > > > - * This program is distributed in the hope that it will be useful, but
> >> > > > - * WITHOUT ANY WARRANTY; without even the implied warranty of
> >> > > > - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> >> > > > - * General Public License for more details.
> >> > > > */
> >> > > > #include <linux/device.h>
> >> > > > #include <linux/dmi.h>
> >> >
> >> > Thank you for your feedback!
> >> > >
> >> > > I have no problem with adding a SPDX line to the top of this file, but
> >> > > use "SPDX-License-Identifier: GPL-2.0-only" as I was very intentional
> >> > > with the selection of GPL version 2 only when I published this code.
> >> >
> >> > SPDX-License-Identifier: GPL-2.0
> >> > Is GPL-2.0 only [1], so it respects your choice of license.
>
> Ah, this should be fine then. :)
>
Good!
> >> >
> >> > >
> >> > > Furthermore, please do not remove the existing copyright text; although
> >> >
> >>
> >> It is not a matter if you CAN keep a copyright. You MUST NOT remove a copyright.
> >> As long as you do, the series is
> >>
> >> Nacked-by: Guenter Roeck <linux@roeck-us.net>
> >>
> >> Guenter
> >
> >I'm sorry, I do not see where the copyright is removed unless you count
> >the license text as part of the copyright.
> >
> >Can you please point it out?
> >
> >>
> >> > The copyright text:
> >> >
> >> > Copyright (C) 2016 William Breathitt Gray
> >> >
> >> > Is still in the file.
> >
> >^^^
> >
> >> >
> >> >
> >> > > it's just boilerplate for some, I was careful with the selection of
> >> > > these words, and I worry the SPDX line only -- despite its useful
> >> > > conciseness -- may lead to misunderstandings about my intentioned
> >> > > license for this code.
> >> >
> >> > I'm not sure I understand your concerns here, the SPDX identifier is
> >> > a shorthand for the GPL 2.0 only license. See [1] - Linux kernel licensing rules.
> >> >
> >> > One of the biggest benefits with SPDX identifier is that it is hard to verify
> >> > boiler plate licenses due to formatting, types, different formulations and so on.
> >> >
> >> > If still worrying, I think we could keep the license text as
> >> > well.
>
> I'm sorry for the confusion, I should have wrote "license text" rather
> than "copyright text" in my previous message. I agree with the benefits
No problem at all.
> of utilizing the SPDX identifier, and I see the addition of the SPDX
> line as useful, but I would prefer the original license text remain as
> well.
Of course, I will keep the the original license intact for v3.
>
> William Breathitt Gray
>
Best regards
Marcus Folkesson
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^ permalink raw reply
* [PATCH] bpf, powerpc: fix jit for seccomp_data access
From: Mark Lord @ 2018-02-20 19:49 UTC (permalink / raw)
To: Naveen N. Rao, Alexei Starovoitov, Daniel Borkmann, Kees Cook,
Andy Lutomirski, mpe, Will Drewry
Cc: linuxppc-dev
In-Reply-To: <1519154571.d9vaokens9.naveen@linux.ibm.com>
I am using SECCOMP to filter syscalls on a ppc32 platform,
and noticed that the JIT compiler was failing on the BPF
even though the interpreter was working fine.
The issue was that the compiler was missing one of the instructions
used by SECCOMP, so here is a patch to enable JIT for that instruction.
Signed-Off-By: Mark Lord <mlord@pobox.com>
--- old/arch/powerpc/net/bpf_jit_comp.c 2018-02-16 14:07:01.000000000 -0500
+++ linux/arch/powerpc/net/bpf_jit_comp.c 2018-02-20 14:41:20.805227494 -0500
@@ -329,6 +329,9 @@ static int bpf_jit_build_body(struct bpf
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
PPC_LWZ_OFFS(r_A, r_skb, offsetof(struct sk_buff, len));
break;
+ case BPF_LDX | BPF_W | BPF_ABS: /* A = *((u32 *)(seccomp_data + K)); */
+ PPC_LWZ_OFFS(r_A, r_skb, K);
+ break;
case BPF_LDX | BPF_W | BPF_LEN: /* X = skb->len; */
PPC_LWZ_OFFS(r_X, r_skb, offsetof(struct sk_buff, len));
break;
--
Mark Lord
Real-Time Remedies Inc.
mlord@pobox.com
^ permalink raw reply
* Re: [PATCH] powerpc/npu-dma.c: Fix deadlock in mmio_invalidate
From: Mark Hairgrove @ 2018-02-20 18:34 UTC (permalink / raw)
To: Balbir Singh; +Cc: Alistair Popple, mpe, linuxppc-dev, Javier Cabezas
In-Reply-To: <20180219135704.3bd0cfb9@balbir.ozlabs.ibm.com>
On Mon, 19 Feb 2018, Balbir Singh wrote:
> Good point, although I think the acquire_* function itself may be called
> from a higher layer with the mmap_sem always held. I wonder if we need
> barriers around get and put mmio_atsd_reg.
I agree with the need for memory barriers. FWIW, page tables can be
invalidated without mmap_sem being held, for example by
unmap_mapping_range.
^ permalink raw reply
* [PATCH v9 1/2] powerpc/powernv: Enable tunneled operations
From: Philippe Bergheaud @ 2018-02-20 15:51 UTC (permalink / raw)
To: linuxppc-dev; +Cc: fbarrat, clombard, benh, Philippe Bergheaud
P9 supports PCI tunneled operations (atomics and as_notify). This
patch adds support for tunneled operations on powernv, with a new
API, to be called by device drivers:
pnv_pci_enable_tunnel()
Enable tunnel operations, tell driver the 16-bit ASN indication
used by kernel.
pnv_pci_disable_tunnel()
Disable tunnel operations.
pnv_pci_set_tunnel_bar()
Tell kernel the Tunnel BAR Response address used by driver.
This function uses two new OPAL calls, as the PBCQ Tunnel BAR
register is configured by skiboot.
pnv_pci_get_as_notify_info()
Return the ASN info of the thread to be woken up.
Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com>
---
Changelog:
v2: Do not set the ASN indication. Get it from the device tree.
v3: Make pnv_pci_get_phb_node() available when compiling without cxl.
v4: Add pnv_pci_get_as_notify_info().
Rebase opal call numbers on skiboot 5.9.6.
v5: pnv_pci_get_tunnel_ind():
- fix node reference count
pnv_pci_get_as_notify_info():
- fail if task == NULL
- read pid from mm->context.id
- explain that thread.tidr require CONFIG_PPC64
v6: pnv_pci_get_tunnel_ind():
- check if radix is enabled, or else return an error
pnv_pci_get_as_notify_info():
- remove a capi-specific comment, irrelevant for pci
v7: pnv_pci_set_tunnel_bar():
- setting the tunnel bar more than once with the same value
is not an error
v8: No change
v9: Rename pnv_pci_get_tunnel_ind() into pnv_pci_enable_tunnel():
- Increase real window size to accept as_notify messages.
New api pnv_pci_disable_tunnel():
- Restore real window size to its default value.
Adjust opal call numbers.
This patch depends on the following skiboot patches:
https://patchwork.ozlabs.org/patch/874415/
https://patchwork.ozlabs.org/patch/874416/
---
arch/powerpc/include/asm/opal-api.h | 4 +-
arch/powerpc/include/asm/opal.h | 2 +
arch/powerpc/include/asm/pnv-pci.h | 6 ++
arch/powerpc/platforms/powernv/opal-wrappers.S | 2 +
arch/powerpc/platforms/powernv/pci-cxl.c | 8 --
arch/powerpc/platforms/powernv/pci.c | 135 +++++++++++++++++++++++++
6 files changed, 148 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h
index 94bd1bf2c873..07b5e2240ecc 100644
--- a/arch/powerpc/include/asm/opal-api.h
+++ b/arch/powerpc/include/asm/opal-api.h
@@ -204,7 +204,9 @@
#define OPAL_NPU_SPA_SETUP 159
#define OPAL_NPU_SPA_CLEAR_CACHE 160
#define OPAL_NPU_TL_SET 161
-#define OPAL_LAST 161
+#define OPAL_PCI_GET_PBCQ_TUNNEL_BAR 162
+#define OPAL_PCI_SET_PBCQ_TUNNEL_BAR 163
+#define OPAL_LAST 163
/* Device tree flags */
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 12e70fb58700..dde60089d0d4 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -204,6 +204,8 @@ int64_t opal_unregister_dump_region(uint32_t id);
int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val);
int64_t opal_config_cpu_idle_state(uint64_t state, uint64_t flag);
int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number);
+int64_t opal_pci_get_pbcq_tunnel_bar(uint64_t phb_id, uint64_t *addr);
+int64_t opal_pci_set_pbcq_tunnel_bar(uint64_t phb_id, uint64_t addr);
int64_t opal_ipmi_send(uint64_t interface, struct opal_ipmi_msg *msg,
uint64_t msg_len);
int64_t opal_ipmi_recv(uint64_t interface, struct opal_ipmi_msg *msg,
diff --git a/arch/powerpc/include/asm/pnv-pci.h b/arch/powerpc/include/asm/pnv-pci.h
index 3e5cf251ad9a..d2d8c28db336 100644
--- a/arch/powerpc/include/asm/pnv-pci.h
+++ b/arch/powerpc/include/asm/pnv-pci.h
@@ -29,6 +29,12 @@ extern int pnv_pci_set_power_state(uint64_t id, uint8_t state,
extern int pnv_pci_set_p2p(struct pci_dev *initiator, struct pci_dev *target,
u64 desc);
+extern int pnv_pci_enable_tunnel(struct pci_dev *dev, uint64_t *asnind);
+extern int pnv_pci_disable_tunnel(struct pci_dev *dev);
+extern int pnv_pci_set_tunnel_bar(struct pci_dev *dev, uint64_t addr,
+ int enable);
+extern int pnv_pci_get_as_notify_info(struct task_struct *task, u32 *lpid,
+ u32 *pid, u32 *tid);
int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode);
int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq,
unsigned int virq);
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 1b2936ba6040..3da30c2f26b4 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -323,3 +323,5 @@ OPAL_CALL(opal_sensor_group_clear, OPAL_SENSOR_GROUP_CLEAR);
OPAL_CALL(opal_npu_spa_setup, OPAL_NPU_SPA_SETUP);
OPAL_CALL(opal_npu_spa_clear_cache, OPAL_NPU_SPA_CLEAR_CACHE);
OPAL_CALL(opal_npu_tl_set, OPAL_NPU_TL_SET);
+OPAL_CALL(opal_pci_get_pbcq_tunnel_bar, OPAL_PCI_GET_PBCQ_TUNNEL_BAR);
+OPAL_CALL(opal_pci_set_pbcq_tunnel_bar, OPAL_PCI_SET_PBCQ_TUNNEL_BAR);
diff --git a/arch/powerpc/platforms/powernv/pci-cxl.c b/arch/powerpc/platforms/powernv/pci-cxl.c
index 94498a04558b..cee003de63af 100644
--- a/arch/powerpc/platforms/powernv/pci-cxl.c
+++ b/arch/powerpc/platforms/powernv/pci-cxl.c
@@ -16,14 +16,6 @@
#include "pci.h"
-struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev)
-{
- struct pci_controller *hose = pci_bus_to_host(dev->bus);
-
- return of_node_get(hose->dn);
-}
-EXPORT_SYMBOL(pnv_pci_get_phb_node);
-
int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode)
{
struct pci_controller *hose = pci_bus_to_host(dev->bus);
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 69d102cbf48f..b265ecc0836a 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -18,6 +18,7 @@
#include <linux/io.h>
#include <linux/msi.h>
#include <linux/iommu.h>
+#include <linux/sched/mm.h>
#include <asm/sections.h>
#include <asm/io.h>
@@ -38,6 +39,7 @@
#include "pci.h"
static DEFINE_MUTEX(p2p_mutex);
+static DEFINE_MUTEX(tunnel_mutex);
int pnv_pci_get_slot_id(struct device_node *np, uint64_t *id)
{
@@ -1092,6 +1094,139 @@ int pnv_pci_set_p2p(struct pci_dev *initiator, struct pci_dev *target, u64 desc)
}
EXPORT_SYMBOL_GPL(pnv_pci_set_p2p);
+struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev)
+{
+ struct pci_controller *hose = pci_bus_to_host(dev->bus);
+
+ return of_node_get(hose->dn);
+}
+EXPORT_SYMBOL(pnv_pci_get_phb_node);
+
+int pnv_pci_enable_tunnel(struct pci_dev *dev, u64 *asnind)
+{
+ struct device_node *np;
+ const __be32 *prop;
+ struct pnv_ioda_pe *pe;
+ uint16_t window_id;
+ int rc;
+
+ if (!radix_enabled())
+ return -ENXIO;
+
+ if (!(np = pnv_pci_get_phb_node(dev)))
+ return -ENXIO;
+
+ prop = of_get_property(np, "ibm,phb-indications", NULL);
+ of_node_put(np);
+
+ if (!prop || !prop[1])
+ return -ENXIO;
+
+ *asnind = (u64)be32_to_cpu(prop[1]);
+ pe = pnv_ioda_get_pe(dev);
+ if (!pe)
+ return -ENODEV;
+
+ /* Increase real window size to accept as_notify messages. */
+ window_id = (pe->pe_number << 1 ) + 1;
+ rc = opal_pci_map_pe_dma_window_real(pe->phb->opal_id, pe->pe_number,
+ window_id, pe->tce_bypass_base,
+ (uint64_t)1 << 48);
+ return opal_error_code(rc);
+}
+EXPORT_SYMBOL_GPL(pnv_pci_enable_tunnel);
+
+int pnv_pci_disable_tunnel(struct pci_dev *dev)
+{
+ struct pnv_ioda_pe *pe;
+
+ pe = pnv_ioda_get_pe(dev);
+ if (!pe)
+ return -ENODEV;
+
+ /* Restore default real window size. */
+ pnv_pci_ioda2_set_bypass(pe, true);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(pnv_pci_disable_tunnel);
+
+int pnv_pci_set_tunnel_bar(struct pci_dev *dev, u64 addr, int enable)
+{
+ __be64 val;
+ struct pci_controller *hose;
+ struct pnv_phb *phb;
+ u64 tunnel_bar;
+ int rc;
+
+ if (!opal_check_token(OPAL_PCI_GET_PBCQ_TUNNEL_BAR))
+ return -ENXIO;
+ if (!opal_check_token(OPAL_PCI_SET_PBCQ_TUNNEL_BAR))
+ return -ENXIO;
+
+ hose = pci_bus_to_host(dev->bus);
+ phb = hose->private_data;
+
+ mutex_lock(&tunnel_mutex);
+ rc = opal_pci_get_pbcq_tunnel_bar(phb->opal_id, &val);
+ if (rc != OPAL_SUCCESS) {
+ rc = -EIO;
+ goto out;
+ }
+ tunnel_bar = be64_to_cpu(val);
+ if (enable) {
+ /*
+ * Only one device per PHB can use atomics.
+ * Our policy is first-come, first-served.
+ */
+ if (tunnel_bar) {
+ if (tunnel_bar != addr)
+ rc = -EBUSY;
+ else
+ rc = 0; /* Setting same address twice is ok */
+ goto out;
+ }
+ } else {
+ /*
+ * The device that owns atomics and wants to release
+ * them must pass the same address with enable == 0.
+ */
+ if (tunnel_bar != addr) {
+ rc = -EPERM;
+ goto out;
+ }
+ addr = 0x0ULL;
+ }
+ rc = opal_pci_set_pbcq_tunnel_bar(phb->opal_id, addr);
+ rc = opal_error_code(rc);
+out:
+ mutex_unlock(&tunnel_mutex);
+ return rc;
+}
+EXPORT_SYMBOL_GPL(pnv_pci_set_tunnel_bar);
+
+#ifdef CONFIG_PPC64 /* for thread.tidr */
+int pnv_pci_get_as_notify_info(struct task_struct *task, u32 *lpid, u32 *pid,
+ u32 *tid)
+{
+ struct mm_struct *mm = NULL;
+
+ if (task == NULL)
+ return -EINVAL;
+
+ mm = get_task_mm(task);
+ if (mm == NULL)
+ return -EINVAL;
+
+ *pid = mm->context.id;
+ mmput(mm);
+
+ *tid = task->thread.tidr;
+ *lpid = mfspr(SPRN_LPID);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(pnv_pci_get_as_notify_info);
+#endif
+
void pnv_pci_shutdown(void)
{
struct pci_controller *hose;
--
2.16.1
^ permalink raw reply related
* Re: [PATCH v2] watchdog: add SPDX identifiers for watchdog subsystem
From: Matthias Brugger @ 2018-02-20 16:26 UTC (permalink / raw)
To: Marcus Folkesson, Wim Van Sebroeck, Guenter Roeck, Joel Stanley,
Nicolas Ferre, Alexandre Belloni, Florian Fainelli, Ray Jui,
Scott Branden, bcm-kernel-feedback-list, Eric Anholt,
Stefan Wahren, Linus Walleij, Support Opensource, Baruch Siach,
William Breathitt Gray, Jimmy Vance, Keguang Zhang,
Joachim Eastwood, Tomas Winkler, Johannes Thumshirn,
Andreas Werner, Carlo Caione, Kevin Hilman, Wan ZongShun,
Michal Simek, Vladimir Zapolskiy, Sylvain Lemieux, Kukjin Kim,
Krzysztof Kozlowski, Zwane Mwaikambo, Jim Cromie, Barry Song,
Patrice Chotard, Maxime Ripard, Chen-Yu Tsai, Marc Gonzalez,
Mans Rullgard, Thierry Reding, Jonathan Hunter, Masahiro Yamada,
Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, Jun Nie,
Baoyou Xie, Shawn Guo
Cc: linux-watchdog, linux-kernel, linux-arm-kernel, linux-rpi-kernel,
adi-buildroot-devel, linux-mips, linux-amlogic, linux-mediatek,
linux-samsung-soc, linux-tegra, linuxppc-dev, patches
In-Reply-To: <20180220104542.32286-1-marcus.folkesson@gmail.com>
On 02/20/2018 11:45 AM, Marcus Folkesson wrote:
> - Add SPDX identifier
> - Remove boiler plate license text
> - If MODULE_LICENSE and boiler plate does not match, go for boiler plate
> license
>
> Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
> Acked-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> Acked-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> Notes:
> v2:
> - Put back removed copyright texts for meson_gxbb_wdt and coh901327_wdt
> - Change to BSD-3-Clause for meson_gxbb_wdt
> v1: Please have an extra look at meson_gxbb_wdt.c
>
> drivers/watchdog/acquirewdt.c | 6 +---
[...]
> drivers/watchdog/mpc8xxx_wdt.c | 6 +---
> drivers/watchdog/mt7621_wdt.c | 5 +---
> drivers/watchdog/mtk_wdt.c | 11 +-------
> drivers/watchdog/mtx-1_wdt.c | 11 +-------
> drivers/watchdog/mv64x60_wdt.c | 6 ++--
[...]
> diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
> index 7ed417a765c7..498e7d4e1b66 100644
> --- a/drivers/watchdog/mtk_wdt.c
> +++ b/drivers/watchdog/mtk_wdt.c
> @@ -1,3 +1,4 @@
> +// SPDX-License-Identifier: GPL-2.0+
> /*
> * Mediatek Watchdog Driver
> *
> @@ -5,16 +6,6 @@
> *
> * Matthias Brugger <matthias.bgg@gmail.com>
> *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License as published by
> - * the Free Software Foundation; either version 2 of the License, or
> - * (at your option) any later version.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> - *
> * Based on sunxi_wdt.c
> */
>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
^ permalink raw reply
* [PATCH 7/9] powerpc/64/le: add GENERIC_CPU support
From: Nicholas Piggin @ 2018-02-20 19:08 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin
In-Reply-To: <20180220190832.1872-1-npiggin@gmail.com>
Add GENERIC_CPU support for little-endian rather than using POWER8
specific selection for POWER9 and above.
Restrict GENERIC_CPU to POWER8 and above on little endian.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/Makefile | 5 +++++
arch/powerpc/platforms/Kconfig.cputype | 6 +++---
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 2265d53023f4..973b1a1b98d2 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -144,8 +144,13 @@ CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions)
CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 $(MULTIPLEWORD)
ifeq ($(CONFIG_PPC_BOOK3S_64),y)
+ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y)
+CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=power8
+CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power8)
+else
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,$(call cc-option,-mtune=power5))
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mcpu=power5,-mcpu=power4)
+endif
else
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=powerpc64
endif
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 560466cc5170..ad878990c896 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -87,7 +87,6 @@ endchoice
choice
prompt "CPU selection"
depends on PPC64
- default POWER8_CPU if CPU_LITTLE_ENDIAN
default GENERIC_CPU
help
This will create a kernel which is optimised for a particular CPU.
@@ -96,8 +95,9 @@ choice
If unsure, select Generic.
config GENERIC_CPU
- bool "Generic"
- depends on !CPU_LITTLE_ENDIAN
+ bool "Generic" if !CPU_LITTLE_ENDIAN
+ bool "Generic (POWER8 and above)" if CPU_LITTLE_ENDIAN
+ select ARCH_HAS_FAST_MULTIPLIER if CPU_LITTLE_ENDIAN
config CELL_CPU
bool "Cell Broadband Engine"
--
2.16.1
^ permalink raw reply related
* [PATCH 8/9] powerpc/64s/le: refine feature sets for little endian builds
From: Nicholas Piggin @ 2018-02-20 19:08 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin
In-Reply-To: <20180220190832.1872-1-npiggin@gmail.com>
This reduces vmlinux text size by 1kB and data by 1.5kB with
a small build!
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/include/asm/cputable.h | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 8907f44df708..cb423f2a5696 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -479,6 +479,13 @@ static inline void cpu_feature_keys_init(void) { }
#ifdef CONFIG_PPC_BOOK3E
#define CPU_FTRS_POSSIBLE (CPU_FTRS_E6500 | CPU_FTRS_E5500)
#else
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+#define CPU_FTRS_POSSIBLE \
+ (CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | \
+ CPU_FTRS_POWER8 | CPU_FTRS_POWER8_DD1 | \
+ CPU_FTR_ALTIVEC_COMP | CPU_FTR_VSX_COMP | \
+ CPU_FTRS_POWER9 | CPU_FTRS_POWER9_DD1 | CPU_FTRS_POWER9_DD2_1)
+#else
#define CPU_FTRS_POSSIBLE \
(CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | \
CPU_FTRS_POWER6 | CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | \
@@ -486,6 +493,7 @@ static inline void cpu_feature_keys_init(void) { }
CPU_FTRS_PA6T | CPU_FTR_ALTIVEC_COMP | CPU_FTR_VSX_COMP | \
CPU_FTRS_POWER9 | CPU_FTRS_POWER9_DD1 | CPU_FTRS_POWER9_DD2_1)
#endif
+#endif
#else
enum {
CPU_FTRS_POSSIBLE =
@@ -531,6 +539,13 @@ enum {
#ifdef CONFIG_PPC_BOOK3E
#define CPU_FTRS_ALWAYS (CPU_FTRS_E6500 & CPU_FTRS_E5500)
#else
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+#define CPU_FTRS_ALWAYS \
+ (CPU_FTRS_POWER7 & CPU_FTRS_POWER8E & \
+ CPU_FTRS_POWER8 & CPU_FTRS_POWER8_DD1 & \
+ CPU_FTRS_POWER9 & CPU_FTRS_POWER9_DD1 & CPU_FTRS_POWER9_DD2_1 & \
+ CPU_FTRS_POSSIBLE & ~CPU_FTR_HVMODE)
+#else
#define CPU_FTRS_ALWAYS \
(CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & \
CPU_FTRS_POWER6 & CPU_FTRS_POWER7 & CPU_FTRS_CELL & \
@@ -538,6 +553,7 @@ enum {
CPU_FTRS_POWER8_DD1 & ~CPU_FTR_HVMODE & CPU_FTRS_POSSIBLE & \
CPU_FTRS_POWER9 & CPU_FTRS_POWER9_DD1 & CPU_FTRS_POWER9_DD2_1)
#endif
+#endif
#else
enum {
CPU_FTRS_ALWAYS =
--
2.16.1
^ permalink raw reply related
* Re: [PATCH] fix double ;;s in code
From: Alex Deucher @ 2018-02-20 16:34 UTC (permalink / raw)
To: Jani Nikula
Cc: Pavel Machek, Christophe LEROY, SF Markus Elfring, kernel list,
vgupta, Russell King, oleg, catalin.marinas, will.deacon, paulus,
Benjamin Herrenschmidt, mpe, ard.biesheuvel, Thomas Gleixner,
Ingo Molnar, H. Peter Anvin, x86, scott.bauer, jonathan.derrick,
axboe, daniel.lezcano, Maxime Ripard, wens, Deucher, Alexander,
Christian Koenig, Chunming Zhou, Dave Airlie, Rob Clark,
Joerg Roedel, Shaohua Li, shawnguo, Sascha Hauer, fabio.estevam,
Andrew Morton, Alexey Brodkin, mhocko, vbabka, Vladislav.Zakharov,
noamca, yamada.masahiro, sboyd, viresh.kumar, linus.walleij,
heiko, aik, ruscur, david, fbarrat, alistair, robh, Joe Perches,
Wentland, Harry, Cheng, Tony, Wenjing Liu, Dave Airlie, Ding Wang,
Sylvia Tsai, Hersen Wu, Rex Zhu, Eric Huang, Dan Carpenter,
Archit Taneja, narmstrong, Ville Syrjälä, Jordan Crouse,
aishpant, Noralf Trønnes, Andres Rodriguez, monk.liu,
Nicolai Hähnle, Andrey Grodzovsky, linux-snps-arc,
linux-arm-kernel, kvm-ppc, linuxppc-dev, linux-efi, linux-block,
amd-gfx list, Maling list - DRI developers, linux-arm-msm,
freedreno, iommu, linux-raid
In-Reply-To: <87o9kkcck3.fsf@intel.com>
On Tue, Feb 20, 2018 at 3:03 AM, Jani Nikula
<jani.nikula@linux.intel.com> wrote:
> On Mon, 19 Feb 2018, Pavel Machek <pavel@ucw.cz> wrote:
>> On Mon 2018-02-19 16:41:35, Daniel Vetter wrote:
>>> Yeah, pls split this into one patch per area, with a suitable patch
>>> subject prefix. Look at git log of each file to get a feeling for what's
>>> the standard in each area.
>>
>> Yeah I can spend hour spliting it, and then people will ignore it
>> anyway.
>>
>> If you care about one of the files being modified, please fix the
>> bug, ";;" is a clear bug.
>>
>> If you don't care ... well I don't care either.
>
> Look, if this causes just one conflict down the line because it touches
> the kernel all over the place, then IMO it already wasn't worth
> it. Merge conflicts are inevitable, but there's no reason to make life
> harder just to cater for a cleanup patch. It's not that important.
>
> Had it been split up, the drm parts would've been merged already.
FWIW, the amdgpu and scheduler changes have already been fixed for -next.
Alex
>
> BR,
> Jani.
>
> --
> Jani Nikula, Intel Open Source Technology Center
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply
* Re: [PATCH] fix double ;;s in code
From: Joe Perches @ 2018-02-20 16:41 UTC (permalink / raw)
To: Michael Ellerman, Daniel Vetter, Christophe LEROY
Cc: Pavel Machek, elfring, kernel list, vgupta, linux, oleg,
catalin.marinas, will.deacon, paulus, benh, ard.biesheuvel, tglx,
mingo, hpa, x86, scott.bauer, jonathan.derrick, axboe,
daniel.lezcano, maxime.ripard, wens, alexander.deucher,
christian.koenig, David1.Zhou, airlied, robdclark, joro, shli,
shawnguo, kernel, fabio.estevam, akpm, Alexey.Brodkin, mhocko,
vbabka, Vladislav.Zakharov, noamca, yamada.masahiro, sboyd,
viresh.kumar, linus.walleij, heiko, aik, ruscur, david, fbarrat,
alistair, robh, harry.wentland, tony.cheng, Wenjing.Liu, airlied,
Ding.Wang, sylvia.tsai, hersenxs.wu, Rex.Zhu, JinHuiEric.Huang,
dan.carpenter, architt, daniel.vetter, narmstrong, ville.syrjala,
jcrouse, aishpant, noralf, andresx7, Monk.Liu, nicolai.haehnle,
Andrey.Grodzovsky, linux-snps-arc, linux-arm-kernel, kvm-ppc,
linuxppc-dev, linux-efi, linux-block, amd-gfx, dri-devel,
linux-arm-msm, freedreno, iommu, linux-raid
In-Reply-To: <87vaesrxn0.fsf@concordia.ellerman.id.au>
On Tue, 2018-02-20 at 17:19 +1100, Michael Ellerman wrote:
> Daniel Vetter <daniel@ffwll.ch> writes:
> > On Sun, Feb 18, 2018 at 11:00:56AM +0100, Christophe LEROY wrote:
> > > Le 17/02/2018 à 22:19, Pavel Machek a écrit :
> > > >
> > > > Fix double ;;'s in code.
> > > >
> > > > Signed-off-by: Pavel Machek <pavel@ucw.cz>
> > >
> > > A summary of the files modified on top of the patch would help understand
> > > the impact.
> > >
> > > A maybe there should be one patch by area, eg one for each arch specific
> > > modif and one for drivers/ and one for block/ ?
> >
> > Yeah, pls split this into one patch per area, with a suitable patch
> > subject prefix. Look at git log of each file to get a feeling for what's
> > the standard in each area.
>
> This part is actually pretty annoying.
>
> I hacked up a script (below) which seems to do a reasonable job in most
> cases.
Here was another suggestion from awhile ago
https://lkml.org/lkml/2010/11/16/245
^ permalink raw reply
* [PATCH 3/9] powerpc/64s: kbuild set assembler machine type to POWER4
From: Nicholas Piggin @ 2018-02-20 19:08 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin
In-Reply-To: <20180220190832.1872-1-npiggin@gmail.com>
Rather than override the machine type in .S code (which can hide
wrong or ambiguous code generation for the target), set the type
to power4 for all assembly.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/Makefile | 1 +
arch/powerpc/include/asm/ppc_asm.h | 11 ++++-------
arch/powerpc/kernel/entry_64.S | 2 +-
arch/powerpc/kernel/exceptions-64s.S | 10 ++--------
arch/powerpc/lib/copypage_power7.S | 3 ---
arch/powerpc/lib/copyuser_power7.S | 3 ---
arch/powerpc/lib/memcpy_power7.S | 3 ---
7 files changed, 8 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index ccd2556bdb53..cb6de0815a28 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -243,6 +243,7 @@ endif
cpu-as-$(CONFIG_4xx) += -Wa,-m405
cpu-as-$(CONFIG_ALTIVEC) += $(call as-option,-Wa$(comma)-maltivec)
cpu-as-$(CONFIG_E200) += -Wa,-me200
+cpu-as-$(CONFIG_PPC_BOOK3S_64) += -Wa,-mpower4
KBUILD_AFLAGS += $(cpu-as-y)
KBUILD_CFLAGS += $(cpu-as-y)
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index ae94b3626b6c..13f7f4c0e1ea 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -439,14 +439,11 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
/* The following stops all load and store data streams associated with stream
* ID (ie. streams created explicitly). The embedded and server mnemonics for
- * dcbt are different so we use machine "power4" here explicitly.
+ * dcbt are different so this must only be used for server.
*/
-#define DCBT_STOP_ALL_STREAM_IDS(scratch) \
-.machine push ; \
-.machine "power4" ; \
- lis scratch,0x60000000@h; \
- dcbt 0,scratch,0b01010; \
-.machine pop
+#define DCBT_BOOK3S_STOP_ALL_STREAM_IDS(scratch) \
+ lis scratch,0x60000000@h; \
+ dcbt 0,scratch,0b01010
/*
* toreal/fromreal/tophys/tovirt macros. 32-bit BookE makes them
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 2cb5109a7ea3..51695608c68b 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -545,7 +545,7 @@ _GLOBAL(_switch)
/* Cancel all explict user streams as they will have no use after context
* switch and will stop the HW from creating streams itself
*/
- DCBT_STOP_ALL_STREAM_IDS(r6)
+ DCBT_BOOK3S_STOP_ALL_STREAM_IDS(r6)
#endif
addi r6,r4,-THREAD /* Convert THREAD to 'current' */
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 3ac87e53b3da..19a021eae769 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -629,14 +629,11 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX)
bne cr4,1f /* returning to kernel */
-.machine push
-.machine "power4"
mtcrf 0x80,r9
mtcrf 0x08,r9 /* MSR[PR] indication is in cr4 */
mtcrf 0x04,r9 /* MSR[RI] indication is in cr5 */
mtcrf 0x02,r9 /* I/D indication is in cr6 */
mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
-.machine pop
RESTORE_CTR(r9, PACA_EXSLB)
RESTORE_PPR_PACA(PACA_EXSLB, r9)
@@ -649,14 +646,11 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX)
RFI_TO_USER
b . /* prevent speculative execution */
1:
-.machine push
-.machine "power4"
mtcrf 0x80,r9
mtcrf 0x08,r9 /* MSR[PR] indication is in cr4 */
mtcrf 0x04,r9 /* MSR[RI] indication is in cr5 */
mtcrf 0x02,r9 /* I/D indication is in cr6 */
mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
-.machine pop
RESTORE_CTR(r9, PACA_EXSLB)
RESTORE_PPR_PACA(PACA_EXSLB, r9)
@@ -1466,7 +1460,7 @@ TRAMP_REAL_BEGIN(rfi_flush_fallback)
ld r11,PACA_L1D_FLUSH_SIZE(r13)
srdi r11,r11,(7 + 3) /* 128 byte lines, unrolled 8x */
mtctr r11
- DCBT_STOP_ALL_STREAM_IDS(r11) /* Stop prefetch streams */
+ DCBT_BOOK3S_STOP_ALL_STREAM_IDS(r11) /* Stop prefetch streams */
/* order ld/st prior to dcbt stop all streams with flushing */
sync
@@ -1506,7 +1500,7 @@ TRAMP_REAL_BEGIN(hrfi_flush_fallback)
ld r11,PACA_L1D_FLUSH_SIZE(r13)
srdi r11,r11,(7 + 3) /* 128 byte lines, unrolled 8x */
mtctr r11
- DCBT_STOP_ALL_STREAM_IDS(r11) /* Stop prefetch streams */
+ DCBT_BOOK3S_STOP_ALL_STREAM_IDS(r11) /* Stop prefetch streams */
/* order ld/st prior to dcbt stop all streams with flushing */
sync
diff --git a/arch/powerpc/lib/copypage_power7.S b/arch/powerpc/lib/copypage_power7.S
index ca5fc8fa7efc..8fa73b7ab20e 100644
--- a/arch/powerpc/lib/copypage_power7.S
+++ b/arch/powerpc/lib/copypage_power7.S
@@ -42,8 +42,6 @@ _GLOBAL(copypage_power7)
lis r8,0x8000 /* GO=1 */
clrldi r8,r8,32
-.machine push
-.machine "power4"
/* setup read stream 0 */
dcbt 0,r4,0b01000 /* addr from */
dcbt 0,r7,0b01010 /* length and depth from */
@@ -52,7 +50,6 @@ _GLOBAL(copypage_power7)
dcbtst 0,r10,0b01010 /* length and depth to */
eieio
dcbt 0,r8,0b01010 /* all streams GO */
-.machine pop
#ifdef CONFIG_ALTIVEC
mflr r0
diff --git a/arch/powerpc/lib/copyuser_power7.S b/arch/powerpc/lib/copyuser_power7.S
index d416a4a66578..215e4760c09f 100644
--- a/arch/powerpc/lib/copyuser_power7.S
+++ b/arch/powerpc/lib/copyuser_power7.S
@@ -312,8 +312,6 @@ err1; stb r0,0(r3)
lis r8,0x8000 /* GO=1 */
clrldi r8,r8,32
-.machine push
-.machine "power4"
/* setup read stream 0 */
dcbt 0,r6,0b01000 /* addr from */
dcbt 0,r7,0b01010 /* length and depth from */
@@ -322,7 +320,6 @@ err1; stb r0,0(r3)
dcbtst 0,r10,0b01010 /* length and depth to */
eieio
dcbt 0,r8,0b01010 /* all streams GO */
-.machine pop
beq cr1,.Lunwind_stack_nonvmx_copy
diff --git a/arch/powerpc/lib/memcpy_power7.S b/arch/powerpc/lib/memcpy_power7.S
index 193909abd18b..df7de9d3da08 100644
--- a/arch/powerpc/lib/memcpy_power7.S
+++ b/arch/powerpc/lib/memcpy_power7.S
@@ -259,15 +259,12 @@ _GLOBAL(memcpy_power7)
lis r8,0x8000 /* GO=1 */
clrldi r8,r8,32
-.machine push
-.machine "power4"
dcbt 0,r6,0b01000
dcbt 0,r7,0b01010
dcbtst 0,r9,0b01000
dcbtst 0,r10,0b01010
eieio
dcbt 0,r8,0b01010 /* GO */
-.machine pop
beq cr1,.Lunwind_stack_nonvmx_copy
--
2.16.1
^ permalink raw reply related
* [PATCH 5/9] powerpc: remove unused CPU_FTR_ARCH_201
From: Nicholas Piggin @ 2018-02-20 19:08 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin
In-Reply-To: <20180220190832.1872-1-npiggin@gmail.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/include/asm/cputable.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 27bb8e96ce7a..1c684aa7e0de 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -175,7 +175,6 @@ static inline void cpu_feature_keys_init(void) { }
#endif
#define CPU_FTR_HVMODE LONG_ASM_CONST(0x0000000100000000)
-#define CPU_FTR_ARCH_201 LONG_ASM_CONST(0x0000000200000000)
#define CPU_FTR_ARCH_206 LONG_ASM_CONST(0x0000000400000000)
#define CPU_FTR_ARCH_207S LONG_ASM_CONST(0x0000000800000000)
#define CPU_FTR_ARCH_300 LONG_ASM_CONST(0x0000001000000000)
@@ -417,7 +416,7 @@ static inline void cpu_feature_keys_init(void) { }
CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ | \
CPU_FTR_STCX_CHECKS_ADDRESS)
#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
- CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_ARCH_201 | \
+ CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA | \
CPU_FTR_CP_USE_DCBTZ | CPU_FTR_STCX_CHECKS_ADDRESS | \
CPU_FTR_HVMODE | CPU_FTR_DABRX)
--
2.16.1
^ permalink raw reply related
* [PATCH 9/9] powerpc/64s: add POWER9 CPU type selection
From: Nicholas Piggin @ 2018-02-20 19:08 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin
In-Reply-To: <20180220190832.1872-1-npiggin@gmail.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/Makefile | 3 ++-
arch/powerpc/platforms/Kconfig.cputype | 5 +++++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 973b1a1b98d2..f46b6cf364d7 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -146,7 +146,7 @@ CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 $(MULTIPLEWORD)
ifeq ($(CONFIG_PPC_BOOK3S_64),y)
ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y)
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=power8
-CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power8)
+CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power9,-mtune=power8)
else
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,$(call cc-option,-mtune=power5))
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mcpu=power5,-mcpu=power4)
@@ -175,6 +175,7 @@ CFLAGS-$(CONFIG_POWER5_CPU) += $(call cc-option,-mcpu=power5)
CFLAGS-$(CONFIG_POWER6_CPU) += $(call cc-option,-mcpu=power6)
CFLAGS-$(CONFIG_POWER7_CPU) += $(call cc-option,-mcpu=power7)
CFLAGS-$(CONFIG_POWER8_CPU) += $(call cc-option,-mcpu=power8)
+CFLAGS-$(CONFIG_POWER9_CPU) += $(call cc-option,-mcpu=power9)
# Altivec option not allowed with e500mc64 in GCC.
ifeq ($(CONFIG_ALTIVEC),y)
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index ad878990c896..69be65450c0c 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -121,6 +121,11 @@ config POWER8_CPU
depends on PPC_BOOK3S_64
select ARCH_HAS_FAST_MULTIPLIER
+config POWER9_CPU
+ bool "POWER9"
+ depends on PPC_BOOK3S_64
+ select ARCH_HAS_FAST_MULTIPLIER
+
config E5500_CPU
bool "Freescale e5500"
depends on E500
--
2.16.1
^ permalink raw reply related
* [PATCH 1/9] powerpc/64s: cputable add all POWER9 features to CPU_FTRS_ALWAYS
From: Nicholas Piggin @ 2018-02-20 19:08 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin
In-Reply-To: <20180220190832.1872-1-npiggin@gmail.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/include/asm/cputable.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index a2c5c95882cf..1fb9b1ea4662 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -541,7 +541,7 @@ enum {
CPU_FTRS_POWER6 & CPU_FTRS_POWER7 & CPU_FTRS_CELL & \
CPU_FTRS_PA6T & CPU_FTRS_POWER8 & CPU_FTRS_POWER8E & \
CPU_FTRS_POWER8_DD1 & ~CPU_FTR_HVMODE & CPU_FTRS_POSSIBLE & \
- CPU_FTRS_POWER9)
+ CPU_FTRS_POWER9 & CPU_FTRS_POWER9_DD1 & CPU_FTRS_POWER9_DD2_1)
#endif
#else
enum {
--
2.16.1
^ permalink raw reply related
* Re: [PATCH 2/3] rfi-flush: Make it possible to call setup_rfi_flush() again
From: Michal Suchánek @ 2018-02-20 17:06 UTC (permalink / raw)
To: Michael Ellerman; +Cc: Mauricio Faria de Oliveira, linuxppc-dev
In-Reply-To: <87lgforngp.fsf@concordia.ellerman.id.au>
On Tue, 20 Feb 2018 20:59:18 +1100
Michael Ellerman <mpe@ellerman.id.au> wrote:
> Mauricio Faria de Oliveira <mauricfo@linux.vnet.ibm.com> writes:
>=20
> > Hi Michal and Michael,
> >
> > On 02/15/2018 05:13 AM, Michal Such=C3=A1nek wrote: =20
> >>> From: Michael Ellerman<mpe@ellerman.id.au>
> >>>
> >>> For PowerVM migration we want to be able to call setup_rfi_flush()
> >>> again after we've migrated the partition.
> >>>
> >>> To support that we need to check that we're not trying to
> >>> allocate the fallback flush area after memblock has gone away. If
> >>> so we just fail, we don't support migrating from a patched to an
> >>> unpatched machine. Or we do support it, but there will be no RFI
> >>> flush enabled on the destination.
> >>> =20
> >> This sounds bad to me. Either we support RFI flush or we don't.
> >>=20
> >> If we do the fallback area should be allocated at boot so it is
> >> always available. [snip] =20
> >
> > I think the problem with this is the size of the fallback area might
> > have to be different between the origin and destination systems,
> > say, a larger L1 data cache at the destination.
> >
> > In that case, the original size might not be enough to fully flush
> > the L1 data cache.
> >
> > Michael, is that the reason it is done that way? I thought of that,
> > but don't know for sure. =20
>=20
> No, supporting different cache sizes is a good idea though :)
>=20
> I did it the way I did because otherwise we waste memory on every
> system on earth just to support a use case that we don't actually
> intend for anyone to ever use - ie. migrating from a patched machine
> to an unpatched machine.
If you have multiple hosts running some LPMs and want to update them
without shutting down the whole thing I suppose it might easily happen
that a machine (re)started on a patched host is migrated to unpatched
host.
>=20
> In fact without further checks we'd be allocating the fallback area on
> powernv machines which don't even support LPM.
They support suspend to disk which basically amounts to the same thing.
Downgrading the firmware while in sleep does not sound like a good
idea, though.
>=20
> So that just seemed a bit gross.
>=20
> I think I'm inclined to leave it the way it is, unless you feel
> strongly about it Michal?
I think it would be more user friendly to either support the fallback
method 100% or remove it and require patched firmware.=20
Thanks
Michal
^ permalink raw reply
* [PATCH 6/9] powerpc/64s: remove POWER4 support
From: Nicholas Piggin @ 2018-02-20 19:08 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin
In-Reply-To: <20180220190832.1872-1-npiggin@gmail.com>
POWER4 has been broken since at least the change 49d09bf2a6
("powerpc/64s: Optimise MSR handling in exception handling"), which
requires mtmsrd L=1 support. This was introduced in ISA v2.01, and
POWER4 supports ISA v2.00.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/Makefile | 5 +-
arch/powerpc/include/asm/cputable.h | 8 +-
arch/powerpc/include/asm/mmu.h | 6 +-
arch/powerpc/kernel/cputable.c | 36 +-
arch/powerpc/kernel/prom_init.c | 10 +-
arch/powerpc/kvm/emulate.c | 6 -
arch/powerpc/mm/hash_utils_64.c | 9 +-
arch/powerpc/perf/Makefile | 2 +-
arch/powerpc/perf/power4-pmu.c | 622 ---------------------------------
arch/powerpc/platforms/Kconfig.cputype | 6 +-
10 files changed, 18 insertions(+), 692 deletions(-)
delete mode 100644 arch/powerpc/perf/power4-pmu.c
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index cb6de0815a28..2265d53023f4 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -144,8 +144,8 @@ CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions)
CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 $(MULTIPLEWORD)
ifeq ($(CONFIG_PPC_BOOK3S_64),y)
-CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,-mtune=power4)
-CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=power4
+CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,$(call cc-option,-mtune=power5))
+CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mcpu=power5,-mcpu=power4)
else
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=powerpc64
endif
@@ -166,7 +166,6 @@ ifdef CONFIG_MPROFILE_KERNEL
endif
CFLAGS-$(CONFIG_CELL_CPU) += $(call cc-option,-mcpu=cell)
-CFLAGS-$(CONFIG_POWER4_CPU) += $(call cc-option,-mcpu=power4)
CFLAGS-$(CONFIG_POWER5_CPU) += $(call cc-option,-mcpu=power5)
CFLAGS-$(CONFIG_POWER6_CPU) += $(call cc-option,-mcpu=power6)
CFLAGS-$(CONFIG_POWER7_CPU) += $(call cc-option,-mcpu=power7)
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 1c684aa7e0de..8907f44df708 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -411,10 +411,6 @@ static inline void cpu_feature_keys_init(void) { }
#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
/* 64-bit CPUs */
-#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
- CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
- CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ | \
- CPU_FTR_STCX_CHECKS_ADDRESS)
#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA | \
@@ -484,7 +480,7 @@ static inline void cpu_feature_keys_init(void) { }
#define CPU_FTRS_POSSIBLE (CPU_FTRS_E6500 | CPU_FTRS_E5500)
#else
#define CPU_FTRS_POSSIBLE \
- (CPU_FTRS_POWER4 | CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | \
+ (CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | \
CPU_FTRS_POWER6 | CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | \
CPU_FTRS_POWER8 | CPU_FTRS_POWER8_DD1 | CPU_FTRS_CELL | \
CPU_FTRS_PA6T | CPU_FTR_ALTIVEC_COMP | CPU_FTR_VSX_COMP | \
@@ -536,7 +532,7 @@ enum {
#define CPU_FTRS_ALWAYS (CPU_FTRS_E6500 & CPU_FTRS_E5500)
#else
#define CPU_FTRS_ALWAYS \
- (CPU_FTRS_POWER4 & CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & \
+ (CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & \
CPU_FTRS_POWER6 & CPU_FTRS_POWER7 & CPU_FTRS_CELL & \
CPU_FTRS_PA6T & CPU_FTRS_POWER8 & CPU_FTRS_POWER8E & \
CPU_FTRS_POWER8_DD1 & ~CPU_FTR_HVMODE & CPU_FTRS_POSSIBLE & \
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index bb38312cff28..61d15ce92278 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -111,9 +111,9 @@
/* MMU feature bit sets for various CPUs */
#define MMU_FTRS_DEFAULT_HPTE_ARCH_V2 \
MMU_FTR_HPTE_TABLE | MMU_FTR_PPCAS_ARCH_V2
-#define MMU_FTRS_POWER4 MMU_FTRS_DEFAULT_HPTE_ARCH_V2
-#define MMU_FTRS_PPC970 MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA
-#define MMU_FTRS_POWER5 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE
+#define MMU_FTRS_POWER MMU_FTRS_DEFAULT_HPTE_ARCH_V2
+#define MMU_FTRS_PPC970 MMU_FTRS_POWER | MMU_FTR_TLBIE_CROP_VA
+#define MMU_FTRS_POWER5 MMU_FTRS_POWER | MMU_FTR_LOCKLESS_TLBIE
#define MMU_FTRS_POWER6 MMU_FTRS_POWER5 | MMU_FTR_KERNEL_RO | MMU_FTR_68_BIT_VA
#define MMU_FTRS_POWER7 MMU_FTRS_POWER6
#define MMU_FTRS_POWER8 MMU_FTRS_POWER6
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index c40a9fc1e5d1..40aea5e48279 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -133,36 +133,6 @@ extern void __restore_cpu_e6500(void);
static struct cpu_spec __initdata cpu_specs[] = {
#ifdef CONFIG_PPC_BOOK3S_64
- { /* Power4 */
- .pvr_mask = 0xffff0000,
- .pvr_value = 0x00350000,
- .cpu_name = "POWER4 (gp)",
- .cpu_features = CPU_FTRS_POWER4,
- .cpu_user_features = COMMON_USER_POWER4,
- .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
- .icache_bsize = 128,
- .dcache_bsize = 128,
- .num_pmcs = 8,
- .pmc_type = PPC_PMC_IBM,
- .oprofile_cpu_type = "ppc64/power4",
- .oprofile_type = PPC_OPROFILE_POWER4,
- .platform = "power4",
- },
- { /* Power4+ */
- .pvr_mask = 0xffff0000,
- .pvr_value = 0x00380000,
- .cpu_name = "POWER4+ (gq)",
- .cpu_features = CPU_FTRS_POWER4,
- .cpu_user_features = COMMON_USER_POWER4,
- .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
- .icache_bsize = 128,
- .dcache_bsize = 128,
- .num_pmcs = 8,
- .pmc_type = PPC_PMC_IBM,
- .oprofile_cpu_type = "ppc64/power4",
- .oprofile_type = PPC_OPROFILE_POWER4,
- .platform = "power4",
- },
{ /* PPC970 */
.pvr_mask = 0xffff0000,
.pvr_value = 0x00390000,
@@ -609,15 +579,15 @@ static struct cpu_spec __initdata cpu_specs[] = {
{ /* default match */
.pvr_mask = 0x00000000,
.pvr_value = 0x00000000,
- .cpu_name = "POWER4 (compatible)",
+ .cpu_name = "POWER5 (compatible)",
.cpu_features = CPU_FTRS_COMPATIBLE,
.cpu_user_features = COMMON_USER_PPC64,
- .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
+ .mmu_features = MMU_FTRS_POWER,
.icache_bsize = 128,
.dcache_bsize = 128,
.num_pmcs = 6,
.pmc_type = PPC_PMC_IBM,
- .platform = "power4",
+ .platform = "power5",
}
#endif /* CONFIG_PPC_BOOK3S_64 */
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index adf044daafd7..d8e2e25991a7 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -1810,16 +1810,8 @@ static void __init prom_initialize_tce_table(void)
* size to 4 MB. This is enough to map 2GB of PCI DMA space.
* By doing this, we avoid the pitfalls of trying to DMA to
* MMIO space and the DMA alias hole.
- *
- * On POWER4, firmware sets the TCE region by assuming
- * each TCE table is 8MB. Using this memory for anything
- * else will impact performance, so we always allocate 8MB.
- * Anton
*/
- if (pvr_version_is(PVR_POWER4) || pvr_version_is(PVR_POWER4p))
- minsize = 8UL << 20;
- else
- minsize = 4UL << 20;
+ minsize = 4UL << 20;
/* Align to the greater of the align or size */
align = max(minalign, minsize);
diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c
index 4d8b4d6cebff..fa888bfc347e 100644
--- a/arch/powerpc/kvm/emulate.c
+++ b/arch/powerpc/kvm/emulate.c
@@ -45,12 +45,6 @@ void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
#ifdef CONFIG_PPC_BOOK3S
/* mtdec lowers the interrupt line when positive. */
kvmppc_core_dequeue_dec(vcpu);
-
- /* POWER4+ triggers a dec interrupt if the value is < 0 */
- if (vcpu->arch.dec & 0x80000000) {
- kvmppc_core_queue_dec(vcpu);
- return;
- }
#endif
#ifdef CONFIG_BOOKE
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index cf290d415dcd..d62e88d49e02 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -132,9 +132,10 @@ EXPORT_SYMBOL(mmu_hash_ops);
* is provided by the firmware.
*/
-/* Pre-POWER4 CPUs (4k pages only)
+/*
+ * Fallback (4k pages only)
*/
-static struct mmu_psize_def mmu_psize_defaults_old[] = {
+static struct mmu_psize_def mmu_psize_defaults[] = {
[MMU_PAGE_4K] = {
.shift = 12,
.sllp = 0,
@@ -554,8 +555,8 @@ static void __init htab_scan_page_sizes(void)
mmu_psize_set_default_penc();
/* Default to 4K pages only */
- memcpy(mmu_psize_defs, mmu_psize_defaults_old,
- sizeof(mmu_psize_defaults_old));
+ memcpy(mmu_psize_defs, mmu_psize_defaults,
+ sizeof(mmu_psize_defaults));
/*
* Try to find the available page sizes in the device-tree
diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile
index 57ebc655d2ac..82986d2acd9b 100644
--- a/arch/powerpc/perf/Makefile
+++ b/arch/powerpc/perf/Makefile
@@ -4,7 +4,7 @@ subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
obj-$(CONFIG_PERF_EVENTS) += callchain.o perf_regs.o
obj-$(CONFIG_PPC_PERF_CTRS) += core-book3s.o bhrb.o
-obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \
+obj64-$(CONFIG_PPC_PERF_CTRS) += ppc970-pmu.o power5-pmu.o \
power5+-pmu.o power6-pmu.o power7-pmu.o \
isa207-common.o power8-pmu.o power9-pmu.o
obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o
diff --git a/arch/powerpc/perf/power4-pmu.c b/arch/powerpc/perf/power4-pmu.c
deleted file mode 100644
index ce6072fa481b..000000000000
--- a/arch/powerpc/perf/power4-pmu.c
+++ /dev/null
@@ -1,622 +0,0 @@
-/*
- * Performance counter support for POWER4 (GP) and POWER4+ (GQ) processors.
- *
- * Copyright 2009 Paul Mackerras, IBM Corporation.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <linux/kernel.h>
-#include <linux/perf_event.h>
-#include <linux/string.h>
-#include <asm/reg.h>
-#include <asm/cputable.h>
-
-/*
- * Bits in event code for POWER4
- */
-#define PM_PMC_SH 12 /* PMC number (1-based) for direct events */
-#define PM_PMC_MSK 0xf
-#define PM_UNIT_SH 8 /* TTMMUX number and setting - unit select */
-#define PM_UNIT_MSK 0xf
-#define PM_LOWER_SH 6
-#define PM_LOWER_MSK 1
-#define PM_LOWER_MSKS 0x40
-#define PM_BYTE_SH 4 /* Byte number of event bus to use */
-#define PM_BYTE_MSK 3
-#define PM_PMCSEL_MSK 7
-
-/*
- * Unit code values
- */
-#define PM_FPU 1
-#define PM_ISU1 2
-#define PM_IFU 3
-#define PM_IDU0 4
-#define PM_ISU1_ALT 6
-#define PM_ISU2 7
-#define PM_IFU_ALT 8
-#define PM_LSU0 9
-#define PM_LSU1 0xc
-#define PM_GPS 0xf
-
-/*
- * Bits in MMCR0 for POWER4
- */
-#define MMCR0_PMC1SEL_SH 8
-#define MMCR0_PMC2SEL_SH 1
-#define MMCR_PMCSEL_MSK 0x1f
-
-/*
- * Bits in MMCR1 for POWER4
- */
-#define MMCR1_TTM0SEL_SH 62
-#define MMCR1_TTC0SEL_SH 61
-#define MMCR1_TTM1SEL_SH 59
-#define MMCR1_TTC1SEL_SH 58
-#define MMCR1_TTM2SEL_SH 56
-#define MMCR1_TTC2SEL_SH 55
-#define MMCR1_TTM3SEL_SH 53
-#define MMCR1_TTC3SEL_SH 52
-#define MMCR1_TTMSEL_MSK 3
-#define MMCR1_TD_CP_DBG0SEL_SH 50
-#define MMCR1_TD_CP_DBG1SEL_SH 48
-#define MMCR1_TD_CP_DBG2SEL_SH 46
-#define MMCR1_TD_CP_DBG3SEL_SH 44
-#define MMCR1_DEBUG0SEL_SH 43
-#define MMCR1_DEBUG1SEL_SH 42
-#define MMCR1_DEBUG2SEL_SH 41
-#define MMCR1_DEBUG3SEL_SH 40
-#define MMCR1_PMC1_ADDER_SEL_SH 39
-#define MMCR1_PMC2_ADDER_SEL_SH 38
-#define MMCR1_PMC6_ADDER_SEL_SH 37
-#define MMCR1_PMC5_ADDER_SEL_SH 36
-#define MMCR1_PMC8_ADDER_SEL_SH 35
-#define MMCR1_PMC7_ADDER_SEL_SH 34
-#define MMCR1_PMC3_ADDER_SEL_SH 33
-#define MMCR1_PMC4_ADDER_SEL_SH 32
-#define MMCR1_PMC3SEL_SH 27
-#define MMCR1_PMC4SEL_SH 22
-#define MMCR1_PMC5SEL_SH 17
-#define MMCR1_PMC6SEL_SH 12
-#define MMCR1_PMC7SEL_SH 7
-#define MMCR1_PMC8SEL_SH 2 /* note bit 0 is in MMCRA for GP */
-
-static short mmcr1_adder_bits[8] = {
- MMCR1_PMC1_ADDER_SEL_SH,
- MMCR1_PMC2_ADDER_SEL_SH,
- MMCR1_PMC3_ADDER_SEL_SH,
- MMCR1_PMC4_ADDER_SEL_SH,
- MMCR1_PMC5_ADDER_SEL_SH,
- MMCR1_PMC6_ADDER_SEL_SH,
- MMCR1_PMC7_ADDER_SEL_SH,
- MMCR1_PMC8_ADDER_SEL_SH
-};
-
-/*
- * Bits in MMCRA
- */
-#define MMCRA_PMC8SEL0_SH 17 /* PMC8SEL bit 0 for GP */
-
-/*
- * Layout of constraint bits:
- * 6666555555555544444444443333333333222222222211111111110000000000
- * 3210987654321098765432109876543210987654321098765432109876543210
- * |[ >[ >[ >|||[ >[ >< >< >< >< ><><><><><><><><>
- * | UC1 UC2 UC3 ||| PS1 PS2 B0 B1 B2 B3 P1P2P3P4P5P6P7P8
- * \SMPL ||\TTC3SEL
- * |\TTC_IFU_SEL
- * \TTM2SEL0
- *
- * SMPL - SAMPLE_ENABLE constraint
- * 56: SAMPLE_ENABLE value 0x0100_0000_0000_0000
- *
- * UC1 - unit constraint 1: can't have all three of FPU/ISU1/IDU0|ISU2
- * 55: UC1 error 0x0080_0000_0000_0000
- * 54: FPU events needed 0x0040_0000_0000_0000
- * 53: ISU1 events needed 0x0020_0000_0000_0000
- * 52: IDU0|ISU2 events needed 0x0010_0000_0000_0000
- *
- * UC2 - unit constraint 2: can't have all three of FPU/IFU/LSU0
- * 51: UC2 error 0x0008_0000_0000_0000
- * 50: FPU events needed 0x0004_0000_0000_0000
- * 49: IFU events needed 0x0002_0000_0000_0000
- * 48: LSU0 events needed 0x0001_0000_0000_0000
- *
- * UC3 - unit constraint 3: can't have all four of LSU0/IFU/IDU0|ISU2/ISU1
- * 47: UC3 error 0x8000_0000_0000
- * 46: LSU0 events needed 0x4000_0000_0000
- * 45: IFU events needed 0x2000_0000_0000
- * 44: IDU0|ISU2 events needed 0x1000_0000_0000
- * 43: ISU1 events needed 0x0800_0000_0000
- *
- * TTM2SEL0
- * 42: 0 = IDU0 events needed
- * 1 = ISU2 events needed 0x0400_0000_0000
- *
- * TTC_IFU_SEL
- * 41: 0 = IFU.U events needed
- * 1 = IFU.L events needed 0x0200_0000_0000
- *
- * TTC3SEL
- * 40: 0 = LSU1.U events needed
- * 1 = LSU1.L events needed 0x0100_0000_0000
- *
- * PS1
- * 39: PS1 error 0x0080_0000_0000
- * 36-38: count of events needing PMC1/2/5/6 0x0070_0000_0000
- *
- * PS2
- * 35: PS2 error 0x0008_0000_0000
- * 32-34: count of events needing PMC3/4/7/8 0x0007_0000_0000
- *
- * B0
- * 28-31: Byte 0 event source 0xf000_0000
- * 1 = FPU
- * 2 = ISU1
- * 3 = IFU
- * 4 = IDU0
- * 7 = ISU2
- * 9 = LSU0
- * c = LSU1
- * f = GPS
- *
- * B1, B2, B3
- * 24-27, 20-23, 16-19: Byte 1, 2, 3 event sources
- *
- * P8
- * 15: P8 error 0x8000
- * 14-15: Count of events needing PMC8
- *
- * P1..P7
- * 0-13: Count of events needing PMC1..PMC7
- *
- * Note: this doesn't allow events using IFU.U to be combined with events
- * using IFU.L, though that is feasible (using TTM0 and TTM2). However
- * there are no listed events for IFU.L (they are debug events not
- * verified for performance monitoring) so this shouldn't cause a
- * problem.
- */
-
-static struct unitinfo {
- unsigned long value, mask;
- int unit;
- int lowerbit;
-} p4_unitinfo[16] = {
- [PM_FPU] = { 0x44000000000000ul, 0x88000000000000ul, PM_FPU, 0 },
- [PM_ISU1] = { 0x20080000000000ul, 0x88000000000000ul, PM_ISU1, 0 },
- [PM_ISU1_ALT] =
- { 0x20080000000000ul, 0x88000000000000ul, PM_ISU1, 0 },
- [PM_IFU] = { 0x02200000000000ul, 0x08820000000000ul, PM_IFU, 41 },
- [PM_IFU_ALT] =
- { 0x02200000000000ul, 0x08820000000000ul, PM_IFU, 41 },
- [PM_IDU0] = { 0x10100000000000ul, 0x80840000000000ul, PM_IDU0, 1 },
- [PM_ISU2] = { 0x10140000000000ul, 0x80840000000000ul, PM_ISU2, 0 },
- [PM_LSU0] = { 0x01400000000000ul, 0x08800000000000ul, PM_LSU0, 0 },
- [PM_LSU1] = { 0x00000000000000ul, 0x00010000000000ul, PM_LSU1, 40 },
- [PM_GPS] = { 0x00000000000000ul, 0x00000000000000ul, PM_GPS, 0 }
-};
-
-static unsigned char direct_marked_event[8] = {
- (1<<2) | (1<<3), /* PMC1: PM_MRK_GRP_DISP, PM_MRK_ST_CMPL */
- (1<<3) | (1<<5), /* PMC2: PM_THRESH_TIMEO, PM_MRK_BRU_FIN */
- (1<<3), /* PMC3: PM_MRK_ST_CMPL_INT */
- (1<<4) | (1<<5), /* PMC4: PM_MRK_GRP_CMPL, PM_MRK_CRU_FIN */
- (1<<4) | (1<<5), /* PMC5: PM_MRK_GRP_TIMEO */
- (1<<3) | (1<<4) | (1<<5),
- /* PMC6: PM_MRK_ST_GPS, PM_MRK_FXU_FIN, PM_MRK_GRP_ISSUED */
- (1<<4) | (1<<5), /* PMC7: PM_MRK_FPU_FIN, PM_MRK_INST_FIN */
- (1<<4), /* PMC8: PM_MRK_LSU_FIN */
-};
-
-/*
- * Returns 1 if event counts things relating to marked instructions
- * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.
- */
-static int p4_marked_instr_event(u64 event)
-{
- int pmc, psel, unit, byte, bit;
- unsigned int mask;
-
- pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
- psel = event & PM_PMCSEL_MSK;
- if (pmc) {
- if (direct_marked_event[pmc - 1] & (1 << psel))
- return 1;
- if (psel == 0) /* add events */
- bit = (pmc <= 4)? pmc - 1: 8 - pmc;
- else if (psel == 6) /* decode events */
- bit = 4;
- else
- return 0;
- } else
- bit = psel;
-
- byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;
- unit = (event >> PM_UNIT_SH) & PM_UNIT_MSK;
- mask = 0;
- switch (unit) {
- case PM_LSU1:
- if (event & PM_LOWER_MSKS)
- mask = 1 << 28; /* byte 7 bit 4 */
- else
- mask = 6 << 24; /* byte 3 bits 1 and 2 */
- break;
- case PM_LSU0:
- /* byte 3, bit 3; byte 2 bits 0,2,3,4,5; byte 1 */
- mask = 0x083dff00;
- }
- return (mask >> (byte * 8 + bit)) & 1;
-}
-
-static int p4_get_constraint(u64 event, unsigned long *maskp,
- unsigned long *valp)
-{
- int pmc, byte, unit, lower, sh;
- unsigned long mask = 0, value = 0;
- int grp = -1;
-
- pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
- if (pmc) {
- if (pmc > 8)
- return -1;
- sh = (pmc - 1) * 2;
- mask |= 2 << sh;
- value |= 1 << sh;
- grp = ((pmc - 1) >> 1) & 1;
- }
- unit = (event >> PM_UNIT_SH) & PM_UNIT_MSK;
- byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;
- if (unit) {
- lower = (event >> PM_LOWER_SH) & PM_LOWER_MSK;
-
- /*
- * Bus events on bytes 0 and 2 can be counted
- * on PMC1/2/5/6; bytes 1 and 3 on PMC3/4/7/8.
- */
- if (!pmc)
- grp = byte & 1;
-
- if (!p4_unitinfo[unit].unit)
- return -1;
- mask |= p4_unitinfo[unit].mask;
- value |= p4_unitinfo[unit].value;
- sh = p4_unitinfo[unit].lowerbit;
- if (sh > 1)
- value |= (unsigned long)lower << sh;
- else if (lower != sh)
- return -1;
- unit = p4_unitinfo[unit].unit;
-
- /* Set byte lane select field */
- mask |= 0xfULL << (28 - 4 * byte);
- value |= (unsigned long)unit << (28 - 4 * byte);
- }
- if (grp == 0) {
- /* increment PMC1/2/5/6 field */
- mask |= 0x8000000000ull;
- value |= 0x1000000000ull;
- } else {
- /* increment PMC3/4/7/8 field */
- mask |= 0x800000000ull;
- value |= 0x100000000ull;
- }
-
- /* Marked instruction events need sample_enable set */
- if (p4_marked_instr_event(event)) {
- mask |= 1ull << 56;
- value |= 1ull << 56;
- }
-
- /* PMCSEL=6 decode events on byte 2 need sample_enable clear */
- if (pmc && (event & PM_PMCSEL_MSK) == 6 && byte == 2)
- mask |= 1ull << 56;
-
- *maskp = mask;
- *valp = value;
- return 0;
-}
-
-static unsigned int ppc_inst_cmpl[] = {
- 0x1001, 0x4001, 0x6001, 0x7001, 0x8001
-};
-
-static int p4_get_alternatives(u64 event, unsigned int flags, u64 alt[])
-{
- int i, j, na;
-
- alt[0] = event;
- na = 1;
-
- /* 2 possibilities for PM_GRP_DISP_REJECT */
- if (event == 0x8003 || event == 0x0224) {
- alt[1] = event ^ (0x8003 ^ 0x0224);
- return 2;
- }
-
- /* 2 possibilities for PM_ST_MISS_L1 */
- if (event == 0x0c13 || event == 0x0c23) {
- alt[1] = event ^ (0x0c13 ^ 0x0c23);
- return 2;
- }
-
- /* several possibilities for PM_INST_CMPL */
- for (i = 0; i < ARRAY_SIZE(ppc_inst_cmpl); ++i) {
- if (event == ppc_inst_cmpl[i]) {
- for (j = 0; j < ARRAY_SIZE(ppc_inst_cmpl); ++j)
- if (j != i)
- alt[na++] = ppc_inst_cmpl[j];
- break;
- }
- }
-
- return na;
-}
-
-static int p4_compute_mmcr(u64 event[], int n_ev,
- unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[])
-{
- unsigned long mmcr0 = 0, mmcr1 = 0, mmcra = 0;
- unsigned int pmc, unit, byte, psel, lower;
- unsigned int ttm, grp;
- unsigned int pmc_inuse = 0;
- unsigned int pmc_grp_use[2];
- unsigned char busbyte[4];
- unsigned char unituse[16];
- unsigned int unitlower = 0;
- int i;
-
- if (n_ev > 8)
- return -1;
-
- /* First pass to count resource use */
- pmc_grp_use[0] = pmc_grp_use[1] = 0;
- memset(busbyte, 0, sizeof(busbyte));
- memset(unituse, 0, sizeof(unituse));
- for (i = 0; i < n_ev; ++i) {
- pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
- if (pmc) {
- if (pmc_inuse & (1 << (pmc - 1)))
- return -1;
- pmc_inuse |= 1 << (pmc - 1);
- /* count 1/2/5/6 vs 3/4/7/8 use */
- ++pmc_grp_use[((pmc - 1) >> 1) & 1];
- }
- unit = (event[i] >> PM_UNIT_SH) & PM_UNIT_MSK;
- byte = (event[i] >> PM_BYTE_SH) & PM_BYTE_MSK;
- lower = (event[i] >> PM_LOWER_SH) & PM_LOWER_MSK;
- if (unit) {
- if (!pmc)
- ++pmc_grp_use[byte & 1];
- if (unit == 6 || unit == 8)
- /* map alt ISU1/IFU codes: 6->2, 8->3 */
- unit = (unit >> 1) - 1;
- if (busbyte[byte] && busbyte[byte] != unit)
- return -1;
- busbyte[byte] = unit;
- lower <<= unit;
- if (unituse[unit] && lower != (unitlower & lower))
- return -1;
- unituse[unit] = 1;
- unitlower |= lower;
- }
- }
- if (pmc_grp_use[0] > 4 || pmc_grp_use[1] > 4)
- return -1;
-
- /*
- * Assign resources and set multiplexer selects.
- *
- * Units 1,2,3 are on TTM0, 4,6,7 on TTM1, 8,10 on TTM2.
- * Each TTMx can only select one unit, but since
- * units 2 and 6 are both ISU1, and 3 and 8 are both IFU,
- * we have some choices.
- */
- if (unituse[2] & (unituse[1] | (unituse[3] & unituse[9]))) {
- unituse[6] = 1; /* Move 2 to 6 */
- unituse[2] = 0;
- }
- if (unituse[3] & (unituse[1] | unituse[2])) {
- unituse[8] = 1; /* Move 3 to 8 */
- unituse[3] = 0;
- unitlower = (unitlower & ~8) | ((unitlower & 8) << 5);
- }
- /* Check only one unit per TTMx */
- if (unituse[1] + unituse[2] + unituse[3] > 1 ||
- unituse[4] + unituse[6] + unituse[7] > 1 ||
- unituse[8] + unituse[9] > 1 ||
- (unituse[5] | unituse[10] | unituse[11] |
- unituse[13] | unituse[14]))
- return -1;
-
- /* Set TTMxSEL fields. Note, units 1-3 => TTM0SEL codes 0-2 */
- mmcr1 |= (unsigned long)(unituse[3] * 2 + unituse[2])
- << MMCR1_TTM0SEL_SH;
- mmcr1 |= (unsigned long)(unituse[7] * 3 + unituse[6] * 2)
- << MMCR1_TTM1SEL_SH;
- mmcr1 |= (unsigned long)unituse[9] << MMCR1_TTM2SEL_SH;
-
- /* Set TTCxSEL fields. */
- if (unitlower & 0xe)
- mmcr1 |= 1ull << MMCR1_TTC0SEL_SH;
- if (unitlower & 0xf0)
- mmcr1 |= 1ull << MMCR1_TTC1SEL_SH;
- if (unitlower & 0xf00)
- mmcr1 |= 1ull << MMCR1_TTC2SEL_SH;
- if (unitlower & 0x7000)
- mmcr1 |= 1ull << MMCR1_TTC3SEL_SH;
-
- /* Set byte lane select fields. */
- for (byte = 0; byte < 4; ++byte) {
- unit = busbyte[byte];
- if (!unit)
- continue;
- if (unit == 0xf) {
- /* special case for GPS */
- mmcr1 |= 1ull << (MMCR1_DEBUG0SEL_SH - byte);
- } else {
- if (!unituse[unit])
- ttm = unit - 1; /* 2->1, 3->2 */
- else
- ttm = unit >> 2;
- mmcr1 |= (unsigned long)ttm
- << (MMCR1_TD_CP_DBG0SEL_SH - 2 * byte);
- }
- }
-
- /* Second pass: assign PMCs, set PMCxSEL and PMCx_ADDER_SEL fields */
- for (i = 0; i < n_ev; ++i) {
- pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
- unit = (event[i] >> PM_UNIT_SH) & PM_UNIT_MSK;
- byte = (event[i] >> PM_BYTE_SH) & PM_BYTE_MSK;
- psel = event[i] & PM_PMCSEL_MSK;
- if (!pmc) {
- /* Bus event or 00xxx direct event (off or cycles) */
- if (unit)
- psel |= 0x10 | ((byte & 2) << 2);
- for (pmc = 0; pmc < 8; ++pmc) {
- if (pmc_inuse & (1 << pmc))
- continue;
- grp = (pmc >> 1) & 1;
- if (unit) {
- if (grp == (byte & 1))
- break;
- } else if (pmc_grp_use[grp] < 4) {
- ++pmc_grp_use[grp];
- break;
- }
- }
- pmc_inuse |= 1 << pmc;
- } else {
- /* Direct event */
- --pmc;
- if (psel == 0 && (byte & 2))
- /* add events on higher-numbered bus */
- mmcr1 |= 1ull << mmcr1_adder_bits[pmc];
- else if (psel == 6 && byte == 3)
- /* seem to need to set sample_enable here */
- mmcra |= MMCRA_SAMPLE_ENABLE;
- psel |= 8;
- }
- if (pmc <= 1)
- mmcr0 |= psel << (MMCR0_PMC1SEL_SH - 7 * pmc);
- else
- mmcr1 |= psel << (MMCR1_PMC3SEL_SH - 5 * (pmc - 2));
- if (pmc == 7) /* PMC8 */
- mmcra |= (psel & 1) << MMCRA_PMC8SEL0_SH;
- hwc[i] = pmc;
- if (p4_marked_instr_event(event[i]))
- mmcra |= MMCRA_SAMPLE_ENABLE;
- }
-
- if (pmc_inuse & 1)
- mmcr0 |= MMCR0_PMC1CE;
- if (pmc_inuse & 0xfe)
- mmcr0 |= MMCR0_PMCjCE;
-
- mmcra |= 0x2000; /* mark only one IOP per PPC instruction */
-
- /* Return MMCRx values */
- mmcr[0] = mmcr0;
- mmcr[1] = mmcr1;
- mmcr[2] = mmcra;
- return 0;
-}
-
-static void p4_disable_pmc(unsigned int pmc, unsigned long mmcr[])
-{
- /*
- * Setting the PMCxSEL field to 0 disables PMC x.
- * (Note that pmc is 0-based here, not 1-based.)
- */
- if (pmc <= 1) {
- mmcr[0] &= ~(0x1fUL << (MMCR0_PMC1SEL_SH - 7 * pmc));
- } else {
- mmcr[1] &= ~(0x1fUL << (MMCR1_PMC3SEL_SH - 5 * (pmc - 2)));
- if (pmc == 7)
- mmcr[2] &= ~(1UL << MMCRA_PMC8SEL0_SH);
- }
-}
-
-static int p4_generic_events[] = {
- [PERF_COUNT_HW_CPU_CYCLES] = 7,
- [PERF_COUNT_HW_INSTRUCTIONS] = 0x1001,
- [PERF_COUNT_HW_CACHE_REFERENCES] = 0x8c10, /* PM_LD_REF_L1 */
- [PERF_COUNT_HW_CACHE_MISSES] = 0x3c10, /* PM_LD_MISS_L1 */
- [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x330, /* PM_BR_ISSUED */
- [PERF_COUNT_HW_BRANCH_MISSES] = 0x331, /* PM_BR_MPRED_CR */
-};
-
-#define C(x) PERF_COUNT_HW_CACHE_##x
-
-/*
- * Table of generalized cache-related events.
- * 0 means not supported, -1 means nonsensical, other values
- * are event codes.
- */
-static int power4_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
- [C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */
- [C(OP_READ)] = { 0x8c10, 0x3c10 },
- [C(OP_WRITE)] = { 0x7c10, 0xc13 },
- [C(OP_PREFETCH)] = { 0xc35, 0 },
- },
- [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
- [C(OP_READ)] = { 0, 0 },
- [C(OP_WRITE)] = { -1, -1 },
- [C(OP_PREFETCH)] = { 0, 0 },
- },
- [C(LL)] = { /* RESULT_ACCESS RESULT_MISS */
- [C(OP_READ)] = { 0, 0 },
- [C(OP_WRITE)] = { 0, 0 },
- [C(OP_PREFETCH)] = { 0xc34, 0 },
- },
- [C(DTLB)] = { /* RESULT_ACCESS RESULT_MISS */
- [C(OP_READ)] = { 0, 0x904 },
- [C(OP_WRITE)] = { -1, -1 },
- [C(OP_PREFETCH)] = { -1, -1 },
- },
- [C(ITLB)] = { /* RESULT_ACCESS RESULT_MISS */
- [C(OP_READ)] = { 0, 0x900 },
- [C(OP_WRITE)] = { -1, -1 },
- [C(OP_PREFETCH)] = { -1, -1 },
- },
- [C(BPU)] = { /* RESULT_ACCESS RESULT_MISS */
- [C(OP_READ)] = { 0x330, 0x331 },
- [C(OP_WRITE)] = { -1, -1 },
- [C(OP_PREFETCH)] = { -1, -1 },
- },
- [C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
- [C(OP_READ)] = { -1, -1 },
- [C(OP_WRITE)] = { -1, -1 },
- [C(OP_PREFETCH)] = { -1, -1 },
- },
-};
-
-static struct power_pmu power4_pmu = {
- .name = "POWER4/4+",
- .n_counter = 8,
- .max_alternatives = 5,
- .add_fields = 0x0000001100005555ul,
- .test_adder = 0x0011083300000000ul,
- .compute_mmcr = p4_compute_mmcr,
- .get_constraint = p4_get_constraint,
- .get_alternatives = p4_get_alternatives,
- .disable_pmc = p4_disable_pmc,
- .n_generic = ARRAY_SIZE(p4_generic_events),
- .generic_events = p4_generic_events,
- .cache_events = &power4_cache_events,
- .flags = PPMU_NO_SIPR | PPMU_NO_CONT_SAMPLING,
-};
-
-static int __init init_power4_pmu(void)
-{
- if (!cur_cpu_spec->oprofile_cpu_type ||
- strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power4"))
- return -ENODEV;
-
- return register_power_pmu(&power4_pmu);
-}
-
-early_initcall(init_power4_pmu);
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index a429d859f15d..560466cc5170 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -61,7 +61,7 @@ choice
help
There are two families of 64 bit PowerPC chips supported.
The most common ones are the desktop and server CPUs
- (POWER4, POWER5, 970, POWER5+, POWER6, POWER7, POWER8 ...)
+ (POWER5, 970, POWER5+, POWER6, POWER7, POWER8, POWER9 ...)
The other are the "embedded" processors compliant with the
"Book 3E" variant of the architecture
@@ -103,10 +103,6 @@ config CELL_CPU
bool "Cell Broadband Engine"
depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
-config POWER4_CPU
- bool "POWER4"
- depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
-
config POWER5_CPU
bool "POWER5"
depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
--
2.16.1
^ permalink raw reply related
* Re: [PATCH v2] watchdog: add SPDX identifiers for watchdog subsystem
From: Guenter Roeck @ 2018-02-20 15:13 UTC (permalink / raw)
To: Marcus Folkesson, William Breathitt Gray
Cc: Wim Van Sebroeck, Joel Stanley, Nicolas Ferre, Alexandre Belloni,
Florian Fainelli, Ray Jui, Scott Branden,
bcm-kernel-feedback-list, Eric Anholt, Stefan Wahren,
Linus Walleij, Support Opensource, Baruch Siach, Jimmy Vance,
Keguang Zhang, Joachim Eastwood, Tomas Winkler,
Johannes Thumshirn, Andreas Werner, Carlo Caione, Kevin Hilman,
Matthias Brugger, Wan ZongShun, Michal Simek, Vladimir Zapolskiy,
Sylvain Lemieux, Kukjin Kim, Krzysztof Kozlowski, Zwane Mwaikambo,
Jim Cromie, Barry Song, Patrice Chotard, Maxime Ripard,
Chen-Yu Tsai, Marc Gonzalez, Mans Rullgard, Thierry Reding,
Jonathan Hunter, Masahiro Yamada, Benjamin Herrenschmidt,
Paul Mackerras, Michael Ellerman, Jun Nie, Baoyou Xie, Shawn Guo,
linux-watchdog, linux-kernel, linux-arm-kernel, linux-rpi-kernel,
adi-buildroot-devel, linux-mips, linux-amlogic, linux-mediatek,
linux-samsung-soc, linux-tegra, linuxppc-dev, patches
In-Reply-To: <20180220132103.GD24311@gmail.com>
On 02/20/2018 05:21 AM, Marcus Folkesson wrote:
> Hello William,
>
> On Tue, Feb 20, 2018 at 07:49:55AM -0500, William Breathitt Gray wrote:
>> On Tue, Feb 20, 2018 at 11:45:31AM +0100, Marcus Folkesson wrote:
>>> - Add SPDX identifier
>>> - Remove boiler plate license text
>>> - If MODULE_LICENSE and boiler plate does not match, go for boiler plate
>>> license
>>>
>>> Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
>>> Acked-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
>>> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
>>> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>>> Acked-by: Michal Simek <michal.simek@xilinx.com>
>>> ---
>>>
>>> Notes:
>>> v2:
>>> - Put back removed copyright texts for meson_gxbb_wdt and coh901327_wdt
>>> - Change to BSD-3-Clause for meson_gxbb_wdt
>>> v1: Please have an extra look at meson_gxbb_wdt.c
>>
>> [...]
>>
>>> diff --git a/drivers/watchdog/ebc-c384_wdt.c b/drivers/watchdog/ebc-c384_wdt.c
>>> index 2170b275ea01..c173b6f5c866 100644
>>> --- a/drivers/watchdog/ebc-c384_wdt.c
>>> +++ b/drivers/watchdog/ebc-c384_wdt.c
>>> @@ -1,15 +1,8 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> /*
>>> * Watchdog timer driver for the WinSystems EBC-C384
>>> * Copyright (C) 2016 William Breathitt Gray
>>> *
>>> - * This program is free software; you can redistribute it and/or modify
>>> - * it under the terms of the GNU General Public License, version 2, as
>>> - * published by the Free Software Foundation.
>>> - *
>>> - * This program is distributed in the hope that it will be useful, but
>>> - * WITHOUT ANY WARRANTY; without even the implied warranty of
>>> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>>> - * General Public License for more details.
>>> */
>>> #include <linux/device.h>
>>> #include <linux/dmi.h>
>
> Thank you for your feedback!
>>
>> I have no problem with adding a SPDX line to the top of this file, but
>> use "SPDX-License-Identifier: GPL-2.0-only" as I was very intentional
>> with the selection of GPL version 2 only when I published this code.
>
> SPDX-License-Identifier: GPL-2.0
> Is GPL-2.0 only [1], so it respects your choice of license.
>
>>
>> Furthermore, please do not remove the existing copyright text; although
>
It is not a matter if you CAN keep a copyright. You MUST NOT remove a copyright.
As long as you do, the series is
Nacked-by: Guenter Roeck <linux@roeck-us.net>
Guenter
> The copyright text:
>
> Copyright (C) 2016 William Breathitt Gray
>
> Is still in the file.
>
>
>> it's just boilerplate for some, I was careful with the selection of
>> these words, and I worry the SPDX line only -- despite its useful
>> conciseness -- may lead to misunderstandings about my intentioned
>> license for this code.
>
> I'm not sure I understand your concerns here, the SPDX identifier is
> a shorthand for the GPL 2.0 only license. See [1] - Linux kernel licensing rules.
>
> One of the biggest benefits with SPDX identifier is that it is hard to verify
> boiler plate licenses due to formatting, types, different formulations and so on.
>
> If still worrying, I think we could keep the license text as
> well.
>
>>
>> For the time being, I can't Ack this patch with the changes it makes
>> currently:
>>
>> Nacked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
>>
>> William Breathitt Gray
>
> Please let me know if I got you wrong at some point.
>
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/license-rules.rst
>
> Best regards
> Marcus Folkesson
>
^ permalink raw reply
* Re: [PATCH v2] watchdog: add SPDX identifiers for watchdog subsystem
From: William Breathitt Gray @ 2018-02-20 18:14 UTC (permalink / raw)
To: Marcus Folkesson
Cc: Guenter Roeck, Wim Van Sebroeck, Joel Stanley, Nicolas Ferre,
Alexandre Belloni, Florian Fainelli, Ray Jui, Scott Branden,
bcm-kernel-feedback-list, Eric Anholt, Stefan Wahren,
Linus Walleij, Support Opensource, Baruch Siach, Jimmy Vance,
Keguang Zhang, Joachim Eastwood, Tomas Winkler,
Johannes Thumshirn, Andreas Werner, Carlo Caione, Kevin Hilman,
Matthias Brugger, Wan ZongShun, Michal Simek, Vladimir Zapolskiy,
Sylvain Lemieux, Kukjin Kim, Krzysztof Kozlowski, Zwane Mwaikambo,
Jim Cromie, Barry Song, Patrice Chotard, Maxime Ripard,
Chen-Yu Tsai, Marc Gonzalez, Mans Rullgard, Thierry Reding,
Jonathan Hunter, Masahiro Yamada, Benjamin Herrenschmidt,
Paul Mackerras, Michael Ellerman, Jun Nie, Baoyou Xie, Shawn Guo,
linux-watchdog, linux-kernel, linux-arm-kernel, linux-rpi-kernel,
adi-buildroot-devel, linux-mips, linux-amlogic, linux-mediatek,
linux-samsung-soc, linux-tegra, linuxppc-dev, patches
In-Reply-To: <20180220153326.GE24311@gmail.com>
On Tue, Feb 20, 2018 at 04:33:26PM +0100, Marcus Folkesson wrote:
>On Tue, Feb 20, 2018 at 07:13:43AM -0800, Guenter Roeck wrote:
>> On 02/20/2018 05:21 AM, Marcus Folkesson wrote:
>> > Hello William,
>> >
>> > On Tue, Feb 20, 2018 at 07:49:55AM -0500, William Breathitt Gray wrote:
>> > > On Tue, Feb 20, 2018 at 11:45:31AM +0100, Marcus Folkesson wrote:
>> > > > - Add SPDX identifier
>> > > > - Remove boiler plate license text
>> > > > - If MODULE_LICENSE and boiler plate does not match, go for boiler plate
>> > > > license
>> > > >
>> > > > Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
>> > > > Acked-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
>> > > > Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
>> > > > Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>> > > > Acked-by: Michal Simek <michal.simek@xilinx.com>
>> > > > ---
>> > > >
>> > > > Notes:
>> > > > v2:
>> > > > - Put back removed copyright texts for meson_gxbb_wdt and coh901327_wdt
>> > > > - Change to BSD-3-Clause for meson_gxbb_wdt
>> > > > v1: Please have an extra look at meson_gxbb_wdt.c
>> > >
>> > > [...]
>> > >
>> > > > diff --git a/drivers/watchdog/ebc-c384_wdt.c b/drivers/watchdog/ebc-c384_wdt.c
>> > > > index 2170b275ea01..c173b6f5c866 100644
>> > > > --- a/drivers/watchdog/ebc-c384_wdt.c
>> > > > +++ b/drivers/watchdog/ebc-c384_wdt.c
>> > > > @@ -1,15 +1,8 @@
>> > > > +// SPDX-License-Identifier: GPL-2.0
>> > > > /*
>> > > > * Watchdog timer driver for the WinSystems EBC-C384
>> > > > * Copyright (C) 2016 William Breathitt Gray
>> > > > *
>
>The copyright is untouched?
>
>> > > > - * This program is free software; you can redistribute it and/or modify
>> > > > - * it under the terms of the GNU General Public License, version 2, as
>> > > > - * published by the Free Software Foundation.
>> > > > - *
>> > > > - * This program is distributed in the hope that it will be useful, but
>> > > > - * WITHOUT ANY WARRANTY; without even the implied warranty of
>> > > > - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> > > > - * General Public License for more details.
>> > > > */
>> > > > #include <linux/device.h>
>> > > > #include <linux/dmi.h>
>> >
>> > Thank you for your feedback!
>> > >
>> > > I have no problem with adding a SPDX line to the top of this file, but
>> > > use "SPDX-License-Identifier: GPL-2.0-only" as I was very intentional
>> > > with the selection of GPL version 2 only when I published this code.
>> >
>> > SPDX-License-Identifier: GPL-2.0
>> > Is GPL-2.0 only [1], so it respects your choice of license.
Ah, this should be fine then. :)
>> >
>> > >
>> > > Furthermore, please do not remove the existing copyright text; although
>> >
>>
>> It is not a matter if you CAN keep a copyright. You MUST NOT remove a copyright.
>> As long as you do, the series is
>>
>> Nacked-by: Guenter Roeck <linux@roeck-us.net>
>>
>> Guenter
>
>I'm sorry, I do not see where the copyright is removed unless you count
>the license text as part of the copyright.
>
>Can you please point it out?
>
>>
>> > The copyright text:
>> >
>> > Copyright (C) 2016 William Breathitt Gray
>> >
>> > Is still in the file.
>
>^^^
>
>> >
>> >
>> > > it's just boilerplate for some, I was careful with the selection of
>> > > these words, and I worry the SPDX line only -- despite its useful
>> > > conciseness -- may lead to misunderstandings about my intentioned
>> > > license for this code.
>> >
>> > I'm not sure I understand your concerns here, the SPDX identifier is
>> > a shorthand for the GPL 2.0 only license. See [1] - Linux kernel licensing rules.
>> >
>> > One of the biggest benefits with SPDX identifier is that it is hard to verify
>> > boiler plate licenses due to formatting, types, different formulations and so on.
>> >
>> > If still worrying, I think we could keep the license text as
>> > well.
I'm sorry for the confusion, I should have wrote "license text" rather
than "copyright text" in my previous message. I agree with the benefits
of utilizing the SPDX identifier, and I see the addition of the SPDX
line as useful, but I would prefer the original license text remain as
well.
William Breathitt Gray
>> >
>> > >
>> > > For the time being, I can't Ack this patch with the changes it makes
>> > > currently:
>> > >
>> > > Nacked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
>> > >
>> > > William Breathitt Gray
>> >
>> > Please let me know if I got you wrong at some point.
>> >
>> > [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/license-rules.rst
>> >
>> > Best regards
>> > Marcus Folkesson
>> >
>>
>
>Best regards
>Marcus Folkesson
^ permalink raw reply
* Re: [PATCH v2] watchdog: add SPDX identifiers for watchdog subsystem
From: Marcus Folkesson @ 2018-02-20 15:33 UTC (permalink / raw)
To: Guenter Roeck
Cc: William Breathitt Gray, Wim Van Sebroeck, Joel Stanley,
Nicolas Ferre, Alexandre Belloni, Florian Fainelli, Ray Jui,
Scott Branden, bcm-kernel-feedback-list, Eric Anholt,
Stefan Wahren, Linus Walleij, Support Opensource, Baruch Siach,
Jimmy Vance, Keguang Zhang, Joachim Eastwood, Tomas Winkler,
Johannes Thumshirn, Andreas Werner, Carlo Caione, Kevin Hilman,
Matthias Brugger, Wan ZongShun, Michal Simek, Vladimir Zapolskiy,
Sylvain Lemieux, Kukjin Kim, Krzysztof Kozlowski, Zwane Mwaikambo,
Jim Cromie, Barry Song, Patrice Chotard, Maxime Ripard,
Chen-Yu Tsai, Marc Gonzalez, Mans Rullgard, Thierry Reding,
Jonathan Hunter, Masahiro Yamada, Benjamin Herrenschmidt,
Paul Mackerras, Michael Ellerman, Jun Nie, Baoyou Xie, Shawn Guo,
linux-watchdog, linux-kernel, linux-arm-kernel, linux-rpi-kernel,
adi-buildroot-devel, linux-mips, linux-amlogic, linux-mediatek,
linux-samsung-soc, linux-tegra, linuxppc-dev, patches
In-Reply-To: <48db897e-8a61-a5bc-5a61-56349cafaa10@roeck-us.net>
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On Tue, Feb 20, 2018 at 07:13:43AM -0800, Guenter Roeck wrote:
> On 02/20/2018 05:21 AM, Marcus Folkesson wrote:
> > Hello William,
> >
> > On Tue, Feb 20, 2018 at 07:49:55AM -0500, William Breathitt Gray wrote:
> > > On Tue, Feb 20, 2018 at 11:45:31AM +0100, Marcus Folkesson wrote:
> > > > - Add SPDX identifier
> > > > - Remove boiler plate license text
> > > > - If MODULE_LICENSE and boiler plate does not match, go for boiler plate
> > > > license
> > > >
> > > > Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
> > > > Acked-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
> > > > Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
> > > > Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> > > > Acked-by: Michal Simek <michal.simek@xilinx.com>
> > > > ---
> > > >
> > > > Notes:
> > > > v2:
> > > > - Put back removed copyright texts for meson_gxbb_wdt and coh901327_wdt
> > > > - Change to BSD-3-Clause for meson_gxbb_wdt
> > > > v1: Please have an extra look at meson_gxbb_wdt.c
> > >
> > > [...]
> > >
> > > > diff --git a/drivers/watchdog/ebc-c384_wdt.c b/drivers/watchdog/ebc-c384_wdt.c
> > > > index 2170b275ea01..c173b6f5c866 100644
> > > > --- a/drivers/watchdog/ebc-c384_wdt.c
> > > > +++ b/drivers/watchdog/ebc-c384_wdt.c
> > > > @@ -1,15 +1,8 @@
> > > > +// SPDX-License-Identifier: GPL-2.0
> > > > /*
> > > > * Watchdog timer driver for the WinSystems EBC-C384
> > > > * Copyright (C) 2016 William Breathitt Gray
> > > > *
The copyright is untouched?
> > > > - * This program is free software; you can redistribute it and/or modify
> > > > - * it under the terms of the GNU General Public License, version 2, as
> > > > - * published by the Free Software Foundation.
> > > > - *
> > > > - * This program is distributed in the hope that it will be useful, but
> > > > - * WITHOUT ANY WARRANTY; without even the implied warranty of
> > > > - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> > > > - * General Public License for more details.
> > > > */
> > > > #include <linux/device.h>
> > > > #include <linux/dmi.h>
> >
> > Thank you for your feedback!
> > >
> > > I have no problem with adding a SPDX line to the top of this file, but
> > > use "SPDX-License-Identifier: GPL-2.0-only" as I was very intentional
> > > with the selection of GPL version 2 only when I published this code.
> >
> > SPDX-License-Identifier: GPL-2.0
> > Is GPL-2.0 only [1], so it respects your choice of license.
> >
> > >
> > > Furthermore, please do not remove the existing copyright text; although
> >
>
> It is not a matter if you CAN keep a copyright. You MUST NOT remove a copyright.
> As long as you do, the series is
>
> Nacked-by: Guenter Roeck <linux@roeck-us.net>
>
> Guenter
I'm sorry, I do not see where the copyright is removed unless you count
the license text as part of the copyright.
Can you please point it out?
>
> > The copyright text:
> >
> > Copyright (C) 2016 William Breathitt Gray
> >
> > Is still in the file.
^^^
> >
> >
> > > it's just boilerplate for some, I was careful with the selection of
> > > these words, and I worry the SPDX line only -- despite its useful
> > > conciseness -- may lead to misunderstandings about my intentioned
> > > license for this code.
> >
> > I'm not sure I understand your concerns here, the SPDX identifier is
> > a shorthand for the GPL 2.0 only license. See [1] - Linux kernel licensing rules.
> >
> > One of the biggest benefits with SPDX identifier is that it is hard to verify
> > boiler plate licenses due to formatting, types, different formulations and so on.
> >
> > If still worrying, I think we could keep the license text as
> > well.
> >
> > >
> > > For the time being, I can't Ack this patch with the changes it makes
> > > currently:
> > >
> > > Nacked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
> > >
> > > William Breathitt Gray
> >
> > Please let me know if I got you wrong at some point.
> >
> > [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/license-rules.rst
> >
> > Best regards
> > Marcus Folkesson
> >
>
Best regards
Marcus Folkesson
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^ permalink raw reply
* [PATCH 5/6] powerpc: Implement DISCONTIGMEM and allow selection on PPC32
From: Jonathan Neuschäfer @ 2018-02-20 16:14 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-kernel, Michael Ellerman, linux-mm, Joel Stanley,
Jonathan Neuschäfer, Benjamin Herrenschmidt, Paul Mackerras,
Greg Kroah-Hartman, Thomas Gleixner, Philippe Ombredanne,
Kate Stewart, Nathan Fontenot, Michael Bringmann,
Thiago Jung Bauermann, Kees Cook
In-Reply-To: <20180220161424.5421-1-j.neuschaefer@gmx.net>
The implementation of pfn_to_nid and pfn_valid in mmzone.h is based on
arch/metag's implementation.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
---
NOTE: Checking NODE_DATA(nid) in pfn_to_nid appears to be uncommon.
Running up to MAX_NUMNODES instead of checking NODE_DATA(nid) would
require the node_data array to be filled with valid pointers.
---
arch/powerpc/Kconfig | 5 ++++-
arch/powerpc/include/asm/mmzone.h | 21 +++++++++++++++++++++
arch/powerpc/mm/numa.c | 7 +++++++
3 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 73ce5dd07642..c2633b7b8ed9 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -639,7 +639,6 @@ config HAVE_MEMORYLESS_NODES
config ARCH_SELECT_MEMORY_MODEL
def_bool y
- depends on PPC64
config ARCH_FLATMEM_ENABLE
def_bool y
@@ -654,6 +653,10 @@ config ARCH_SPARSEMEM_DEFAULT
def_bool y
depends on PPC_BOOK3S_64
+config ARCH_DISCONTIGMEM_ENABLE
+ def_bool y
+ depends on PPC32
+
config SYS_SUPPORTS_HUGETLBFS
bool
diff --git a/arch/powerpc/include/asm/mmzone.h b/arch/powerpc/include/asm/mmzone.h
index 91c69ff53a8a..1684a5c98d23 100644
--- a/arch/powerpc/include/asm/mmzone.h
+++ b/arch/powerpc/include/asm/mmzone.h
@@ -26,6 +26,27 @@ extern struct pglist_data *node_data[];
*/
#define NODE_DATA(nid) (node_data[nid])
+static inline int pfn_to_nid(unsigned long pfn)
+{
+ int nid;
+
+ for (nid = 0; nid < MAX_NUMNODES && NODE_DATA(nid); nid++)
+ if (pfn >= node_start_pfn(nid) && pfn <= node_end_pfn(nid))
+ return nid;
+
+ return -1;
+}
+
+static inline int pfn_valid(int pfn)
+{
+ int nid = pfn_to_nid(pfn);
+
+ if (nid >= 0)
+ return pfn < node_end_pfn(nid);
+
+ return 0;
+}
+
/*
* Following are specific to this numa platform.
*/
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index dfe279529463..ec47f1081509 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -744,6 +744,13 @@ static void __init setup_nonnuma(void)
PFN_PHYS(end_pfn - start_pfn),
&memblock.memory, nid);
node_set_online(nid);
+
+ /*
+ * On DISCONTIGMEM systems, place different memory blocks into
+ * different nodes.
+ */
+ if (IS_ENABLED(CONFIG_DISCONTIGMEM) && nid < MAX_NUMNODES - 1)
+ nid++;
}
}
--
2.16.1
^ permalink raw reply related
* Re: [PATCH] ocxl: Fix potential bad errno on irq allocation
From: Andrew Donnellan @ 2018-02-20 23:21 UTC (permalink / raw)
To: Frederic Barrat, linuxppc-dev; +Cc: dan.carpenter
In-Reply-To: <20180216130118.26008-1-fbarrat@linux.vnet.ibm.com>
On 17/02/18 00:01, Frederic Barrat wrote:
> Fix some issues found by a static checker:
>
> When allocating an AFU interrupt, if the driver cannot copy the output
> parameters to userland, the errno value was not set to EFAULT
>
> Remove a (now) useless cast.
>
> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
> Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
> ---
> drivers/misc/ocxl/file.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/misc/ocxl/file.c b/drivers/misc/ocxl/file.c
> index 2dd2db9bc1c9..337462e1569f 100644
> --- a/drivers/misc/ocxl/file.c
> +++ b/drivers/misc/ocxl/file.c
> @@ -133,8 +133,10 @@ static long afu_ioctl(struct file *file, unsigned int cmd,
> if (!rc) {
> rc = copy_to_user((u64 __user *) args, &irq_offset,
> sizeof(irq_offset));
> - if (rc)
> + if (rc) {
> ocxl_afu_irq_free(ctx, irq_offset);
> + return -EFAULT;
> + }
> }
> break;
>
> @@ -329,7 +331,7 @@ static ssize_t afu_read(struct file *file, char __user *buf, size_t count,
>
> used += sizeof(header);
>
> - rc = (ssize_t) used;
> + rc = used;
> return rc;
> }
>
--
Andrew Donnellan OzLabs, ADL Canberra
andrew.donnellan@au1.ibm.com IBM Australia Limited
^ permalink raw reply
* Re: [PATCH] fix double ;;s in code
From: Andrew Morton @ 2018-02-20 23:47 UTC (permalink / raw)
To: Jani Nikula
Cc: Pavel Machek, Christophe LEROY, elfring, kernel list, vgupta,
linux, oleg, catalin.marinas, will.deacon, paulus, benh, mpe,
ard.biesheuvel, tglx, mingo, hpa, x86, scott.bauer,
jonathan.derrick, axboe, daniel.lezcano, maxime.ripard, wens,
alexander.deucher, christian.koenig, David1.Zhou, airlied,
robdclark, joro, shli, shawnguo, kernel, fabio.estevam,
Alexey.Brodkin, mhocko, vbabka, Vladislav.Zakharov, noamca,
yamada.masahiro, sboyd, viresh.kumar, linus.walleij, heiko, aik,
ruscur, david, fbarrat, alistair, robh, joe, harry.wentland,
tony.cheng, Wenjing.Liu, airlied, Ding.Wang, sylvia.tsai,
hersenxs.wu, Rex.Zhu, JinHuiEric.Huang, dan.carpenter, architt,
narmstrong, ville.syrjala, jcrouse, aishpant, noralf, andresx7,
Monk.Liu, nicolai.haehnle, Andrey.Grodzovsky, linux-snps-arc,
linux-arm-kernel, kvm-ppc, linuxppc-dev, linux-efi, linux-block,
amd-gfx, dri-devel, linux-arm-msm, freedreno, iommu, linux-raid
In-Reply-To: <87o9kkcck3.fsf@intel.com>
On Tue, 20 Feb 2018 10:03:56 +0200 Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Mon, 19 Feb 2018, Pavel Machek <pavel@ucw.cz> wrote:
> > On Mon 2018-02-19 16:41:35, Daniel Vetter wrote:
> >> Yeah, pls split this into one patch per area, with a suitable patch
> >> subject prefix. Look at git log of each file to get a feeling for what's
> >> the standard in each area.
> >
> > Yeah I can spend hour spliting it, and then people will ignore it
> > anyway.
> >
> > If you care about one of the files being modified, please fix the
> > bug, ";;" is a clear bug.
> >
> > If you don't care ... well I don't care either.
>
> Look, if this causes just one conflict down the line because it touches
> the kernel all over the place, then IMO it already wasn't worth
> it. Merge conflicts are inevitable, but there's no reason to make life
> harder just to cater for a cleanup patch. It's not that important.
>
> Had it been split up, the drm parts would've been merged already.
I just stage patches like this behind linux-next. So if your stuff in
in -next, you'll never notice a thing.
^ permalink raw reply
* Re: [PATCH 5/6] powerpc: Implement DISCONTIGMEM and allow selection on PPC32
From: kbuild test robot @ 2018-02-20 23:46 UTC (permalink / raw)
To: Jonathan Neuschäfer
Cc: kbuild-all, linuxppc-dev, linux-kernel, Michael Ellerman,
linux-mm, Joel Stanley, Jonathan Neuschäfer,
Benjamin Herrenschmidt, Paul Mackerras, Greg Kroah-Hartman,
Thomas Gleixner, Philippe Ombredanne, Kate Stewart,
Nathan Fontenot, Michael Bringmann, Thiago Jung Bauermann,
Kees Cook
In-Reply-To: <20180220161424.5421-6-j.neuschaefer@gmx.net>
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Hi Jonathan,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.16-rc2 next-20180220]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Jonathan-Neusch-fer/DISCONTIGMEM-support-for-PPC32/20180221-044840
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-defconfig (attached as .config)
compiler: powerpc64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=powerpc
All errors (new ones prefixed by >>):
In file included from include/linux/gfp.h:6:0,
from include/linux/mm.h:10,
from include/linux/mman.h:5,
from arch/powerpc/kernel/asm-offsets.c:22:
>> include/linux/mmzone.h:1239:19: error: conflicting types for 'pfn_valid'
static inline int pfn_valid(unsigned long pfn)
^~~~~~~~~
In file included from include/linux/mmzone.h:912:0,
from include/linux/gfp.h:6,
from include/linux/mm.h:10,
from include/linux/mman.h:5,
from arch/powerpc/kernel/asm-offsets.c:22:
arch/powerpc/include/asm/mmzone.h:40:19: note: previous definition of 'pfn_valid' was here
static inline int pfn_valid(int pfn)
^~~~~~~~~
make[2]: *** [arch/powerpc/kernel/asm-offsets.s] Error 1
make[2]: Target '__build' not remade because of errors.
make[1]: *** [prepare0] Error 2
make[1]: Target 'prepare' not remade because of errors.
make: *** [sub-make] Error 2
vim +/pfn_valid +1239 include/linux/mmzone.h
c4e1be9e Dave Hansen 2017-07-06 1237
7b7bf499 Will Deacon 2011-05-19 1238 #ifndef CONFIG_HAVE_ARCH_PFN_VALID
d41dee36 Andy Whitcroft 2005-06-23 @1239 static inline int pfn_valid(unsigned long pfn)
d41dee36 Andy Whitcroft 2005-06-23 1240 {
d41dee36 Andy Whitcroft 2005-06-23 1241 if (pfn_to_section_nr(pfn) >= NR_MEM_SECTIONS)
d41dee36 Andy Whitcroft 2005-06-23 1242 return 0;
29751f69 Andy Whitcroft 2005-06-23 1243 return valid_section(__nr_to_section(pfn_to_section_nr(pfn)));
d41dee36 Andy Whitcroft 2005-06-23 1244 }
7b7bf499 Will Deacon 2011-05-19 1245 #endif
d41dee36 Andy Whitcroft 2005-06-23 1246
:::::: The code at line 1239 was first introduced by commit
:::::: d41dee369bff3b9dcb6328d4d822926c28cc2594 [PATCH] sparsemem memory model
:::::: TO: Andy Whitcroft <apw@shadowen.org>
:::::: CC: Linus Torvalds <torvalds@ppc970.osdl.org>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
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