* [PATCH RFT V3 5/8] clk: mux: add explicit big endian support
From: Jonas Gorski @ 2019-04-18 11:12 UTC (permalink / raw)
To: linux-clk, linuxppc-dev, linux-arm-kernel, linux-rockchip,
linux-tegra
Cc: Peter De Schrijver, Fabio Estevam, Heiko Stuebner, Stephen Boyd,
Michael Turquette, Michal Simek, Jonathan Hunter,
Prashant Gaikwad, Paul Mackerras, NXP Linux Team,
Pengutronix Kernel Team, Thierry Reding, Anatolij Gustschin,
Shawn Guo, Sascha Hauer
In-Reply-To: <20190418111211.10474-1-jonas.gorski@gmail.com>
Add a clock specific flag to switch register accesses to big endian, to
allow runtime configuration of big endian mux clocks.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
V2 -> V3:
* drop unneeded else in clk_mux_readl
V1 -> V2:
* switch from global to local flag
drivers/clk/clk-mux.c | 22 +++++++++++++++++++---
include/linux/clk-provider.h | 4 ++++
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 2ad2df2e8909..61ad331b7ff4 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -23,6 +23,22 @@
* parent - parent is adjustable through clk_set_parent
*/
+static inline u32 clk_mux_readl(struct clk_mux *mux)
+{
+ if (mux->flags & CLK_MUX_BIG_ENDIAN)
+ return ioread32be(mux->reg);
+
+ return clk_readl(mux->reg);
+}
+
+static inline void clk_mux_writel(struct clk_mux *mux, u32 val)
+{
+ if (mux->flags & CLK_MUX_BIG_ENDIAN)
+ iowrite32be(val, mux->reg);
+ else
+ clk_writel(val, mux->reg);
+}
+
int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags,
unsigned int val)
{
@@ -73,7 +89,7 @@ static u8 clk_mux_get_parent(struct clk_hw *hw)
struct clk_mux *mux = to_clk_mux(hw);
u32 val;
- val = clk_readl(mux->reg) >> mux->shift;
+ val = clk_mux_readl(mux) >> mux->shift;
val &= mux->mask;
return clk_mux_val_to_index(hw, mux->table, mux->flags, val);
@@ -94,12 +110,12 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
if (mux->flags & CLK_MUX_HIWORD_MASK) {
reg = mux->mask << (mux->shift + 16);
} else {
- reg = clk_readl(mux->reg);
+ reg = clk_mux_readl(mux);
reg &= ~(mux->mask << mux->shift);
}
val = val << mux->shift;
reg |= val;
- clk_writel(reg, mux->reg);
+ clk_mux_writel(mux, reg);
if (mux->lock)
spin_unlock_irqrestore(mux->lock, flags);
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 9df78e3fb62b..f82cda41e1a8 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -510,6 +510,9 @@ void clk_hw_unregister_divider(struct clk_hw *hw);
* .get_parent clk_op.
* CLK_MUX_ROUND_CLOSEST - Use the parent rate that is closest to the desired
* frequency.
+ * CLK_MUX_BIG_ENDIAN - By default little endian register accesses are used for
+ * the mux register. Setting this flag makes the register accesses big
+ * endian.
*/
struct clk_mux {
struct clk_hw hw;
@@ -528,6 +531,7 @@ struct clk_mux {
#define CLK_MUX_HIWORD_MASK BIT(2)
#define CLK_MUX_READ_ONLY BIT(3) /* mux can't be changed */
#define CLK_MUX_ROUND_CLOSEST BIT(4)
+#define CLK_MUX_BIG_ENDIAN BIT(5)
extern const struct clk_ops clk_mux_ops;
extern const struct clk_ops clk_mux_ro_ops;
--
2.13.2
^ permalink raw reply related
* [PATCH RFT V3 4/8] clk: multiplier: add explicit big endian support
From: Jonas Gorski @ 2019-04-18 11:12 UTC (permalink / raw)
To: linux-clk, linuxppc-dev, linux-arm-kernel, linux-rockchip,
linux-tegra
Cc: Peter De Schrijver, Fabio Estevam, Heiko Stuebner, Stephen Boyd,
Michael Turquette, Michal Simek, Jonathan Hunter,
Prashant Gaikwad, Paul Mackerras, NXP Linux Team,
Pengutronix Kernel Team, Thierry Reding, Anatolij Gustschin,
Shawn Guo, Sascha Hauer
In-Reply-To: <20190418111211.10474-1-jonas.gorski@gmail.com>
Add a clock specific flag to switch register accesses to big endian, to
allow runtime configuration of big endian multiplier clocks.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
V2 -> V3:
* drop unneeded else in clk_mult_readl
V1 -> V2:
* switch from global to local flag
drivers/clk/clk-multiplier.c | 22 +++++++++++++++++++---
include/linux/clk-provider.h | 4 ++++
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-multiplier.c b/drivers/clk/clk-multiplier.c
index 3c86f859c199..77327df9bf32 100644
--- a/drivers/clk/clk-multiplier.c
+++ b/drivers/clk/clk-multiplier.c
@@ -11,6 +11,22 @@
#include <linux/of.h>
#include <linux/slab.h>
+static inline u32 clk_mult_readl(struct clk_multiplier *mult)
+{
+ if (mult->flags & CLK_MULTIPLIER_BIG_ENDIAN)
+ return ioread32be(mult->reg);
+
+ return clk_readl(mult->reg);
+}
+
+static inline void clk_mult_writel(struct clk_multiplier *mult, u32 val)
+{
+ if (mult->flags & CLK_MULTIPLIER_BIG_ENDIAN)
+ iowrite32be(val, mult->reg);
+ else
+ clk_writel(val, mult->reg);
+}
+
static unsigned long __get_mult(struct clk_multiplier *mult,
unsigned long rate,
unsigned long parent_rate)
@@ -27,7 +43,7 @@ static unsigned long clk_multiplier_recalc_rate(struct clk_hw *hw,
struct clk_multiplier *mult = to_clk_multiplier(hw);
unsigned long val;
- val = clk_readl(mult->reg) >> mult->shift;
+ val = clk_mult_readl(mult) >> mult->shift;
val &= GENMASK(mult->width - 1, 0);
if (!val && mult->flags & CLK_MULTIPLIER_ZERO_BYPASS)
@@ -118,10 +134,10 @@ static int clk_multiplier_set_rate(struct clk_hw *hw, unsigned long rate,
else
__acquire(mult->lock);
- val = clk_readl(mult->reg);
+ val = clk_mult_readl(mult);
val &= ~GENMASK(mult->width + mult->shift - 1, mult->shift);
val |= factor << mult->shift;
- clk_writel(val, mult->reg);
+ clk_mult_writel(mult, val);
if (mult->lock)
spin_unlock_irqrestore(mult->lock, flags);
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 8576c2dbc639..9df78e3fb62b 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -667,6 +667,9 @@ void clk_hw_unregister_fractional_divider(struct clk_hw *hw);
* leaving the parent rate unmodified.
* CLK_MULTIPLIER_ROUND_CLOSEST - Makes the best calculated divider to be
* rounded to the closest integer instead of the down one.
+ * CLK_MULTIPLIER_BIG_ENDIAN - By default little endian register accesses are
+ * used for the multiplier register. Setting this flag makes the register
+ * accesses big endian.
*/
struct clk_multiplier {
struct clk_hw hw;
@@ -681,6 +684,7 @@ struct clk_multiplier {
#define CLK_MULTIPLIER_ZERO_BYPASS BIT(0)
#define CLK_MULTIPLIER_ROUND_CLOSEST BIT(1)
+#define CLK_MULTIPLIER_BIG_ENDIAN BIT(2)
extern const struct clk_ops clk_multiplier_ops;
--
2.13.2
^ permalink raw reply related
* [PATCH RFT V3 3/8] clk: gate: add explicit big endian support
From: Jonas Gorski @ 2019-04-18 11:12 UTC (permalink / raw)
To: linux-clk, linuxppc-dev, linux-arm-kernel, linux-rockchip,
linux-tegra
Cc: Peter De Schrijver, Fabio Estevam, Heiko Stuebner, Stephen Boyd,
Michael Turquette, Michal Simek, Jonathan Hunter,
Prashant Gaikwad, Paul Mackerras, NXP Linux Team,
Pengutronix Kernel Team, Thierry Reding, Anatolij Gustschin,
Shawn Guo, Sascha Hauer
In-Reply-To: <20190418111211.10474-1-jonas.gorski@gmail.com>
Add a clock specific flag to switch register accesses to big endian, to
allow runtime configuration of big endian gated clocks.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
V2 -> V3:
* drop unneeded else in clk_gate_readl
V1 -> V2:
* switch from global to local flag
drivers/clk/clk-gate.c | 22 +++++++++++++++++++---
include/linux/clk-provider.h | 4 ++++
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index f05823cd9b21..6ced7b1f5585 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -23,6 +23,22 @@
* parent - fixed parent. No clk_set_parent support
*/
+static inline u32 clk_gate_readl(struct clk_gate *gate)
+{
+ if (gate->flags & CLK_GATE_BIG_ENDIAN)
+ return ioread32be(gate->reg);
+
+ return clk_readl(gate->reg);
+}
+
+static inline void clk_gate_writel(struct clk_gate *gate, u32 val)
+{
+ if (gate->flags & CLK_GATE_BIG_ENDIAN)
+ iowrite32be(val, gate->reg);
+ else
+ clk_writel(val, gate->reg);
+}
+
/*
* It works on following logic:
*
@@ -55,7 +71,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)
if (set)
reg |= BIT(gate->bit_idx);
} else {
- reg = clk_readl(gate->reg);
+ reg = clk_gate_readl(gate);
if (set)
reg |= BIT(gate->bit_idx);
@@ -63,7 +79,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)
reg &= ~BIT(gate->bit_idx);
}
- clk_writel(reg, gate->reg);
+ clk_gate_writel(gate, reg);
if (gate->lock)
spin_unlock_irqrestore(gate->lock, flags);
@@ -88,7 +104,7 @@ int clk_gate_is_enabled(struct clk_hw *hw)
u32 reg;
struct clk_gate *gate = to_clk_gate(hw);
- reg = clk_readl(gate->reg);
+ reg = clk_gate_readl(gate);
/* if a set bit disables this clk, flip it before masking */
if (gate->flags & CLK_GATE_SET_TO_DISABLE)
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 8c07d810acf5..8576c2dbc639 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -348,6 +348,9 @@ void of_fixed_clk_setup(struct device_node *np);
* of this register, and mask of gate bits are in higher 16-bit of this
* register. While setting the gate bits, higher 16-bit should also be
* updated to indicate changing gate bits.
+ * CLK_GATE_BIG_ENDIAN - by default little endian register accesses are used for
+ * the gate register. Setting this flag makes the register accesses big
+ * endian.
*/
struct clk_gate {
struct clk_hw hw;
@@ -361,6 +364,7 @@ struct clk_gate {
#define CLK_GATE_SET_TO_DISABLE BIT(0)
#define CLK_GATE_HIWORD_MASK BIT(1)
+#define CLK_GATE_BIG_ENDIAN BIT(2)
extern const struct clk_ops clk_gate_ops;
struct clk *clk_register_gate(struct device *dev, const char *name,
--
2.13.2
^ permalink raw reply related
* [PATCH RFT V3 1/8] clk: divider: add explicit big endian support
From: Jonas Gorski @ 2019-04-18 11:12 UTC (permalink / raw)
To: linux-clk, linuxppc-dev, linux-arm-kernel, linux-rockchip,
linux-tegra
Cc: Peter De Schrijver, Fabio Estevam, Heiko Stuebner, Stephen Boyd,
Michael Turquette, Michal Simek, Jonathan Hunter,
Prashant Gaikwad, Paul Mackerras, NXP Linux Team,
Pengutronix Kernel Team, Thierry Reding, Anatolij Gustschin,
Shawn Guo, Sascha Hauer
In-Reply-To: <20190418111211.10474-1-jonas.gorski@gmail.com>
Add a clock specific flag to switch register accesses to big endian, to
allow runtime configuration of big endian divider clocks.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
V2 -> V3:
* fix passed arguments to clk_div_readl found by kbuild
* drop unneeded else in clk_div_readl
V1 -> V2:
* switch from global to local flag
drivers/clk/clk-divider.c | 26 ++++++++++++++++++++++----
include/linux/clk-provider.h | 4 ++++
2 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index e5a17265cfaf..25c7404e376c 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -25,6 +25,24 @@
* parent - fixed parent. No clk_set_parent support
*/
+static inline u32 clk_div_readl(struct clk_divider *divider)
+{
+ if (divider->flags & CLK_DIVIDER_BIG_ENDIAN)
+ return ioread32be(divider->reg);
+
+ return clk_readl(divider->reg);
+}
+
+static inline void clk_div_writel(struct clk_divider *divider, u32 val)
+{
+ if (divider->flags & CLK_DIVIDER_BIG_ENDIAN)
+ iowrite32be(val, divider->reg);
+ else
+ clk_writel(val, divider->reg);
+}
+
+#define div_mask(width) ((1 << (width)) - 1)
+
static unsigned int _get_table_maxdiv(const struct clk_div_table *table,
u8 width)
{
@@ -135,7 +153,7 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
struct clk_divider *divider = to_clk_divider(hw);
unsigned int val;
- val = clk_readl(divider->reg) >> divider->shift;
+ val = clk_div_readl(divider) >> divider->shift;
val &= clk_div_mask(divider->width);
return divider_recalc_rate(hw, parent_rate, val, divider->table,
@@ -370,7 +388,7 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
if (divider->flags & CLK_DIVIDER_READ_ONLY) {
u32 val;
- val = clk_readl(divider->reg) >> divider->shift;
+ val = clk_div_readl(divider) >> divider->shift;
val &= clk_div_mask(divider->width);
return divider_ro_round_rate(hw, rate, prate, divider->table,
@@ -420,11 +438,11 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
val = clk_div_mask(divider->width) << (divider->shift + 16);
} else {
- val = clk_readl(divider->reg);
+ val = clk_div_readl(divider);
val &= ~(clk_div_mask(divider->width) << divider->shift);
}
val |= (u32)value << divider->shift;
- clk_writel(val, divider->reg);
+ clk_div_writel(divider, val);
if (divider->lock)
spin_unlock_irqrestore(divider->lock, flags);
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index db21437c77e2..7117b8cc0c0c 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -416,6 +416,9 @@ struct clk_div_table {
* CLK_DIVIDER_MAX_AT_ZERO - For dividers which are like CLK_DIVIDER_ONE_BASED
* except when the value read from the register is zero, the divisor is
* 2^width of the field.
+ * CLK_DIVIDER_BIG_ENDIAN - By default little endian register accesses are used
+ * for the divider register. Setting this flag makes the register accesses
+ * big endian.
*/
struct clk_divider {
struct clk_hw hw;
@@ -437,6 +440,7 @@ struct clk_divider {
#define CLK_DIVIDER_ROUND_CLOSEST BIT(4)
#define CLK_DIVIDER_READ_ONLY BIT(5)
#define CLK_DIVIDER_MAX_AT_ZERO BIT(6)
+#define CLK_DIVIDER_BIG_ENDIAN BIT(7)
extern const struct clk_ops clk_divider_ops;
extern const struct clk_ops clk_divider_ro_ops;
--
2.13.2
^ permalink raw reply related
* [PATCH RFT V3 2/8] clk: fractional-divider: add explicit big endian support
From: Jonas Gorski @ 2019-04-18 11:12 UTC (permalink / raw)
To: linux-clk, linuxppc-dev, linux-arm-kernel, linux-rockchip,
linux-tegra
Cc: Peter De Schrijver, Fabio Estevam, Heiko Stuebner, Stephen Boyd,
Michael Turquette, Michal Simek, Jonathan Hunter,
Prashant Gaikwad, Paul Mackerras, NXP Linux Team,
Pengutronix Kernel Team, Thierry Reding, Anatolij Gustschin,
Shawn Guo, Sascha Hauer
In-Reply-To: <20190418111211.10474-1-jonas.gorski@gmail.com>
Add a clock specific flag to switch register accesses to big endian, to
allow runtime configuration of big endian fractional divider clocks.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
V2 -> V3:
* drop unneeded else in clk_fd_readl
V1 -> V2:
* switch from global to local flag
drivers/clk/clk-fractional-divider.c | 22 +++++++++++++++++++---
include/linux/clk-provider.h | 4 ++++
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c
index fdfe2e423d15..f88df265e787 100644
--- a/drivers/clk/clk-fractional-divider.c
+++ b/drivers/clk/clk-fractional-divider.c
@@ -13,6 +13,22 @@
#include <linux/slab.h>
#include <linux/rational.h>
+static inline u32 clk_fd_readl(struct clk_fractional_divider *fd)
+{
+ if (fd->flags & CLK_FRAC_DIVIDER_BIG_ENDIAN)
+ return ioread32be(fd->reg);
+
+ return clk_readl(fd->reg);
+}
+
+static inline void clk_fd_writel(struct clk_fractional_divider *fd, u32 val)
+{
+ if (fd->flags & CLK_FRAC_DIVIDER_BIG_ENDIAN)
+ iowrite32be(val, fd->reg);
+ else
+ clk_writel(val, fd->reg);
+}
+
static unsigned long clk_fd_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
@@ -27,7 +43,7 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw *hw,
else
__acquire(fd->lock);
- val = clk_readl(fd->reg);
+ val = clk_fd_readl(fd);
if (fd->lock)
spin_unlock_irqrestore(fd->lock, flags);
@@ -115,10 +131,10 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate,
else
__acquire(fd->lock);
- val = clk_readl(fd->reg);
+ val = clk_fd_readl(fd);
val &= ~(fd->mmask | fd->nmask);
val |= (m << fd->mshift) | (n << fd->nshift);
- clk_writel(val, fd->reg);
+ clk_fd_writel(fd, val);
if (fd->lock)
spin_unlock_irqrestore(fd->lock, flags);
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 7117b8cc0c0c..8c07d810acf5 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -607,6 +607,9 @@ void clk_hw_unregister_fixed_factor(struct clk_hw *hw);
* is the value read from the register. If CLK_FRAC_DIVIDER_ZERO_BASED
* is set then the numerator and denominator are both the value read
* plus one.
+ * CLK_FRAC_DIVIDER_BIG_ENDIAN - By default little endian register accesses are
+ * used for the divider register. Setting this flag makes the register
+ * accesses big endian.
*/
struct clk_fractional_divider {
struct clk_hw hw;
@@ -627,6 +630,7 @@ struct clk_fractional_divider {
#define to_clk_fd(_hw) container_of(_hw, struct clk_fractional_divider, hw)
#define CLK_FRAC_DIVIDER_ZERO_BASED BIT(0)
+#define CLK_FRAC_DIVIDER_BIG_ENDIAN BIT(1)
extern const struct clk_ops clk_fractional_divider_ops;
struct clk *clk_register_fractional_divider(struct device *dev,
--
2.13.2
^ permalink raw reply related
* [PATCH RFT V3 0/8] clk: make register endianness a run-time property
From: Jonas Gorski @ 2019-04-18 11:12 UTC (permalink / raw)
To: linux-clk, linuxppc-dev, linux-arm-kernel, linux-rockchip,
linux-tegra
Cc: Peter De Schrijver, Fabio Estevam, Heiko Stuebner, Stephen Boyd,
Michael Turquette, Michal Simek, Jonathan Hunter,
Prashant Gaikwad, Paul Mackerras, NXP Linux Team,
Pengutronix Kernel Team, Thierry Reding, Anatolij Gustschin,
Shawn Guo, Sascha Hauer
Currently the endianness for register accesses of basic clocks if fixed
based on the architecture (BE for PowerPC, LE for everyone else). This
is inconvenient for architectures that support both.
To avoid adding more rules to the #ifdef, this patchset adds new flags
to the basic clocks to tag the registers as BE then converts the only
big endian machine PowerPC to use it.
While not used by PowerPC, also add big endian support to clk-fractional-
divider and clk-multiplier, to cover all basic clocks.
Technically clk-multiplier isn't one as it doesn't provide any
registration functions and none of its users set the basic clock flag,
but nevertheless it and its flags are defined clk-provider.h. So I think
it's close enough to a basic clock to still count.
That way we can drop the special casing for PowerPC, and allow other big
endian platforms/drivers to make use of the basic clocks.
In addition, we can now drop clk_readl and clk_writel, and replace them
with normal readl and writel accessors everywhere.
Still RFT because I don't have a PowerPC device to test, and especially
not a 512x one. I did compile test it though!
I looked really hard, and this is the only place I could find where a
PowerPC platform (indirectly) used the clk accessors.
None of the regular drivers in clk/ were selected in any of the powerpc
defconfigs, and this was the only platform code that registered basic
clocks.
Changelog:
V2 -> V3:
* fix passed arguments to clk_div_readl found by kbuild
* drop unneeded else in generic read accessors
* fix a >80 chars line issue in the powerpc patch
V1 -> V2:
* switch from global flag to per-clock flag
* also added fractional divider and multiplier clocks, to make all
basic or quasi basic clocks support big endian
* reordered the basic clock patches in alphabetical order
* drop clk_{readl,writel} instead of adding BE variants and use
common accessors directly
* dropped the RFC, as I got comments (yay). More always welcome of
course :-)
Jonas Gorski (8):
clk: divider: add explicit big endian support
clk: fractional-divider: add explicit big endian support
clk: gate: add explicit big endian support
clk: multiplier: add explicit big endian support
clk: mux: add explicit big endian support
powerpc/512x: mark clocks as big endian
clk: core: remove powerpc special handling
clk: core: replace clk_{readl,writel} with {readl,writel}
arch/powerpc/platforms/512x/clock-commonclk.c | 9 +++--
drivers/clk/clk-divider.c | 26 +++++++++++---
drivers/clk/clk-fractional-divider.c | 22 ++++++++++--
drivers/clk/clk-gate.c | 22 ++++++++++--
drivers/clk/clk-multiplier.c | 22 ++++++++++--
drivers/clk/clk-mux.c | 22 ++++++++++--
drivers/clk/clk-xgene.c | 6 ++--
drivers/clk/hisilicon/clk-hisi-phase.c | 4 +--
drivers/clk/imx/clk-divider-gate.c | 20 +++++------
drivers/clk/imx/clk-sccg-pll.c | 12 +++----
drivers/clk/nxp/clk-lpc18xx-ccu.c | 6 ++--
drivers/clk/nxp/clk-lpc18xx-cgu.c | 24 ++++++-------
drivers/clk/rockchip/clk-ddr.c | 2 +-
drivers/clk/rockchip/clk-half-divider.c | 6 ++--
drivers/clk/tegra/clk-tegra124.c | 4 +--
drivers/clk/tegra/clk-tegra210.c | 6 ++--
drivers/clk/zynq/clkc.c | 6 ++--
drivers/clk/zynq/pll.c | 18 +++++-----
include/linux/clk-provider.h | 51 +++++++++++----------------
19 files changed, 181 insertions(+), 107 deletions(-)
--
2.13.2
^ permalink raw reply
* Re: [PATCH] Linux: Define struct termios2 in <termios.h> under _GNU_SOURCE [BZ #10339]
From: Adhemerval Zanella @ 2019-04-18 11:09 UTC (permalink / raw)
To: H. Peter Anvin, Florian Weimer; +Cc: linux-api, libc-alpha, linuxppc-dev
In-Reply-To: <8f05dc10-02ea-327f-f984-98b91a0b195d@zytor.com>
On 17/04/2019 19:04, H. Peter Anvin wrote:
> On 4/15/19 10:22 AM, Adhemerval Zanella wrote:
>>>
>>> New interfaces are only necessary for the handful of architectures that don't have the speed fields *and* to space to put them in.
>>
>> Based on your WIP, it seems that both sparc and mips could be adapted.
>> Do we still have glibc supported architecture that would require compat
>> symbols?
>>
>>>
>>> Using symbol versioning doesn't really help much since the real problem is that struct termios can be passed around in userspace, and the interfaces between user space libraries don't have any versioning. However, my POC code deals with that too by only seeing BOTHER when necessary, so if the structure is extended garbage in the extra fields will be ignored unless new baud rates are in use.
>>
>> Yeah, we discussed this earlier and if recall correctly it was not settled
>> that all architectures would allow the use to extra space for the new
>> fields. It seems the case, which makes the adaptation for termios2 even easier.
>>
>> The question I have for kernel side is whether termios2 is fully compatible
>> with termios, meaning that if there is conner cases we need to handle in
>> userland.
>>
>
> It depends on what you mean with "fully compatible."
>
> Functionality-wise, the termios2 interfaces are a strict superset. There
> is not, however, any guarantee that struct kernel_termios2 *contains* a
> contiguous binary equivalent to struct kernel_termios (in fact, on most
> architectures, it doesn't.)
I mean that we can fully implement termios1 using termios2 by adjusting
the termios struct in syscall wrappers. If it is a superset I think it
is fine.
>
>>>
>>> My POC code deals with Alpha as well by falling back to the old interfaces if necessary and possible, otherwise return error.
>>>
>>> Exporting termios2 to user space feels a bit odd at this stage as it would only be usable as a fallback on old glibc. Call it kernel_termios2 at least. ioctls using struct termios *must* be changed to kernel_termios anyway!
>>>
>>
>> I still prefer to avoid export it to userland and make it usable through
>> default termios, as your wip does. My understanding is new interfaces
>> should be semantic equal to current one with the only deviation that
>> non-standard baudrates will handled as its values. The only issue I
>> can foresee is if POSIX starts to export new bauds value.
>>
>
> ... which will be easy to handle: just define a Bxxxx constant with the
> value equal to the baud rate.
>
> -hhpa
Right.
^ permalink raw reply
* Re: [PATCH] ASoC: fsl_esai: Add pm runtime function
From: S.j. Wang @ 2019-04-18 10:21 UTC (permalink / raw)
To: Nicolin Chen
Cc: alsa-devel@alsa-project.org, timur@kernel.org,
Xiubo.Lee@gmail.com, festevam@gmail.com,
linux-kernel@vger.kernel.org, broonie@kernel.org,
linuxppc-dev@lists.ozlabs.org
Hi
>
>
> On Thu, Apr 18, 2019 at 03:29:09AM +0000, S.j. Wang wrote:
> > In imx8 when systerm enter suspend state, the power of subsystem will
> > be off, the clock enable state will be lost and register configuration
>
> Just for curiosity, we had similar situation on imx6sx, so we added
> suspend/resume with regcache. Why will the clock enable state be lost too?
> Does CCM on imx8 (might not be called CCM
> though) have any difference? What about clock rate settings?
>
> > will be lost. So the driver need to enter runtime suspend state in
> > suspend.
>
> > With this implementation the suspend function almost same as runtime
> > suspend function, so remove the suspend function, just use
> > pm_runtime_force_suspend instead, and same for the resume function.
> >
> > And also need to move clock enablement to runtime resume and clock
> > disablement to runtime suspend.
>
>
> > -static int fsl_esai_suspend(struct device *dev)
> > - regcache_cache_only(esai->regmap, true);
> > - regcache_mark_dirty(esai->regmap);
>
> > +static int fsl_esai_runtime_resume(struct device *dev)
> > regcache_cache_only(esai->regmap, false);
> > + regcache_mark_dirty(esai->regmap);
>
> Why move the regcache_mark_dirty from suspend to resume?
> (I am not saying it's wrong but wondering if this is the preferable way.)
Seems I should not do this change.
I will remain regcache_mark_dirty(esai->regmap); at its old place.
Best regards
Wang shengjiu
^ permalink raw reply
* Re: [PATCH] ASoC: fsl_esai: Add pm runtime function
From: Mark Brown @ 2019-04-18 10:17 UTC (permalink / raw)
To: S.j. Wang
Cc: alsa-devel@alsa-project.org, timur@kernel.org,
Xiubo.Lee@gmail.com, festevam@gmail.com,
linux-kernel@vger.kernel.org, Nicolin Chen,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <VE1PR04MB6479871F3FC087282D23582DE3260@VE1PR04MB6479.eurprd04.prod.outlook.com>
[-- Attachment #1: Type: text/plain, Size: 1115 bytes --]
On Thu, Apr 18, 2019 at 10:15:24AM +0000, S.j. Wang wrote:
> > On Thu, Apr 18, 2019 at 02:00:12AM -0700, Nicolin Chen wrote:
> > > On Thu, Apr 18, 2019 at 03:29:09AM +0000, S.j. Wang wrote:
> > > Just for curiosity, we had similar situation on imx6sx, so we added
> > > suspend/resume with regcache. Why will the clock enable state be lost
> > > too? Does CCM on imx8 (might not be called CCM
> > > though) have any difference? What about clock rate settings?
> > That sounds like a bug somewhere else - I'd expect that after resume the
> > clocking would be restored to the state it was in before suspend.
> There is limitation in our internal design. That is in imx8 the power of
> subsystem will be disabled at suspend, include the clock state , clock rate.
Right, that's fairly normal but usually it'd be restored as part of the
resume process?
> This patch is to enable the pm runtime, so I think it is better to move the
> clock operation to pm runtime, and close the clock at suspend to reduce
> the power.
It's definitely good to turn the clock off as much as possible, yes.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* Re: [PATCH] ASoC: fsl_esai: Add pm runtime function
From: S.j. Wang @ 2019-04-18 10:15 UTC (permalink / raw)
To: Mark Brown, Nicolin Chen
Cc: alsa-devel@alsa-project.org, timur@kernel.org,
Xiubo.Lee@gmail.com, festevam@gmail.com,
linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Hi
>
> On Thu, Apr 18, 2019 at 02:00:12AM -0700, Nicolin Chen wrote:
> > On Thu, Apr 18, 2019 at 03:29:09AM +0000, S.j. Wang wrote:
>
> > > In imx8 when systerm enter suspend state, the power of subsystem
> > > will be off, the clock enable state will be lost and register
> > > configuration
>
> > Just for curiosity, we had similar situation on imx6sx, so we added
> > suspend/resume with regcache. Why will the clock enable state be lost
> > too? Does CCM on imx8 (might not be called CCM
> > though) have any difference? What about clock rate settings?
>
> That sounds like a bug somewhere else - I'd expect that after resume the
> clocking would be restored to the state it was in before suspend.
There is limitation in our internal design. That is in imx8 the power of
subsystem will be disabled at suspend, include the clock state , clock rate.
I should not add it in comments, please ignore them, I will change the
description.
This patch is to enable the pm runtime, so I think it is better to move the
clock operation to pm runtime, and close the clock at suspend to reduce
the power.
Best regards
Wang shengjiu
^ permalink raw reply
* Re: [PATCH 6/8] powerpc/eeh: Initialize EEH address cache earlier
From: Oliver O'Halloran @ 2019-04-18 10:13 UTC (permalink / raw)
To: Sam Bobroff, linuxppc-dev
In-Reply-To: <0ca5b600a69f73323b269e4bfdaec1a53cdb4282.1553050609.git.sbobroff@linux.ibm.com>
On Wed, 2019-03-20 at 13:58 +1100, Sam Bobroff wrote:
> The EEH address cache is currently initialized and populated by a
> single function: eeh_addr_cache_build(). While the initial population
> of the cache can only be done once resources are allocated,
> initialization (just setting up a spinlock) could be done much
> earlier.
>
> So move the initialization step into a separate function and call it
> from a core_initcall (rather than a subsys initcall).
>
> This will allow future work to make use of the cache during boot time
> PCI scanning.
What's the idea there? Checking for overlaps in the BAR assignments?
> Signed-off-by: Sam Bobroff <sbobroff@linux.ibm.com>
> ---
> arch/powerpc/include/asm/eeh.h | 3 +++
> arch/powerpc/kernel/eeh.c | 2 ++
> arch/powerpc/kernel/eeh_cache.c | 13 +++++++++++--
> 3 files changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
> index e217ccda55d0..791b9e6fcc45 100644
> --- a/arch/powerpc/include/asm/eeh.h
> +++ b/arch/powerpc/include/asm/eeh.h
> @@ -295,6 +295,7 @@ int __init eeh_ops_register(struct eeh_ops *ops);
> int __exit eeh_ops_unregister(const char *name);
> int eeh_check_failure(const volatile void __iomem *token);
> int eeh_dev_check_failure(struct eeh_dev *edev);
> +void eeh_addr_cache_init(void);
> void eeh_addr_cache_build(void);
> void eeh_add_device_early(struct pci_dn *);
> void eeh_add_device_tree_early(struct pci_dn *);
> @@ -362,6 +363,8 @@ static inline int eeh_check_failure(const volatile void __iomem *token)
>
> #define eeh_dev_check_failure(x) (0)
>
> +static inline void eeh_addr_cache_init(void) { }
> +
> static inline void eeh_addr_cache_build(void) { }
>
> static inline void eeh_add_device_early(struct pci_dn *pdn) { }
> diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
> index 3dcff29cb9b3..7a406d58d2c0 100644
> --- a/arch/powerpc/kernel/eeh.c
> +++ b/arch/powerpc/kernel/eeh.c
> @@ -1219,6 +1219,8 @@ static int eeh_init(void)
> list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
> eeh_dev_phb_init_dynamic(hose);
>
> + eeh_addr_cache_init();
> +
> /* Initialize EEH event */
> return eeh_event_init();
> }
> diff --git a/arch/powerpc/kernel/eeh_cache.c b/arch/powerpc/kernel/eeh_cache.c
> index 9c68f0837385..f93dd5cf6a39 100644
> --- a/arch/powerpc/kernel/eeh_cache.c
> +++ b/arch/powerpc/kernel/eeh_cache.c
> @@ -267,6 +267,17 @@ void eeh_addr_cache_rmv_dev(struct pci_dev *dev)
> spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
> }
>
> +/**
> + * eeh_addr_cache_init - Initialize a cache of I/O addresses
> + *
> + * Initialize a cache of pci i/o addresses. This cache will be used to
> + * find the pci device that corresponds to a given address.
> + */
> +void eeh_addr_cache_init(void)
> +{
> + spin_lock_init(&pci_io_addr_cache_root.piar_lock);
> +}
You could move this out of the pci_io_addr_cache structure and use
DEFINE_SPINLOCK() too. We might even be able to get rid of the hand-
rolled interval tree in eeh_cache.c in favour of the generic
implementation (see mm/interval_tree.c). I'm pretty sure the generic
one is a drop-in replacement, but I haven't had a chance to have a
detailed look to see if there's any differences in behaviour.
> +
> /**
> * eeh_addr_cache_build - Build a cache of I/O addresses
> *
> @@ -282,8 +293,6 @@ void eeh_addr_cache_build(void)
> struct eeh_dev *edev;
> struct pci_dev *dev = NULL;
>
> - spin_lock_init(&pci_io_addr_cache_root.piar_lock);
> -
> for_each_pci_dev(dev) {
> pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn);
> if (!pdn)
^ permalink raw reply
* Re: [PATCH 5/8] powerpc/eeh: Add eeh_show_enabled()
From: Oliver O'Halloran @ 2019-04-18 10:01 UTC (permalink / raw)
To: Sam Bobroff, linuxppc-dev
In-Reply-To: <ad8cf11e3151fd39c6a9deedc0098d50274c75e4.1553050609.git.sbobroff@linux.ibm.com>
On Wed, 2019-03-20 at 13:58 +1100, Sam Bobroff wrote:
> Move the EEH enabled message into it's own function so that future
> work can call it from multiple places.
>
> Signed-off-by: Sam Bobroff <sbobroff@linux.ibm.com>
> ---
> arch/powerpc/include/asm/eeh.h | 3 +++
> arch/powerpc/kernel/eeh.c | 16 +++++++++++-----
> 2 files changed, 14 insertions(+), 5 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
> index fe4cf7208890..e217ccda55d0 100644
> --- a/arch/powerpc/include/asm/eeh.h
> +++ b/arch/powerpc/include/asm/eeh.h
> @@ -289,6 +289,7 @@ struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe);
>
> struct eeh_dev *eeh_dev_init(struct pci_dn *pdn);
> void eeh_dev_phb_init_dynamic(struct pci_controller *phb);
> +void eeh_show_enabled(void);
> void eeh_probe_devices(void);
> int __init eeh_ops_register(struct eeh_ops *ops);
> int __exit eeh_ops_unregister(const char *name);
> @@ -338,6 +339,8 @@ static inline bool eeh_enabled(void)
> return false;
> }
>
> +static inline void eeh_show_enabled(void) { }
> +
> static inline bool eeh_phb_enabled(void)
> {
> return false;
> diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
> index b14d89547895..3dcff29cb9b3 100644
> --- a/arch/powerpc/kernel/eeh.c
> +++ b/arch/powerpc/kernel/eeh.c
> @@ -163,6 +163,16 @@ static int __init eeh_setup(char *str)
> }
> __setup("eeh=", eeh_setup);
>
> +void eeh_show_enabled(void)
> +{
> + if (eeh_has_flag(EEH_FORCE_DISABLED))
> + pr_info("EEH: PCI Enhanced I/O Error Handling DISABLED (by eeh=off)\n");
The allcaps looks kind of stupid.
> + else if (eeh_enabled())
> + pr_info("EEH: PCI Enhanced I/O Error Handling ENABLED (capable adapter found)\n");
> + else
> + pr_info("EEH: PCI Enhanced I/O Error Handling DISABLED (no capable adapter found)\n");
If we really have to keep these messages then make it say "no EEH
capable buses found" or something. EEH support has absolutely nothing
to do with the adapters and I'm not even sure we can get the "DISABLED"
message on PowerNV since the root port will always be there.
> +}
> +
> /*
> * This routine captures assorted PCI configuration space data
> * for the indicated PCI device, and puts them into a buffer
> @@ -1166,11 +1176,7 @@ void eeh_probe_devices(void)
> pdn = hose->pci_data;
> traverse_pci_dn(pdn, eeh_ops->probe, NULL);
> }
> - if (eeh_enabled())
> - pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
> - else
> - pr_info("EEH: No capable adapters found\n");
> -
> + eeh_show_enabled();
> }
>
> /**
^ permalink raw reply
* Re: [PATCH 3/8] powerpc/eeh: Convert PNV_PHB_FLAG_EEH to global flag
From: Oliver O'Halloran @ 2019-04-18 9:51 UTC (permalink / raw)
To: Sam Bobroff, linuxppc-dev
In-Reply-To: <17f0dc9c30a139f19dceefd09689d34c3ad01a17.1553050609.git.sbobroff@linux.ibm.com>
On Wed, 2019-03-20 at 13:58 +1100, Sam Bobroff wrote:
> The PHB flag, PNV_PHB_FLAG_EEH, is set (on PowerNV) individually on
> each PHB once the EEH subsystem is ready. It is the only use of the
> flags member of the phb struct.
>
> However there is no need to store this separately on each PHB, so
> convert it to a global flag. For symmetry, the flag is now also set
> for pSeries; although it is currently unused it may be useful in the
> future.
I'd drop this patch and keep it as a seperate flag. Making this a
global flag doesn't really buy us anything either. It's also worth
remembering that we do have virtual PHBs, like the NVLink ones, that
don't have real EEH support and we should be doing something more
intelligent about that.
If you are going to remove the PNV_PHB flag then i would look at moving
that flag into the generic pci_controller structure that we use for
tracking PHBs since that would give us a way to toggle EEH support on a
per PHB basis on pseries and powernv.
> Signed-off-by: Sam Bobroff <sbobroff@linux.ibm.com>
> ---
> arch/powerpc/include/asm/eeh.h | 11 +++++++++++
> arch/powerpc/platforms/powernv/eeh-powernv.c | 14 +++-----------
> arch/powerpc/platforms/powernv/pci.c | 7 +++----
> arch/powerpc/platforms/powernv/pci.h | 2 --
> arch/powerpc/platforms/pseries/pci.c | 4 ++++
> 5 files changed, 21 insertions(+), 17 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
> index 3613a56281f2..fe4cf7208890 100644
> --- a/arch/powerpc/include/asm/eeh.h
> +++ b/arch/powerpc/include/asm/eeh.h
> @@ -43,6 +43,7 @@ struct pci_dn;
> #define EEH_VALID_PE_ZERO 0x10 /* PE#0 is valid */
> #define EEH_ENABLE_IO_FOR_LOG 0x20 /* Enable IO for log */
> #define EEH_EARLY_DUMP_LOG 0x40 /* Dump log immediately */
> +#define EEH_PHB_ENABLED 0x80 /* PHB recovery uses EEH */
>
> /*
> * Delay for PE reset, all in ms
> @@ -245,6 +246,11 @@ static inline bool eeh_enabled(void)
> return eeh_has_flag(EEH_ENABLED) && !eeh_has_flag(EEH_FORCE_DISABLED);
> }
>
> +static inline bool eeh_phb_enabled(void)
> +{
> + return eeh_has_flag(EEH_PHB_ENABLED);
> +}
> +
> static inline void eeh_serialize_lock(unsigned long *flags)
> {
> raw_spin_lock_irqsave(&confirm_error_lock, *flags);
> @@ -332,6 +338,11 @@ static inline bool eeh_enabled(void)
> return false;
> }
>
> +static inline bool eeh_phb_enabled(void)
> +{
> + return false;
> +}
> +
> static inline void eeh_probe_devices(void) { }
>
> static inline void *eeh_dev_init(struct pci_dn *pdn, void *data)
> diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
> index 6fc1a463b796..f0a95f663810 100644
> --- a/arch/powerpc/platforms/powernv/eeh-powernv.c
> +++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
> @@ -264,22 +264,14 @@ int pnv_eeh_post_init(void)
> return ret;
> }
>
> - if (!eeh_enabled())
> + if (eeh_enabled())
> + eeh_add_flag(EEH_PHB_ENABLED);
> + else
> disable_irq(eeh_event_irq);
>
> list_for_each_entry(hose, &hose_list, list_node) {
> phb = hose->private_data;
>
> - /*
> - * If EEH is enabled, we're going to rely on that.
> - * Otherwise, we restore to conventional mechanism
> - * to clear frozen PE during PCI config access.
> - */
> - if (eeh_enabled())
> - phb->flags |= PNV_PHB_FLAG_EEH;
> - else
> - phb->flags &= ~PNV_PHB_FLAG_EEH;
> -
> /* Create debugfs entries */
> #ifdef CONFIG_DEBUG_FS
> if (phb->has_dbgfs || !phb->dbgfs)
> diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
> index 307181fd8a17..d2b50f3bf6b1 100644
> --- a/arch/powerpc/platforms/powernv/pci.c
> +++ b/arch/powerpc/platforms/powernv/pci.c
> @@ -717,10 +717,9 @@ int pnv_pci_cfg_write(struct pci_dn *pdn,
> static bool pnv_pci_cfg_check(struct pci_dn *pdn)
> {
> struct eeh_dev *edev = NULL;
> - struct pnv_phb *phb = pdn->phb->private_data;
>
> /* EEH not enabled ? */
> - if (!(phb->flags & PNV_PHB_FLAG_EEH))
> + if (!eeh_phb_enabled())
> return true;
>
> /* PE reset or device removed ? */
> @@ -761,7 +760,7 @@ static int pnv_pci_read_config(struct pci_bus *bus,
>
> ret = pnv_pci_cfg_read(pdn, where, size, val);
> phb = pdn->phb->private_data;
> - if (phb->flags & PNV_PHB_FLAG_EEH && pdn->edev) {
> + if (eeh_phb_enabled() && pdn->edev) {
> if (*val == EEH_IO_ERROR_VALUE(size) &&
> eeh_dev_check_failure(pdn->edev))
> return PCIBIOS_DEVICE_NOT_FOUND;
> @@ -789,7 +788,7 @@ static int pnv_pci_write_config(struct pci_bus *bus,
>
> ret = pnv_pci_cfg_write(pdn, where, size, val);
> phb = pdn->phb->private_data;
> - if (!(phb->flags & PNV_PHB_FLAG_EEH))
> + if (!eeh_phb_enabled())
> pnv_pci_config_check_eeh(pdn);
>
> return ret;
> diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
> index 8e36da379252..eb0add61397b 100644
> --- a/arch/powerpc/platforms/powernv/pci.h
> +++ b/arch/powerpc/platforms/powernv/pci.h
> @@ -85,8 +85,6 @@ struct pnv_ioda_pe {
> struct list_head list;
> };
>
> -#define PNV_PHB_FLAG_EEH (1 << 0)
> -
> struct pnv_phb {
> struct pci_controller *hose;
> enum pnv_phb_type type;
> diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c
> index 37a77e57893e..7be80882c08d 100644
> --- a/arch/powerpc/platforms/pseries/pci.c
> +++ b/arch/powerpc/platforms/pseries/pci.c
> @@ -244,6 +244,10 @@ void __init pSeries_final_fixup(void)
>
> eeh_probe_devices();
> eeh_addr_cache_build();
> +#ifdef CONFIG_EEH
> + if (eeh_enabled())
> + eeh_add_flag(EEH_PHB_ENABLED);
> +#endif
>
> #ifdef CONFIG_PCI_IOV
> ppc_md.pcibios_sriov_enable = pseries_pcibios_sriov_enable;
^ permalink raw reply
* Re: [PATCH v3 21/21] docs: hwmon: Add an index file and rename docs to *.rst
From: Mauro Carvalho Chehab @ 2019-04-18 9:44 UTC (permalink / raw)
To: Guenter Roeck
Cc: Mark Rutland, Dirk Eibach, linux-aspeed, Linux Doc Mailing List,
Clemens Ladisch, Kamil Debski, Marc Hulsman, devicetree,
Huang Rui, Paul Mackerras, Jim Cromie, Lorenzo Pieralisi,
Jonathan Corbet, Joel Stanley, Steve Glendinning, Fenghua Yu,
Jean Delvare, Bartlomiej Zolnierkiewicz, Liviu Dudau,
Hans de Goede, Rob Herring, Rudolf Marek, linux-arm-kernel,
linux-hwmon, Support Opensource, George Joseph, Andreas Werner,
Andrew Jeffery, patches, linux-kernel, Juerg Haefliger,
Sudeep Holla, linuxppc-dev
In-Reply-To: <20190417174728.GA17706@roeck-us.net>
Em Wed, 17 Apr 2019 10:47:28 -0700
Guenter Roeck <linux@roeck-us.net> escreveu:
> On Wed, Apr 17, 2019 at 10:43:37AM -0700, Guenter Roeck wrote:
> > On Wed, Apr 17, 2019 at 02:22:15PM -0300, Mauro Carvalho Chehab wrote:
> > > Em Wed, 17 Apr 2019 14:13:52 -0300
> > > Mauro Carvalho Chehab <mchehab+samsung@kernel.org> escreveu:
> > >
> > > > Em Wed, 17 Apr 2019 09:47:41 -0700
> > > > Guenter Roeck <linux@roeck-us.net> escreveu:
> > > >
> > > > > On Wed, Apr 17, 2019 at 06:46:29AM -0300, Mauro Carvalho Chehab wrote:
> > > > > > Now that all files were converted to ReST format, rename them
> > > > > > and add an index.
> > > > > >
> > > > > > Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
> > > > > > Acked-by: Liviu Dudau <liviu.dudau@arm.com>
> > > > >
> > > > > I applied all patches except this one, which fails due to a conflict in
> > > > > ab8500. I also notice that this file has not been touched by your series,
> > > > > which is odd. At the same time, patch 20/21 is missing from your series,
> > > > > and has been missing all along. Does the missing patch possibly touch
> > > > > Documentation/hwmon/ab8500 ?
> > > >
> > > > Patch 20/21 is the biggest one. Maybe vger rejected it either due to
> > > > its size or due to the number of c/c.
> > > >
> > > > Just bounced it to you. Please let me know if you didn't receive it
> > > > yet.
> > >
> > > Btw, LKML got it:
> > >
> > > https://lore.kernel.org/lkml/cccc2a52363a5aaeea10e186ead8570503ea648e.1555494108.git.mchehab+samsung@kernel.org/
> > >
> > patchwork didn't get it (or didn't accept it). I got it now.
> > All patches applied, and pushed out to hwmon-next.
> >
> > We have one (new) unconverted file left - Documentation/hwmon/lochnagar.
>
> Plus ir38064 and isl68137. Lots of new drivers recently.
Ok, just sent a patch for those three new files. I wrote a more
detailed description about what steps I followed at the conversion
of those tree files, and why I did it.
Hopefully, this would help hwmon developers
that may already be preparing a new driver for submission.
Thanks,
Mauro
^ permalink raw reply
* Re: [PATCH V3 1/2] ASoC: fsl_asrc: replace the process_option table with function
From: S.j. Wang @ 2019-04-18 9:37 UTC (permalink / raw)
To: Nicolin Chen
Cc: alsa-devel@alsa-project.org, timur@kernel.org,
Xiubo.Lee@gmail.com, festevam@gmail.com,
linux-kernel@vger.kernel.org, broonie@kernel.org,
linuxppc-dev@lists.ozlabs.org
Hi
>
> On Thu, Apr 18, 2019 at 08:50:48AM +0000, S.j. Wang wrote:
> > > And this is according to IMX6DQRM:
> > > Limited support for the case when output sampling rates is
> > > between 8kHz and 30kHz. The limitation is the supported ratio
> > > (Fsin/Fsout) range as between 1/24 to 8
> > >
> > > This should cover your 8.125 condition already, even if having an
> > > outrate range between [8KHz, 30KHz] check, since an outrate above
> > > 30KHz will not have an inrate bigger than 8.125 times of it, given
> > > the maximum input rate is 192KHz.
> > >
> > > So I think that we can just drop that 8.125 condition from your
> > > change and there's no need to error out any more.
> > >
> > No, if outrate=8kHz, inrate > 88.2kHz, these cases are not supported.
> > This is not covered by
> >
> > if ((outrate > 8000 && outrate < 30000) &&
> > (outrate/inrate > 24 || inrate/outrate > 8)) {
>
> Good catch. The range should be [8KHz, 30KHz] vs. (8KHz, 32KHz) in the
> code. Then I think the fix should be at both lines:
>
> - if ((outrate > 8000 && outrate < 30000) &&
> - (outrate/inrate > 24 || inrate/outrate > 8)) {
> + if ((outrate >= 8000 && outrate =< 30000) &&
> + (outrate > 24 * inrate || inrate > 8 * outrate)) {
>
> Overall, I think we should fix this instead of adding an extra one, since it is
> very likely saying the same thing.
Actually if outrate < 8kHz, there will be issue too.
Best regards
Wang shengjiu
^ permalink raw reply
* Re: [PATCH] ASoC: fsl_esai: Add pm runtime function
From: Mark Brown @ 2019-04-18 9:06 UTC (permalink / raw)
To: Nicolin Chen
Cc: alsa-devel@alsa-project.org, timur@kernel.org,
Xiubo.Lee@gmail.com, festevam@gmail.com, S.j. Wang,
linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <20190418090011.GA4028@Asurada>
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On Thu, Apr 18, 2019 at 02:00:12AM -0700, Nicolin Chen wrote:
> On Thu, Apr 18, 2019 at 03:29:09AM +0000, S.j. Wang wrote:
> > In imx8 when systerm enter suspend state, the power of subsystem will
> > be off, the clock enable state will be lost and register configuration
> Just for curiosity, we had similar situation on imx6sx, so we
> added suspend/resume with regcache. Why will the clock enable
> state be lost too? Does CCM on imx8 (might not be called CCM
> though) have any difference? What about clock rate settings?
That sounds like a bug somewhere else - I'd expect that after resume the
clocking would be restored to the state it was in before suspend.
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^ permalink raw reply
* Re: [PATCH V3 1/2] ASoC: fsl_asrc: replace the process_option table with function
From: Nicolin Chen @ 2019-04-18 9:05 UTC (permalink / raw)
To: S.j. Wang
Cc: alsa-devel@alsa-project.org, timur@kernel.org,
Xiubo.Lee@gmail.com, festevam@gmail.com,
linux-kernel@vger.kernel.org, broonie@kernel.org,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <VE1PR04MB647965FEAF3506E1775397AEE3260@VE1PR04MB6479.eurprd04.prod.outlook.com>
On Thu, Apr 18, 2019 at 08:50:48AM +0000, S.j. Wang wrote:
> > And this is according to IMX6DQRM:
> > Limited support for the case when output sampling rates is
> > between 8kHz and 30kHz. The limitation is the supported ratio
> > (Fsin/Fsout) range as between 1/24 to 8
> >
> > This should cover your 8.125 condition already, even if having an outrate
> > range between [8KHz, 30KHz] check, since an outrate above 30KHz will not
> > have an inrate bigger than 8.125 times of it, given the maximum input rate
> > is 192KHz.
> >
> > So I think that we can just drop that 8.125 condition from your change and
> > there's no need to error out any more.
> >
> No, if outrate=8kHz, inrate > 88.2kHz, these cases are not supported.
> This is not covered by
>
> if ((outrate > 8000 && outrate < 30000) &&
> (outrate/inrate > 24 || inrate/outrate > 8)) {
Good catch. The range should be [8KHz, 30KHz] vs. (8KHz, 32KHz)
in the code. Then I think the fix should be at both lines:
- if ((outrate > 8000 && outrate < 30000) &&
- (outrate/inrate > 24 || inrate/outrate > 8)) {
+ if ((outrate >= 8000 && outrate =< 30000) &&
+ (outrate > 24 * inrate || inrate > 8 * outrate)) {
Overall, I think we should fix this instead of adding an extra
one, since it is very likely saying the same thing.
^ permalink raw reply
* Re: [PATCH RFT V2 1/8] clk: divider: add explicit big endian support
From: Jonas Gorski @ 2019-04-18 9:00 UTC (permalink / raw)
To: Stephen Boyd
Cc: Thierry Reding, Peter De Schrijver, Fabio Estevam, Sascha Hauer,
Heiko Stuebner, Michael Turquette, Michal Simek, Jonathan Hunter,
linux-rockchip, Prashant Gaikwad, Paul Mackerras, NXP Linux Team,
Pengutronix Kernel Team, linux-tegra, Shawn Guo,
Anatolij Gustschin, linuxppc-dev, linux-clk,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <155554397723.15276.10863024281240089015@swboyd.mtv.corp.google.com>
On Thu, 18 Apr 2019 at 01:32, Stephen Boyd <sboyd@kernel.org> wrote:
>
> Quoting Jonas Gorski (2019-04-15 03:10:39)
> > @@ -370,7 +388,7 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
> > if (divider->flags & CLK_DIVIDER_READ_ONLY) {
> > u32 val;
> >
> > - val = clk_readl(divider->reg) >> divider->shift;
> > + val = clk_div_readl(divider->reg) >> divider->shift;
>
> Good deal that kbuild running sparse found that this was supposed to be
> divider and not divider->reg. If you can fix that and remove the else in
> all the basic type readl wrappers then this series looks good to merge
> for me.
Yeah, I'm quite glad about that. I was first confused why I didn't
catch it in my test build, but then remembered only C++ complains
about implicit void* casts (IIRC). I have it already fixed locally and
did a sparse build myself, was just waiting for at least one non-bot
comment before resending the series.
Regards
Jonas
^ permalink raw reply
* Re: [PATCH] ASoC: fsl_esai: Add pm runtime function
From: Nicolin Chen @ 2019-04-18 9:00 UTC (permalink / raw)
To: S.j. Wang
Cc: alsa-devel@alsa-project.org, timur@kernel.org,
Xiubo.Lee@gmail.com, festevam@gmail.com,
linux-kernel@vger.kernel.org, broonie@kernel.org,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <1555558152-32196-1-git-send-email-shengjiu.wang@nxp.com>
On Thu, Apr 18, 2019 at 03:29:09AM +0000, S.j. Wang wrote:
> In imx8 when systerm enter suspend state, the power of subsystem will
> be off, the clock enable state will be lost and register configuration
Just for curiosity, we had similar situation on imx6sx, so we
added suspend/resume with regcache. Why will the clock enable
state be lost too? Does CCM on imx8 (might not be called CCM
though) have any difference? What about clock rate settings?
> will be lost. So the driver need to enter runtime suspend state in
> suspend.
> With this implementation the suspend function almost same as runtime
> suspend function, so remove the suspend function, just use
> pm_runtime_force_suspend instead, and same for the resume function.
>
> And also need to move clock enablement to runtime resume and clock
> disablement to runtime suspend.
> -static int fsl_esai_suspend(struct device *dev)
> - regcache_cache_only(esai->regmap, true);
> - regcache_mark_dirty(esai->regmap);
> +static int fsl_esai_runtime_resume(struct device *dev)
> regcache_cache_only(esai->regmap, false);
> + regcache_mark_dirty(esai->regmap);
Why move the regcache_mark_dirty from suspend to resume?
(I am not saying it's wrong but wondering if this is the
preferable way.)
^ permalink raw reply
* Re: [PATCH V3 1/2] ASoC: fsl_asrc: replace the process_option table with function
From: S.j. Wang @ 2019-04-18 8:50 UTC (permalink / raw)
To: Nicolin Chen
Cc: alsa-devel@alsa-project.org, timur@kernel.org,
Xiubo.Lee@gmail.com, festevam@gmail.com,
linux-kernel@vger.kernel.org, broonie@kernel.org,
linuxppc-dev@lists.ozlabs.org
Hi
>
>
> On Thu, Apr 18, 2019 at 02:37:03AM +0000, S.j. Wang wrote:
> > > Here:
> > > > + /* Does not support cases: Tsout > 8.125 * Tsin */
> > > > + if (inrate * 8 > 65 * outrate)
>
> Though it might not matter any more (see my last comments), it should be
> "inrate > 8.125 * outrate" in the comments.
>
> > > > + return -EINVAL;
> > > And here:
> > > > + ret = fsl_asrc_sel_proc(inrate, outrate, &pre_proc, &post_proc);
> > > > + if (ret) {
> > > > + pair_err("No supported pre-processing options\n");
> > > > + return ret;
> > > > + }
> > >
> > > Instead of a general message, I was thinking of a more specific one
> > > by telling users that the ratio between the two rates isn't
> > > supported -- something similar to what I suggested previously:
> > >
> > > pair_err("Does not support %d (input) > 8.125 * %d (output)\n",
> > > outrate, inrate);
> > >
>
> > In fsl_asrc_sel_proc, we can't call the pair_err for there is no
> > struct fsl_asrc_pair *pair in the argument. Do you think we need to
> > add this argument?
>
> I's thinking of adding it to the top of fsl_asrc_config_pair() as a part of
> inrate-outrate-validation, however, I found that actually we already have a
> similar check in the early routine:
> if ((outrate > 8000 && outrate < 30000) &&
> (outrate/inrate > 24 || inrate/outrate > 8)) {
> pair_err("exceed supported ratio range [1/24, 8] for \
> inrate/outrate: %d/%d\n", inrate, outrate);
> return -EINVAL;
> }
>
> And this is according to IMX6DQRM:
> Limited support for the case when output sampling rates is
> between 8kHz and 30kHz. The limitation is the supported ratio
> (Fsin/Fsout) range as between 1/24 to 8
>
> This should cover your 8.125 condition already, even if having an outrate
> range between [8KHz, 30KHz] check, since an outrate above 30KHz will not
> have an inrate bigger than 8.125 times of it, given the maximum input rate
> is 192KHz.
>
> So I think that we can just drop that 8.125 condition from your change and
> there's no need to error out any more.
>
No, if outrate=8kHz, inrate > 88.2kHz, these cases are not supported.
This is not covered by
if ((outrate > 8000 && outrate < 30000) &&
(outrate/inrate > 24 || inrate/outrate > 8)) {
> However, we do need a patch to fix a potential rounding issue:
> - (outrate/inrate > 24 || inrate/outrate > 8)) {
> + (outrate > 24 * inrate || inrate > 8 * outrate)) {
>
> Should fix the missing whitespace also. And it will be needed to send to
> stable kernel too. Will you help submit a change?
>
> Thanks
^ permalink raw reply
* Re: [PATCH V3 1/2] ASoC: fsl_asrc: replace the process_option table with function
From: Nicolin Chen @ 2019-04-18 8:03 UTC (permalink / raw)
To: S.j. Wang
Cc: alsa-devel@alsa-project.org, timur@kernel.org,
Xiubo.Lee@gmail.com, festevam@gmail.com,
linux-kernel@vger.kernel.org, broonie@kernel.org,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <AM6PR04MB647093DB49BB13E09B0F181DE3260@AM6PR04MB6470.eurprd04.prod.outlook.com>
On Thu, Apr 18, 2019 at 02:37:03AM +0000, S.j. Wang wrote:
> > Here:
> > > + /* Does not support cases: Tsout > 8.125 * Tsin */
> > > + if (inrate * 8 > 65 * outrate)
Though it might not matter any more (see my last comments),
it should be "inrate > 8.125 * outrate" in the comments.
> > > + return -EINVAL;
> > And here:
> > > + ret = fsl_asrc_sel_proc(inrate, outrate, &pre_proc, &post_proc);
> > > + if (ret) {
> > > + pair_err("No supported pre-processing options\n");
> > > + return ret;
> > > + }
> >
> > Instead of a general message, I was thinking of a more specific one by
> > telling users that the ratio between the two rates isn't supported --
> > something similar to what I suggested previously:
> >
> > pair_err("Does not support %d (input) > 8.125 * %d (output)\n",
> > outrate, inrate);
> >
> In fsl_asrc_sel_proc, we can't call the pair_err for there is no
> struct fsl_asrc_pair *pair in the argument. Do you think we need to
> add this argument?
I's thinking of adding it to the top of fsl_asrc_config_pair()
as a part of inrate-outrate-validation, however, I found that
actually we already have a similar check in the early routine:
if ((outrate > 8000 && outrate < 30000) &&
(outrate/inrate > 24 || inrate/outrate > 8)) {
pair_err("exceed supported ratio range [1/24, 8] for \
inrate/outrate: %d/%d\n", inrate, outrate);
return -EINVAL;
}
And this is according to IMX6DQRM:
Limited support for the case when output sampling rates is
between 8kHz and 30kHz. The limitation is the supported ratio
(Fsin/Fsout) range as between 1/24 to 8
This should cover your 8.125 condition already, even if having
an outrate range between [8KHz, 30KHz] check, since an outrate
above 30KHz will not have an inrate bigger than 8.125 times of
it, given the maximum input rate is 192KHz.
So I think that we can just drop that 8.125 condition from your
change and there's no need to error out any more.
However, we do need a patch to fix a potential rounding issue:
- (outrate/inrate > 24 || inrate/outrate > 8)) {
+ (outrate > 24 * inrate || inrate > 8 * outrate)) {
Should fix the missing whitespace also. And it will be needed
to send to stable kernel too. Will you help submit a change?
Thanks
^ permalink raw reply
* Re: Linux 5.1-rc5
From: Martin Schwidefsky @ 2019-04-18 8:02 UTC (permalink / raw)
To: Linus Torvalds
Cc: Christoph Hellwig, linuxppc-dev, Linux List Kernel Mailing,
linux-s390
In-Reply-To: <CAHk-=wj5j-zMo7hVNxiw3+5L2d1WQVm3x4fbpg=OXLzDh8FhYg@mail.gmail.com>
On Wed, 17 Apr 2019 09:57:01 -0700
Linus Torvalds <torvalds@linux-foundation.org> wrote:
> On Wed, Apr 17, 2019 at 1:02 AM Martin Schwidefsky
> <schwidefsky@de.ibm.com> wrote:
> >
> > Grumpf, that does *not* work. For gup the table entries may be read only
> > once. Now I remember why I open-coded p4d_offset, pud_offset and pmd_offset
> > in arch/s390/mm/gup.c, to avoid to read the table entries twice.
> > It will be hard to use the common gup code after all.
>
> Hmm. The common gup code generally should do the "read only once"
> thing too (since by definition the gup-fast case is done without
> locking), although it's probably the case that most architectures
> simply don't care.
>
> What would it require for the generic code to work for s390?
The problematic lines in the generic gup code are these three:
1845: pmdp = pmd_offset(&pud, addr);
1888: pudp = pud_offset(&p4d, addr);
1916: p4dp = p4d_offset(&pgd, addr);
Passing the pointer of a *copy* of a page table entry to pxd_offset() does
not work with the page table folding on s390. The pxd_offset() function
on s390 have to make a choice, either return the dereferenced value behind
the passed pointer (that works) or return the original page table pointer
if the table level is folded (that does not work).
To fix this we would need three new helpers pmd_offset_orig, pud_offset_orig
and p4d_offset_orig, their generic definition would look like this:
#define p4d_offset_orig(pgdp, pgd, address) p4d_offset(&pgd, address)
#define pud_offset_orig(p4dp, p4d, address) pud_offset(&p4d, address)
#define pmd_offset_orig(pudp, pud, address) pmd_offset(&pud, address)
For the s390 definition see the following branch:
git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux.git generic-gup
A quick test with this branch shows everything working normally.
Keeping my fingers crossed that I did not miss anything.
--
blue skies,
Martin.
"Reality continues to ruin my life." - Calvin.
^ permalink raw reply
* Re: [PATCH v2 10/10] powerpc/32s: Implement Kernel Userspace Access Protection
From: Michael Ellerman @ 2019-04-18 6:55 UTC (permalink / raw)
To: Christophe Leroy, Benjamin Herrenschmidt, Paul Mackerras, ruscur
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <a2847248a92cb1641b1740fa121c5a30593ae662.1552292207.git.christophe.leroy@c-s.fr>
Christophe Leroy <christophe.leroy@c-s.fr> writes:
> diff --git a/arch/powerpc/include/asm/book3s/32/kup.h b/arch/powerpc/include/asm/book3s/32/kup.h
> index 5f97c742ca71..b3560b2de435 100644
> --- a/arch/powerpc/include/asm/book3s/32/kup.h
> +++ b/arch/powerpc/include/asm/book3s/32/kup.h
> @@ -37,6 +37,113 @@
...
> +
> +static inline void allow_user_access(void __user *to, const void __user *from, u32 size)
> +{
> + u32 addr = (__force u32)to;
> + u32 end = min(addr + size, TASK_SIZE);
> +
> + if (!addr || addr >= TASK_SIZE || !size)
> + return;
> +
> + current->thread.kuap = (addr & 0xf0000000) | ((((end - 1) >> 28) + 1) & 0xf);
> + kuap_update_sr(mfsrin(addr) & ~SR_KS, addr, end); /* Clear Ks */
> +}
When rebasing on my v6 I changed the above to:
static inline void allow_user_access(void __user *to, const void __user *from, u32 size)
{
u32 addr, end;
if (__builtin_constant_p(to) && to == NULL)
return;
addr = (__force u32)to;
if (!addr || addr >= TASK_SIZE || !size)
return;
end = min(addr + size, TASK_SIZE);
current->thread.kuap = (addr & 0xf0000000) | ((((end - 1) >> 28) + 1) & 0xf);
kuap_update_sr(mfsrin(addr) & ~SR_KS, addr, end); /* Clear Ks */
}
Which I think achieves the same result. It does boot :)
> +
> +static inline void prevent_user_access(void __user *to, const void __user *from, u32 size)
> +{
> + u32 addr = (__force u32)to;
> + u32 end = min(addr + size, TASK_SIZE);
> +
> + if (!addr || addr >= TASK_SIZE || !size)
> + return;
> +
> + current->thread.kuap = 0;
> + kuap_update_sr(mfsrin(addr) | SR_KS, addr, end); /* set Ks */
> +}
> +
> +static inline void allow_read_from_user(const void __user *from, unsigned long size)
> +{
> +}
And I dropped that.
cheers
^ permalink raw reply
* Re: [PATCH v2 07/10] powerpc/8xx: Add Kernel Userspace Access Protection
From: Michael Ellerman @ 2019-04-18 6:53 UTC (permalink / raw)
To: Christophe Leroy, Benjamin Herrenschmidt, Paul Mackerras, ruscur
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <bac688f0f7f60d6862d839982c9cccbeda6fec3c.1552292207.git.christophe.leroy@c-s.fr>
Christophe Leroy <christophe.leroy@c-s.fr> writes:
> diff --git a/arch/powerpc/include/asm/nohash/32/kup-8xx.h b/arch/powerpc/include/asm/nohash/32/kup-8xx.h
> new file mode 100644
> index 000000000000..a44cc6c1b901
> --- /dev/null
> +++ b/arch/powerpc/include/asm/nohash/32/kup-8xx.h
> @@ -0,0 +1,68 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef _ASM_POWERPC_KUP_8XX_H_
> +#define _ASM_POWERPC_KUP_8XX_H_
> +
> +#include <asm/bug.h>
> +
> +#ifdef CONFIG_PPC_KUAP
> +
> +#ifdef __ASSEMBLY__
> +
> +.macro kuap_save_and_lock sp, thread, gpr1, gpr2, gpr3
> + lis \gpr2, MD_APG_KUAP@h /* only APG0 and APG1 are used */
> + mfspr \gpr1, SPRN_MD_AP
> + mtspr SPRN_MD_AP, \gpr2
> + stw \gpr1, STACK_REGS_KUAP(\sp)
> +.endm
> +
> +.macro kuap_restore sp, current, gpr1, gpr2, gpr3
> + lwz \gpr1, STACK_REGS_KUAP(\sp)
> + mtspr SPRN_MD_AP, \gpr1
> +.endm
> +
> +.macro kuap_check current, gpr
> +#ifdef CONFIG_PPC_KUAP_DEBUG
> + mfspr \gpr, SPRN_MD_AP
> + rlwinm \gpr, \gpr, 16, 0xffff
> +999: twnei \gpr, MD_APG_KUAP@h
> + EMIT_BUG_ENTRY 999b, __FILE__, __LINE__, (BUGFLAG_WARNING | BUGFLAG_ONCE)
> +#endif
> +.endm
> +
> +#else /* !__ASSEMBLY__ */
> +
> +#include <asm/reg.h>
> +
> +static inline void allow_user_access(void __user *to, const void __user *from,
> + unsigned long size)
> +{
> + mtspr(SPRN_MD_AP, MD_APG_INIT);
> +}
> +
> +static inline void prevent_user_access(void __user *to, const void __user *from,
> + unsigned long size)
> +{
> + mtspr(SPRN_MD_AP, MD_APG_KUAP);
> +}
> +
> +static inline void allow_read_from_user(const void __user *from, unsigned long size)
> +{
> + allow_user_access(NULL, from, size);
> +}
> +
> +static inline void allow_write_to_user(void __user *to, unsigned long size)
> +{
> + allow_user_access(to, NULL, size);
> +}
I dropped the two above functions when rebasing on my v6.
cheers
^ permalink raw reply
* [PATCH v6 10/10] powerpc/mm: Detect bad KUAP faults
From: Michael Ellerman @ 2019-04-18 6:51 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20190418065125.2687-1-mpe@ellerman.id.au>
When KUAP is enabled we have logic to detect page faults that occur
outside of a valid user access region and are blocked by the AMR.
What we don't have at the moment is logic to detect a fault *within* a
valid user access region, that has been incorrectly blocked by AMR.
This is not meant to ever happen, but it can if we incorrectly
save/restore the AMR, or if the AMR was overwritten for some other
reason.
Currently if that happens we assume it's just a regular fault that
will be corrected by handling the fault normally, so we just return.
But there is nothing the fault handling code can do to fix it, so the
fault just happens again and we spin forever, leading to soft lockups.
So add some logic to detect that case and WARN() if we ever see it.
Arguably it should be a BUG(), but it's more polite to fail the access
and let the kernel continue, rather than taking down the box. There
should be no data integrity issue with failing the fault rather than
BUG'ing, as we're just going to disallow an access that should have
been allowed.
To make the code a little easier to follow, unroll the condition at
the end of bad_kernel_fault() and comment each case, before adding the
call to bad_kuap_fault().
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
v6: Simplify bad_kuap_fault() as suggested by Christophe.
---
.../powerpc/include/asm/book3s/64/kup-radix.h | 6 +++++
arch/powerpc/include/asm/kup.h | 1 +
arch/powerpc/mm/fault.c | 25 ++++++++++++++++---
3 files changed, 29 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/kup-radix.h b/arch/powerpc/include/asm/book3s/64/kup-radix.h
index 6d6628424134..7679bd0c5af0 100644
--- a/arch/powerpc/include/asm/book3s/64/kup-radix.h
+++ b/arch/powerpc/include/asm/book3s/64/kup-radix.h
@@ -95,6 +95,12 @@ static inline void prevent_user_access(void __user *to, const void __user *from,
set_kuap(AMR_KUAP_BLOCKED);
}
+static inline bool bad_kuap_fault(struct pt_regs *regs, bool is_write)
+{
+ return WARN(mmu_has_feature(MMU_FTR_RADIX_KUAP) &&
+ (regs->kuap & (is_write ? AMR_KUAP_BLOCK_WRITE : AMR_KUAP_BLOCK_READ)),
+ "Bug: %s fault blocked by AMR!", is_write ? "Write" : "Read");
+}
#endif /* CONFIG_PPC_KUAP */
#endif /* __ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/kup.h b/arch/powerpc/include/asm/kup.h
index d7312defbe1c..28ad4654eed2 100644
--- a/arch/powerpc/include/asm/kup.h
+++ b/arch/powerpc/include/asm/kup.h
@@ -26,6 +26,7 @@ static inline void allow_user_access(void __user *to, const void __user *from,
unsigned long size) { }
static inline void prevent_user_access(void __user *to, const void __user *from,
unsigned long size) { }
+static inline bool bad_kuap_fault(struct pt_regs *regs, bool is_write) { return false; }
#endif /* CONFIG_PPC_KUAP */
static inline void allow_read_from_user(const void __user *from, unsigned long size)
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 463d1e9d026e..b5d3578d9f65 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -44,6 +44,7 @@
#include <asm/mmu_context.h>
#include <asm/siginfo.h>
#include <asm/debug.h>
+#include <asm/kup.h>
static inline bool notify_page_fault(struct pt_regs *regs)
{
@@ -224,7 +225,7 @@ static int mm_fault_error(struct pt_regs *regs, unsigned long addr,
/* Is this a bad kernel fault ? */
static bool bad_kernel_fault(struct pt_regs *regs, unsigned long error_code,
- unsigned long address)
+ unsigned long address, bool is_write)
{
int is_exec = TRAP(regs) == 0x400;
@@ -235,6 +236,9 @@ static bool bad_kernel_fault(struct pt_regs *regs, unsigned long error_code,
address >= TASK_SIZE ? "exec-protected" : "user",
address,
from_kuid(&init_user_ns, current_uid()));
+
+ // Kernel exec fault is always bad
+ return true;
}
if (!is_exec && address < TASK_SIZE && (error_code & DSISR_PROTFAULT) &&
@@ -244,7 +248,22 @@ static bool bad_kernel_fault(struct pt_regs *regs, unsigned long error_code,
from_kuid(&init_user_ns, current_uid()));
}
- return is_exec || (address >= TASK_SIZE) || !search_exception_tables(regs->nip);
+ // Kernel fault on kernel address is bad
+ if (address >= TASK_SIZE)
+ return true;
+
+ // Fault on user outside of certain regions (eg. copy_tofrom_user()) is bad
+ if (!search_exception_tables(regs->nip))
+ return true;
+
+ // Read/write fault in a valid region (the exception table search passed
+ // above), but blocked by KUAP is bad, it can never succeed.
+ if (bad_kuap_fault(regs, is_write))
+ return true;
+
+ // What's left? Kernel fault on user in well defined regions (extable
+ // matched), and allowed by KUAP in the faulting context.
+ return false;
}
static bool bad_stack_expansion(struct pt_regs *regs, unsigned long address,
@@ -467,7 +486,7 @@ static int __do_page_fault(struct pt_regs *regs, unsigned long address,
* take a page fault to a kernel address or a page fault to a user
* address outside of dedicated places
*/
- if (unlikely(!is_user && bad_kernel_fault(regs, error_code, address)))
+ if (unlikely(!is_user && bad_kernel_fault(regs, error_code, address, is_write)))
return SIGSEGV;
/*
--
2.20.1
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