* Re: [GIT PULL] Please pull powerpc/linux.git powerpc-5.3-2 tag
From: pr-tracker-bot @ 2019-07-24 17:10 UTC (permalink / raw)
To: Michael Ellerman
Cc: aarcange, ego, mikey, shawn, Linus Torvalds, linux-kernel, clg,
sjitindarsingh, vaibhav, linuxppc-dev
In-Reply-To: <87o91j5z20.fsf@concordia.ellerman.id.au>
The pull request you sent on Wed, 24 Jul 2019 23:42:31 +1000:
> https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git tags/powerpc-5.3-2
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/bed38c3e2dca01b358a62b5e73b46e875742fd75
Thank you!
--
Deet-doot-dot, I am a bot.
https://korg.wiki.kernel.org/userdoc/prtracker
^ permalink raw reply
* Re: [PATCH 01/10] ASoC: fsl_sai: add of_match data
From: Nicolin Chen @ 2019-07-24 22:34 UTC (permalink / raw)
To: Daniel Baluta
Cc: alsa-devel, viorel.suman, timur, Xiubo.Lee, linuxppc-dev,
shengjiu.wang, angus, tiwai, perex, broonie, linux-imx, kernel,
festevam, linux-kernel, l.stach
In-Reply-To: <20190722124833.28757-2-daniel.baluta@nxp.com>
On Mon, Jul 22, 2019 at 03:48:24PM +0300, Daniel Baluta wrote:
> From: Lucas Stach <l.stach@pengutronix.de>
>
> New revisions of the SAI IP block have even more differences that need
> be taken into account by the driver. To avoid sprinking compatible
> checks all over the driver move the current differences into of_match_data.
>
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Looks like Mark has applied this already? If so, should probably
drop applied ones and rebase the remaining patches for a resend.
^ permalink raw reply
* Re: [PATCH 06/10] ASoC: dt-bindings: Document dl_mask property
From: Nicolin Chen @ 2019-07-24 23:13 UTC (permalink / raw)
To: Daniel Baluta
Cc: alsa-devel, viorel.suman, timur, Xiubo.Lee, linuxppc-dev,
shengjiu.wang, angus, tiwai, perex, broonie, linux-imx, kernel,
festevam, linux-kernel, l.stach
In-Reply-To: <20190722124833.28757-7-daniel.baluta@nxp.com>
On Mon, Jul 22, 2019 at 03:48:29PM +0300, Daniel Baluta wrote:
> SAI supports up to 8 data lines. This property let the user
> configure how many data lines should be used per transfer
> direction (Tx/Rx).
>
> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
> ---
> Documentation/devicetree/bindings/sound/fsl-sai.txt | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> index 2e726b983845..59f4d965a5fb 100644
> --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
> +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> @@ -49,6 +49,11 @@ Optional properties:
> + - fsl,dl_mask : list of two integers (bitmask, first for RX, second
Not quite in favor of the naming here; And this patch should
be sent to the devicetree maillist and add DT maintainers --
they would give some good naming advice.
From my point of view, I feel, since data lines are enabled
consecutively, probably it'd be clear just to have something
like "fsl,num-datalines = <2 2>", corresponding to "dl_mask
= <0x3 0x3>". I believe there're examples in the existing DT
bindings, so let's see how others suggest.
> + for TX) representing enabled datalines. Bit 0
> + represents first data line, bit 1 represents second
> + data line and so on. Data line is enabled if
> + corresponding bit is set to 1.
Would be better to mention: "as a default use case, if this
property is absent, only the first data line will be enabled
for both TX and RX", since it's an optional property.
And one more extension(?) of it could be what if there's no
data line being physically connected for one direction, for
example "dl_mask = <0x0 0x1>", indicating that SAI enables
one single TX line only, so driver would disable RX feature.
What do you think?
^ permalink raw reply
* Re: [PATCH 08/10] ASoC: dt-bindings: Document fcomb_mode property
From: Nicolin Chen @ 2019-07-24 23:22 UTC (permalink / raw)
To: Daniel Baluta
Cc: alsa-devel, viorel.suman, timur, Xiubo.Lee, linuxppc-dev,
shengjiu.wang, angus, tiwai, perex, broonie, linux-imx, kernel,
festevam, linux-kernel, l.stach
In-Reply-To: <20190722124833.28757-9-daniel.baluta@nxp.com>
On Mon, Jul 22, 2019 at 03:48:31PM +0300, Daniel Baluta wrote:
> This allows combining multiple-data-line FIFOs into a
> single-data-line FIFO.
>
> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
> ---
> Documentation/devicetree/bindings/sound/fsl-sai.txt | 4 ++++
This should be sent to devicetree mail-list also.
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> index 59f4d965a5fb..ca27afd840ba 100644
> --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
> +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> @@ -54,6 +54,10 @@ Optional properties:
> represents first data line, bit 1 represents second
> data line and so on. Data line is enabled if
> corresponding bit is set to 1.
> + - fsl,fcomb_mode : list of two integers (first for RX, second for TX)
> + representing FIFO combine mode. Possible values for
> + combined mode are: 0 - disabled, 1 - Rx/Tx from shift
> + registers, 2 - Rx/Tx by software, 3 - both.
Looks like a software configuration to me, instead of a device
property. Is this configurable by user case, or hard-coded by
SoC/hardware design?
^ permalink raw reply
* Re: [PATCH 09/10] ASoC: fsl_sai: Add support for SAI new version
From: Nicolin Chen @ 2019-07-24 23:32 UTC (permalink / raw)
To: Daniel Baluta
Cc: alsa-devel, viorel.suman, timur, Xiubo.Lee, linuxppc-dev,
shengjiu.wang, angus, tiwai, perex, broonie, linux-imx, kernel,
festevam, linux-kernel, l.stach
In-Reply-To: <20190722124833.28757-10-daniel.baluta@nxp.com>
On Mon, Jul 22, 2019 at 03:48:32PM +0300, Daniel Baluta wrote:
> New IP version introduces Version ID and Parameter registers
> and optionally added Timestamp feature.
>
> VERID and PARAM registers are placed at the top of registers
> address space and some registers are shifted according to
> the following table:
>
> Tx/Rx data registers and Tx/Rx FIFO registers keep their
> addresses, all other registers are shifted by 8.
Feels like Lucas's approach is neater. I saw that Register TMR
at 0x60 is exceptional during your previous discussion. So can
we apply an offset-cancellation for it exceptionally? I haven't
checked all the registers so this would look okay to me as well
if there are more than just Register TMR.
Thanks
Nicolin
> SAI Memory map is described in chapter 13.10.4.1.1 I2S Memory map
> of the Reference Manual [1].
>
> In order to make as less changes as possible we attach an offset
> to each register offset to each changed register definition. The
> offset is read from each board private data.
>
> [1]https://cache.nxp.com/secured/assets/documents/en/reference-manual/IMX8MDQLQRM.pdf?__gda__=1563728701_38bea7f0f726472cc675cb141b91bec7&fileExt=.pdf
>
> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
> ---
> sound/soc/fsl/fsl_sai.c | 240 +++++++++++++++++++++++-----------------
> sound/soc/fsl/fsl_sai.h | 41 +++----
> 2 files changed, 162 insertions(+), 119 deletions(-)
>
> diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
> index 140014901fce..f2441b84877e 100644
> --- a/sound/soc/fsl/fsl_sai.c
> +++ b/sound/soc/fsl/fsl_sai.c
> @@ -40,6 +40,7 @@ static const struct snd_pcm_hw_constraint_list fsl_sai_rate_constraints = {
> static irqreturn_t fsl_sai_isr(int irq, void *devid)
> {
> struct fsl_sai *sai = (struct fsl_sai *)devid;
> + unsigned int ofs = sai->soc_data->reg_offset;
> struct device *dev = &sai->pdev->dev;
> u32 flags, xcsr, mask;
> bool irq_none = true;
> @@ -52,7 +53,7 @@ static irqreturn_t fsl_sai_isr(int irq, void *devid)
> mask = (FSL_SAI_FLAGS >> FSL_SAI_CSR_xIE_SHIFT) << FSL_SAI_CSR_xF_SHIFT;
>
> /* Tx IRQ */
> - regmap_read(sai->regmap, FSL_SAI_TCSR, &xcsr);
> + regmap_read(sai->regmap, FSL_SAI_TCSR(ofs), &xcsr);
> flags = xcsr & mask;
>
> if (flags)
> @@ -82,11 +83,11 @@ static irqreturn_t fsl_sai_isr(int irq, void *devid)
> xcsr &= ~FSL_SAI_CSR_xF_MASK;
>
> if (flags)
> - regmap_write(sai->regmap, FSL_SAI_TCSR, flags | xcsr);
> + regmap_write(sai->regmap, FSL_SAI_TCSR(ofs), flags | xcsr);
>
> irq_rx:
> /* Rx IRQ */
> - regmap_read(sai->regmap, FSL_SAI_RCSR, &xcsr);
> + regmap_read(sai->regmap, FSL_SAI_RCSR(ofs), &xcsr);
> flags = xcsr & mask;
>
> if (flags)
> @@ -116,7 +117,7 @@ static irqreturn_t fsl_sai_isr(int irq, void *devid)
> xcsr &= ~FSL_SAI_CSR_xF_MASK;
>
> if (flags)
> - regmap_write(sai->regmap, FSL_SAI_RCSR, flags | xcsr);
> + regmap_write(sai->regmap, FSL_SAI_RCSR(ofs), flags | xcsr);
>
> out:
> if (irq_none)
> @@ -140,6 +141,7 @@ static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai,
> int clk_id, unsigned int freq, int fsl_dir)
> {
> struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
> + unsigned int ofs = sai->soc_data->reg_offset;
> bool tx = fsl_dir == FSL_FMT_TRANSMITTER;
> u32 val_cr2 = 0;
>
> @@ -160,7 +162,7 @@ static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai,
> return -EINVAL;
> }
>
> - regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx, ofs),
> FSL_SAI_CR2_MSEL_MASK, val_cr2);
>
> return 0;
> @@ -193,6 +195,7 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
> unsigned int fmt, int fsl_dir)
> {
> struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
> + unsigned int ofs = sai->soc_data->reg_offset;
> bool tx = fsl_dir == FSL_FMT_TRANSMITTER;
> u32 val_cr2 = 0, val_cr4 = 0;
>
> @@ -287,9 +290,9 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
> return -EINVAL;
> }
>
> - regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx, ofs),
> FSL_SAI_CR2_BCP | FSL_SAI_CR2_BCD_MSTR, val_cr2);
> - regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),
> FSL_SAI_CR4_MF | FSL_SAI_CR4_FSE |
> FSL_SAI_CR4_FSP | FSL_SAI_CR4_FSD_MSTR, val_cr4);
>
> @@ -316,6 +319,7 @@ static int fsl_sai_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
> static int fsl_sai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq)
> {
> struct fsl_sai *sai = snd_soc_dai_get_drvdata(dai);
> + unsigned int ofs = sai->soc_data->reg_offset;
> unsigned long clk_rate;
> u32 savediv = 0, ratio, savesub = freq;
> u32 id;
> @@ -378,17 +382,17 @@ static int fsl_sai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq)
> */
> if ((sai->synchronous[TX] && !sai->synchronous[RX]) ||
> (!tx && !sai->synchronous[RX])) {
> - regmap_update_bits(sai->regmap, FSL_SAI_RCR2,
> + regmap_update_bits(sai->regmap, FSL_SAI_RCR2(ofs),
> FSL_SAI_CR2_MSEL_MASK,
> FSL_SAI_CR2_MSEL(sai->mclk_id[tx]));
> - regmap_update_bits(sai->regmap, FSL_SAI_RCR2,
> + regmap_update_bits(sai->regmap, FSL_SAI_RCR2(ofs),
> FSL_SAI_CR2_DIV_MASK, savediv - 1);
> } else if ((sai->synchronous[RX] && !sai->synchronous[TX]) ||
> (tx && !sai->synchronous[TX])) {
> - regmap_update_bits(sai->regmap, FSL_SAI_TCR2,
> + regmap_update_bits(sai->regmap, FSL_SAI_TCR2(ofs),
> FSL_SAI_CR2_MSEL_MASK,
> FSL_SAI_CR2_MSEL(sai->mclk_id[tx]));
> - regmap_update_bits(sai->regmap, FSL_SAI_TCR2,
> + regmap_update_bits(sai->regmap, FSL_SAI_TCR2(ofs),
> FSL_SAI_CR2_DIV_MASK, savediv - 1);
> }
>
> @@ -403,6 +407,7 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
> struct snd_soc_dai *cpu_dai)
> {
> struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
> + unsigned int ofs = sai->soc_data->reg_offset;
> bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
> unsigned int channels = params_channels(params);
> u32 word_width = params_width(params);
> @@ -455,19 +460,19 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
>
> if (!sai->is_slave_mode) {
> if (!sai->synchronous[TX] && sai->synchronous[RX] && !tx) {
> - regmap_update_bits(sai->regmap, FSL_SAI_TCR4,
> + regmap_update_bits(sai->regmap, FSL_SAI_TCR4(ofs),
> FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK,
> val_cr4);
> - regmap_update_bits(sai->regmap, FSL_SAI_TCR5,
> + regmap_update_bits(sai->regmap, FSL_SAI_TCR5(ofs),
> FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK |
> FSL_SAI_CR5_FBT_MASK, val_cr5);
> regmap_write(sai->regmap, FSL_SAI_TMR,
> ~0UL - ((1 << channels) - 1));
> } else if (!sai->synchronous[RX] && sai->synchronous[TX] && tx) {
> - regmap_update_bits(sai->regmap, FSL_SAI_RCR4,
> + regmap_update_bits(sai->regmap, FSL_SAI_RCR4(ofs),
> FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK,
> val_cr4);
> - regmap_update_bits(sai->regmap, FSL_SAI_RCR5,
> + regmap_update_bits(sai->regmap, FSL_SAI_RCR5(ofs),
> FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK |
> FSL_SAI_CR5_FBT_MASK, val_cr5);
> regmap_write(sai->regmap, FSL_SAI_RMR,
> @@ -475,26 +480,26 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
> }
> }
>
> - switch (sai->soc_data->fcomb_mode[tx]) {
> + switch (sai->fcomb_mode[tx]) {
> case FSL_SAI_FCOMB_NONE:
> - regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),
> FSL_SAI_CR4_FCOMB_SOFT |
> FSL_SAI_CR4_FCOMB_SHIFT, 0);
> break;
> case FSL_SAI_FCOMB_SHIFT:
> - regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),
> FSL_SAI_CR4_FCOMB_SOFT |
> FSL_SAI_CR4_FCOMB_SHIFT,
> FSL_SAI_CR4_FCOMB_SHIFT);
> break;
> case FSL_SAI_FCOMB_SOFT:
> - regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),
> FSL_SAI_CR4_FCOMB_SOFT |
> FSL_SAI_CR4_FCOMB_SHIFT,
> FSL_SAI_CR4_FCOMB_SOFT);
> break;
> case FSL_SAI_FCOMB_BOTH:
> - regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),
> FSL_SAI_CR4_FCOMB_SOFT |
> FSL_SAI_CR4_FCOMB_SHIFT,
> FSL_SAI_CR4_FCOMB_SOFT |
> @@ -504,10 +509,10 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
> break;
> }
>
> - regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),
> FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK,
> val_cr4);
> - regmap_update_bits(sai->regmap, FSL_SAI_xCR5(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCR5(tx, ofs),
> FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK |
> FSL_SAI_CR5_FBT_MASK, val_cr5);
> regmap_write(sai->regmap, FSL_SAI_xMR(tx), ~0UL - ((1 << channels) - 1));
> @@ -535,6 +540,8 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
> struct snd_soc_dai *cpu_dai)
> {
> struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
> + unsigned int ofs = sai->soc_data->reg_offset;
> +
> bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
> u32 xcsr, count = 100;
>
> @@ -543,9 +550,9 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
> * Rx sync with Tx clocks: Clear SYNC for Tx, set it for Rx.
> * Tx sync with Rx clocks: Clear SYNC for Rx, set it for Tx.
> */
> - regmap_update_bits(sai->regmap, FSL_SAI_TCR2, FSL_SAI_CR2_SYNC,
> - sai->synchronous[TX] ? FSL_SAI_CR2_SYNC : 0);
> - regmap_update_bits(sai->regmap, FSL_SAI_RCR2, FSL_SAI_CR2_SYNC,
> + regmap_update_bits(sai->regmap, FSL_SAI_TCR2(ofs), FSL_SAI_CR2_SYNC,
> + sai->synchronous[TX] ? FSL_SAI_CR2_SYNC : 0);
> + regmap_update_bits(sai->regmap, FSL_SAI_RCR2(ofs), FSL_SAI_CR2_SYNC,
> sai->synchronous[RX] ? FSL_SAI_CR2_SYNC : 0);
>
> /*
> @@ -556,43 +563,44 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
> case SNDRV_PCM_TRIGGER_START:
> case SNDRV_PCM_TRIGGER_RESUME:
> case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
> - regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),
> FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
>
> - regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
> + regmap_update_bits(sai->regmap, FSL_SAI_RCSR(ofs),
> FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);
> - regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
> + regmap_update_bits(sai->regmap, FSL_SAI_TCSR(ofs),
> FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);
>
> - regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),
> FSL_SAI_CSR_xIE_MASK, FSL_SAI_FLAGS);
> break;
> case SNDRV_PCM_TRIGGER_STOP:
> case SNDRV_PCM_TRIGGER_SUSPEND:
> case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
> - regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),
> FSL_SAI_CSR_FRDE, 0);
> - regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),
> FSL_SAI_CSR_xIE_MASK, 0);
>
> /* Check if the opposite FRDE is also disabled */
> - regmap_read(sai->regmap, FSL_SAI_xCSR(!tx), &xcsr);
> + regmap_read(sai->regmap, FSL_SAI_xCSR(!tx, ofs), &xcsr);
> if (!(xcsr & FSL_SAI_CSR_FRDE)) {
> /* Disable both directions and reset their FIFOs */
> - regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
> + regmap_update_bits(sai->regmap, FSL_SAI_TCSR(ofs),
> FSL_SAI_CSR_TERE, 0);
> - regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
> + regmap_update_bits(sai->regmap, FSL_SAI_RCSR(ofs),
> FSL_SAI_CSR_TERE, 0);
>
> /* TERE will remain set till the end of current frame */
> do {
> udelay(10);
> - regmap_read(sai->regmap, FSL_SAI_xCSR(tx), &xcsr);
> + regmap_read(sai->regmap,
> + FSL_SAI_xCSR(tx, ofs), &xcsr);
> } while (--count && xcsr & FSL_SAI_CSR_TERE);
>
> - regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
> + regmap_update_bits(sai->regmap, FSL_SAI_TCSR(ofs),
> FSL_SAI_CSR_FR, FSL_SAI_CSR_FR);
> - regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
> + regmap_update_bits(sai->regmap, FSL_SAI_RCSR(ofs),
> FSL_SAI_CSR_FR, FSL_SAI_CSR_FR);
>
> /*
> @@ -604,13 +612,13 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
> */
> if (!sai->is_slave_mode) {
> /* Software Reset for both Tx and Rx */
> - regmap_write(sai->regmap,
> - FSL_SAI_TCSR, FSL_SAI_CSR_SR);
> - regmap_write(sai->regmap,
> - FSL_SAI_RCSR, FSL_SAI_CSR_SR);
> + regmap_write(sai->regmap, FSL_SAI_TCSR(ofs),
> + FSL_SAI_CSR_SR);
> + regmap_write(sai->regmap, FSL_SAI_RCSR(ofs),
> + FSL_SAI_CSR_SR);
> /* Clear SR bit to finish the reset */
> - regmap_write(sai->regmap, FSL_SAI_TCSR, 0);
> - regmap_write(sai->regmap, FSL_SAI_RCSR, 0);
> + regmap_write(sai->regmap, FSL_SAI_TCSR(ofs), 0);
> + regmap_write(sai->regmap, FSL_SAI_RCSR(ofs), 0);
> }
> }
> break;
> @@ -625,12 +633,13 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream,
> struct snd_soc_dai *cpu_dai)
> {
> struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
> + unsigned int ofs = sai->soc_data->reg_offset;
> bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
> int ret;
>
> - regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, ofs),
> FSL_SAI_CR3_TRCE_MASK,
> - FSL_SAI_CR3_TRCE(sai->soc_data->dl_mask[tx]);
> + FSL_SAI_CR3_TRCE(sai->dl_mask[tx]));
>
> ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
> SNDRV_PCM_HW_PARAM_RATE, &fsl_sai_rate_constraints);
> @@ -642,9 +651,10 @@ static void fsl_sai_shutdown(struct snd_pcm_substream *substream,
> struct snd_soc_dai *cpu_dai)
> {
> struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
> + unsigned int ofs = sai->soc_data->reg_offset;
> bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
>
> - regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx),
> + regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, ofs),
> FSL_SAI_CR3_TRCE_MASK, 0);
> }
>
> @@ -662,18 +672,20 @@ static const struct snd_soc_dai_ops fsl_sai_pcm_dai_ops = {
> static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai)
> {
> struct fsl_sai *sai = dev_get_drvdata(cpu_dai->dev);
> + unsigned int ofs = sai->soc_data->reg_offset;
>
> /* Software Reset for both Tx and Rx */
> - regmap_write(sai->regmap, FSL_SAI_TCSR, FSL_SAI_CSR_SR);
> - regmap_write(sai->regmap, FSL_SAI_RCSR, FSL_SAI_CSR_SR);
> + regmap_write(sai->regmap, FSL_SAI_TCSR(ofs), FSL_SAI_CSR_SR);
> + regmap_write(sai->regmap, FSL_SAI_RCSR(ofs), FSL_SAI_CSR_SR);
> /* Clear SR bit to finish the reset */
> - regmap_write(sai->regmap, FSL_SAI_TCSR, 0);
> - regmap_write(sai->regmap, FSL_SAI_RCSR, 0);
> + regmap_write(sai->regmap, FSL_SAI_TCSR(ofs), 0);
> + regmap_write(sai->regmap, FSL_SAI_RCSR(ofs), 0);
>
> - regmap_update_bits(sai->regmap, FSL_SAI_TCR1, FSL_SAI_CR1_RFW_MASK,
> + regmap_update_bits(sai->regmap, FSL_SAI_TCR1(ofs),
> + FSL_SAI_CR1_RFW_MASK,
> sai->soc_data->fifo_depth - FSL_SAI_MAXBURST_TX);
> - regmap_update_bits(sai->regmap, FSL_SAI_RCR1, FSL_SAI_CR1_RFW_MASK,
> - FSL_SAI_MAXBURST_RX - 1);
> + regmap_update_bits(sai->regmap, FSL_SAI_RCR1(ofs),
> + FSL_SAI_CR1_RFW_MASK, FSL_SAI_MAXBURST_RX - 1);
>
> snd_soc_dai_init_dma_data(cpu_dai, &sai->dma_params_tx,
> &sai->dma_params_rx);
> @@ -710,12 +722,12 @@ static const struct snd_soc_component_driver fsl_component = {
> .name = "fsl-sai",
> };
>
> -static struct reg_default fsl_sai_reg_defaults[] = {
> - {FSL_SAI_TCR1, 0},
> - {FSL_SAI_TCR2, 0},
> - {FSL_SAI_TCR3, 0},
> - {FSL_SAI_TCR4, 0},
> - {FSL_SAI_TCR5, 0},
> +static struct reg_default fsl_sai_reg_defaults_ofs0[] = {
> + {FSL_SAI_TCR1(0), 0},
> + {FSL_SAI_TCR2(0), 0},
> + {FSL_SAI_TCR3(0), 0},
> + {FSL_SAI_TCR4(0), 0},
> + {FSL_SAI_TCR5(0), 0},
> {FSL_SAI_TDR0, 0},
> {FSL_SAI_TDR1, 0},
> {FSL_SAI_TDR2, 0},
> @@ -724,24 +736,50 @@ static struct reg_default fsl_sai_reg_defaults[] = {
> {FSL_SAI_TDR5, 0},
> {FSL_SAI_TDR6, 0},
> {FSL_SAI_TDR7, 0},
> - {FSL_SAI_TMR, 0},
> - {FSL_SAI_RCR1, 0},
> - {FSL_SAI_RCR2, 0},
> - {FSL_SAI_RCR3, 0},
> - {FSL_SAI_RCR4, 0},
> - {FSL_SAI_RCR5, 0},
> - {FSL_SAI_RMR, 0},
> + {FSL_SAI_TMR, 0},
> + {FSL_SAI_RCR1(0), 0},
> + {FSL_SAI_RCR2(0), 0},
> + {FSL_SAI_RCR3(0), 0},
> + {FSL_SAI_RCR4(0), 0},
> + {FSL_SAI_RCR5(0), 0},
> + {FSL_SAI_RMR, 0},
> +};
> +
> +static struct reg_default fsl_sai_reg_defaults_ofs8[] = {
> + {FSL_SAI_TCR1(8), 0},
> + {FSL_SAI_TCR2(8), 0},
> + {FSL_SAI_TCR3(8), 0},
> + {FSL_SAI_TCR4(8), 0},
> + {FSL_SAI_TCR5(8), 0},
> + {FSL_SAI_TDR0, 0},
> + {FSL_SAI_TDR1, 0},
> + {FSL_SAI_TDR2, 0},
> + {FSL_SAI_TDR3, 0},
> + {FSL_SAI_TDR4, 0},
> + {FSL_SAI_TDR5, 0},
> + {FSL_SAI_TDR6, 0},
> + {FSL_SAI_TDR7, 0},
> + {FSL_SAI_TMR, 0},
> + {FSL_SAI_RCR1(8), 0},
> + {FSL_SAI_RCR2(8), 0},
> + {FSL_SAI_RCR3(8), 0},
> + {FSL_SAI_RCR4(8), 0},
> + {FSL_SAI_RCR5(8), 0},
> + {FSL_SAI_RMR, 0},
> };
>
> static bool fsl_sai_readable_reg(struct device *dev, unsigned int reg)
> {
> + struct fsl_sai *sai = dev_get_drvdata(dev);
> + unsigned int ofs = sai->soc_data->reg_offset;
> +
> + if (reg >= FSL_SAI_TCSR(ofs) && reg <= FSL_SAI_TCR5(ofs))
> + return true;
> +
> + if (reg >= FSL_SAI_RCSR(ofs) && reg <= FSL_SAI_RCR5(ofs))
> + return true;
> +
> switch (reg) {
> - case FSL_SAI_TCSR:
> - case FSL_SAI_TCR1:
> - case FSL_SAI_TCR2:
> - case FSL_SAI_TCR3:
> - case FSL_SAI_TCR4:
> - case FSL_SAI_TCR5:
> case FSL_SAI_TFR0:
> case FSL_SAI_TFR1:
> case FSL_SAI_TFR2:
> @@ -751,12 +789,6 @@ static bool fsl_sai_readable_reg(struct device *dev, unsigned int reg)
> case FSL_SAI_TFR6:
> case FSL_SAI_TFR7:
> case FSL_SAI_TMR:
> - case FSL_SAI_RCSR:
> - case FSL_SAI_RCR1:
> - case FSL_SAI_RCR2:
> - case FSL_SAI_RCR3:
> - case FSL_SAI_RCR4:
> - case FSL_SAI_RCR5:
> case FSL_SAI_RDR0:
> case FSL_SAI_RDR1:
> case FSL_SAI_RDR2:
> @@ -782,9 +814,13 @@ static bool fsl_sai_readable_reg(struct device *dev, unsigned int reg)
>
> static bool fsl_sai_volatile_reg(struct device *dev, unsigned int reg)
> {
> + struct fsl_sai *sai = dev_get_drvdata(dev);
> + unsigned int ofs = sai->soc_data->reg_offset;
> +
> + if (reg == FSL_SAI_TCSR(ofs) || reg == FSL_SAI_RCSR(ofs))
> + return true;
> +
> switch (reg) {
> - case FSL_SAI_TCSR:
> - case FSL_SAI_RCSR:
> case FSL_SAI_TFR0:
> case FSL_SAI_TFR1:
> case FSL_SAI_TFR2:
> @@ -817,13 +853,16 @@ static bool fsl_sai_volatile_reg(struct device *dev, unsigned int reg)
>
> static bool fsl_sai_writeable_reg(struct device *dev, unsigned int reg)
> {
> + struct fsl_sai *sai = dev_get_drvdata(dev);
> + unsigned int ofs = sai->soc_data->reg_offset;
> +
> + if (reg >= FSL_SAI_TCSR(ofs) && reg <= FSL_SAI_TCR5(ofs))
> + return true;
> +
> + if (reg >= FSL_SAI_RCSR(ofs) && reg <= FSL_SAI_RCR5(ofs))
> + return true;
> +
> switch (reg) {
> - case FSL_SAI_TCSR:
> - case FSL_SAI_TCR1:
> - case FSL_SAI_TCR2:
> - case FSL_SAI_TCR3:
> - case FSL_SAI_TCR4:
> - case FSL_SAI_TCR5:
> case FSL_SAI_TDR0:
> case FSL_SAI_TDR1:
> case FSL_SAI_TDR2:
> @@ -833,12 +872,6 @@ static bool fsl_sai_writeable_reg(struct device *dev, unsigned int reg)
> case FSL_SAI_TDR6:
> case FSL_SAI_TDR7:
> case FSL_SAI_TMR:
> - case FSL_SAI_RCSR:
> - case FSL_SAI_RCR1:
> - case FSL_SAI_RCR2:
> - case FSL_SAI_RCR3:
> - case FSL_SAI_RCR4:
> - case FSL_SAI_RCR5:
> case FSL_SAI_RMR:
> return true;
> default:
> @@ -846,14 +879,14 @@ static bool fsl_sai_writeable_reg(struct device *dev, unsigned int reg)
> }
> }
>
> -static const struct regmap_config fsl_sai_regmap_config = {
> +static struct regmap_config fsl_sai_regmap_config = {
> .reg_bits = 32,
> .reg_stride = 4,
> .val_bits = 32,
>
> .max_register = FSL_SAI_RMR,
> - .reg_defaults = fsl_sai_reg_defaults,
> - .num_reg_defaults = ARRAY_SIZE(fsl_sai_reg_defaults),
> + .reg_defaults = fsl_sai_reg_defaults_ofs0,
> + .num_reg_defaults = ARRAY_SIZE(fsl_sai_reg_defaults_ofs0),
> .readable_reg = fsl_sai_readable_reg,
> .volatile_reg = fsl_sai_volatile_reg,
> .writeable_reg = fsl_sai_writeable_reg,
> @@ -885,6 +918,12 @@ static int fsl_sai_probe(struct platform_device *pdev)
> if (IS_ERR(base))
> return PTR_ERR(base);
>
> + if (sai->soc_data->reg_offset == 8) {
> + fsl_sai_regmap_config.reg_defaults = fsl_sai_reg_defaults_ofs8;
> + fsl_sai_regmap_config.num_reg_defaults =
> + ARRAY_SIZE(fsl_sai_reg_defaults_ofs8);
> + }
> +
> sai->regmap = devm_regmap_init_mmio_clk(&pdev->dev,
> "bus", base, &fsl_sai_regmap_config);
>
> @@ -1017,11 +1056,13 @@ static int fsl_sai_remove(struct platform_device *pdev)
> static const struct fsl_sai_soc_data fsl_sai_vf610_data = {
> .use_imx_pcm = false,
> .fifo_depth = 32,
> + .reg_offset = 0,
> };
>
> static const struct fsl_sai_soc_data fsl_sai_imx6sx_data = {
> .use_imx_pcm = true,
> .fifo_depth = 32,
> + .reg_offset = 0,
> };
>
> static const struct of_device_id fsl_sai_ids[] = {
> @@ -1054,6 +1095,7 @@ static int fsl_sai_runtime_suspend(struct device *dev)
> static int fsl_sai_runtime_resume(struct device *dev)
> {
> struct fsl_sai *sai = dev_get_drvdata(dev);
> + unsigned int ofs = sai->soc_data->reg_offset;
> int ret;
>
> ret = clk_prepare_enable(sai->bus_clk);
> @@ -1075,11 +1117,11 @@ static int fsl_sai_runtime_resume(struct device *dev)
> }
>
> regcache_cache_only(sai->regmap, false);
> - regmap_write(sai->regmap, FSL_SAI_TCSR, FSL_SAI_CSR_SR);
> - regmap_write(sai->regmap, FSL_SAI_RCSR, FSL_SAI_CSR_SR);
> + regmap_write(sai->regmap, FSL_SAI_TCSR(ofs), FSL_SAI_CSR_SR);
> + regmap_write(sai->regmap, FSL_SAI_RCSR(ofs), FSL_SAI_CSR_SR);
> usleep_range(1000, 2000);
> - regmap_write(sai->regmap, FSL_SAI_TCSR, 0);
> - regmap_write(sai->regmap, FSL_SAI_RCSR, 0);
> + regmap_write(sai->regmap, FSL_SAI_TCSR(ofs), 0);
> + regmap_write(sai->regmap, FSL_SAI_RCSR(ofs), 0);
>
> ret = regcache_sync(sai->regmap);
> if (ret)
> diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
> index abf140951187..d20f16cc2a80 100644
> --- a/sound/soc/fsl/fsl_sai.h
> +++ b/sound/soc/fsl/fsl_sai.h
> @@ -14,12 +14,12 @@
> SNDRV_PCM_FMTBIT_S32_LE)
>
> /* SAI Register Map Register */
> -#define FSL_SAI_TCSR 0x00 /* SAI Transmit Control */
> -#define FSL_SAI_TCR1 0x04 /* SAI Transmit Configuration 1 */
> -#define FSL_SAI_TCR2 0x08 /* SAI Transmit Configuration 2 */
> -#define FSL_SAI_TCR3 0x0c /* SAI Transmit Configuration 3 */
> -#define FSL_SAI_TCR4 0x10 /* SAI Transmit Configuration 4 */
> -#define FSL_SAI_TCR5 0x14 /* SAI Transmit Configuration 5 */
> +#define FSL_SAI_TCSR(ofs) (0x00 + ofs) /* SAI Transmit Control */
> +#define FSL_SAI_TCR1(ofs) (0x04 + ofs) /* SAI Transmit Configuration 1 */
> +#define FSL_SAI_TCR2(ofs) (0x08 + ofs) /* SAI Transmit Configuration 2 */
> +#define FSL_SAI_TCR3(ofs) (0x0c + ofs) /* SAI Transmit Configuration 3 */
> +#define FSL_SAI_TCR4(ofs) (0x10 + ofs) /* SAI Transmit Configuration 4 */
> +#define FSL_SAI_TCR5(ofs) (0x14 + ofs) /* SAI Transmit Configuration 5 */
> #define FSL_SAI_TDR0 0x20 /* SAI Transmit Data 0 */
> #define FSL_SAI_TDR1 0x24 /* SAI Transmit Data 1 */
> #define FSL_SAI_TDR2 0x28 /* SAI Transmit Data 2 */
> @@ -37,12 +37,12 @@
> #define FSL_SAI_TFR6 0x58 /* SAI Transmit FIFO 6 */
> #define FSL_SAI_TFR7 0x5C /* SAI Transmit FIFO 7 */
> #define FSL_SAI_TMR 0x60 /* SAI Transmit Mask */
> -#define FSL_SAI_RCSR 0x80 /* SAI Receive Control */
> -#define FSL_SAI_RCR1 0x84 /* SAI Receive Configuration 1 */
> -#define FSL_SAI_RCR2 0x88 /* SAI Receive Configuration 2 */
> -#define FSL_SAI_RCR3 0x8c /* SAI Receive Configuration 3 */
> -#define FSL_SAI_RCR4 0x90 /* SAI Receive Configuration 4 */
> -#define FSL_SAI_RCR5 0x94 /* SAI Receive Configuration 5 */
> +#define FSL_SAI_RCSR(ofs) (0x80 + ofs) /* SAI Receive Control */
> +#define FSL_SAI_RCR1(ofs) (0x84 + ofs)/* SAI Receive Configuration 1 */
> +#define FSL_SAI_RCR2(ofs) (0x88 + ofs) /* SAI Receive Configuration 2 */
> +#define FSL_SAI_RCR3(ofs) (0x8c + ofs) /* SAI Receive Configuration 3 */
> +#define FSL_SAI_RCR4(ofs) (0x90 + ofs) /* SAI Receive Configuration 4 */
> +#define FSL_SAI_RCR5(ofs) (0x94 + ofs) /* SAI Receive Configuration 5 */
> #define FSL_SAI_RDR0 0xa0 /* SAI Receive Data 0 */
> #define FSL_SAI_RDR1 0xa4 /* SAI Receive Data 1 */
> #define FSL_SAI_RDR2 0xa8 /* SAI Receive Data 2 */
> @@ -61,14 +61,14 @@
> #define FSL_SAI_RFR7 0xdc /* SAI Receive FIFO 7 */
> #define FSL_SAI_RMR 0xe0 /* SAI Receive Mask */
>
> -#define FSL_SAI_xCSR(tx) (tx ? FSL_SAI_TCSR : FSL_SAI_RCSR)
> -#define FSL_SAI_xCR1(tx) (tx ? FSL_SAI_TCR1 : FSL_SAI_RCR1)
> -#define FSL_SAI_xCR2(tx) (tx ? FSL_SAI_TCR2 : FSL_SAI_RCR2)
> -#define FSL_SAI_xCR3(tx) (tx ? FSL_SAI_TCR3 : FSL_SAI_RCR3)
> -#define FSL_SAI_xCR4(tx) (tx ? FSL_SAI_TCR4 : FSL_SAI_RCR4)
> -#define FSL_SAI_xCR5(tx) (tx ? FSL_SAI_TCR5 : FSL_SAI_RCR5)
> -#define FSL_SAI_xDR(tx) (tx ? FSL_SAI_TDR : FSL_SAI_RDR)
> -#define FSL_SAI_xFR(tx) (tx ? FSL_SAI_TFR : FSL_SAI_RFR)
> +#define FSL_SAI_xCSR(tx, ofs) (tx ? FSL_SAI_TCSR(ofs) : FSL_SAI_RCSR(ofs))
> +#define FSL_SAI_xCR1(tx, ofs) (tx ? FSL_SAI_TCR1(ofs) : FSL_SAI_RCR1(ofs))
> +#define FSL_SAI_xCR2(tx, ofs) (tx ? FSL_SAI_TCR2(ofs) : FSL_SAI_RCR2(ofs))
> +#define FSL_SAI_xCR3(tx, ofs) (tx ? FSL_SAI_TCR3(ofs) : FSL_SAI_RCR3(ofs))
> +#define FSL_SAI_xCR4(tx, ofs) (tx ? FSL_SAI_TCR4(ofs) : FSL_SAI_RCR4(ofs))
> +#define FSL_SAI_xCR5(tx, ofs) (tx ? FSL_SAI_TCR5(ofs) : FSL_SAI_RCR5(ofs))
> +#define FSL_SAI_xDR(tx, ofs) (tx ? FSL_SAI_TDR(ofs) : FSL_SAI_RDR(ofs))
> +#define FSL_SAI_xFR(tx, ofs) (tx ? FSL_SAI_TFR(ofs) : FSL_SAI_RFR(ofs))
> #define FSL_SAI_xMR(tx) (tx ? FSL_SAI_TMR : FSL_SAI_RMR)
>
> /* SAI Transmit/Receive Control Register */
> @@ -166,6 +166,7 @@
> struct fsl_sai_soc_data {
> bool use_imx_pcm;
> unsigned int fifo_depth;
> + unsigned int reg_offset;
> };
>
> struct fsl_sai {
> --
> 2.17.1
>
^ permalink raw reply
* Re: [PATCH v3 9/9] powerpc/eeh: Convert log messages to eeh_edev_* macros
From: Sam Bobroff @ 2019-07-25 3:33 UTC (permalink / raw)
To: Oliver O'Halloran
Cc: Alexey Kardashevskiy, Tyrel Datwyler, linuxppc-dev,
kbuild test robot, kbuild-all
In-Reply-To: <CAOSf1CGW9+6TRkbQRqNPcGY9o-=s3YVRGO4GWcKx22ZkXvwCpg@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 4674 bytes --]
On Wed, Jul 24, 2019 at 07:47:55PM +1000, Oliver O'Halloran wrote:
> On Wed, Jul 24, 2019 at 7:24 PM kbuild test robot <lkp@intel.com> wrote:
> >
> > Hi Sam,
> >
> > I love your patch! Yet something to improve:
> >
> > [auto build test ERROR on linus/master]
> > [also build test ERROR on v5.3-rc1 next-20190724]
> > [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
> >
> > url: https://github.com/0day-ci/linux/commits/Sam-Bobroff/powerpc-64-Adjust-order-in-pcibios_init/20190724-134001
> > config: powerpc-defconfig (attached as .config)
> > compiler: powerpc64-linux-gcc (GCC) 7.4.0
> > reproduce:
> > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> > chmod +x ~/bin/make.cross
> > # save the attached .config to linux build tree
> > GCC_VERSION=7.4.0 make.cross ARCH=powerpc
> >
> > If you fix the issue, kindly add following tag
> > Reported-by: kbuild test robot <lkp@intel.com>
> >
> > All errors (new ones prefixed by >>):
> >
> > arch/powerpc/kernel/eeh_driver.c: In function 'eeh_add_virt_device':
> > >> arch/powerpc/kernel/eeh_driver.c:459:17: error: unused variable 'pdn' [-Werror=unused-variable]
> > struct pci_dn *pdn = eeh_dev_to_pdn(edev);
>
> FYI this happens when CONFIG_IOV isn't set. Adding a __maybe_unused
> annotation fixes it.
Ah, thanks. This must be in eeh_add_virt_device().
Since there's now only a single use of pdn in that function, maybe we
can remove the variable, and the IOV case can do this:
pci_iov_add_virtfn(edev->physfn, eeh_dev_to_pdn(edev)->vf_index);
> > ^~~
> > cc1: all warnings being treated as errors
> >
> > vim +/pdn +459 arch/powerpc/kernel/eeh_driver.c
> >
> > 77bd7415 arch/powerpc/platforms/pseries/eeh_driver.c Linas Vepstas 2005-11-03 454
> > bf773df9 arch/powerpc/kernel/eeh_driver.c Sam Bobroff 2018-09-12 455 static void *eeh_add_virt_device(struct eeh_dev *edev)
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 456 {
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 457 struct pci_driver *driver;
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 458 struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 @459 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 460
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 461 if (!(edev->physfn)) {
> > 6dad7bbd arch/powerpc/kernel/eeh_driver.c Sam Bobroff 2019-07-23 462 eeh_edev_warn(edev, "Not for VF\n");
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 463 return NULL;
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 464 }
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 465
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 466 driver = eeh_pcid_get(dev);
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 467 if (driver) {
> > 46d4be41 arch/powerpc/kernel/eeh_driver.c Sam Bobroff 2018-05-25 468 if (driver->err_handler) {
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 469 eeh_pcid_put(dev);
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 470 return NULL;
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 471 }
> > 46d4be41 arch/powerpc/kernel/eeh_driver.c Sam Bobroff 2018-05-25 472 eeh_pcid_put(dev);
> > 46d4be41 arch/powerpc/kernel/eeh_driver.c Sam Bobroff 2018-05-25 473 }
> > 67086e32 arch/powerpc/kernel/eeh_driver.c Wei Yang 2016-03-04 474
> >
> > :::::: The code at line 459 was first introduced by commit
> > :::::: 67086e32b56481531ab1292b284e074b1a8d764c powerpc/eeh: powerpc/eeh: Support error recovery for VF PE
> >
> > :::::: TO: Wei Yang <weiyang@linux.vnet.ibm.com>
> > :::::: CC: Michael Ellerman <mpe@ellerman.id.au>
> >
> > ---
> > 0-DAY kernel test infrastructure Open Source Technology Center
> > https://lists.01.org/pipermail/kbuild-all Intel Corporation
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* Re: [alsa-devel] [PATCH 01/10] ASoC: fsl_sai: add of_match data
From: Daniel Baluta @ 2019-07-25 6:00 UTC (permalink / raw)
To: Nicolin Chen
Cc: Linux-ALSA, Fabio Estevam, Pengutronix Kernel Team, Timur Tabi,
Xiubo Li, Daniel Baluta, S.j. Wang, Angus Ainslie (Purism),
Takashi Iwai, Linux Kernel Mailing List, Mark Brown, dl-linux-imx,
Viorel Suman, linuxppc-dev, Lucas Stach
In-Reply-To: <20190724223422.GA6859@Asurada-Nvidia.nvidia.com>
On Thu, Jul 25, 2019 at 1:34 AM Nicolin Chen <nicoleotsuka@gmail.com> wrote:
>
> On Mon, Jul 22, 2019 at 03:48:24PM +0300, Daniel Baluta wrote:
> > From: Lucas Stach <l.stach@pengutronix.de>
> >
> > New revisions of the SAI IP block have even more differences that need
> > be taken into account by the driver. To avoid sprinking compatible
> > checks all over the driver move the current differences into of_match_data.
> >
> > Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
>
> Looks like Mark has applied this already? If so, should probably
> drop applied ones and rebase the remaining patches for a resend.
Yes 1/10 and 2/10 were already applied. Will drop them from next version.
^ permalink raw reply
* Re: [alsa-devel] [PATCH 08/10] ASoC: dt-bindings: Document fcomb_mode property
From: Daniel Baluta @ 2019-07-25 6:02 UTC (permalink / raw)
To: Nicolin Chen
Cc: Linux-ALSA, Fabio Estevam, Pengutronix Kernel Team, Timur Tabi,
Xiubo Li, Daniel Baluta, S.j. Wang, Angus Ainslie (Purism),
Takashi Iwai, Linux Kernel Mailing List, Mark Brown, dl-linux-imx,
Viorel Suman, linuxppc-dev, Lucas Stach
In-Reply-To: <20190724232209.GC6859@Asurada-Nvidia.nvidia.com>
On Thu, Jul 25, 2019 at 2:22 AM Nicolin Chen <nicoleotsuka@gmail.com> wrote:
>
> On Mon, Jul 22, 2019 at 03:48:31PM +0300, Daniel Baluta wrote:
> > This allows combining multiple-data-line FIFOs into a
> > single-data-line FIFO.
> >
> > Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
> > ---
> > Documentation/devicetree/bindings/sound/fsl-sai.txt | 4 ++++
>
> This should be sent to devicetree mail-list also.
>
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > index 59f4d965a5fb..ca27afd840ba 100644
> > --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > @@ -54,6 +54,10 @@ Optional properties:
> > represents first data line, bit 1 represents second
> > data line and so on. Data line is enabled if
> > corresponding bit is set to 1.
> > + - fsl,fcomb_mode : list of two integers (first for RX, second for TX)
> > + representing FIFO combine mode. Possible values for
> > + combined mode are: 0 - disabled, 1 - Rx/Tx from shift
> > + registers, 2 - Rx/Tx by software, 3 - both.
>
> Looks like a software configuration to me, instead of a device
> property. Is this configurable by user case, or hard-coded by
> SoC/hardware design?
Indeed this is a software configuration and configurable by user case.
Will think of a another way to specify it.
^ permalink raw reply
* Re: [alsa-devel] [PATCH 09/10] ASoC: fsl_sai: Add support for SAI new version
From: Daniel Baluta @ 2019-07-25 6:06 UTC (permalink / raw)
To: Nicolin Chen
Cc: Linux-ALSA, Fabio Estevam, Pengutronix Kernel Team, Timur Tabi,
Xiubo Li, Daniel Baluta, S.j. Wang, Angus Ainslie (Purism),
Takashi Iwai, Linux Kernel Mailing List, Mark Brown, dl-linux-imx,
Viorel Suman, linuxppc-dev, Lucas Stach
In-Reply-To: <20190724233212.GD6859@Asurada-Nvidia.nvidia.com>
On Thu, Jul 25, 2019 at 2:32 AM Nicolin Chen <nicoleotsuka@gmail.com> wrote:
>
> On Mon, Jul 22, 2019 at 03:48:32PM +0300, Daniel Baluta wrote:
> > New IP version introduces Version ID and Parameter registers
> > and optionally added Timestamp feature.
> >
> > VERID and PARAM registers are placed at the top of registers
> > address space and some registers are shifted according to
> > the following table:
> >
> > Tx/Rx data registers and Tx/Rx FIFO registers keep their
> > addresses, all other registers are shifted by 8.
>
> Feels like Lucas's approach is neater. I saw that Register TMR
> at 0x60 is exceptional during your previous discussion. So can
> we apply an offset-cancellation for it exceptionally? I haven't
> checked all the registers so this would look okay to me as well
> if there are more than just Register TMR.
It is not just TMR exceptional. There are like half of the registers.
Thus: half of the registers need to be shifted and half of them
need to stay the same as in previous version of SAI.
I'm not seeing yet a neater approach. Lucas idea would somehow
work if regmap will allow some sort of translation function applied
over registers before being accessed.
Maybe Mark has some clues here?
thanks,
daniel.
^ permalink raw reply
* Re: [alsa-devel] [PATCH 06/10] ASoC: dt-bindings: Document dl_mask property
From: Daniel Baluta @ 2019-07-25 6:08 UTC (permalink / raw)
To: Nicolin Chen
Cc: Linux-ALSA, Fabio Estevam, Pengutronix Kernel Team, Timur Tabi,
Xiubo Li, Daniel Baluta, S.j. Wang, Angus Ainslie (Purism),
Takashi Iwai, Linux Kernel Mailing List, Mark Brown, dl-linux-imx,
Viorel Suman, linuxppc-dev, Lucas Stach
In-Reply-To: <20190724231342.GB6859@Asurada-Nvidia.nvidia.com>
On Thu, Jul 25, 2019 at 2:14 AM Nicolin Chen <nicoleotsuka@gmail.com> wrote:
>
> On Mon, Jul 22, 2019 at 03:48:29PM +0300, Daniel Baluta wrote:
> > SAI supports up to 8 data lines. This property let the user
> > configure how many data lines should be used per transfer
> > direction (Tx/Rx).
> >
> > Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
> > ---
> > Documentation/devicetree/bindings/sound/fsl-sai.txt | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > index 2e726b983845..59f4d965a5fb 100644
> > --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > @@ -49,6 +49,11 @@ Optional properties:
>
> > + - fsl,dl_mask : list of two integers (bitmask, first for RX, second
>
> Not quite in favor of the naming here; And this patch should
> be sent to the devicetree maillist and add DT maintainers --
> they would give some good naming advice.
>
> From my point of view, I feel, since data lines are enabled
> consecutively, probably it'd be clear just to have something
> like "fsl,num-datalines = <2 2>", corresponding to "dl_mask
> = <0x3 0x3>". I believe there're examples in the existing DT
> bindings, so let's see how others suggest.
>
Your suggestion looks good to me. Anyhow, after reading again the
documentation it seems that datalines are not always required to
be consecutive.
The need to be consecutive only when FIFO combine mode is enabled.
Will fix the documentation in the next version.
^ permalink raw reply
* remove default fallbacks in dma_map_ops
From: Christoph Hellwig @ 2019-07-25 6:33 UTC (permalink / raw)
To: iommu, Marek Szyprowski
Cc: linux-xtensa, Michal Simek, linux-parisc, linux-sh, Takashi Iwai,
linuxppc-dev, x86, linux-kernel, linux-m68k, Robin Murphy,
linux-arm-kernel
Hi all,
we have a few places where the DMA mapping layer has non-trivial default
actions that are questionable and/or dangerous.
This series instead wires up the mmap, get_sgtable and get_required_mask
methods explicitly and cleans up some surrounding areas. This also means
we could get rid of the ARCH_NO_COHERENT_DMA_MMAP kconfig option, as we
now require a mmap method wired up, or in case of non-coherent dma-direct
the presence of the arch_dma_coherent_to_pfn hook. The only interesting
case is that the sound code also checked the ARCH_NO_COHERENT_DMA_MMAP
symbol in somewhat odd ways, so I'd like to see a review of the sound
situation before going forward with that patch.
^ permalink raw reply
* [PATCH 1/5] m68knommu: add a pgprot_noncached stub
From: Christoph Hellwig @ 2019-07-25 6:33 UTC (permalink / raw)
To: iommu, Marek Szyprowski
Cc: linux-xtensa, Michal Simek, linux-parisc, linux-sh, Takashi Iwai,
linuxppc-dev, x86, linux-kernel, linux-m68k, Robin Murphy,
linux-arm-kernel
In-Reply-To: <20190725063401.29904-1-hch@lst.de>
Provide a pgprot_noncached like all the other nommu ports so that
common code can rely on it being able to be present. Note that this is
generally code that is not actually run on nommu, but at least we can
avoid nasty ifdefs by having a stub.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/m68k/include/asm/pgtable_no.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/m68k/include/asm/pgtable_no.h b/arch/m68k/include/asm/pgtable_no.h
index fc3a96c77bd8..06194c7ba151 100644
--- a/arch/m68k/include/asm/pgtable_no.h
+++ b/arch/m68k/include/asm/pgtable_no.h
@@ -29,6 +29,8 @@
#define PAGE_READONLY __pgprot(0)
#define PAGE_KERNEL __pgprot(0)
+#define pgprot_noncached(prot) (prot)
+
extern void paging_init(void);
#define swapper_pg_dir ((pgd_t *) 0)
--
2.20.1
^ permalink raw reply related
* [PATCH 2/5] dma-mapping: move the dma_get_sgtable API comments from arm to common code
From: Christoph Hellwig @ 2019-07-25 6:33 UTC (permalink / raw)
To: iommu, Marek Szyprowski
Cc: linux-xtensa, Michal Simek, linux-parisc, linux-sh, Takashi Iwai,
linuxppc-dev, x86, linux-kernel, linux-m68k, Robin Murphy,
linux-arm-kernel
In-Reply-To: <20190725063401.29904-1-hch@lst.de>
The comments are spot on and should be near the central API, not just
near a single implementation.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/arm/mm/dma-mapping.c | 11 -----------
kernel/dma/mapping.c | 11 +++++++++++
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 6774b03aa405..4410af33c5c4 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -877,17 +877,6 @@ static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_add
__arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
}
-/*
- * The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
- * that the intention is to allow exporting memory allocated via the
- * coherent DMA APIs through the dma_buf API, which only accepts a
- * scattertable. This presents a couple of problems:
- * 1. Not all memory allocated via the coherent DMA APIs is backed by
- * a struct page
- * 2. Passing coherent DMA memory into the streaming APIs is not allowed
- * as we will try to flush the memory through a different alias to that
- * actually being used (and the flushes are redundant.)
- */
int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t handle, size_t size,
unsigned long attrs)
diff --git a/kernel/dma/mapping.c b/kernel/dma/mapping.c
index b945239621d8..4ceb5b9016d8 100644
--- a/kernel/dma/mapping.c
+++ b/kernel/dma/mapping.c
@@ -136,6 +136,17 @@ int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
return ret;
}
+/*
+ * The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
+ * that the intention is to allow exporting memory allocated via the
+ * coherent DMA APIs through the dma_buf API, which only accepts a
+ * scattertable. This presents a couple of problems:
+ * 1. Not all memory allocated via the coherent DMA APIs is backed by
+ * a struct page
+ * 2. Passing coherent DMA memory into the streaming APIs is not allowed
+ * as we will try to flush the memory through a different alias to that
+ * actually being used (and the flushes are redundant.)
+ */
int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr, size_t size,
unsigned long attrs)
--
2.20.1
^ permalink raw reply related
* [PATCH 4/5] dma-mapping: provide a better default ->get_required_mask
From: Christoph Hellwig @ 2019-07-25 6:34 UTC (permalink / raw)
To: iommu, Marek Szyprowski
Cc: linux-xtensa, Michal Simek, linux-parisc, linux-sh, Takashi Iwai,
linuxppc-dev, x86, linux-kernel, linux-m68k, Robin Murphy,
linux-arm-kernel
In-Reply-To: <20190725063401.29904-1-hch@lst.de>
Most dma_map_ops instances are IOMMUs that work perfectly fine in 32-bits
of IOVA space, and the generic direct mapping code already provides its
own routines that is intelligent based on the amount of memory actually
present. Wire up the dma-direct routine for the ARM direct mapping code
as well, and otherwise default to the constant 32-bit mask. This way
we only need to override it for the occasional odd IOMMU that requires
64-bit IOVA support, or IOMMU drivers that are more efficient if they
can fall back to the direct mapping.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/arm/mm/dma-mapping.c | 3 +++
arch/powerpc/platforms/ps3/system-bus.c | 7 ------
arch/x86/kernel/amd_gart_64.c | 1 +
kernel/dma/mapping.c | 30 +++++++++----------------
4 files changed, 14 insertions(+), 27 deletions(-)
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 4410af33c5c4..9c9a23e5600d 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -14,6 +14,7 @@
#include <linux/list.h>
#include <linux/init.h>
#include <linux/device.h>
+#include <linux/dma-direct.h>
#include <linux/dma-mapping.h>
#include <linux/dma-noncoherent.h>
#include <linux/dma-contiguous.h>
@@ -192,6 +193,7 @@ const struct dma_map_ops arm_dma_ops = {
.sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
.sync_sg_for_device = arm_dma_sync_sg_for_device,
.dma_supported = arm_dma_supported,
+ .get_required_mask = dma_direct_get_required_mask,
};
EXPORT_SYMBOL(arm_dma_ops);
@@ -212,6 +214,7 @@ const struct dma_map_ops arm_coherent_dma_ops = {
.map_sg = arm_dma_map_sg,
.map_resource = dma_direct_map_resource,
.dma_supported = arm_dma_supported,
+ .get_required_mask = dma_direct_get_required_mask,
};
EXPORT_SYMBOL(arm_coherent_dma_ops);
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index 70fcc9736a8c..3542b7bd6a46 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -686,18 +686,12 @@ static int ps3_dma_supported(struct device *_dev, u64 mask)
return mask >= DMA_BIT_MASK(32);
}
-static u64 ps3_dma_get_required_mask(struct device *_dev)
-{
- return DMA_BIT_MASK(32);
-}
-
static const struct dma_map_ops ps3_sb_dma_ops = {
.alloc = ps3_alloc_coherent,
.free = ps3_free_coherent,
.map_sg = ps3_sb_map_sg,
.unmap_sg = ps3_sb_unmap_sg,
.dma_supported = ps3_dma_supported,
- .get_required_mask = ps3_dma_get_required_mask,
.map_page = ps3_sb_map_page,
.unmap_page = ps3_unmap_page,
.mmap = dma_common_mmap,
@@ -710,7 +704,6 @@ static const struct dma_map_ops ps3_ioc0_dma_ops = {
.map_sg = ps3_ioc0_map_sg,
.unmap_sg = ps3_ioc0_unmap_sg,
.dma_supported = ps3_dma_supported,
- .get_required_mask = ps3_dma_get_required_mask,
.map_page = ps3_ioc0_map_page,
.unmap_page = ps3_unmap_page,
.mmap = dma_common_mmap,
diff --git a/arch/x86/kernel/amd_gart_64.c b/arch/x86/kernel/amd_gart_64.c
index a65b4a9c7f87..d02662238b57 100644
--- a/arch/x86/kernel/amd_gart_64.c
+++ b/arch/x86/kernel/amd_gart_64.c
@@ -680,6 +680,7 @@ static const struct dma_map_ops gart_dma_ops = {
.dma_supported = dma_direct_supported,
.mmap = dma_common_mmap,
.get_sgtable = dma_common_get_sgtable,
+ .get_required_mask = dma_direct_get_required_mask,
};
static void gart_iommu_shutdown(void)
diff --git a/kernel/dma/mapping.c b/kernel/dma/mapping.c
index cdb157cd70e7..7dff1829c8c5 100644
--- a/kernel/dma/mapping.c
+++ b/kernel/dma/mapping.c
@@ -231,25 +231,6 @@ int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
}
EXPORT_SYMBOL(dma_mmap_attrs);
-static u64 dma_default_get_required_mask(struct device *dev)
-{
- u32 low_totalram = ((max_pfn - 1) << PAGE_SHIFT);
- u32 high_totalram = ((max_pfn - 1) >> (32 - PAGE_SHIFT));
- u64 mask;
-
- if (!high_totalram) {
- /* convert to mask just covering totalram */
- low_totalram = (1 << (fls(low_totalram) - 1));
- low_totalram += low_totalram - 1;
- mask = low_totalram;
- } else {
- high_totalram = (1 << (fls(high_totalram) - 1));
- high_totalram += high_totalram - 1;
- mask = (((u64)high_totalram) << 32) + 0xffffffff;
- }
- return mask;
-}
-
u64 dma_get_required_mask(struct device *dev)
{
const struct dma_map_ops *ops = get_dma_ops(dev);
@@ -258,7 +239,16 @@ u64 dma_get_required_mask(struct device *dev)
return dma_direct_get_required_mask(dev);
if (ops->get_required_mask)
return ops->get_required_mask(dev);
- return dma_default_get_required_mask(dev);
+
+ /*
+ * We require every DMA ops implementation to at least support a 32-bit
+ * DMA mask (and use bounce buffering if that isn't supported in
+ * hardware). As the direct mapping code has its own routine to
+ * actually report an optimal mask we default to 32-bit here as that
+ * is the right thing for most IOMMUs, and at least not actively
+ * harmful in general.
+ */
+ return DMA_BIT_MASK(32);
}
EXPORT_SYMBOL_GPL(dma_get_required_mask);
--
2.20.1
^ permalink raw reply related
* [PATCH 3/5] dma-mapping: explicitly wire up ->mmap and ->get_sgtable
From: Christoph Hellwig @ 2019-07-25 6:33 UTC (permalink / raw)
To: iommu, Marek Szyprowski
Cc: linux-xtensa, Michal Simek, linux-parisc, linux-sh, Takashi Iwai,
linuxppc-dev, x86, linux-kernel, linux-m68k, Robin Murphy,
linux-arm-kernel
In-Reply-To: <20190725063401.29904-1-hch@lst.de>
While the default ->mmap and ->get_sgtable implementations work for the
majority of our dma_map_ops impementations they are inherently safe
for others that don't use the page allocator or CMA and/or use their
own way of remapping not covered by the common code. So remove the
defaults if these methods are not wired up, but instead wire up the
default implementations for all safe instances.
Fixes: e1c7e324539a ("dma-mapping: always provide the dma_map_ops based implementation")
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/alpha/kernel/pci_iommu.c | 2 ++
arch/ia64/hp/common/sba_iommu.c | 2 ++
arch/ia64/sn/pci/pci_dma.c | 2 ++
arch/mips/jazz/jazzdma.c | 2 ++
arch/powerpc/kernel/dma-iommu.c | 2 ++
arch/powerpc/platforms/ps3/system-bus.c | 4 ++++
arch/powerpc/platforms/pseries/vio.c | 2 ++
arch/s390/pci/pci_dma.c | 2 ++
arch/sparc/kernel/iommu.c | 2 ++
arch/sparc/kernel/pci_sun4v.c | 2 ++
arch/x86/kernel/amd_gart_64.c | 2 ++
arch/x86/kernel/pci-calgary_64.c | 2 ++
drivers/iommu/amd_iommu.c | 2 ++
drivers/iommu/intel-iommu.c | 2 ++
kernel/dma/mapping.c | 20 ++++++++++++--------
15 files changed, 42 insertions(+), 8 deletions(-)
diff --git a/arch/alpha/kernel/pci_iommu.c b/arch/alpha/kernel/pci_iommu.c
index 242108439f42..7f1925a32c99 100644
--- a/arch/alpha/kernel/pci_iommu.c
+++ b/arch/alpha/kernel/pci_iommu.c
@@ -955,5 +955,7 @@ const struct dma_map_ops alpha_pci_ops = {
.map_sg = alpha_pci_map_sg,
.unmap_sg = alpha_pci_unmap_sg,
.dma_supported = alpha_pci_supported,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
};
EXPORT_SYMBOL(alpha_pci_ops);
diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
index 3d24cc43385b..4c0ea6c2833d 100644
--- a/arch/ia64/hp/common/sba_iommu.c
+++ b/arch/ia64/hp/common/sba_iommu.c
@@ -2183,6 +2183,8 @@ const struct dma_map_ops sba_dma_ops = {
.map_sg = sba_map_sg_attrs,
.unmap_sg = sba_unmap_sg_attrs,
.dma_supported = sba_dma_supported,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
};
void sba_dma_init(void)
diff --git a/arch/ia64/sn/pci/pci_dma.c b/arch/ia64/sn/pci/pci_dma.c
index b7d42e4edc1f..12ffb9c0d738 100644
--- a/arch/ia64/sn/pci/pci_dma.c
+++ b/arch/ia64/sn/pci/pci_dma.c
@@ -438,6 +438,8 @@ static struct dma_map_ops sn_dma_ops = {
.unmap_sg = sn_dma_unmap_sg,
.dma_supported = sn_dma_supported,
.get_required_mask = sn_dma_get_required_mask,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
};
void sn_dma_init(void)
diff --git a/arch/mips/jazz/jazzdma.c b/arch/mips/jazz/jazzdma.c
index 1804dc9d8136..a01e14955187 100644
--- a/arch/mips/jazz/jazzdma.c
+++ b/arch/mips/jazz/jazzdma.c
@@ -682,5 +682,7 @@ const struct dma_map_ops jazz_dma_ops = {
.sync_sg_for_device = jazz_dma_sync_sg_for_device,
.dma_supported = dma_direct_supported,
.cache_sync = arch_dma_cache_sync,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
};
EXPORT_SYMBOL(jazz_dma_ops);
diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c
index a0879674a9c8..2f5a53874f6d 100644
--- a/arch/powerpc/kernel/dma-iommu.c
+++ b/arch/powerpc/kernel/dma-iommu.c
@@ -208,4 +208,6 @@ const struct dma_map_ops dma_iommu_ops = {
.sync_single_for_device = dma_iommu_sync_for_device,
.sync_sg_for_cpu = dma_iommu_sync_sg_for_cpu,
.sync_sg_for_device = dma_iommu_sync_sg_for_device,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
};
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index 98410119c47b..70fcc9736a8c 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -700,6 +700,8 @@ static const struct dma_map_ops ps3_sb_dma_ops = {
.get_required_mask = ps3_dma_get_required_mask,
.map_page = ps3_sb_map_page,
.unmap_page = ps3_unmap_page,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
};
static const struct dma_map_ops ps3_ioc0_dma_ops = {
@@ -711,6 +713,8 @@ static const struct dma_map_ops ps3_ioc0_dma_ops = {
.get_required_mask = ps3_dma_get_required_mask,
.map_page = ps3_ioc0_map_page,
.unmap_page = ps3_unmap_page,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
};
/**
diff --git a/arch/powerpc/platforms/pseries/vio.c b/arch/powerpc/platforms/pseries/vio.c
index 6601b9d404dc..3473eef7628c 100644
--- a/arch/powerpc/platforms/pseries/vio.c
+++ b/arch/powerpc/platforms/pseries/vio.c
@@ -605,6 +605,8 @@ static const struct dma_map_ops vio_dma_mapping_ops = {
.unmap_page = vio_dma_iommu_unmap_page,
.dma_supported = dma_iommu_dma_supported,
.get_required_mask = dma_iommu_get_required_mask,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
};
/**
diff --git a/arch/s390/pci/pci_dma.c b/arch/s390/pci/pci_dma.c
index 9e52d1527f71..03d8c1c9f82f 100644
--- a/arch/s390/pci/pci_dma.c
+++ b/arch/s390/pci/pci_dma.c
@@ -668,6 +668,8 @@ const struct dma_map_ops s390_pci_dma_ops = {
.unmap_sg = s390_dma_unmap_sg,
.map_page = s390_dma_map_pages,
.unmap_page = s390_dma_unmap_pages,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
/* dma_supported is unconditionally true without a callback */
};
EXPORT_SYMBOL_GPL(s390_pci_dma_ops);
diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c
index 4ae7388b1bff..c915a7cbcc91 100644
--- a/arch/sparc/kernel/iommu.c
+++ b/arch/sparc/kernel/iommu.c
@@ -763,6 +763,8 @@ static const struct dma_map_ops sun4u_dma_ops = {
.sync_single_for_cpu = dma_4u_sync_single_for_cpu,
.sync_sg_for_cpu = dma_4u_sync_sg_for_cpu,
.dma_supported = dma_4u_supported,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
};
const struct dma_map_ops *dma_ops = &sun4u_dma_ops;
diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c
index 14b93c5564e3..ab6909642ae1 100644
--- a/arch/sparc/kernel/pci_sun4v.c
+++ b/arch/sparc/kernel/pci_sun4v.c
@@ -692,6 +692,8 @@ static const struct dma_map_ops sun4v_dma_ops = {
.map_sg = dma_4v_map_sg,
.unmap_sg = dma_4v_unmap_sg,
.dma_supported = dma_4v_supported,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
};
static void pci_sun4v_scan_bus(struct pci_pbm_info *pbm, struct device *parent)
diff --git a/arch/x86/kernel/amd_gart_64.c b/arch/x86/kernel/amd_gart_64.c
index a585ea6f686a..a65b4a9c7f87 100644
--- a/arch/x86/kernel/amd_gart_64.c
+++ b/arch/x86/kernel/amd_gart_64.c
@@ -678,6 +678,8 @@ static const struct dma_map_ops gart_dma_ops = {
.alloc = gart_alloc_coherent,
.free = gart_free_coherent,
.dma_supported = dma_direct_supported,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
};
static void gart_iommu_shutdown(void)
diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c
index 9d4343aa481b..23fdec030c37 100644
--- a/arch/x86/kernel/pci-calgary_64.c
+++ b/arch/x86/kernel/pci-calgary_64.c
@@ -468,6 +468,8 @@ static const struct dma_map_ops calgary_dma_ops = {
.map_page = calgary_map_page,
.unmap_page = calgary_unmap_page,
.dma_supported = dma_direct_supported,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
};
static inline void __iomem * busno_to_bbar(unsigned char num)
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index b607a92791d3..2e74ad659985 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -2722,6 +2722,8 @@ static const struct dma_map_ops amd_iommu_dma_ops = {
.map_sg = map_sg,
.unmap_sg = unmap_sg,
.dma_supported = amd_iommu_dma_supported,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
};
static int init_reserved_iova_ranges(void)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index ac4172c02244..f6776b359977 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -3737,6 +3737,8 @@ static const struct dma_map_ops intel_dma_ops = {
.map_resource = intel_map_resource,
.unmap_resource = intel_unmap_resource,
.dma_supported = dma_direct_supported,
+ .mmap = dma_common_mmap,
+ .get_sgtable = dma_common_get_sgtable,
};
static inline int iommu_domain_cache_init(void)
diff --git a/kernel/dma/mapping.c b/kernel/dma/mapping.c
index 4ceb5b9016d8..cdb157cd70e7 100644
--- a/kernel/dma/mapping.c
+++ b/kernel/dma/mapping.c
@@ -153,11 +153,12 @@ int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
{
const struct dma_map_ops *ops = get_dma_ops(dev);
- if (!dma_is_direct(ops) && ops->get_sgtable)
- return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
- attrs);
- return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
- attrs);
+ if (dma_is_direct(ops))
+ return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr,
+ size, attrs);
+ if (!ops->get_sgtable)
+ return -ENXIO;
+ return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, attrs);
}
EXPORT_SYMBOL(dma_get_sgtable_attrs);
@@ -221,9 +222,12 @@ int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
{
const struct dma_map_ops *ops = get_dma_ops(dev);
- if (!dma_is_direct(ops) && ops->mmap)
- return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
- return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
+ if (dma_is_direct(ops))
+ return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size,
+ attrs);
+ if (!ops->mmap)
+ return -ENXIO;
+ return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
}
EXPORT_SYMBOL(dma_mmap_attrs);
--
2.20.1
^ permalink raw reply related
* [PATCH 5/5] dma-mapping: remove ARCH_NO_COHERENT_DMA_MMAP
From: Christoph Hellwig @ 2019-07-25 6:34 UTC (permalink / raw)
To: iommu, Marek Szyprowski
Cc: linux-xtensa, Michal Simek, linux-parisc, linux-sh, Takashi Iwai,
linuxppc-dev, x86, linux-kernel, linux-m68k, Robin Murphy,
linux-arm-kernel
In-Reply-To: <20190725063401.29904-1-hch@lst.de>
Now that we never use a default ->mmap implementation, and non-coherent
architectures can control the presence of ->mmap support by enabling
ARCH_HAS_DMA_COHERENT_TO_PFN for the dma direct implementation there
is no need for a global config option to control the availability
of dma_common_mmap.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/Kconfig | 3 ---
arch/c6x/Kconfig | 1 -
arch/m68k/Kconfig | 1 -
arch/microblaze/Kconfig | 1 -
arch/parisc/Kconfig | 1 -
arch/sh/Kconfig | 1 -
arch/xtensa/Kconfig | 1 -
kernel/dma/mapping.c | 4 ----
sound/core/pcm_native.c | 10 +---------
9 files changed, 1 insertion(+), 22 deletions(-)
diff --git a/arch/Kconfig b/arch/Kconfig
index a7b57dd42c26..ec2834206d08 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -790,9 +790,6 @@ config COMPAT_32BIT_TIME
This is relevant on all 32-bit architectures, and 64-bit architectures
as part of compat syscall handling.
-config ARCH_NO_COHERENT_DMA_MMAP
- bool
-
config ARCH_NO_PREEMPT
bool
diff --git a/arch/c6x/Kconfig b/arch/c6x/Kconfig
index b4fb61c83494..e65e8d82442a 100644
--- a/arch/c6x/Kconfig
+++ b/arch/c6x/Kconfig
@@ -20,7 +20,6 @@ config C6X
select OF_EARLY_FLATTREE
select GENERIC_CLOCKEVENTS
select MODULES_USE_ELF_RELA
- select ARCH_NO_COHERENT_DMA_MMAP
select MMU_GATHER_NO_RANGE if MMU
config MMU
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index c518d695c376..614b355ae338 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -8,7 +8,6 @@ config M68K
select ARCH_HAS_DMA_PREP_COHERENT if HAS_DMA && MMU && !COLDFIRE
select ARCH_HAS_SYNC_DMA_FOR_DEVICE if HAS_DMA
select ARCH_MIGHT_HAVE_PC_PARPORT if ISA
- select ARCH_NO_COHERENT_DMA_MMAP if !MMU
select ARCH_NO_PREEMPT if !COLDFIRE
select BINFMT_FLAT_ARGVP_ENVP_ON_STACK
select DMA_DIRECT_REMAP if HAS_DMA && MMU && !COLDFIRE
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index d411de05b628..632c9477a0f6 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -9,7 +9,6 @@ config MICROBLAZE
select ARCH_HAS_SYNC_DMA_FOR_CPU
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_MIGHT_HAVE_PC_PARPORT
- select ARCH_NO_COHERENT_DMA_MMAP if !MMU
select ARCH_WANT_IPC_PARSE_VERSION
select BUILDTIME_EXTABLE_SORT
select TIMER_OF
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 6d732e451071..e9dd88b7f81e 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -52,7 +52,6 @@ config PARISC
select GENERIC_SCHED_CLOCK
select HAVE_UNSTABLE_SCHED_CLOCK if SMP
select GENERIC_CLOCKEVENTS
- select ARCH_NO_COHERENT_DMA_MMAP
select CPU_NO_EFFICIENT_FFS
select NEED_DMA_MAP_STATE
select NEED_SG_DMA_LENGTH
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 6b1b5941b618..f356ee674d89 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -5,7 +5,6 @@ config SUPERH
select ARCH_HAS_PTE_SPECIAL
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
select ARCH_MIGHT_HAVE_PC_PARPORT
- select ARCH_NO_COHERENT_DMA_MMAP if !MMU
select HAVE_PATA_PLATFORM
select CLKDEV_LOOKUP
select DMA_DECLARE_COHERENT
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index ebc135bda921..70653aed3005 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -5,7 +5,6 @@ config XTENSA
select ARCH_HAS_BINFMT_FLAT if !MMU
select ARCH_HAS_SYNC_DMA_FOR_CPU
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
- select ARCH_NO_COHERENT_DMA_MMAP if !MMU
select ARCH_USE_QUEUED_RWLOCKS
select ARCH_USE_QUEUED_SPINLOCKS
select ARCH_WANT_FRAME_POINTERS
diff --git a/kernel/dma/mapping.c b/kernel/dma/mapping.c
index 7dff1829c8c5..815446f76995 100644
--- a/kernel/dma/mapping.c
+++ b/kernel/dma/mapping.c
@@ -169,7 +169,6 @@ int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
void *cpu_addr, dma_addr_t dma_addr, size_t size,
unsigned long attrs)
{
-#ifndef CONFIG_ARCH_NO_COHERENT_DMA_MMAP
unsigned long user_count = vma_pages(vma);
unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
unsigned long off = vma->vm_pgoff;
@@ -198,9 +197,6 @@ int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
return remap_pfn_range(vma, vma->vm_start, pfn + vma->vm_pgoff,
user_count << PAGE_SHIFT, vma->vm_page_prot);
-#else
- return -ENXIO;
-#endif /* !CONFIG_ARCH_NO_COHERENT_DMA_MMAP */
}
/**
diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
index 860543a4c840..2dadc708343a 100644
--- a/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
@@ -218,15 +218,7 @@ int snd_pcm_info_user(struct snd_pcm_substream *substream,
static bool hw_support_mmap(struct snd_pcm_substream *substream)
{
- if (!(substream->runtime->hw.info & SNDRV_PCM_INFO_MMAP))
- return false;
- /* architecture supports dma_mmap_coherent()? */
-#if defined(CONFIG_ARCH_NO_COHERENT_DMA_MMAP) || !defined(CONFIG_HAS_DMA)
- if (!substream->ops->mmap &&
- substream->dma_buffer.dev.type == SNDRV_DMA_TYPE_DEV)
- return false;
-#endif
- return true;
+ return substream->runtime->hw.info & SNDRV_PCM_INFO_MMAP;
}
static int constrain_mask_params(struct snd_pcm_substream *substream,
--
2.20.1
^ permalink raw reply related
* Re: [RFC PATCH 00/10] implement KASLR for powerpc/fsl_booke/32
From: Jason Yan @ 2019-07-25 7:16 UTC (permalink / raw)
To: mpe, linuxppc-dev, diana.craciun, christophe.leroy, benh, paulus,
npiggin, keescook, kernel-hardening
Cc: wangkefeng.wang, linux-kernel, jingxiangfeng, thunder.leizhen,
fanchengyang, yebin10
In-Reply-To: <20190717080621.40424-1-yanaijie@huawei.com>
Hi all, any comments?
On 2019/7/17 16:06, Jason Yan wrote:
> This series implements KASLR for powerpc/fsl_booke/32, as a security
> feature that deters exploit attempts relying on knowledge of the location
> of kernel internals.
>
> Since CONFIG_RELOCATABLE has already supported, what we need to do is
> map or copy kernel to a proper place and relocate. Freescale Book-E
> parts expect lowmem to be mapped by fixed TLB entries(TLB1). The TLB1
> entries are not suitable to map the kernel directly in a randomized
> region, so we chose to copy the kernel to a proper place and restart to
> relocate.
>
> Entropy is derived from the banner and timer base, which will change every
> build and boot. This not so much safe so additionally the bootloader may
> pass entropy via the /chosen/kaslr-seed node in device tree.
>
> We will use the first 512M of the low memory to randomize the kernel
> image. The memory will be split in 64M zones. We will use the lower 8
> bit of the entropy to decide the index of the 64M zone. Then we chose a
> 16K aligned offset inside the 64M zone to put the kernel in.
>
> KERNELBASE
>
> |--> 64M <--|
> | |
> +---------------+ +----------------+---------------+
> | |....| |kernel| | |
> +---------------+ +----------------+---------------+
> | |
> |-----> offset <-----|
>
> kimage_vaddr
>
> We also check if we will overlap with some areas like the dtb area, the
> initrd area or the crashkernel area. If we cannot find a proper area,
> kaslr will be disabled and boot from the original kernel.
>
> Jason Yan (10):
> powerpc: unify definition of M_IF_NEEDED
> powerpc: move memstart_addr and kernstart_addr to init-common.c
> powerpc: introduce kimage_vaddr to store the kernel base
> powerpc/fsl_booke/32: introduce create_tlb_entry() helper
> powerpc/fsl_booke/32: introduce reloc_kernel_entry() helper
> powerpc/fsl_booke/32: implement KASLR infrastructure
> powerpc/fsl_booke/32: randomize the kernel image offset
> powerpc/fsl_booke/kaslr: clear the original kernel if randomized
> powerpc/fsl_booke/kaslr: support nokaslr cmdline parameter
> powerpc/fsl_booke/kaslr: dump out kernel offset information on panic
>
> arch/powerpc/Kconfig | 11 +
> arch/powerpc/include/asm/nohash/mmu-book3e.h | 10 +
> arch/powerpc/include/asm/page.h | 7 +
> arch/powerpc/kernel/Makefile | 1 +
> arch/powerpc/kernel/early_32.c | 2 +-
> arch/powerpc/kernel/exceptions-64e.S | 10 -
> arch/powerpc/kernel/fsl_booke_entry_mapping.S | 23 +-
> arch/powerpc/kernel/head_fsl_booke.S | 61 ++-
> arch/powerpc/kernel/kaslr_booke.c | 439 ++++++++++++++++++
> arch/powerpc/kernel/machine_kexec.c | 1 +
> arch/powerpc/kernel/misc_64.S | 5 -
> arch/powerpc/kernel/setup-common.c | 23 +
> arch/powerpc/mm/init-common.c | 7 +
> arch/powerpc/mm/init_32.c | 5 -
> arch/powerpc/mm/init_64.c | 5 -
> arch/powerpc/mm/mmu_decl.h | 10 +
> arch/powerpc/mm/nohash/fsl_booke.c | 8 +-
> 17 files changed, 580 insertions(+), 48 deletions(-)
> create mode 100644 arch/powerpc/kernel/kaslr_booke.c
>
^ permalink raw reply
* [PATCH] hwrng: Use device-managed registration API
From: Chuhong Yuan @ 2019-07-25 8:01 UTC (permalink / raw)
Cc: Alexandre Belloni, Deepak Saxena, Herbert Xu, Arnd Bergmann,
Greg Kroah-Hartman, Chuhong Yuan, Łukasz Stelmach,
Nicolas Ferre, Krzysztof Kozlowski, Patrice Chotard,
linux-samsung-soc, Ludovic Desroches, Kukjin Kim, Paul Mackerras,
Matt Mackall, linux-kernel, linuxppc-dev, linux-arm-kernel,
linux-crypto
Use devm_hwrng_register to simplify the implementation.
Manual unregistration and some remove functions can be
removed now.
Signed-off-by: Chuhong Yuan <hslester96@gmail.com>
---
drivers/char/hw_random/atmel-rng.c | 3 +--
drivers/char/hw_random/cavium-rng-vf.c | 11 +----------
drivers/char/hw_random/exynos-trng.c | 3 +--
drivers/char/hw_random/n2-drv.c | 4 +---
drivers/char/hw_random/nomadik-rng.c | 3 +--
drivers/char/hw_random/omap-rng.c | 3 +--
drivers/char/hw_random/powernv-rng.c | 10 +---------
drivers/char/hw_random/st-rng.c | 4 +---
drivers/char/hw_random/xgene-rng.c | 4 +---
9 files changed, 9 insertions(+), 36 deletions(-)
diff --git a/drivers/char/hw_random/atmel-rng.c b/drivers/char/hw_random/atmel-rng.c
index 433426242b87..e55705745d5e 100644
--- a/drivers/char/hw_random/atmel-rng.c
+++ b/drivers/char/hw_random/atmel-rng.c
@@ -86,7 +86,7 @@ static int atmel_trng_probe(struct platform_device *pdev)
trng->rng.name = pdev->name;
trng->rng.read = atmel_trng_read;
- ret = hwrng_register(&trng->rng);
+ ret = devm_hwrng_register(&pdev->dev, &trng->rng);
if (ret)
goto err_register;
@@ -103,7 +103,6 @@ static int atmel_trng_remove(struct platform_device *pdev)
{
struct atmel_trng *trng = platform_get_drvdata(pdev);
- hwrng_unregister(&trng->rng);
atmel_trng_disable(trng);
clk_disable_unprepare(trng->clk);
diff --git a/drivers/char/hw_random/cavium-rng-vf.c b/drivers/char/hw_random/cavium-rng-vf.c
index 2d1352b67168..3de4a6a443ef 100644
--- a/drivers/char/hw_random/cavium-rng-vf.c
+++ b/drivers/char/hw_random/cavium-rng-vf.c
@@ -67,7 +67,7 @@ static int cavium_rng_probe_vf(struct pci_dev *pdev,
pci_set_drvdata(pdev, rng);
- ret = hwrng_register(&rng->ops);
+ ret = devm_hwrng_register(&pdev->dev, &rng->ops);
if (ret) {
dev_err(&pdev->dev, "Error registering device as HWRNG.\n");
return ret;
@@ -76,14 +76,6 @@ static int cavium_rng_probe_vf(struct pci_dev *pdev,
return 0;
}
-/* Remove the VF */
-static void cavium_rng_remove_vf(struct pci_dev *pdev)
-{
- struct cavium_rng *rng;
-
- rng = pci_get_drvdata(pdev);
- hwrng_unregister(&rng->ops);
-}
static const struct pci_device_id cavium_rng_vf_id_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xa033), 0, 0, 0},
@@ -95,7 +87,6 @@ static struct pci_driver cavium_rng_vf_driver = {
.name = "cavium_rng_vf",
.id_table = cavium_rng_vf_id_table,
.probe = cavium_rng_probe_vf,
- .remove = cavium_rng_remove_vf,
};
module_pci_driver(cavium_rng_vf_driver);
diff --git a/drivers/char/hw_random/exynos-trng.c b/drivers/char/hw_random/exynos-trng.c
index 94235761955c..b4b52ab23b6b 100644
--- a/drivers/char/hw_random/exynos-trng.c
+++ b/drivers/char/hw_random/exynos-trng.c
@@ -153,7 +153,7 @@ static int exynos_trng_probe(struct platform_device *pdev)
goto err_clock;
}
- ret = hwrng_register(&trng->rng);
+ ret = devm_hwrng_register(&pdev->dev, &trng->rng);
if (ret) {
dev_err(&pdev->dev, "Could not register hwrng device.\n");
goto err_register;
@@ -179,7 +179,6 @@ static int exynos_trng_remove(struct platform_device *pdev)
{
struct exynos_trng_dev *trng = platform_get_drvdata(pdev);
- hwrng_unregister(&trng->rng);
clk_disable_unprepare(trng->clk);
pm_runtime_put_sync(&pdev->dev);
diff --git a/drivers/char/hw_random/n2-drv.c b/drivers/char/hw_random/n2-drv.c
index d4cab105796f..2d256b3470db 100644
--- a/drivers/char/hw_random/n2-drv.c
+++ b/drivers/char/hw_random/n2-drv.c
@@ -768,7 +768,7 @@ static int n2rng_probe(struct platform_device *op)
np->hwrng.data_read = n2rng_data_read;
np->hwrng.priv = (unsigned long) np;
- err = hwrng_register(&np->hwrng);
+ err = devm_hwrng_register(&pdev->dev, &np->hwrng);
if (err)
goto out_hvapi_unregister;
@@ -793,8 +793,6 @@ static int n2rng_remove(struct platform_device *op)
cancel_delayed_work_sync(&np->work);
- hwrng_unregister(&np->hwrng);
-
sun4v_hvapi_unregister(HV_GRP_RNG);
return 0;
diff --git a/drivers/char/hw_random/nomadik-rng.c b/drivers/char/hw_random/nomadik-rng.c
index fc0f6b0cb80d..74ed29f42e4f 100644
--- a/drivers/char/hw_random/nomadik-rng.c
+++ b/drivers/char/hw_random/nomadik-rng.c
@@ -57,7 +57,7 @@ static int nmk_rng_probe(struct amba_device *dev, const struct amba_id *id)
if (!base)
goto out_release;
nmk_rng.priv = (unsigned long)base;
- ret = hwrng_register(&nmk_rng);
+ ret = devm_hwrng_register(&dev->dev, &nmk_rng);
if (ret)
goto out_release;
return 0;
@@ -71,7 +71,6 @@ static int nmk_rng_probe(struct amba_device *dev, const struct amba_id *id)
static int nmk_rng_remove(struct amba_device *dev)
{
- hwrng_unregister(&nmk_rng);
amba_release_regions(dev);
clk_disable(rng_clk);
return 0;
diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c
index e9b6ac61fb7f..b27f39688b5e 100644
--- a/drivers/char/hw_random/omap-rng.c
+++ b/drivers/char/hw_random/omap-rng.c
@@ -500,7 +500,7 @@ static int omap_rng_probe(struct platform_device *pdev)
if (ret)
goto err_register;
- ret = hwrng_register(&priv->rng);
+ ret = devm_hwrng_register(&pdev->dev, &priv->rng);
if (ret)
goto err_register;
@@ -525,7 +525,6 @@ static int omap_rng_remove(struct platform_device *pdev)
{
struct omap_rng_dev *priv = platform_get_drvdata(pdev);
- hwrng_unregister(&priv->rng);
priv->pdata->cleanup(priv);
diff --git a/drivers/char/hw_random/powernv-rng.c b/drivers/char/hw_random/powernv-rng.c
index f2e8272e276a..8da1d7917bdc 100644
--- a/drivers/char/hw_random/powernv-rng.c
+++ b/drivers/char/hw_random/powernv-rng.c
@@ -33,18 +33,11 @@ static struct hwrng powernv_hwrng = {
.read = powernv_rng_read,
};
-static int powernv_rng_remove(struct platform_device *pdev)
-{
- hwrng_unregister(&powernv_hwrng);
-
- return 0;
-}
-
static int powernv_rng_probe(struct platform_device *pdev)
{
int rc;
- rc = hwrng_register(&powernv_hwrng);
+ rc = devm_hwrng_register(&pdev->dev, &powernv_hwrng);
if (rc) {
/* We only register one device, ignore any others */
if (rc == -EEXIST)
@@ -70,7 +63,6 @@ static struct platform_driver powernv_rng_driver = {
.of_match_table = powernv_rng_match,
},
.probe = powernv_rng_probe,
- .remove = powernv_rng_remove,
};
module_platform_driver(powernv_rng_driver);
diff --git a/drivers/char/hw_random/st-rng.c b/drivers/char/hw_random/st-rng.c
index bd6a98b3479b..863448360a7d 100644
--- a/drivers/char/hw_random/st-rng.c
+++ b/drivers/char/hw_random/st-rng.c
@@ -102,7 +102,7 @@ static int st_rng_probe(struct platform_device *pdev)
dev_set_drvdata(&pdev->dev, ddata);
- ret = hwrng_register(&ddata->ops);
+ ret = devm_hwrng_register(&pdev->dev, &ddata->ops);
if (ret) {
dev_err(&pdev->dev, "Failed to register HW RNG\n");
clk_disable_unprepare(clk);
@@ -118,8 +118,6 @@ static int st_rng_remove(struct platform_device *pdev)
{
struct st_rng_data *ddata = dev_get_drvdata(&pdev->dev);
- hwrng_unregister(&ddata->ops);
-
clk_disable_unprepare(ddata->clk);
return 0;
diff --git a/drivers/char/hw_random/xgene-rng.c b/drivers/char/hw_random/xgene-rng.c
index 8c6f9f63da5e..7e568db87ae2 100644
--- a/drivers/char/hw_random/xgene-rng.c
+++ b/drivers/char/hw_random/xgene-rng.c
@@ -361,7 +361,7 @@ static int xgene_rng_probe(struct platform_device *pdev)
xgene_rng_func.priv = (unsigned long) ctx;
- rc = hwrng_register(&xgene_rng_func);
+ rc = devm_hwrng_register(&pdev->dev, &xgene_rng_func);
if (rc) {
dev_err(&pdev->dev, "RNG registering failed error %d\n", rc);
if (!IS_ERR(ctx->clk))
@@ -375,7 +375,6 @@ static int xgene_rng_probe(struct platform_device *pdev)
rc);
if (!IS_ERR(ctx->clk))
clk_disable_unprepare(ctx->clk);
- hwrng_unregister(&xgene_rng_func);
return rc;
}
@@ -392,7 +391,6 @@ static int xgene_rng_remove(struct platform_device *pdev)
dev_err(&pdev->dev, "RNG init wakeup failed error %d\n", rc);
if (!IS_ERR(ctx->clk))
clk_disable_unprepare(ctx->clk);
- hwrng_unregister(&xgene_rng_func);
return rc;
}
--
2.20.1
^ permalink raw reply related
* Re: [PATCH] hwrng: Use device-managed registration API
From: Łukasz Stelmach @ 2019-07-25 8:25 UTC (permalink / raw)
To: Chuhong Yuan
Cc: Alexandre Belloni, Deepak Saxena, Herbert Xu, Arnd Bergmann,
Greg Kroah-Hartman, linux-kernel, Nicolas Ferre,
Krzysztof Kozlowski, Patrice Chotard, linux-samsung-soc,
Ludovic Desroches, Kukjin Kim, Paul Mackerras, Matt Mackall,
linuxppc-dev, linux-arm-kernel, linux-crypto
In-Reply-To: <20190725080155.19875-1-hslester96@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 8940 bytes --]
It was <2019-07-25 czw 10:01>, when Chuhong Yuan wrote:
> Use devm_hwrng_register to simplify the implementation.
> Manual unregistration and some remove functions can be
> removed now.
>
> Signed-off-by: Chuhong Yuan <hslester96@gmail.com>
> ---
> drivers/char/hw_random/atmel-rng.c | 3 +--
> drivers/char/hw_random/cavium-rng-vf.c | 11 +----------
> drivers/char/hw_random/exynos-trng.c | 3 +--
> drivers/char/hw_random/n2-drv.c | 4 +---
> drivers/char/hw_random/nomadik-rng.c | 3 +--
> drivers/char/hw_random/omap-rng.c | 3 +--
> drivers/char/hw_random/powernv-rng.c | 10 +---------
> drivers/char/hw_random/st-rng.c | 4 +---
> drivers/char/hw_random/xgene-rng.c | 4 +---
> 9 files changed, 9 insertions(+), 36 deletions(-)
>
Acked-by: Łukasz Stelmach <l.stelmach@samsung.com>
> diff --git a/drivers/char/hw_random/atmel-rng.c b/drivers/char/hw_random/atmel-rng.c
> index 433426242b87..e55705745d5e 100644
> --- a/drivers/char/hw_random/atmel-rng.c
> +++ b/drivers/char/hw_random/atmel-rng.c
> @@ -86,7 +86,7 @@ static int atmel_trng_probe(struct platform_device *pdev)
> trng->rng.name = pdev->name;
> trng->rng.read = atmel_trng_read;
>
> - ret = hwrng_register(&trng->rng);
> + ret = devm_hwrng_register(&pdev->dev, &trng->rng);
> if (ret)
> goto err_register;
>
> @@ -103,7 +103,6 @@ static int atmel_trng_remove(struct platform_device *pdev)
> {
> struct atmel_trng *trng = platform_get_drvdata(pdev);
>
> - hwrng_unregister(&trng->rng);
>
> atmel_trng_disable(trng);
> clk_disable_unprepare(trng->clk);
> diff --git a/drivers/char/hw_random/cavium-rng-vf.c b/drivers/char/hw_random/cavium-rng-vf.c
> index 2d1352b67168..3de4a6a443ef 100644
> --- a/drivers/char/hw_random/cavium-rng-vf.c
> +++ b/drivers/char/hw_random/cavium-rng-vf.c
> @@ -67,7 +67,7 @@ static int cavium_rng_probe_vf(struct pci_dev *pdev,
>
> pci_set_drvdata(pdev, rng);
>
> - ret = hwrng_register(&rng->ops);
> + ret = devm_hwrng_register(&pdev->dev, &rng->ops);
> if (ret) {
> dev_err(&pdev->dev, "Error registering device as HWRNG.\n");
> return ret;
> @@ -76,14 +76,6 @@ static int cavium_rng_probe_vf(struct pci_dev *pdev,
> return 0;
> }
>
> -/* Remove the VF */
> -static void cavium_rng_remove_vf(struct pci_dev *pdev)
> -{
> - struct cavium_rng *rng;
> -
> - rng = pci_get_drvdata(pdev);
> - hwrng_unregister(&rng->ops);
> -}
>
> static const struct pci_device_id cavium_rng_vf_id_table[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xa033), 0, 0, 0},
> @@ -95,7 +87,6 @@ static struct pci_driver cavium_rng_vf_driver = {
> .name = "cavium_rng_vf",
> .id_table = cavium_rng_vf_id_table,
> .probe = cavium_rng_probe_vf,
> - .remove = cavium_rng_remove_vf,
> };
> module_pci_driver(cavium_rng_vf_driver);
>
> diff --git a/drivers/char/hw_random/exynos-trng.c b/drivers/char/hw_random/exynos-trng.c
> index 94235761955c..b4b52ab23b6b 100644
> --- a/drivers/char/hw_random/exynos-trng.c
> +++ b/drivers/char/hw_random/exynos-trng.c
> @@ -153,7 +153,7 @@ static int exynos_trng_probe(struct platform_device *pdev)
> goto err_clock;
> }
>
> - ret = hwrng_register(&trng->rng);
> + ret = devm_hwrng_register(&pdev->dev, &trng->rng);
> if (ret) {
> dev_err(&pdev->dev, "Could not register hwrng device.\n");
> goto err_register;
> @@ -179,7 +179,6 @@ static int exynos_trng_remove(struct platform_device *pdev)
> {
> struct exynos_trng_dev *trng = platform_get_drvdata(pdev);
>
> - hwrng_unregister(&trng->rng);
> clk_disable_unprepare(trng->clk);
>
> pm_runtime_put_sync(&pdev->dev);
> diff --git a/drivers/char/hw_random/n2-drv.c b/drivers/char/hw_random/n2-drv.c
> index d4cab105796f..2d256b3470db 100644
> --- a/drivers/char/hw_random/n2-drv.c
> +++ b/drivers/char/hw_random/n2-drv.c
> @@ -768,7 +768,7 @@ static int n2rng_probe(struct platform_device *op)
> np->hwrng.data_read = n2rng_data_read;
> np->hwrng.priv = (unsigned long) np;
>
> - err = hwrng_register(&np->hwrng);
> + err = devm_hwrng_register(&pdev->dev, &np->hwrng);
> if (err)
> goto out_hvapi_unregister;
>
> @@ -793,8 +793,6 @@ static int n2rng_remove(struct platform_device *op)
>
> cancel_delayed_work_sync(&np->work);
>
> - hwrng_unregister(&np->hwrng);
> -
> sun4v_hvapi_unregister(HV_GRP_RNG);
>
> return 0;
> diff --git a/drivers/char/hw_random/nomadik-rng.c b/drivers/char/hw_random/nomadik-rng.c
> index fc0f6b0cb80d..74ed29f42e4f 100644
> --- a/drivers/char/hw_random/nomadik-rng.c
> +++ b/drivers/char/hw_random/nomadik-rng.c
> @@ -57,7 +57,7 @@ static int nmk_rng_probe(struct amba_device *dev, const struct amba_id *id)
> if (!base)
> goto out_release;
> nmk_rng.priv = (unsigned long)base;
> - ret = hwrng_register(&nmk_rng);
> + ret = devm_hwrng_register(&dev->dev, &nmk_rng);
> if (ret)
> goto out_release;
> return 0;
> @@ -71,7 +71,6 @@ static int nmk_rng_probe(struct amba_device *dev, const struct amba_id *id)
>
> static int nmk_rng_remove(struct amba_device *dev)
> {
> - hwrng_unregister(&nmk_rng);
> amba_release_regions(dev);
> clk_disable(rng_clk);
> return 0;
> diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c
> index e9b6ac61fb7f..b27f39688b5e 100644
> --- a/drivers/char/hw_random/omap-rng.c
> +++ b/drivers/char/hw_random/omap-rng.c
> @@ -500,7 +500,7 @@ static int omap_rng_probe(struct platform_device *pdev)
> if (ret)
> goto err_register;
>
> - ret = hwrng_register(&priv->rng);
> + ret = devm_hwrng_register(&pdev->dev, &priv->rng);
> if (ret)
> goto err_register;
>
> @@ -525,7 +525,6 @@ static int omap_rng_remove(struct platform_device *pdev)
> {
> struct omap_rng_dev *priv = platform_get_drvdata(pdev);
>
> - hwrng_unregister(&priv->rng);
>
> priv->pdata->cleanup(priv);
>
> diff --git a/drivers/char/hw_random/powernv-rng.c b/drivers/char/hw_random/powernv-rng.c
> index f2e8272e276a..8da1d7917bdc 100644
> --- a/drivers/char/hw_random/powernv-rng.c
> +++ b/drivers/char/hw_random/powernv-rng.c
> @@ -33,18 +33,11 @@ static struct hwrng powernv_hwrng = {
> .read = powernv_rng_read,
> };
>
> -static int powernv_rng_remove(struct platform_device *pdev)
> -{
> - hwrng_unregister(&powernv_hwrng);
> -
> - return 0;
> -}
> -
> static int powernv_rng_probe(struct platform_device *pdev)
> {
> int rc;
>
> - rc = hwrng_register(&powernv_hwrng);
> + rc = devm_hwrng_register(&pdev->dev, &powernv_hwrng);
> if (rc) {
> /* We only register one device, ignore any others */
> if (rc == -EEXIST)
> @@ -70,7 +63,6 @@ static struct platform_driver powernv_rng_driver = {
> .of_match_table = powernv_rng_match,
> },
> .probe = powernv_rng_probe,
> - .remove = powernv_rng_remove,
> };
> module_platform_driver(powernv_rng_driver);
>
> diff --git a/drivers/char/hw_random/st-rng.c b/drivers/char/hw_random/st-rng.c
> index bd6a98b3479b..863448360a7d 100644
> --- a/drivers/char/hw_random/st-rng.c
> +++ b/drivers/char/hw_random/st-rng.c
> @@ -102,7 +102,7 @@ static int st_rng_probe(struct platform_device *pdev)
>
> dev_set_drvdata(&pdev->dev, ddata);
>
> - ret = hwrng_register(&ddata->ops);
> + ret = devm_hwrng_register(&pdev->dev, &ddata->ops);
> if (ret) {
> dev_err(&pdev->dev, "Failed to register HW RNG\n");
> clk_disable_unprepare(clk);
> @@ -118,8 +118,6 @@ static int st_rng_remove(struct platform_device *pdev)
> {
> struct st_rng_data *ddata = dev_get_drvdata(&pdev->dev);
>
> - hwrng_unregister(&ddata->ops);
> -
> clk_disable_unprepare(ddata->clk);
>
> return 0;
> diff --git a/drivers/char/hw_random/xgene-rng.c b/drivers/char/hw_random/xgene-rng.c
> index 8c6f9f63da5e..7e568db87ae2 100644
> --- a/drivers/char/hw_random/xgene-rng.c
> +++ b/drivers/char/hw_random/xgene-rng.c
> @@ -361,7 +361,7 @@ static int xgene_rng_probe(struct platform_device *pdev)
>
> xgene_rng_func.priv = (unsigned long) ctx;
>
> - rc = hwrng_register(&xgene_rng_func);
> + rc = devm_hwrng_register(&pdev->dev, &xgene_rng_func);
> if (rc) {
> dev_err(&pdev->dev, "RNG registering failed error %d\n", rc);
> if (!IS_ERR(ctx->clk))
> @@ -375,7 +375,6 @@ static int xgene_rng_probe(struct platform_device *pdev)
> rc);
> if (!IS_ERR(ctx->clk))
> clk_disable_unprepare(ctx->clk);
> - hwrng_unregister(&xgene_rng_func);
> return rc;
> }
>
> @@ -392,7 +391,6 @@ static int xgene_rng_remove(struct platform_device *pdev)
> dev_err(&pdev->dev, "RNG init wakeup failed error %d\n", rc);
> if (!IS_ERR(ctx->clk))
> clk_disable_unprepare(ctx->clk);
> - hwrng_unregister(&xgene_rng_func);
>
> return rc;
> }
--
Łukasz Stelmach
Samsung R&D Institute Poland
Samsung Electronics
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 487 bytes --]
^ permalink raw reply
* Re: [PATCH v2] powerpc: slightly improve cache helpers
From: Segher Boessenkool @ 2019-07-25 13:22 UTC (permalink / raw)
To: Michael Ellerman
Cc: linux-kernel, clang-built-linux, Paul Mackerras,
Nathan Chancellor, linuxppc-dev
In-Reply-To: <875znt7izy.fsf@concordia.ellerman.id.au>
On Tue, Jul 23, 2019 at 09:21:53AM +1000, Michael Ellerman wrote:
> Segher Boessenkool <segher@kernel.crashing.org> writes:
> >> can use both RA and RB to compute the address, rather than us forcing RA
> >> to 0.
> >>
> >> But at least with my compiler here (GCC 8 vintage) I don't actually see
> >> GCC ever using both GPRs even with the patch. Or at least, there's no
> >> difference before/after the patch as far as I can see.
> >
> > The benefit is small, certainly.
>
> Zero is small, but I guess some things are smaller? :P
Heh. 0 out of 12 is small.
It actually is quite easy to do trigger the macros to generate two-reg
dcb* instructions; but all the places where that is especially useful,
in loops for example, already use hand-written assembler code (and yes,
using two-reg forms).
You probably will not want to write those routines as plain C ever
given how important those are for performance (memset, clear-a-page),
so the dcb* macros won't ever be very hot, oh well.
> >> So my inclination is to revert the original patch. We can try again in a
> >> few years :D
> >>
> >> Thoughts?
> >
> > I think you should give the clang people time to figure out what is
> > going on.
>
> Yeah fair enough, will wait and see what their diagnosis is.
Thanks!
Segher
^ permalink raw reply
* Re: [alsa-devel] [PATCH 08/10] ASoC: dt-bindings: Document fcomb_mode property
From: Nicolin Chen @ 2019-07-25 17:39 UTC (permalink / raw)
To: Daniel Baluta
Cc: Linux-ALSA, Fabio Estevam, Pengutronix Kernel Team, Timur Tabi,
Xiubo Li, Daniel Baluta, S.j. Wang, Angus Ainslie (Purism),
Takashi Iwai, Linux Kernel Mailing List, Mark Brown, dl-linux-imx,
Viorel Suman, linuxppc-dev, Lucas Stach
In-Reply-To: <CAEnQRZBW7LNZ7=c_h_ef4ZDcbFzEt61h4VAJSLo2Fb80kBqtpw@mail.gmail.com>
On Thu, Jul 25, 2019 at 09:02:22AM +0300, Daniel Baluta wrote:
> On Thu, Jul 25, 2019 at 2:22 AM Nicolin Chen <nicoleotsuka@gmail.com> wrote:
> >
> > On Mon, Jul 22, 2019 at 03:48:31PM +0300, Daniel Baluta wrote:
> > > This allows combining multiple-data-line FIFOs into a
> > > single-data-line FIFO.
> > >
> > > Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
> > > ---
> > > Documentation/devicetree/bindings/sound/fsl-sai.txt | 4 ++++
> >
> > This should be sent to devicetree mail-list also.
> >
> > > 1 file changed, 4 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > > index 59f4d965a5fb..ca27afd840ba 100644
> > > --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > > +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > > @@ -54,6 +54,10 @@ Optional properties:
> > > represents first data line, bit 1 represents second
> > > data line and so on. Data line is enabled if
> > > corresponding bit is set to 1.
> > > + - fsl,fcomb_mode : list of two integers (first for RX, second for TX)
> > > + representing FIFO combine mode. Possible values for
> > > + combined mode are: 0 - disabled, 1 - Rx/Tx from shift
> > > + registers, 2 - Rx/Tx by software, 3 - both.
> >
> > Looks like a software configuration to me, instead of a device
> > property. Is this configurable by user case, or hard-coded by
> > SoC/hardware design?
>
> Indeed this is a software configuration and configurable by user case.
> Will think of a another way to specify it.
Yea, it needs to be put somewhere else other than devicetree.
Not sure sysfs is a good approach for ASoC components or can
be done via amixer control.
^ permalink raw reply
* Re: [RFC PATCH 00/10] implement KASLR for powerpc/fsl_booke/32
From: Kees Cook @ 2019-07-25 19:58 UTC (permalink / raw)
To: Jason Yan
Cc: wangkefeng.wang, kernel-hardening, thunder.leizhen, linux-kernel,
npiggin, jingxiangfeng, diana.craciun, paulus, fanchengyang,
linuxppc-dev, yebin10
In-Reply-To: <e6ad41bc-5d5a-cf3f-b308-e1863b4fef99@huawei.com>
On Thu, Jul 25, 2019 at 03:16:28PM +0800, Jason Yan wrote:
> Hi all, any comments?
I'm a fan of it, but I don't know ppc internals well enough to sanely
review the code. :) Some comments below on design...
>
>
> On 2019/7/17 16:06, Jason Yan wrote:
> > This series implements KASLR for powerpc/fsl_booke/32, as a security
> > feature that deters exploit attempts relying on knowledge of the location
> > of kernel internals.
> >
> > Since CONFIG_RELOCATABLE has already supported, what we need to do is
> > map or copy kernel to a proper place and relocate. Freescale Book-E
> > parts expect lowmem to be mapped by fixed TLB entries(TLB1). The TLB1
> > entries are not suitable to map the kernel directly in a randomized
> > region, so we chose to copy the kernel to a proper place and restart to
> > relocate.
> >
> > Entropy is derived from the banner and timer base, which will change every
> > build and boot. This not so much safe so additionally the bootloader may
> > pass entropy via the /chosen/kaslr-seed node in device tree.
Good: adding kaslr-seed is a good step here. Are there any x86-like
RDRAND or RDTSC to use? (Or maybe timer base here is similar to x86
RDTSC here?)
> >
> > We will use the first 512M of the low memory to randomize the kernel
> > image. The memory will be split in 64M zones. We will use the lower 8
> > bit of the entropy to decide the index of the 64M zone. Then we chose a
> > 16K aligned offset inside the 64M zone to put the kernel in.
Does this 16K granularity have any page table performance impact? My
understanding was that x86 needed to have 2M granularity due to its page
table layouts.
Why the 64M zones instead of just 16K granularity across the entire low
512M?
> >
> > KERNELBASE
> >
> > |--> 64M <--|
> > | |
> > +---------------+ +----------------+---------------+
> > | |....| |kernel| | |
> > +---------------+ +----------------+---------------+
> > | |
> > |-----> offset <-----|
> >
> > kimage_vaddr
> >
> > We also check if we will overlap with some areas like the dtb area, the
> > initrd area or the crashkernel area. If we cannot find a proper area,
> > kaslr will be disabled and boot from the original kernel.
> >
> > Jason Yan (10):
> > powerpc: unify definition of M_IF_NEEDED
> > powerpc: move memstart_addr and kernstart_addr to init-common.c
> > powerpc: introduce kimage_vaddr to store the kernel base
> > powerpc/fsl_booke/32: introduce create_tlb_entry() helper
> > powerpc/fsl_booke/32: introduce reloc_kernel_entry() helper
> > powerpc/fsl_booke/32: implement KASLR infrastructure
> > powerpc/fsl_booke/32: randomize the kernel image offset
> > powerpc/fsl_booke/kaslr: clear the original kernel if randomized
> > powerpc/fsl_booke/kaslr: support nokaslr cmdline parameter
> > powerpc/fsl_booke/kaslr: dump out kernel offset information on panic
Is there anything planned for other fixed-location things, like x86's
CONFIG_RANDOMIZE_MEMORY?
--
Kees Cook
^ permalink raw reply
* Re: [PATCH v2] powerpc: slightly improve cache helpers
From: Nick Desaulniers @ 2019-07-25 21:30 UTC (permalink / raw)
To: Segher Boessenkool
Cc: James Y Knight, LKML, clang-built-linux, Paul Mackerras,
Joel Stanley, Nathan Chancellor, linuxppc-dev, dja
In-Reply-To: <20190722175817.GE20882@gate.crashing.org>
On Mon, Jul 22, 2019 at 10:58 AM Segher Boessenkool
<segher@kernel.crashing.org> wrote:
>
> On Mon, Jul 22, 2019 at 10:21:07AM -0700, Nick Desaulniers wrote:
> > On Sun, Jul 21, 2019 at 11:19 PM Segher Boessenkool
> > <segher@kernel.crashing.org> wrote:
> > > On Sun, Jul 21, 2019 at 07:41:40PM -0700, Nathan Chancellor wrote:
> > > > On Sun, Jul 21, 2019 at 01:01:50PM -0500, Segher Boessenkool wrote:
> > > > > On Sun, Jul 21, 2019 at 12:58:46AM -0700, Nathan Chancellor wrote:
> > > > > > 0000017c clear_user_page:
> > > > > > 17c: 94 21 ff f0 stwu 1, -16(1)
> > > > > > 180: 38 80 00 80 li 4, 128
> > > > > > 184: 38 63 ff e0 addi 3, 3, -32
> > > > > > 188: 7c 89 03 a6 mtctr 4
> > > > > > 18c: 38 81 00 0f addi 4, 1, 15
> > > > > > 190: 8c c3 00 20 lbzu 6, 32(3)
> > > > > > 194: 98 c1 00 0f stb 6, 15(1)
> > > > > > 198: 7c 00 27 ec dcbz 0, 4
> > > > > > 19c: 42 00 ff f4 bdnz .+65524
> > > > >
> > > > > Uh, yeah, well, I have no idea what clang tried here, but that won't
> > > > > work. It's copying a byte from each target cache line to the stack,
> > > > > and then does clears the cache line containing that byte on the stack.
> > > > >
> > > > > I *guess* this is about "Z" and not about "%y", but you'll have to ask
> > > > > the clang people.
> > > > >
> > > > > Or it may be that they do not treat inline asm operands as lvalues
> > > > > properly? That rings some bells. Yeah that looks like it.
> > >
> > > The code is
> > > __asm__ __volatile__ ("dcbz %y0" : : "Z"(*(u8 *)addr) : "memory");
> > >
> > > so yeah it looks like clang took that *(u8 *)addr as rvalue, and
> > > stored that in stack, and then used *that* as memory.
> >
> > What's the %y modifier supposed to mean here?
>
> It prints a memory address for an indexed operand.
>
> If you write just "%0" it prints addresses that are a single register
> as "0(r3)" instead of "0,r3". Some instructions do not allow offset
> form.
>
> > addr is in the list of
> > inputs, so what's wrong with using it as an rvalue?
>
> It seems to use *(u8 *)addr as rvalue. Asm operands are lvalues. It
> matters a lot for memory operands.
Hmm...not sure that's specified behavior. Anyways, I've filed:
https://bugs.llvm.org/show_bug.cgi?id=42762
to see if folks more familiar with LLVM's ppc backend have some more thoughts.
I recommend considering reverting commit 6c5875843b87 ("powerpc:
slightly improve cache helpers") until the issue is resolved in clang,
otherwise I'll probably just turn off our CI builds of PPC32 for the
time being.
--
Thanks,
~Nick Desaulniers
^ permalink raw reply
* Freeze on ppc32 MPC8248 board with 5.2 kernel
From: Doug Crawford @ 2019-07-25 22:30 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 555 bytes --]
We have a ppc32 MPC8248 board that is working perfectly with the 4.19
kernel.
We have noticed two issues with the 5.2 kernel:
1) If the new CONFIG_PPC_KUAP (kernel userspace access protection) is
enabled the kernel freezes right after initializing all the drivers and
just before starting /sbin/init.
2) If CONFIG_PPC_KUAP is disabled the system starts up, but any user space
program will hang indefinitely after calling the GCC atomic
"__sync_bool_compare_and_swap". This happens when nginx starts. The same
nginx binary works fine on a 4.19 kernel.
[-- Attachment #2: Type: text/html, Size: 647 bytes --]
^ permalink raw reply
* [PATCH v3 0/2] Memory unplug fixes for radix guests
From: Bharata B Rao @ 2019-07-26 5:04 UTC (permalink / raw)
To: linuxppc-dev; +Cc: sraithal, aneesh.kumar, npiggin, Bharata B Rao
A couple of fixes to memory unplug on radix guests.
1/2 was being posted individually earlier and 2/2 is included with it
in this series.
1/2 v2 was last posted at
https://lists.ozlabs.org/pipermail/linuxppc-dev/2019-July/193668.html
Bharata B Rao (2):
powerpc/mm/radix: Fix PTE/PMD fragment count for early page table
mappings
powerpc/mm/radix: Free PUD table when freeing pagetable
arch/powerpc/include/asm/book3s/64/pgalloc.h | 11 ++-
arch/powerpc/include/asm/book3s/64/radix.h | 1 +
arch/powerpc/include/asm/sparsemem.h | 1 +
arch/powerpc/mm/book3s64/pgtable.c | 31 +++++++-
arch/powerpc/mm/book3s64/radix_pgtable.c | 84 +++++++++++++++++++-
arch/powerpc/mm/mem.c | 5 ++
arch/powerpc/mm/pgtable-frag.c | 9 ++-
7 files changed, 135 insertions(+), 7 deletions(-)
--
2.21.0
^ permalink raw reply
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