* [PATCH 5/5] binfmt_elf_fdpic: remove the set_fs(KERNEL_DS) in elf_fdpic_core_dump
From: Christoph Hellwig @ 2020-04-27 20:06 UTC (permalink / raw)
To: Andrew Morton, Alexander Viro
Cc: Arnd Bergmann, Linus Torvalds, linux-kernel, Jeremy Kerr,
linux-fsdevel, linuxppc-dev, Eric W . Biederman
In-Reply-To: <20200427200626.1622060-1-hch@lst.de>
There is no logic in elf_fdpic_core_dump itself or in the various arch
helpers called from it which use uaccess routines on kernel pointers
except for the file writes thate are nicely encapsulated by using
__kernel_write in dump_emit.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
fs/binfmt_elf_fdpic.c | 31 ++++++++++++-------------------
1 file changed, 12 insertions(+), 19 deletions(-)
diff --git a/fs/binfmt_elf_fdpic.c b/fs/binfmt_elf_fdpic.c
index 240f666635437..c62c17a5c34a9 100644
--- a/fs/binfmt_elf_fdpic.c
+++ b/fs/binfmt_elf_fdpic.c
@@ -1549,7 +1549,6 @@ static int elf_fdpic_core_dump(struct coredump_params *cprm)
{
#define NUM_NOTES 6
int has_dumped = 0;
- mm_segment_t fs;
int segs;
int i;
struct vm_area_struct *vma;
@@ -1678,9 +1677,6 @@ static int elf_fdpic_core_dump(struct coredump_params *cprm)
"LINUX", ELF_CORE_XFPREG_TYPE, sizeof(*xfpu), xfpu);
#endif
- fs = get_fs();
- set_fs(KERNEL_DS);
-
offset += sizeof(*elf); /* Elf header */
offset += segs * sizeof(struct elf_phdr); /* Program headers */
@@ -1695,7 +1691,7 @@ static int elf_fdpic_core_dump(struct coredump_params *cprm)
phdr4note = kmalloc(sizeof(*phdr4note), GFP_KERNEL);
if (!phdr4note)
- goto end_coredump;
+ goto cleanup;
fill_elf_note_phdr(phdr4note, sz, offset);
offset += sz;
@@ -1711,17 +1707,17 @@ static int elf_fdpic_core_dump(struct coredump_params *cprm)
if (e_phnum == PN_XNUM) {
shdr4extnum = kmalloc(sizeof(*shdr4extnum), GFP_KERNEL);
if (!shdr4extnum)
- goto end_coredump;
+ goto cleanup;
fill_extnum_info(elf, shdr4extnum, e_shoff, segs);
}
offset = dataoff;
if (!dump_emit(cprm, elf, sizeof(*elf)))
- goto end_coredump;
+ goto cleanup;
if (!dump_emit(cprm, phdr4note, sizeof(*phdr4note)))
- goto end_coredump;
+ goto cleanup;
/* write program headers for segments dump */
for (vma = current->mm->mmap; vma; vma = vma->vm_next) {
@@ -1745,16 +1741,16 @@ static int elf_fdpic_core_dump(struct coredump_params *cprm)
phdr.p_align = ELF_EXEC_PAGESIZE;
if (!dump_emit(cprm, &phdr, sizeof(phdr)))
- goto end_coredump;
+ goto cleanup;
}
if (!elf_core_write_extra_phdrs(cprm, offset))
- goto end_coredump;
+ goto cleanup;
/* write out the notes section */
for (i = 0; i < numnote; i++)
if (!writenote(notes + i, cprm))
- goto end_coredump;
+ goto cleanup;
/* write out the thread status notes section */
list_for_each(t, &thread_list) {
@@ -1763,21 +1759,21 @@ static int elf_fdpic_core_dump(struct coredump_params *cprm)
for (i = 0; i < tmp->num_notes; i++)
if (!writenote(&tmp->notes[i], cprm))
- goto end_coredump;
+ goto cleanup;
}
if (!dump_skip(cprm, dataoff - cprm->pos))
- goto end_coredump;
+ goto cleanup;
if (!elf_fdpic_dump_segments(cprm))
- goto end_coredump;
+ goto cleanup;
if (!elf_core_write_extra_data(cprm))
- goto end_coredump;
+ goto cleanup;
if (e_phnum == PN_XNUM) {
if (!dump_emit(cprm, shdr4extnum, sizeof(*shdr4extnum)))
- goto end_coredump;
+ goto cleanup;
}
if (cprm->file->f_pos != offset) {
@@ -1787,9 +1783,6 @@ static int elf_fdpic_core_dump(struct coredump_params *cprm)
cprm->file->f_pos, offset);
}
-end_coredump:
- set_fs(fs);
-
cleanup:
while (!list_empty(&thread_list)) {
struct list_head *tmp = thread_list.next;
--
2.26.1
^ permalink raw reply related
* [PATCH 4/5] binfmt_elf: remove the set_fs(KERNEL_DS) in elf_core_dump
From: Christoph Hellwig @ 2020-04-27 20:06 UTC (permalink / raw)
To: Andrew Morton, Alexander Viro
Cc: Arnd Bergmann, Linus Torvalds, linux-kernel, Jeremy Kerr,
linux-fsdevel, linuxppc-dev, Eric W . Biederman
In-Reply-To: <20200427200626.1622060-1-hch@lst.de>
There is no logic in elf_core_dump itself or in the various arch helpers
called from it which use uaccess routines on kernel pointers except for
the file writes thate are nicely encapsulated by using __kernel_write in
dump_emit.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
fs/binfmt_elf.c | 40 +++++++++++++---------------------------
1 file changed, 13 insertions(+), 27 deletions(-)
diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c
index a1f57e20c3cf2..b29b84595b09f 100644
--- a/fs/binfmt_elf.c
+++ b/fs/binfmt_elf.c
@@ -1355,7 +1355,6 @@ static unsigned long vma_dump_size(struct vm_area_struct *vma,
vma->vm_pgoff == 0 && (vma->vm_flags & VM_READ)) {
u32 __user *header = (u32 __user *) vma->vm_start;
u32 word;
- mm_segment_t fs = get_fs();
/*
* Doing it this way gets the constant folded by GCC.
*/
@@ -1368,14 +1367,8 @@ static unsigned long vma_dump_size(struct vm_area_struct *vma,
magic.elfmag[EI_MAG1] = ELFMAG1;
magic.elfmag[EI_MAG2] = ELFMAG2;
magic.elfmag[EI_MAG3] = ELFMAG3;
- /*
- * Switch to the user "segment" for get_user(),
- * then put back what elf_core_dump() had in place.
- */
- set_fs(USER_DS);
if (unlikely(get_user(word, header)))
word = 0;
- set_fs(fs);
if (word == magic.cmp)
return PAGE_SIZE;
}
@@ -2183,7 +2176,6 @@ static void fill_extnum_info(struct elfhdr *elf, struct elf_shdr *shdr4extnum,
static int elf_core_dump(struct coredump_params *cprm)
{
int has_dumped = 0;
- mm_segment_t fs;
int segs, i;
size_t vma_data_size = 0;
struct vm_area_struct *vma, *gate_vma;
@@ -2236,9 +2228,6 @@ static int elf_core_dump(struct coredump_params *cprm)
has_dumped = 1;
- fs = get_fs();
- set_fs(KERNEL_DS);
-
offset += sizeof(elf); /* Elf header */
offset += segs * sizeof(struct elf_phdr); /* Program headers */
@@ -2250,7 +2239,7 @@ static int elf_core_dump(struct coredump_params *cprm)
phdr4note = kmalloc(sizeof(*phdr4note), GFP_KERNEL);
if (!phdr4note)
- goto end_coredump;
+ goto cleanup;
fill_elf_note_phdr(phdr4note, sz, offset);
offset += sz;
@@ -2265,7 +2254,7 @@ static int elf_core_dump(struct coredump_params *cprm)
vma_filesz = kvmalloc(array_size(sizeof(*vma_filesz), (segs - 1)),
GFP_KERNEL);
if (!vma_filesz)
- goto end_coredump;
+ goto cleanup;
for (i = 0, vma = first_vma(current, gate_vma); vma != NULL;
vma = next_vma(vma, gate_vma)) {
@@ -2283,17 +2272,17 @@ static int elf_core_dump(struct coredump_params *cprm)
if (e_phnum == PN_XNUM) {
shdr4extnum = kmalloc(sizeof(*shdr4extnum), GFP_KERNEL);
if (!shdr4extnum)
- goto end_coredump;
+ goto cleanup;
fill_extnum_info(&elf, shdr4extnum, e_shoff, segs);
}
offset = dataoff;
if (!dump_emit(cprm, &elf, sizeof(elf)))
- goto end_coredump;
+ goto cleanup;
if (!dump_emit(cprm, phdr4note, sizeof(*phdr4note)))
- goto end_coredump;
+ goto cleanup;
/* Write program headers for segments dump */
for (i = 0, vma = first_vma(current, gate_vma); vma != NULL;
@@ -2315,22 +2304,22 @@ static int elf_core_dump(struct coredump_params *cprm)
phdr.p_align = ELF_EXEC_PAGESIZE;
if (!dump_emit(cprm, &phdr, sizeof(phdr)))
- goto end_coredump;
+ goto cleanup;
}
if (!elf_core_write_extra_phdrs(cprm, offset))
- goto end_coredump;
+ goto cleanup;
/* write out the notes section */
if (!write_note_info(&info, cprm))
- goto end_coredump;
+ goto cleanup;
if (elf_coredump_extra_notes_write(cprm))
- goto end_coredump;
+ goto cleanup;
/* Align to page */
if (!dump_skip(cprm, dataoff - cprm->pos))
- goto end_coredump;
+ goto cleanup;
for (i = 0, vma = first_vma(current, gate_vma); vma != NULL;
vma = next_vma(vma, gate_vma)) {
@@ -2352,22 +2341,19 @@ static int elf_core_dump(struct coredump_params *cprm)
} else
stop = !dump_skip(cprm, PAGE_SIZE);
if (stop)
- goto end_coredump;
+ goto cleanup;
}
}
dump_truncate(cprm);
if (!elf_core_write_extra_data(cprm))
- goto end_coredump;
+ goto cleanup;
if (e_phnum == PN_XNUM) {
if (!dump_emit(cprm, shdr4extnum, sizeof(*shdr4extnum)))
- goto end_coredump;
+ goto cleanup;
}
-end_coredump:
- set_fs(fs);
-
cleanup:
free_note_info(&info);
kfree(shdr4extnum);
--
2.26.1
^ permalink raw reply related
* [PATCH 3/5] binfmt_elf: remove the set_fs in fill_siginfo_note
From: Christoph Hellwig @ 2020-04-27 20:06 UTC (permalink / raw)
To: Andrew Morton, Alexander Viro
Cc: Arnd Bergmann, Linus Torvalds, linux-kernel, Jeremy Kerr,
linux-fsdevel, linuxppc-dev, Eric W . Biederman
In-Reply-To: <20200427200626.1622060-1-hch@lst.de>
From: "Eric W. Biederman" <ebiederm@xmission.com>
The code in binfmt_elf.c is differnt from the rest of the code that
processes siginfo, as it sends siginfo from a kernel buffer to a file
rather than from kernel memory to userspace buffers. To remove it's
use of set_fs the code needs some different siginfo helpers.
Add the helper copy_siginfo_to_external to copy from the kernel's
internal siginfo layout to a buffer in the siginfo layout that
userspace expects.
Modify fill_siginfo_note to use copy_siginfo_to_external instead of
set_fs and copy_siginfo_to_user.
Update compat_binfmt_elf.c to use the previously added
copy_siginfo_to_external32 to handle the compat case.
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
fs/binfmt_elf.c | 5 +----
fs/compat_binfmt_elf.c | 2 +-
include/linux/signal.h | 8 ++++++++
3 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c
index 13f25e241ac46..a1f57e20c3cf2 100644
--- a/fs/binfmt_elf.c
+++ b/fs/binfmt_elf.c
@@ -1556,10 +1556,7 @@ static void fill_auxv_note(struct memelfnote *note, struct mm_struct *mm)
static void fill_siginfo_note(struct memelfnote *note, user_siginfo_t *csigdata,
const kernel_siginfo_t *siginfo)
{
- mm_segment_t old_fs = get_fs();
- set_fs(KERNEL_DS);
- copy_siginfo_to_user((user_siginfo_t __user *) csigdata, siginfo);
- set_fs(old_fs);
+ copy_siginfo_to_external(csigdata, siginfo);
fill_note(note, "CORE", NT_SIGINFO, sizeof(*csigdata), csigdata);
}
diff --git a/fs/compat_binfmt_elf.c b/fs/compat_binfmt_elf.c
index aaad4ca1217ef..fa0e24e1b7267 100644
--- a/fs/compat_binfmt_elf.c
+++ b/fs/compat_binfmt_elf.c
@@ -39,7 +39,7 @@
*/
#define user_long_t compat_long_t
#define user_siginfo_t compat_siginfo_t
-#define copy_siginfo_to_user copy_siginfo_to_user32
+#define copy_siginfo_to_external copy_siginfo_to_external32
/*
* The machine-dependent core note format types are defined in elfcore-compat.h,
diff --git a/include/linux/signal.h b/include/linux/signal.h
index 05bacd2ab1350..6bb1a3f0258c2 100644
--- a/include/linux/signal.h
+++ b/include/linux/signal.h
@@ -24,6 +24,14 @@ static inline void clear_siginfo(kernel_siginfo_t *info)
#define SI_EXPANSION_SIZE (sizeof(struct siginfo) - sizeof(struct kernel_siginfo))
+static inline void copy_siginfo_to_external(siginfo_t *to,
+ const kernel_siginfo_t *from)
+{
+ memcpy(to, from, sizeof(*from));
+ memset(((char *)to) + sizeof(struct kernel_siginfo), 0,
+ SI_EXPANSION_SIZE);
+}
+
int copy_siginfo_to_user(siginfo_t __user *to, const kernel_siginfo_t *from);
int copy_siginfo_from_user(kernel_siginfo_t *to, const siginfo_t __user *from);
--
2.26.1
^ permalink raw reply related
* [PATCH 2/5] signal: factor copy_siginfo_to_external32 from copy_siginfo_to_user32
From: Christoph Hellwig @ 2020-04-27 20:06 UTC (permalink / raw)
To: Andrew Morton, Alexander Viro
Cc: Arnd Bergmann, Linus Torvalds, linux-kernel, Jeremy Kerr,
linux-fsdevel, linuxppc-dev, Eric W . Biederman
In-Reply-To: <20200427200626.1622060-1-hch@lst.de>
From: "Eric W. Biederman" <ebiederm@xmission.com>
To remove the use of set_fs in the coredump code there needs to be a
way to convert a kernel siginfo to a userspace compat siginfo.
Call that function copy_siginfo_to_compat and factor it out of
copy_siginfo_to_user32.
The existence of x32 complicates this code. On x32 SIGCHLD uses 64bit
times for utime and stime. As only SIGCHLD is affected and SIGCHLD
never causes a coredump I have avoided handling that case.
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
include/linux/compat.h | 2 +
kernel/signal.c | 113 ++++++++++++++++++++++-------------------
2 files changed, 62 insertions(+), 53 deletions(-)
diff --git a/include/linux/compat.h b/include/linux/compat.h
index 0480ba4db5929..adbfe8f688d92 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -402,6 +402,8 @@ long compat_get_bitmap(unsigned long *mask, const compat_ulong_t __user *umask,
unsigned long bitmap_size);
long compat_put_bitmap(compat_ulong_t __user *umask, unsigned long *mask,
unsigned long bitmap_size);
+void copy_siginfo_to_external32(struct compat_siginfo *to,
+ const struct kernel_siginfo *from);
int copy_siginfo_from_user32(kernel_siginfo_t *to, const struct compat_siginfo __user *from);
int copy_siginfo_to_user32(struct compat_siginfo __user *to, const kernel_siginfo_t *from);
int get_compat_sigevent(struct sigevent *event,
diff --git a/kernel/signal.c b/kernel/signal.c
index 284fc1600063b..244c69c4261e0 100644
--- a/kernel/signal.c
+++ b/kernel/signal.c
@@ -3235,94 +3235,101 @@ int copy_siginfo_from_user(kernel_siginfo_t *to, const siginfo_t __user *from)
}
#ifdef CONFIG_COMPAT
-int copy_siginfo_to_user32(struct compat_siginfo __user *to,
- const struct kernel_siginfo *from)
-#if defined(CONFIG_X86_X32_ABI) || defined(CONFIG_IA32_EMULATION)
+void copy_siginfo_to_external32(struct compat_siginfo *to,
+ const struct kernel_siginfo *from)
{
- return __copy_siginfo_to_user32(to, from, in_x32_syscall());
-}
-int __copy_siginfo_to_user32(struct compat_siginfo __user *to,
- const struct kernel_siginfo *from, bool x32_ABI)
-#endif
-{
- struct compat_siginfo new;
- memset(&new, 0, sizeof(new));
+ /*
+ * This function does not work properly for SIGCHLD on x32,
+ * but it does not need to as SIGCHLD never causes a coredump.
+ */
+ memset(to, 0, sizeof(*to));
- new.si_signo = from->si_signo;
- new.si_errno = from->si_errno;
- new.si_code = from->si_code;
+ to->si_signo = from->si_signo;
+ to->si_errno = from->si_errno;
+ to->si_code = from->si_code;
switch(siginfo_layout(from->si_signo, from->si_code)) {
case SIL_KILL:
- new.si_pid = from->si_pid;
- new.si_uid = from->si_uid;
+ to->si_pid = from->si_pid;
+ to->si_uid = from->si_uid;
break;
case SIL_TIMER:
- new.si_tid = from->si_tid;
- new.si_overrun = from->si_overrun;
- new.si_int = from->si_int;
+ to->si_tid = from->si_tid;
+ to->si_overrun = from->si_overrun;
+ to->si_int = from->si_int;
break;
case SIL_POLL:
- new.si_band = from->si_band;
- new.si_fd = from->si_fd;
+ to->si_band = from->si_band;
+ to->si_fd = from->si_fd;
break;
case SIL_FAULT:
- new.si_addr = ptr_to_compat(from->si_addr);
+ to->si_addr = ptr_to_compat(from->si_addr);
#ifdef __ARCH_SI_TRAPNO
- new.si_trapno = from->si_trapno;
+ to->si_trapno = from->si_trapno;
#endif
break;
case SIL_FAULT_MCEERR:
- new.si_addr = ptr_to_compat(from->si_addr);
+ to->si_addr = ptr_to_compat(from->si_addr);
#ifdef __ARCH_SI_TRAPNO
- new.si_trapno = from->si_trapno;
+ to->si_trapno = from->si_trapno;
#endif
- new.si_addr_lsb = from->si_addr_lsb;
+ to->si_addr_lsb = from->si_addr_lsb;
break;
case SIL_FAULT_BNDERR:
- new.si_addr = ptr_to_compat(from->si_addr);
+ to->si_addr = ptr_to_compat(from->si_addr);
#ifdef __ARCH_SI_TRAPNO
- new.si_trapno = from->si_trapno;
+ to->si_trapno = from->si_trapno;
#endif
- new.si_lower = ptr_to_compat(from->si_lower);
- new.si_upper = ptr_to_compat(from->si_upper);
+ to->si_lower = ptr_to_compat(from->si_lower);
+ to->si_upper = ptr_to_compat(from->si_upper);
break;
case SIL_FAULT_PKUERR:
- new.si_addr = ptr_to_compat(from->si_addr);
+ to->si_addr = ptr_to_compat(from->si_addr);
#ifdef __ARCH_SI_TRAPNO
- new.si_trapno = from->si_trapno;
+ to->si_trapno = from->si_trapno;
#endif
- new.si_pkey = from->si_pkey;
+ to->si_pkey = from->si_pkey;
break;
case SIL_CHLD:
- new.si_pid = from->si_pid;
- new.si_uid = from->si_uid;
- new.si_status = from->si_status;
-#ifdef CONFIG_X86_X32_ABI
- if (x32_ABI) {
- new._sifields._sigchld_x32._utime = from->si_utime;
- new._sifields._sigchld_x32._stime = from->si_stime;
- } else
-#endif
- {
- new.si_utime = from->si_utime;
- new.si_stime = from->si_stime;
- }
+ to->si_pid = from->si_pid;
+ to->si_uid = from->si_uid;
+ to->si_status = from->si_status;
+ to->si_utime = from->si_utime;
+ to->si_stime = from->si_stime;
break;
case SIL_RT:
- new.si_pid = from->si_pid;
- new.si_uid = from->si_uid;
- new.si_int = from->si_int;
+ to->si_pid = from->si_pid;
+ to->si_uid = from->si_uid;
+ to->si_int = from->si_int;
break;
case SIL_SYS:
- new.si_call_addr = ptr_to_compat(from->si_call_addr);
- new.si_syscall = from->si_syscall;
- new.si_arch = from->si_arch;
+ to->si_call_addr = ptr_to_compat(from->si_call_addr);
+ to->si_syscall = from->si_syscall;
+ to->si_arch = from->si_arch;
break;
}
+}
+int copy_siginfo_to_user32(struct compat_siginfo __user *to,
+ const struct kernel_siginfo *from)
+#if defined(CONFIG_X86_X32_ABI) || defined(CONFIG_IA32_EMULATION)
+{
+ return __copy_siginfo_to_user32(to, from, in_x32_syscall());
+}
+int __copy_siginfo_to_user32(struct compat_siginfo __user *to,
+ const struct kernel_siginfo *from, bool x32_ABI)
+#endif
+{
+ struct compat_siginfo new;
+
+ copy_siginfo_to_external32(&new, from);
+#ifdef CONFIG_X86_X32_ABI
+ if (x32_ABI && from->si_signo == SIGCHLD) {
+ new._sifields._sigchld_x32._utime = from->si_utime;
+ new._sifields._sigchld_x32._stime = from->si_stime;
+ }
+#endif
if (copy_to_user(to, &new, sizeof(struct compat_siginfo)))
return -EFAULT;
-
return 0;
}
--
2.26.1
^ permalink raw reply related
* [PATCH 1/5] powerpc/spufs: simplify spufs core dumping
From: Christoph Hellwig @ 2020-04-27 20:06 UTC (permalink / raw)
To: Andrew Morton, Alexander Viro
Cc: Arnd Bergmann, Linus Torvalds, linux-kernel, Jeremy Kerr,
linux-fsdevel, linuxppc-dev, Eric W . Biederman
In-Reply-To: <20200427200626.1622060-1-hch@lst.de>
Replace the coredump ->read method with a ->dump method that must call
dump_emit itself. That way we avoid a buffer allocation an messing with
set_fs() to call into code that is intended to deal with user buffers.
For the ->get case we can now use a small on-stack buffer and avoid
memory allocations as well.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Jeremy Kerr <jk@ozlabs.org>
---
arch/powerpc/platforms/cell/spufs/coredump.c | 87 ++----
arch/powerpc/platforms/cell/spufs/file.c | 273 ++++++++++---------
arch/powerpc/platforms/cell/spufs/spufs.h | 3 +-
3 files changed, 170 insertions(+), 193 deletions(-)
diff --git a/arch/powerpc/platforms/cell/spufs/coredump.c b/arch/powerpc/platforms/cell/spufs/coredump.c
index 8b3296b62f651..3b75e8f60609c 100644
--- a/arch/powerpc/platforms/cell/spufs/coredump.c
+++ b/arch/powerpc/platforms/cell/spufs/coredump.c
@@ -21,22 +21,6 @@
#include "spufs.h"
-static ssize_t do_coredump_read(int num, struct spu_context *ctx, void *buffer,
- size_t size, loff_t *off)
-{
- u64 data;
- int ret;
-
- if (spufs_coredump_read[num].read)
- return spufs_coredump_read[num].read(ctx, buffer, size, off);
-
- data = spufs_coredump_read[num].get(ctx);
- ret = snprintf(buffer, size, "0x%.16llx", data);
- if (ret >= size)
- return size;
- return ++ret; /* count trailing NULL */
-}
-
static int spufs_ctx_note_size(struct spu_context *ctx, int dfd)
{
int i, sz, total = 0;
@@ -118,58 +102,43 @@ int spufs_coredump_extra_notes_size(void)
static int spufs_arch_write_note(struct spu_context *ctx, int i,
struct coredump_params *cprm, int dfd)
{
- loff_t pos = 0;
- int sz, rc, total = 0;
- const int bufsz = PAGE_SIZE;
- char *name;
- char fullname[80], *buf;
+ size_t sz = spufs_coredump_read[i].size;
+ char fullname[80];
struct elf_note en;
- size_t skip;
-
- buf = (void *)get_zeroed_page(GFP_KERNEL);
- if (!buf)
- return -ENOMEM;
+ size_t ret;
- name = spufs_coredump_read[i].name;
- sz = spufs_coredump_read[i].size;
-
- sprintf(fullname, "SPU/%d/%s", dfd, name);
+ sprintf(fullname, "SPU/%d/%s", dfd, spufs_coredump_read[i].name);
en.n_namesz = strlen(fullname) + 1;
en.n_descsz = sz;
en.n_type = NT_SPU;
if (!dump_emit(cprm, &en, sizeof(en)))
- goto Eio;
-
+ return -EIO;
if (!dump_emit(cprm, fullname, en.n_namesz))
- goto Eio;
-
+ return -EIO;
if (!dump_align(cprm, 4))
- goto Eio;
-
- do {
- rc = do_coredump_read(i, ctx, buf, bufsz, &pos);
- if (rc > 0) {
- if (!dump_emit(cprm, buf, rc))
- goto Eio;
- total += rc;
- }
- } while (rc == bufsz && total < sz);
-
- if (rc < 0)
- goto out;
-
- skip = roundup(cprm->pos - total + sz, 4) - cprm->pos;
- if (!dump_skip(cprm, skip))
- goto Eio;
-
- rc = 0;
-out:
- free_page((unsigned long)buf);
- return rc;
-Eio:
- free_page((unsigned long)buf);
- return -EIO;
+ return -EIO;
+
+ if (spufs_coredump_read[i].dump) {
+ ret = spufs_coredump_read[i].dump(ctx, cprm);
+ if (ret < 0)
+ return ret;
+ } else {
+ char buf[32];
+
+ ret = snprintf(buf, sizeof(buf), "0x%.16llx",
+ spufs_coredump_read[i].get(ctx));
+ if (ret >= sizeof(buf))
+ return sizeof(buf);
+
+ /* count trailing the NULL: */
+ if (!dump_emit(cprm, buf, ret + 1))
+ return -EIO;
+ }
+
+ if (!dump_skip(cprm, roundup(cprm->pos - ret + sz, 4) - cprm->pos))
+ return -EIO;
+ return 0;
}
int spufs_coredump_extra_notes_write(struct coredump_params *cprm)
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index c0f950a3f4e1f..0f8c3d692af0c 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -9,6 +9,7 @@
#undef DEBUG
+#include <linux/coredump.h>
#include <linux/fs.h>
#include <linux/ioctl.h>
#include <linux/export.h>
@@ -129,6 +130,14 @@ static ssize_t spufs_attr_write(struct file *file, const char __user *buf,
return ret;
}
+static ssize_t spufs_dump_emit(struct coredump_params *cprm, void *buf,
+ size_t size)
+{
+ if (!dump_emit(cprm, buf, size))
+ return -EIO;
+ return size;
+}
+
#define DEFINE_SPUFS_SIMPLE_ATTRIBUTE(__fops, __get, __set, __fmt) \
static int __fops ## _open(struct inode *inode, struct file *file) \
{ \
@@ -172,12 +181,9 @@ spufs_mem_release(struct inode *inode, struct file *file)
}
static ssize_t
-__spufs_mem_read(struct spu_context *ctx, char __user *buffer,
- size_t size, loff_t *pos)
+spufs_mem_dump(struct spu_context *ctx, struct coredump_params *cprm)
{
- char *local_store = ctx->ops->get_ls(ctx);
- return simple_read_from_buffer(buffer, size, pos, local_store,
- LS_SIZE);
+ return spufs_dump_emit(cprm, ctx->ops->get_ls(ctx), LS_SIZE);
}
static ssize_t
@@ -190,7 +196,8 @@ spufs_mem_read(struct file *file, char __user *buffer,
ret = spu_acquire(ctx);
if (ret)
return ret;
- ret = __spufs_mem_read(ctx, buffer, size, pos);
+ ret = simple_read_from_buffer(buffer, size, pos, ctx->ops->get_ls(ctx),
+ LS_SIZE);
spu_release(ctx);
return ret;
@@ -459,12 +466,10 @@ spufs_regs_open(struct inode *inode, struct file *file)
}
static ssize_t
-__spufs_regs_read(struct spu_context *ctx, char __user *buffer,
- size_t size, loff_t *pos)
+spufs_regs_dump(struct spu_context *ctx, struct coredump_params *cprm)
{
- struct spu_lscsa *lscsa = ctx->csa.lscsa;
- return simple_read_from_buffer(buffer, size, pos,
- lscsa->gprs, sizeof lscsa->gprs);
+ return spufs_dump_emit(cprm, ctx->csa.lscsa->gprs,
+ sizeof(ctx->csa.lscsa->gprs));
}
static ssize_t
@@ -482,7 +487,8 @@ spufs_regs_read(struct file *file, char __user *buffer,
ret = spu_acquire_saved(ctx);
if (ret)
return ret;
- ret = __spufs_regs_read(ctx, buffer, size, pos);
+ ret = simple_read_from_buffer(buffer, size, pos, ctx->csa.lscsa->gprs,
+ sizeof(ctx->csa.lscsa->gprs));
spu_release_saved(ctx);
return ret;
}
@@ -517,12 +523,10 @@ static const struct file_operations spufs_regs_fops = {
};
static ssize_t
-__spufs_fpcr_read(struct spu_context *ctx, char __user * buffer,
- size_t size, loff_t * pos)
+spufs_fpcr_dump(struct spu_context *ctx, struct coredump_params *cprm)
{
- struct spu_lscsa *lscsa = ctx->csa.lscsa;
- return simple_read_from_buffer(buffer, size, pos,
- &lscsa->fpcr, sizeof(lscsa->fpcr));
+ return spufs_dump_emit(cprm, &ctx->csa.lscsa->fpcr,
+ sizeof(ctx->csa.lscsa->fpcr));
}
static ssize_t
@@ -535,7 +539,8 @@ spufs_fpcr_read(struct file *file, char __user * buffer,
ret = spu_acquire_saved(ctx);
if (ret)
return ret;
- ret = __spufs_fpcr_read(ctx, buffer, size, pos);
+ ret = simple_read_from_buffer(buffer, size, pos, &ctx->csa.lscsa->fpcr,
+ sizeof(ctx->csa.lscsa->fpcr));
spu_release_saved(ctx);
return ret;
}
@@ -967,28 +972,26 @@ spufs_signal1_release(struct inode *inode, struct file *file)
return 0;
}
-static ssize_t __spufs_signal1_read(struct spu_context *ctx, char __user *buf,
- size_t len, loff_t *pos)
+static ssize_t spufs_signal1_dump(struct spu_context *ctx,
+ struct coredump_params *cprm)
{
- int ret = 0;
- u32 data;
+ if (!ctx->csa.spu_chnlcnt_RW[3])
+ return 0;
+ return spufs_dump_emit(cprm, &ctx->csa.spu_chnldata_RW[3],
+ sizeof(ctx->csa.spu_chnldata_RW[3]));
+}
- if (len < 4)
+static ssize_t __spufs_signal1_read(struct spu_context *ctx, char __user *buf,
+ size_t len)
+{
+ if (len < sizeof(ctx->csa.spu_chnldata_RW[3]))
return -EINVAL;
-
- if (ctx->csa.spu_chnlcnt_RW[3]) {
- data = ctx->csa.spu_chnldata_RW[3];
- ret = 4;
- }
-
- if (!ret)
- goto out;
-
- if (copy_to_user(buf, &data, 4))
+ if (!ctx->csa.spu_chnlcnt_RW[3])
+ return 0;
+ if (copy_to_user(buf, &ctx->csa.spu_chnldata_RW[3],
+ sizeof(ctx->csa.spu_chnldata_RW[3])))
return -EFAULT;
-
-out:
- return ret;
+ return sizeof(ctx->csa.spu_chnldata_RW[3]);
}
static ssize_t spufs_signal1_read(struct file *file, char __user *buf,
@@ -1000,7 +1003,7 @@ static ssize_t spufs_signal1_read(struct file *file, char __user *buf,
ret = spu_acquire_saved(ctx);
if (ret)
return ret;
- ret = __spufs_signal1_read(ctx, buf, len, pos);
+ ret = __spufs_signal1_read(ctx, buf, len);
spu_release_saved(ctx);
return ret;
@@ -1104,28 +1107,26 @@ spufs_signal2_release(struct inode *inode, struct file *file)
return 0;
}
-static ssize_t __spufs_signal2_read(struct spu_context *ctx, char __user *buf,
- size_t len, loff_t *pos)
+static ssize_t spufs_signal2_dump(struct spu_context *ctx,
+ struct coredump_params *cprm)
{
- int ret = 0;
- u32 data;
+ if (!ctx->csa.spu_chnlcnt_RW[4])
+ return 0;
+ return spufs_dump_emit(cprm, &ctx->csa.spu_chnldata_RW[4],
+ sizeof(ctx->csa.spu_chnldata_RW[4]));
+}
- if (len < 4)
+static ssize_t __spufs_signal2_read(struct spu_context *ctx, char __user *buf,
+ size_t len)
+{
+ if (len < sizeof(ctx->csa.spu_chnldata_RW[4]))
return -EINVAL;
-
- if (ctx->csa.spu_chnlcnt_RW[4]) {
- data = ctx->csa.spu_chnldata_RW[4];
- ret = 4;
- }
-
- if (!ret)
- goto out;
-
- if (copy_to_user(buf, &data, 4))
+ if (!ctx->csa.spu_chnlcnt_RW[4])
+ return 0;
+ if (copy_to_user(buf, &ctx->csa.spu_chnldata_RW[4],
+ sizeof(ctx->csa.spu_chnldata_RW[4])))
return -EFAULT;
-
-out:
- return ret;
+ return sizeof(ctx->csa.spu_chnldata_RW[4]);
}
static ssize_t spufs_signal2_read(struct file *file, char __user *buf,
@@ -1137,7 +1138,7 @@ static ssize_t spufs_signal2_read(struct file *file, char __user *buf,
ret = spu_acquire_saved(ctx);
if (ret)
return ret;
- ret = __spufs_signal2_read(ctx, buf, len, pos);
+ ret = __spufs_signal2_read(ctx, buf, len);
spu_release_saved(ctx);
return ret;
@@ -1961,18 +1962,13 @@ static const struct file_operations spufs_caps_fops = {
.release = single_release,
};
-static ssize_t __spufs_mbox_info_read(struct spu_context *ctx,
- char __user *buf, size_t len, loff_t *pos)
+static ssize_t spufs_mbox_info_dump(struct spu_context *ctx,
+ struct coredump_params *cprm)
{
- u32 data;
-
- /* EOF if there's no entry in the mbox */
if (!(ctx->csa.prob.mb_stat_R & 0x0000ff))
return 0;
-
- data = ctx->csa.prob.pu_mb_R;
-
- return simple_read_from_buffer(buf, len, pos, &data, sizeof data);
+ return spufs_dump_emit(cprm, &ctx->csa.prob.pu_mb_R,
+ sizeof(ctx->csa.prob.pu_mb_R));
}
static ssize_t spufs_mbox_info_read(struct file *file, char __user *buf,
@@ -1988,7 +1984,12 @@ static ssize_t spufs_mbox_info_read(struct file *file, char __user *buf,
if (ret)
return ret;
spin_lock(&ctx->csa.register_lock);
- ret = __spufs_mbox_info_read(ctx, buf, len, pos);
+ /* EOF if there's no entry in the mbox */
+ if (ctx->csa.prob.mb_stat_R & 0x0000ff) {
+ ret = simple_read_from_buffer(buf, len, pos,
+ &ctx->csa.prob.pu_mb_R,
+ sizeof(ctx->csa.prob.pu_mb_R));
+ }
spin_unlock(&ctx->csa.register_lock);
spu_release_saved(ctx);
@@ -2001,18 +2002,13 @@ static const struct file_operations spufs_mbox_info_fops = {
.llseek = generic_file_llseek,
};
-static ssize_t __spufs_ibox_info_read(struct spu_context *ctx,
- char __user *buf, size_t len, loff_t *pos)
+static ssize_t spufs_ibox_info_dump(struct spu_context *ctx,
+ struct coredump_params *cprm)
{
- u32 data;
-
- /* EOF if there's no entry in the ibox */
if (!(ctx->csa.prob.mb_stat_R & 0xff0000))
return 0;
-
- data = ctx->csa.priv2.puint_mb_R;
-
- return simple_read_from_buffer(buf, len, pos, &data, sizeof data);
+ return spufs_dump_emit(cprm, &ctx->csa.priv2.puint_mb_R,
+ sizeof(ctx->csa.priv2.puint_mb_R));
}
static ssize_t spufs_ibox_info_read(struct file *file, char __user *buf,
@@ -2028,7 +2024,12 @@ static ssize_t spufs_ibox_info_read(struct file *file, char __user *buf,
if (ret)
return ret;
spin_lock(&ctx->csa.register_lock);
- ret = __spufs_ibox_info_read(ctx, buf, len, pos);
+ /* EOF if there's no entry in the ibox */
+ if (ctx->csa.prob.mb_stat_R & 0xff0000) {
+ ret = simple_read_from_buffer(buf, len, pos,
+ &ctx->csa.priv2.puint_mb_R,
+ sizeof(ctx->csa.priv2.puint_mb_R));
+ }
spin_unlock(&ctx->csa.register_lock);
spu_release_saved(ctx);
@@ -2041,21 +2042,16 @@ static const struct file_operations spufs_ibox_info_fops = {
.llseek = generic_file_llseek,
};
-static ssize_t __spufs_wbox_info_read(struct spu_context *ctx,
- char __user *buf, size_t len, loff_t *pos)
+static size_t spufs_wbox_info_cnt(struct spu_context *ctx)
{
- int i, cnt;
- u32 data[4];
- u32 wbox_stat;
-
- wbox_stat = ctx->csa.prob.mb_stat_R;
- cnt = 4 - ((wbox_stat & 0x00ff00) >> 8);
- for (i = 0; i < cnt; i++) {
- data[i] = ctx->csa.spu_mailbox_data[i];
- }
+ return (4 - ((ctx->csa.prob.mb_stat_R & 0x00ff00) >> 8)) * sizeof(u32);
+}
- return simple_read_from_buffer(buf, len, pos, &data,
- cnt * sizeof(u32));
+static ssize_t spufs_wbox_info_dump(struct spu_context *ctx,
+ struct coredump_params *cprm)
+{
+ return spufs_dump_emit(cprm, &ctx->csa.spu_mailbox_data,
+ spufs_wbox_info_cnt(ctx));
}
static ssize_t spufs_wbox_info_read(struct file *file, char __user *buf,
@@ -2071,7 +2067,8 @@ static ssize_t spufs_wbox_info_read(struct file *file, char __user *buf,
if (ret)
return ret;
spin_lock(&ctx->csa.register_lock);
- ret = __spufs_wbox_info_read(ctx, buf, len, pos);
+ ret = simple_read_from_buffer(buf, len, pos, &ctx->csa.spu_mailbox_data,
+ spufs_wbox_info_cnt(ctx));
spin_unlock(&ctx->csa.register_lock);
spu_release_saved(ctx);
@@ -2084,36 +2081,42 @@ static const struct file_operations spufs_wbox_info_fops = {
.llseek = generic_file_llseek,
};
-static ssize_t __spufs_dma_info_read(struct spu_context *ctx,
- char __user *buf, size_t len, loff_t *pos)
+static void __spufs_dma_info_read(struct spu_context *ctx,
+ struct spu_dma_info *info)
{
- struct spu_dma_info info;
- struct mfc_cq_sr *qp, *spuqp;
int i;
- info.dma_info_type = ctx->csa.priv2.spu_tag_status_query_RW;
- info.dma_info_mask = ctx->csa.lscsa->tag_mask.slot[0];
- info.dma_info_status = ctx->csa.spu_chnldata_RW[24];
- info.dma_info_stall_and_notify = ctx->csa.spu_chnldata_RW[25];
- info.dma_info_atomic_command_status = ctx->csa.spu_chnldata_RW[27];
+ info->dma_info_type = ctx->csa.priv2.spu_tag_status_query_RW;
+ info->dma_info_mask = ctx->csa.lscsa->tag_mask.slot[0];
+ info->dma_info_status = ctx->csa.spu_chnldata_RW[24];
+ info->dma_info_stall_and_notify = ctx->csa.spu_chnldata_RW[25];
+ info->dma_info_atomic_command_status = ctx->csa.spu_chnldata_RW[27];
+
for (i = 0; i < 16; i++) {
- qp = &info.dma_info_command_data[i];
- spuqp = &ctx->csa.priv2.spuq[i];
+ struct mfc_cq_sr *qp = &info->dma_info_command_data[i];
+ struct mfc_cq_sr *spuqp = &ctx->csa.priv2.spuq[i];
qp->mfc_cq_data0_RW = spuqp->mfc_cq_data0_RW;
qp->mfc_cq_data1_RW = spuqp->mfc_cq_data1_RW;
qp->mfc_cq_data2_RW = spuqp->mfc_cq_data2_RW;
qp->mfc_cq_data3_RW = spuqp->mfc_cq_data3_RW;
}
+}
+
+static ssize_t spufs_dma_info_dump(struct spu_context *ctx,
+ struct coredump_params *cprm)
+{
+ struct spu_dma_info info;
- return simple_read_from_buffer(buf, len, pos, &info,
- sizeof info);
+ __spufs_dma_info_read(ctx, &info);
+ return spufs_dump_emit(cprm, &info, sizeof(info));
}
static ssize_t spufs_dma_info_read(struct file *file, char __user *buf,
size_t len, loff_t *pos)
{
struct spu_context *ctx = file->private_data;
+ struct spu_dma_info info;
int ret;
if (!access_ok(buf, len))
@@ -2123,7 +2126,8 @@ static ssize_t spufs_dma_info_read(struct file *file, char __user *buf,
if (ret)
return ret;
spin_lock(&ctx->csa.register_lock);
- ret = __spufs_dma_info_read(ctx, buf, len, pos);
+ __spufs_dma_info_read(ctx, &info);
+ ret = simple_read_from_buffer(buf, len, pos, &info, sizeof(info));
spin_unlock(&ctx->csa.register_lock);
spu_release_saved(ctx);
@@ -2136,48 +2140,53 @@ static const struct file_operations spufs_dma_info_fops = {
.llseek = no_llseek,
};
-static ssize_t __spufs_proxydma_info_read(struct spu_context *ctx,
- char __user *buf, size_t len, loff_t *pos)
+static void __spufs_proxydma_info_read(struct spu_context *ctx,
+ struct spu_proxydma_info *info)
{
- struct spu_proxydma_info info;
- struct mfc_cq_sr *qp, *puqp;
- int ret = sizeof info;
int i;
- if (len < ret)
- return -EINVAL;
-
- if (!access_ok(buf, len))
- return -EFAULT;
+ info->proxydma_info_type = ctx->csa.prob.dma_querytype_RW;
+ info->proxydma_info_mask = ctx->csa.prob.dma_querymask_RW;
+ info->proxydma_info_status = ctx->csa.prob.dma_tagstatus_R;
- info.proxydma_info_type = ctx->csa.prob.dma_querytype_RW;
- info.proxydma_info_mask = ctx->csa.prob.dma_querymask_RW;
- info.proxydma_info_status = ctx->csa.prob.dma_tagstatus_R;
for (i = 0; i < 8; i++) {
- qp = &info.proxydma_info_command_data[i];
- puqp = &ctx->csa.priv2.puq[i];
+ struct mfc_cq_sr *qp = &info->proxydma_info_command_data[i];
+ struct mfc_cq_sr *puqp = &ctx->csa.priv2.puq[i];
qp->mfc_cq_data0_RW = puqp->mfc_cq_data0_RW;
qp->mfc_cq_data1_RW = puqp->mfc_cq_data1_RW;
qp->mfc_cq_data2_RW = puqp->mfc_cq_data2_RW;
qp->mfc_cq_data3_RW = puqp->mfc_cq_data3_RW;
}
+}
+
+static ssize_t spufs_proxydma_info_dump(struct spu_context *ctx,
+ struct coredump_params *cprm)
+{
+ struct spu_proxydma_info info;
- return simple_read_from_buffer(buf, len, pos, &info,
- sizeof info);
+ __spufs_proxydma_info_read(ctx, &info);
+ return spufs_dump_emit(cprm, &info, sizeof(info));
}
static ssize_t spufs_proxydma_info_read(struct file *file, char __user *buf,
size_t len, loff_t *pos)
{
struct spu_context *ctx = file->private_data;
+ struct spu_proxydma_info info;
int ret;
+ if (len < sizeof(info))
+ return -EINVAL;
+ if (!access_ok(buf, len))
+ return -EFAULT;
+
ret = spu_acquire_saved(ctx);
if (ret)
return ret;
spin_lock(&ctx->csa.register_lock);
- ret = __spufs_proxydma_info_read(ctx, buf, len, pos);
+ __spufs_proxydma_info_read(ctx, &info);
+ ret = simple_read_from_buffer(buf, len, pos, &info, sizeof(info));
spin_unlock(&ctx->csa.register_lock);
spu_release_saved(ctx);
@@ -2625,23 +2634,23 @@ const struct spufs_tree_descr spufs_dir_debug_contents[] = {
};
const struct spufs_coredump_reader spufs_coredump_read[] = {
- { "regs", __spufs_regs_read, NULL, sizeof(struct spu_reg128[128])},
- { "fpcr", __spufs_fpcr_read, NULL, sizeof(struct spu_reg128) },
+ { "regs", spufs_regs_dump, NULL, sizeof(struct spu_reg128[128])},
+ { "fpcr", spufs_fpcr_dump, NULL, sizeof(struct spu_reg128) },
{ "lslr", NULL, spufs_lslr_get, 19 },
{ "decr", NULL, spufs_decr_get, 19 },
{ "decr_status", NULL, spufs_decr_status_get, 19 },
- { "mem", __spufs_mem_read, NULL, LS_SIZE, },
- { "signal1", __spufs_signal1_read, NULL, sizeof(u32) },
+ { "mem", spufs_mem_dump, NULL, LS_SIZE, },
+ { "signal1", spufs_signal1_dump, NULL, sizeof(u32) },
{ "signal1_type", NULL, spufs_signal1_type_get, 19 },
- { "signal2", __spufs_signal2_read, NULL, sizeof(u32) },
+ { "signal2", spufs_signal2_dump, NULL, sizeof(u32) },
{ "signal2_type", NULL, spufs_signal2_type_get, 19 },
{ "event_mask", NULL, spufs_event_mask_get, 19 },
{ "event_status", NULL, spufs_event_status_get, 19 },
- { "mbox_info", __spufs_mbox_info_read, NULL, sizeof(u32) },
- { "ibox_info", __spufs_ibox_info_read, NULL, sizeof(u32) },
- { "wbox_info", __spufs_wbox_info_read, NULL, 4 * sizeof(u32)},
- { "dma_info", __spufs_dma_info_read, NULL, sizeof(struct spu_dma_info)},
- { "proxydma_info", __spufs_proxydma_info_read,
+ { "mbox_info", spufs_mbox_info_dump, NULL, sizeof(u32) },
+ { "ibox_info", spufs_ibox_info_dump, NULL, sizeof(u32) },
+ { "wbox_info", spufs_wbox_info_dump, NULL, 4 * sizeof(u32)},
+ { "dma_info", spufs_dma_info_dump, NULL, sizeof(struct spu_dma_info)},
+ { "proxydma_info", spufs_proxydma_info_dump,
NULL, sizeof(struct spu_proxydma_info)},
{ "object-id", NULL, spufs_object_id_get, 19 },
{ "npc", NULL, spufs_npc_get, 19 },
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index 413c89afe1126..1ba4d884febfa 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -337,8 +337,7 @@ void spufs_dma_callback(struct spu *spu, int type);
extern struct spu_coredump_calls spufs_coredump_calls;
struct spufs_coredump_reader {
char *name;
- ssize_t (*read)(struct spu_context *ctx,
- char __user *buffer, size_t size, loff_t *pos);
+ ssize_t (*dump)(struct spu_context *ctx, struct coredump_params *cprm);
u64 (*get)(struct spu_context *ctx);
size_t size;
};
--
2.26.1
^ permalink raw reply related
* remove set_fs calls from the coredump code v4
From: Christoph Hellwig @ 2020-04-27 20:06 UTC (permalink / raw)
To: Andrew Morton, Alexander Viro
Cc: Arnd Bergmann, Linus Torvalds, linux-kernel, Jeremy Kerr,
linux-fsdevel, linuxppc-dev, Eric W . Biederman
Hi all,
this series gets rid of playing with the address limit in the exec and
coredump code. Most of this was fairly trivial, the biggest changes are
those to the spufs coredump code.
Changes since v3:
- fix x86 compilation with x32 in the new version of the signal code
- split the exec patches into a new series
Changes since v2:
- don't cleanup the compat siginfo calling conventions, use the patch
variant from Eric with slight coding style fixes instead.
Changes since v1:
- properly spell NUL
- properly handle the compat siginfo case in ELF coredumps
^ permalink raw reply
* Re: [PATCH v3 2/4] hugetlbfs: move hugepagesz= parsing to arch independent code
From: Mike Kravetz @ 2020-04-27 19:09 UTC (permalink / raw)
To: Sandipan Das
Cc: linux-doc, Catalin Marinas, Dave Hansen, Heiko Carstens, Peter Xu,
linux-mm, Paul Mackerras, sparclinux, linux-riscv, Will Deacon,
Mina Almasry, linux-s390, Jonathan Corbet, Christian Borntraeger,
Ingo Molnar, Longpeng, Albert Ou, Vasily Gorbik, Paul Walmsley,
Thomas Gleixner, linux-arm-kernel, Nitesh Narayan Lal,
Randy Dunlap, linux-kernel, Palmer Dabbelt, Andrew Morton,
linuxppc-dev, David S.Miller
In-Reply-To: <5a380060-38db-b690-1003-678ca0f28f07@oracle.com>
On 4/27/20 10:25 AM, Mike Kravetz wrote:
> On 4/26/20 10:04 PM, Sandipan Das wrote:
>> On 18/04/20 12:20 am, Mike Kravetz wrote:
>>> Now that architectures provide arch_hugetlb_valid_size(), parsing
>>> of "hugepagesz=" can be done in architecture independent code.
>>
>> This isn't working as expected on powerpc64.
>>
>> [ 0.000000] Kernel command line: root=UUID=dc7b49cf-95a2-4996-8e7d-7c64ddc7a6ff hugepagesz=16G hugepages=2
>> [ 0.000000] HugeTLB: huge pages not supported, ignoring hugepagesz = 16G
>> [ 0.000000] HugeTLB: huge pages not supported, ignoring hugepages = 2
>> [ 0.284177] HugeTLB registered 16.0 MiB page size, pre-allocated 0 pages
>> [ 0.284182] HugeTLB registered 16.0 GiB page size, pre-allocated 0 pages
>> [ 2.585062] hugepagesz=16G
>> [ 2.585063] hugepages=2
>>
>
> In the new arch independent version of hugepages_setup, I added the following
> code in patch 4 off this series:
>
>> + if (!hugepages_supported()) {
>> + pr_warn("HugeTLB: huge pages not supported, ignoring hugepages = %s\n", s);
>> + return 0;
>> + }
>> +
>
> The easy solution is to remove all the hugepages_supported() checks from
> command line parsing routines and rely on the later check in hugetlb_init().
Here is a patch to address the issue. Sorry, as my series breaks all hugetlb
command line processing on powerpc.
Sandipan, can you test the following patch?
From 480fe2847361e2a85aeec1fb39fe643bb7100a07 Mon Sep 17 00:00:00 2001
From: Mike Kravetz <mike.kravetz@oracle.com>
Date: Mon, 27 Apr 2020 11:37:30 -0700
Subject: [PATCH] hugetlbfs: fix changes to command line processing
Previously, a check for hugepages_supported was added before processing
hugetlb command line parameters. On some architectures such as powerpc,
hugepages_supported() is not set to true until after command line
processing. Therefore, no hugetlb command line parameters would be
accepted.
Remove the additional checks for hugepages_supported. In hugetlb_init,
print a warning if !hugepages_supported and command line parameters were
specified.
Signed-off-by: Mike Kravetz <mike.kravetz@oracle.com>
---
mm/hugetlb.c | 20 ++++----------------
1 file changed, 4 insertions(+), 16 deletions(-)
diff --git a/mm/hugetlb.c b/mm/hugetlb.c
index 1075abdb5717..5548e8851b93 100644
--- a/mm/hugetlb.c
+++ b/mm/hugetlb.c
@@ -3212,8 +3212,11 @@ static int __init hugetlb_init(void)
{
int i;
- if (!hugepages_supported())
+ if (!hugepages_supported()) {
+ if (hugetlb_max_hstate || default_hstate_max_huge_pages)
+ pr_warn("HugeTLB: huge pages not supported, ignoring associated command-line parameters\n");
return 0;
+ }
/*
* Make sure HPAGE_SIZE (HUGETLB_PAGE_ORDER) hstate exists. Some
@@ -3315,11 +3318,6 @@ static int __init hugepages_setup(char *s)
unsigned long *mhp;
static unsigned long *last_mhp;
- if (!hugepages_supported()) {
- pr_warn("HugeTLB: huge pages not supported, ignoring hugepages = %s\n", s);
- return 0;
- }
-
if (!parsed_valid_hugepagesz) {
pr_warn("HugeTLB: hugepages=%s does not follow a valid hugepagesz, ignoring\n", s);
parsed_valid_hugepagesz = true;
@@ -3372,11 +3370,6 @@ static int __init hugepagesz_setup(char *s)
struct hstate *h;
parsed_valid_hugepagesz = false;
- if (!hugepages_supported()) {
- pr_warn("HugeTLB: huge pages not supported, ignoring hugepagesz = %s\n", s);
- return 0;
- }
-
size = (unsigned long)memparse(s, NULL);
if (!arch_hugetlb_valid_size(size)) {
@@ -3424,11 +3417,6 @@ static int __init default_hugepagesz_setup(char *s)
unsigned long size;
parsed_valid_hugepagesz = false;
- if (!hugepages_supported()) {
- pr_warn("HugeTLB: huge pages not supported, ignoring default_hugepagesz = %s\n", s);
- return 0;
- }
-
if (parsed_default_hugepagesz) {
pr_err("HugeTLB: default_hugepagesz previously specified, ignoring %s\n", s);
return 0;
--
2.25.4
^ permalink raw reply related
* [PATCH] powerpc: Add interrupt mode information in /proc/cpuinfo
From: Cédric Le Goater @ 2020-04-27 14:06 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev, Cédric Le Goater
PowerNV and pSeries machines can run using the XIVE or XICS interrupt
mode. Report this information in /proc/cpuinfo :
timebase : 512000000
platform : PowerNV
model : 9006-22C
machine : PowerNV 9006-22C
firmware : OPAL
MMU : Radix
IRQ : XIVE
and use seq_puts() where we can.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
arch/powerpc/platforms/powernv/setup.c | 12 ++++++++----
arch/powerpc/platforms/pseries/setup.c | 8 ++++++--
2 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index 3bc188da82ba..39ef3394038d 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -196,14 +196,18 @@ static void pnv_show_cpuinfo(struct seq_file *m)
model = of_get_property(root, "model", NULL);
seq_printf(m, "machine\t\t: PowerNV %s\n", model);
if (firmware_has_feature(FW_FEATURE_OPAL))
- seq_printf(m, "firmware\t: OPAL\n");
+ seq_puts(m, "firmware\t: OPAL\n");
else
- seq_printf(m, "firmware\t: BML\n");
+ seq_puts(m, "firmware\t: BML\n");
of_node_put(root);
if (radix_enabled())
- seq_printf(m, "MMU\t\t: Radix\n");
+ seq_puts(m, "MMU\t\t: Radix\n");
else
- seq_printf(m, "MMU\t\t: Hash\n");
+ seq_puts(m, "MMU\t\t: Hash\n");
+ if (xive_enabled())
+ seq_puts(m, "IRQ\t\t: XIVE\n");
+ else
+ seq_puts(m, "IRQ\t\t: XICS\n");
}
static void pnv_prepare_going_down(void)
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 0c8421dd01ab..d248fca67797 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -95,9 +95,13 @@ static void pSeries_show_cpuinfo(struct seq_file *m)
seq_printf(m, "machine\t\t: CHRP %s\n", model);
of_node_put(root);
if (radix_enabled())
- seq_printf(m, "MMU\t\t: Radix\n");
+ seq_puts(m, "MMU\t\t: Radix\n");
else
- seq_printf(m, "MMU\t\t: Hash\n");
+ seq_puts(m, "MMU\t\t: Hash\n");
+ if (xive_enabled())
+ seq_puts(m, "IRQ\t\t: XIVE\n");
+ else
+ seq_puts(m, "IRQ\t\t: XICS\n");
}
/* Initialize firmware assisted non-maskable interrupts if
--
2.25.3
^ permalink raw reply related
* Re: [PATCH v4] pci: Make return value of pcie_capability_read*() consistent
From: Bjorn Helgaas @ 2020-04-27 18:13 UTC (permalink / raw)
To: Saheed Bolarinwa
Cc: Thomas Bogendoerfer, linux-pci, linux-mips, yangyicong, skhan,
bjorn, linuxppc-dev, linux-kernel
In-Reply-To: <c9811866-8fea-9398-9337-45818136fe84@gmail.com>
[+cc Thomas, Michael, linux-mips, linux-ppc, LKML
Background:
- PCI config accessors (pci_read_config_word(), etc) return 0 or a
positive error (PCIBIOS_BAD_REGISTER_NUMBER, etc).
- PCI Express capability accessors (pcie_capability_read_word(),
etc) return 0, a negative error (-EINVAL), or a positive error
(PCIBIOS_BAD_REGISTER_NUMBER, etc).
- The PCI Express case is hard for callers to deal with. The
original plan was to convert this case to either return 0 or
positive errors, just like pci_read_config_word().
- I'm raising the possibility of instead getting rid of the positive
PCIBIOS_* error values completely and replacing them with -EINVAL,
-ENOENT, etc.
- Very few callers check the return codes at all. Most of the ones
that do either check for non-zero or use pcibios_err_to_errno() to
convert PCIBIOS_* to -EINVAL, etc.
I added MIPS and powerpc folks to CC: just as FYI because you're the
biggest users of PCIBIOS_*. The intent is that this would be zero
functional change.
]
On Sun, Apr 26, 2020 at 11:51:30AM +0200, Saheed Bolarinwa wrote:
> On 4/25/20 12:30 AM, Bjorn Helgaas wrote:
> > On Fri, Apr 24, 2020 at 04:27:11PM +0200, Bolarinwa Olayemi Saheed wrote:
> > > pcie_capability_read*() could return 0, -EINVAL, or any of the
> > > PCIBIOS_* error codes (which are positive).
> > > This is behaviour is now changed to return only PCIBIOS_* error
> > > codes on error.
> > > This is consistent with pci_read_config_*(). Callers can now have
> > > a consistent way for checking which error has occurred.
> > >
> > > An audit of the callers of this function was made and no case was found
> > > where there is need for a change within the caller function or their
> > > dependencies down the heirarchy.
> > > Out of all caller functions discovered only 8 functions either persist the
> > > return value of pcie_capability_read*() or directly pass on the return
> > > value.
> > >
> > > 1.) "./drivers/infiniband/hw/hfi1/pcie.c" :
> > > => pcie_speeds() line-306
> > >
> > > if (ret) {
> > > dd_dev_err(dd, "Unable to read from PCI config\n");
> > > return ret;
> > > }
> > >
> > > remarks: The variable "ret" is the captured return value.
> > > This function passes on the return value. The return value was
> > > store only by hfi1_init_dd() line-15076 in
> > > ./drivers/infiniband/hw/hfi1/chip.c and it behave the same on all
> > > errors. So this patch will not require a change in this function.
> > Thanks for the analysis, but I don't think it's quite complete.
> > Here's the call chain I see:
> >
> > local_pci_probe
> > pci_drv->probe(..)
> > init_one # hfi1_pci_driver.probe method
> > hfi1_init_dd
> > pcie_speeds
> > pcie_capability_read_dword
>
> Thank you for pointing out the call chain. After checking it, I noticed that
> the
>
> error is handled within the chain in two places without being passed on.
>
> 1. init_one() in ./drivers/infiniband/hw/hfil1/init.c
>
> ret = hfi1_init_dd(dd);
> if (ret)
> goto clean_bail; /* error already printed */
>
> ...
> clean_bail:
> hfi1_pcie_cleanup(pdev); /*EXITS*/
>
> 2. hfi1_init_dd() in ./drivers/infiniband/hw/hfil1/chip.c
>
> ret = pcie_speeds(dd);
> if (ret)
> goto bail_cleanup;
>
> ...
>
> bail_cleanup:
> hfi1_pcie_ddcleanup(dd); /*EXITS*/
>
> > If pcie_capability_read_dword() returns any non-zero value, that value
> > propagates all the way up and is eventually returned by init_one().
> > init_one() id called by local_pci_probe(), which interprets:
> >
> > < 0 as failure
> > 0 as success, and
> > > 0 as "success but warn"
> >
> > So previously an error from pcie_capability_read_dword() could cause
> > either failure or "success but warn" for the probe method, and after
> > this patch those errors will always cause "success but warn".
> >
> > The current behavior is definitely a bug: if
> > pci_bus_read_config_word() returns PCIBIOS_BAD_REGISTER_NUMBER, that
> > causes pcie_capability_read_dword() to also return
> > PCIBIOS_BAD_REGISTER_NUMBER, which will lead to the probe succeeding
> > with a warning, when it should fail.
> >
> > I think the fix is to make pcie_speeds() call pcibios_err_to_errno():
> >
> > ret = pcie_capability_read_dword(...);
> > if (ret) {
> > dd_dev_err(...);
> > return pcibios_err_to_errno(ret);
> > }
>
> I agree that this fix is needed, so that PCIBIOS_* error code are
> not passed on but replaced
>
> with one consistent with non-PCI error codes.
>
> > That could be its own separate preparatory patch before this
> > adjustment to pcie_capability_read_dword().
> >
> > I didn't look at the other cases below, so I don't know whether
> > they are similar hidden problems.
>
> I will check again, please I will like to clarify if it will be to
> fine to just implement the conversion
>
> (as suggested for pcie_speeds) in all found references, which passes
> on the error code.
I'm starting to think we're approaching this backwards. I searched
for PCIBIOS_FUNC_NOT_SUPPORTED, PCIBIOS_BAD_VENDOR_ID, and the other
error values. Almost every use is a *return* in a config accessor.
There are very, very few *tests* for these values.
For example, the only tests for PCIBIOS_FUNC_NOT_SUPPORTED are in
xen_pcibios_err_to_errno() and pcibios_err_to_errno(), i.e., we're
just converting that value to -ENOENT or the Xen-specific thing.
So I think the best approach might be to remove the PCIBIOS_* error
values completely and replace them with the corresponding values from
pcibios_err_to_errno(). For example, a part of the patch would look
like this:
diff --git a/arch/mips/pci/ops-emma2rh.c b/arch/mips/pci/ops-emma2rh.c
index 65f47344536c..d4d9c902c147 100644
--- a/arch/mips/pci/ops-emma2rh.c
+++ b/arch/mips/pci/ops-emma2rh.c
@@ -100,7 +100,7 @@ static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
break;
default:
emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
- return PCIBIOS_FUNC_NOT_SUPPORTED;
+ return -ENOENT;
}
emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
@@ -149,7 +149,7 @@ static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
break;
default:
emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
- return PCIBIOS_FUNC_NOT_SUPPORTED;
+ return -ENOENT;
}
*(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) +
(where & 0xfffffffc)) = data;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 83ce1cdf5676..f95637a8d391 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -675,7 +675,6 @@ static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false;
/* Error values that may be returned by PCI functions */
#define PCIBIOS_SUCCESSFUL 0x00
-#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
#define PCIBIOS_BAD_VENDOR_ID 0x83
#define PCIBIOS_DEVICE_NOT_FOUND 0x86
#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
@@ -689,8 +688,6 @@ static inline int pcibios_err_to_errno(int err)
return err; /* Assume already errno */
switch (err) {
- case PCIBIOS_FUNC_NOT_SUPPORTED:
- return -ENOENT;
case PCIBIOS_BAD_VENDOR_ID:
return -ENOTTY;
case PCIBIOS_DEVICE_NOT_FOUND:
^ permalink raw reply related
* [PATCH net] ibmvnic: Fall back to 16 H_SEND_SUB_CRQ_INDIRECT entries with old FW
From: Juliet Kim @ 2020-04-27 17:33 UTC (permalink / raw)
To: netdev; +Cc: julietk, tlfalcon, linuxppc-dev
The maximum entries for H_SEND_SUB_CRQ_INDIRECT has increased on
some platforms from 16 to 128. If Live Partition Mobility is used
to migrate a running OS image from a newer source platform to an
older target platform, then H_SEND_SUB_CRQ_INDIRECT will fail with
H_PARAMETER if 128 entries are queued.
Fix this by falling back to 16 entries if H_PARAMETER is returned
from the hcall().
Signed-off-by: Juliet Kim <julietk@linux.vnet.ibm.com>
---
drivers/net/ethernet/ibm/ibmvnic.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/net/ethernet/ibm/ibmvnic.c b/drivers/net/ethernet/ibm/ibmvnic.c
index 4bd33245bad6..b66c2f26a427 100644
--- a/drivers/net/ethernet/ibm/ibmvnic.c
+++ b/drivers/net/ethernet/ibm/ibmvnic.c
@@ -1656,6 +1656,17 @@ static netdev_tx_t ibmvnic_xmit(struct sk_buff *skb, struct net_device *netdev)
lpar_rc = send_subcrq_indirect(adapter, handle_array[queue_num],
(u64)tx_buff->indir_dma,
(u64)num_entries);
+
+ /* Old firmware accepts max 16 num_entries */
+ if (lpar_rc == H_PARAMETER && num_entries > 16) {
+ tx_crq.v1.n_crq_elem = 16;
+ tx_buff->num_entries = 16;
+ lpar_rc = send_subcrq_indirect(adapter,
+ handle_array[queue_num],
+ (u64)tx_buff->indir_dma,
+ 16);
+ }
+
dma_unmap_single(dev, tx_buff->indir_dma,
sizeof(tx_buff->indir_arr), DMA_TO_DEVICE);
} else {
--
2.18.1
^ permalink raw reply related
* Re: [PATCH v3 2/4] hugetlbfs: move hugepagesz= parsing to arch independent code
From: Mike Kravetz @ 2020-04-27 17:25 UTC (permalink / raw)
To: Sandipan Das
Cc: linux-doc, Catalin Marinas, Dave Hansen, Heiko Carstens, Peter Xu,
linux-mm, Paul Mackerras, sparclinux, linux-riscv, Will Deacon,
Mina Almasry, linux-s390, Jonathan Corbet, Christian Borntraeger,
Ingo Molnar, Longpeng, Albert Ou, Vasily Gorbik, Paul Walmsley,
Thomas Gleixner, linux-arm-kernel, Nitesh Narayan Lal,
Randy Dunlap, linux-kernel, Palmer Dabbelt, Andrew Morton,
linuxppc-dev, David S.Miller
In-Reply-To: <7583dfcc-62d8-2a54-6eef-bcb4e01129b3@gmail.com>
On 4/26/20 10:04 PM, Sandipan Das wrote:
> Hi Mike,
>
> On 18/04/20 12:20 am, Mike Kravetz wrote:
>> Now that architectures provide arch_hugetlb_valid_size(), parsing
>> of "hugepagesz=" can be done in architecture independent code.
>> Create a single routine to handle hugepagesz= parsing and remove
>> all arch specific routines. We can also remove the interface
>> hugetlb_bad_size() as this is no longer used outside arch independent
>> code.
>>
>> This also provides consistent behavior of hugetlbfs command line
>> options. The hugepagesz= option should only be specified once for
>> a specific size, but some architectures allow multiple instances.
>> This appears to be more of an oversight when code was added by some
>> architectures to set up ALL huge pages sizes.
>>
>> [...]
>>
>> diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
>> index de54d2a37830..2c3fa0a7787b 100644
>> --- a/arch/powerpc/mm/hugetlbpage.c
>> +++ b/arch/powerpc/mm/hugetlbpage.c
>> @@ -589,21 +589,6 @@ static int __init add_huge_page_size(unsigned long long size)
>> return 0;
>> }
>>
>> -static int __init hugepage_setup_sz(char *str)
>> -{
>> - unsigned long long size;
>> -
>> - size = memparse(str, &str);
>> -
>> - if (add_huge_page_size(size) != 0) {
>> - hugetlb_bad_size();
>> - pr_err("Invalid huge page size specified(%llu)\n", size);
>> - }
>> -
>> - return 1;
>> -}
>> -__setup("hugepagesz=", hugepage_setup_sz);
>> -
>> [...]
>
> This isn't working as expected on powerpc64.
>
> [ 0.000000] Kernel command line: root=UUID=dc7b49cf-95a2-4996-8e7d-7c64ddc7a6ff hugepagesz=16G hugepages=2
> [ 0.000000] HugeTLB: huge pages not supported, ignoring hugepagesz = 16G
> [ 0.000000] HugeTLB: huge pages not supported, ignoring hugepages = 2
> [ 0.284177] HugeTLB registered 16.0 MiB page size, pre-allocated 0 pages
> [ 0.284182] HugeTLB registered 16.0 GiB page size, pre-allocated 0 pages
> [ 2.585062] hugepagesz=16G
> [ 2.585063] hugepages=2
>
> The "huge pages not supported" messages are under a !hugepages_supported()
> condition which checks if HPAGE_SHIFT is non-zero. On powerpc64, HPAGE_SHIFT
> comes from the hpage_shift variable. At this point, it is still zero and yet
> to be set. Hence the check fails. The reason being hugetlbpage_init_default(),
> which sets hpage_shift, it now called after hugepage_setup_sz().
Thanks for catching this Sandipan.
In the new arch independent version of hugepages_setup, I added the following
code in patch 4 off this series:
> +static int __init hugepages_setup(char *s)
> {
> unsigned long *mhp;
> static unsigned long *last_mhp;
>
> + if (!hugepages_supported()) {
> + pr_warn("HugeTLB: huge pages not supported, ignoring hugepages = %s\n", s);
> + return 0;
> + }
> +
> if (!parsed_valid_hugepagesz) {
In fact, I added it to the beginning of all the hugetlb command line parsing
routines. My 'thought' was to warn early if hugetlb pages were not supported.
Previously, the first check for hugepages_supported() was in hugetlb_init()
which ran after hugetlbpage_init_default().
The easy solution is to remove all the hugepages_supported() checks from
command line parsing routines and rely on the later check in hugetlb_init().
Another reason for adding those early checks was to possibly prevent the
preallocation of gigantic pages at command line parsing time. Gigantic
pages are allocated at command line parsing time as they need to be allocated
with the bootmem allocator. My concern is that there could be some strange
configuration where !hugepages_supported(), yet we allocate gigantic pages
from bootmem that can not be used or freeed later.
powerpc is the only architecture which has it's own alloc_bootmem_huge_page
routine. So, it handles this potential issue.
I'll send out a fix shortly.
--
Mike Kravetz
^ permalink raw reply
* Re: [PATCH 1/3] powerpc: Properly return error code from do_patch_instruction()
From: Naveen N. Rao @ 2020-04-27 17:14 UTC (permalink / raw)
To: Christophe Leroy, Christopher M. Riedl, Steven Rostedt; +Cc: linuxppc-dev
In-Reply-To: <C29ONNE5PMZ3.2R5TT1FV2RFHC@geist>
Christopher M. Riedl wrote:
> On Fri Apr 24, 2020 at 9:15 AM, Steven Rostedt wrote:
>> On Thu, 23 Apr 2020 18:21:14 +0200
>> Christophe Leroy <christophe.leroy@c-s.fr> wrote:
>>
>>
>> > Le 23/04/2020 à 17:09, Naveen N. Rao a écrit :
>> > > With STRICT_KERNEL_RWX, we are currently ignoring return value from
>> > > __patch_instruction() in do_patch_instruction(), resulting in the error
>> > > not being propagated back. Fix the same.
>> >
>> > Good patch.
>> >
>> > Be aware that there is ongoing work which tend to wanting to replace
>> > error reporting by BUG_ON() . See
>> > https://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=166003
>>
>>
>> Thanks for the reference. I still believe that WARN_ON() should be used
>> in
>> 99% of the cases, including here. And only do a BUG_ON() when you know
>> there's no recovering from it.
>>
>>
>> In fact, there's still BUG_ON()s in my code that I need to convert to
>> WARN_ON() (it was written when BUG_ON() was still acceptable ;-)
>>
> Figured I'd chime in since I am working on that other series :) The
> BUG_ON()s are _only_ in the init code to set things up to allow a
> temporary mapping for patching a STRICT_RWX kernel later. There's no
> ongoing work to "replace error reporting by BUG_ON()". If that initial
> setup fails we cannot patch under STRICT_KERNEL_RWX at all which imo
> warrants a BUG_ON(). I am still working on v2 of my RFC which does
> return any __patch_instruction() error back to the caller of
> patch_instruction() similar to this patch.
Ok, that's good to know. I will drop this patch from my series, since
this can be done independently of the other changes.
- Naveen
^ permalink raw reply
* Re: [PATCH 3/3] powerpc/kprobes: Check return value of patch_instruction()
From: Naveen N. Rao @ 2020-04-27 17:13 UTC (permalink / raw)
To: Christophe Leroy, Steven Rostedt; +Cc: linuxppc-dev
In-Reply-To: <20200425100645.7aa85ee0@oasis.local.home>
Steven Rostedt wrote:
> On Sat, 25 Apr 2020 10:11:56 +0000
> Christophe Leroy <christophe.leroy@c-s.fr> wrote:
>>
>> Sure it's be more explicit, but then more lines also. 3 lines for only
>> one really usefull.
>>
>> With goto, I would look like:
>>
>> diff --git a/arch/powerpc/kernel/optprobes.c
>> b/arch/powerpc/kernel/optprobes.c
>> index 046485bb0a52..938208f824da 100644
>> --- a/arch/powerpc/kernel/optprobes.c
>> +++ b/arch/powerpc/kernel/optprobes.c
>> @@ -139,14 +139,14 @@ void arch_remove_optimized_kprobe(struct
>> optimized_kprobe *op)
>> }
>> }
>>
>> -#define PATCH_INSN(addr, instr) \
>> +#define PATCH_INSN(addr, instr, label) \
>
> With the explicit label as a parameter, makes it more evident that it
> will do something (like jump) with that label.
I think I will also rename the macro to PATCH_INSN_OR_GOTO() to make it
super evident :)
>
> I like this solution the best!
Thanks for the feedback.
- Naveen
^ permalink raw reply
* Re: [PATCH 3/3] powerpc/kprobes: Check return value of patch_instruction()
From: Naveen N. Rao @ 2020-04-27 17:11 UTC (permalink / raw)
To: Christophe Leroy, Steven Rostedt; +Cc: linuxppc-dev
In-Reply-To: <e743c9db-847a-2612-bf36-c23a57a056c5@c-s.fr>
Christophe Leroy wrote:
>
>
> On 04/24/2020 06:26 PM, Naveen N. Rao wrote:
>> Steven Rostedt wrote:
>>> On Thu, 23 Apr 2020 17:41:52 +0200
>>> Christophe Leroy <christophe.leroy@c-s.fr> wrote:
>>>> > diff --git a/arch/powerpc/kernel/optprobes.c
>>>> b/arch/powerpc/kernel/optprobes.c
>>>> > index 024f7aad1952..046485bb0a52 100644
>>>> > --- a/arch/powerpc/kernel/optprobes.c
>>>> > +++ b/arch/powerpc/kernel/optprobes.c
>>>> > @@ -139,52 +139,67 @@ void arch_remove_optimized_kprobe(struct
>>>> optimized_kprobe *op)
>>>> > }
>>>> > }
>>>> > > +#define PATCH_INSN(addr, instr) \
>>>> > +do { \
>>>> > + int rc = patch_instruction((unsigned int *)(addr),
>>>> instr); \
>>>> > + if (rc) { \
>>>> > + pr_err("%s:%d Error patching instruction at 0x%pK (%pS):
>>>> %d\n", \
>>>> > + __func__, __LINE__, \
>>>> > + (void *)(addr), (void *)(addr), rc); \
>>>> > + return rc; \
>>>> > + } \
>>>> > +} while (0)
>>>> > +
>>>> I hate this kind of macro which hides the "return".
>>>>
>>>> What about keeping the return action in the caller ?
>>>>
>>>> Otherwise, what about implementing something based on the use of
>>>> goto, on the same model as unsafe_put_user() for instance ?
>>
>> Thanks for the review.
>>
>> I noticed this as a warning from checkpatch.pl, but this looked compact
>> and correct for use in the two following functions. You'll notice that I
>> added it just before the two functions this is used in.
>>
>> I suppose 'goto err' is usable too, but the ftrace code (patch 2) will
>> end up with more changes. I'm also struggling to see how a 'goto' is
>> less offensive. I think Steve's suggestion below would be the better way
>> to go, to make things explicit.
>>
>
> Sure it's be more explicit, but then more lines also. 3 lines for only
> one really usefull.
>
> With goto, I would look like:
>
> diff --git a/arch/powerpc/kernel/optprobes.c
> b/arch/powerpc/kernel/optprobes.c
> index 046485bb0a52..938208f824da 100644
> --- a/arch/powerpc/kernel/optprobes.c
> +++ b/arch/powerpc/kernel/optprobes.c
> @@ -139,14 +139,14 @@ void arch_remove_optimized_kprobe(struct
> optimized_kprobe *op)
> }
> }
>
> -#define PATCH_INSN(addr, instr) \
> +#define PATCH_INSN(addr, instr, label) \
> do { \
> int rc = patch_instruction((unsigned int *)(addr), instr); \
> if (rc) { \
> pr_err("%s:%d Error patching instruction at 0x%pK (%pS): %d\n", \
> __func__, __LINE__, \
> (void *)(addr), (void *)(addr), rc); \
> - return rc; \
> + goto label; \
> } \
> } while (0)
My earlier complaint was that this would still add a flow control
statement, so didn't look to immediately address your original concern.
However, I suppose introduction of an explicit label makes things a bit
better.
In addition:
<snip>
> @@ -291,23 +297,8 @@ int arch_prepare_optimized_kprobe(struct
> optimized_kprobe *op, struct kprobe *p)
> goto error;
> }
>
> - rc = patch_instruction(buff + TMPL_CALL_HDLR_IDX, branch_op_callback);
> - if (rc) {
> - pr_err("%s:%d: Error patching instruction at 0x%pK: %d\n",
> - __func__, __LINE__,
> - (void *)(buff + TMPL_CALL_HDLR_IDX), rc);
> - rc = -EFAULT;
> - goto error;
> - }
> -
> - rc = patch_instruction(buff + TMPL_EMULATE_IDX, branch_emulate_step);
> - if (rc) {
> - pr_err("%s:%d: Error patching instruction at 0x%pK: %d\n",
> - __func__, __LINE__,
> - (void *)(buff + TMPL_EMULATE_IDX), rc);
> - rc = -EFAULT;
> - goto error;
> - }
> + PATCH_INSN(buff + TMPL_CALL_HDLR_IDX, branch_op_callback, efault);
> + PATCH_INSN(buff + TMPL_EMULATE_IDX, branch_emulate_step, efault);
I like how this variant can cover additional uses of patch_instruction()
here.
I will use this variant. Thanks for the suggestion!
- Naveen
^ permalink raw reply
* RE: [PATCH] x86: Fix early boot crash on gcc-10, next try
From: David Laight @ 2020-04-27 17:07 UTC (permalink / raw)
To: 'Borislav Petkov', Arvind Sankar
Cc: Jakub Jelinek, jgross@suse.com, x86@kernel.org, Kees Cook,
Peter Zijlstra, linuxppc-dev@lists.ozlabs.org, Michael Matz,
Nick Desaulniers, LKML, Sergei Trofimovich, clang-built-linux,
Ingo Molnar, Paul Mackerras, Andy Lutomirski, H. Peter Anvin,
Frédéric Pierret (fepitre), Thomas Gleixner,
Martin Liška, boris.ostrovsky@oracle.com
In-Reply-To: <20200425175249.GC24294@zn.tnic>
From: Borislav Petkov
> Sent: 25 April 2020 18:53
...
> IOW, something like this (ontop) which takes care of the xen case too.
> If it needs to be used by all arches, then I'll split the patch:
.
> - asm ("");
> + prevent_tail_call_optimization();
> }
One obvious implementation would be a real function call.
Which the compiler would convert into a tail call.
Just to confuse matters :-)
David
-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)
^ permalink raw reply
* Re: [PATCH v2 1/2] PCI/AER: Allow Native AER Host Bridges to use AER
From: Derrick, Jonathan @ 2020-04-27 16:11 UTC (permalink / raw)
To: helgaas@kernel.org
Cc: sathyanarayanan.kuppuswamy@linux.intel.com, Patel, Mayurkumar,
fred@fredlawl.com, sbobroff@linux.ibm.com,
linuxppc-dev@lists.ozlabs.org, Wysocki, Rafael J,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
andriy.shevchenko@linux.intel.com, olof@lixom.net,
alex.williamson@redhat.com, oohall@gmail.com, kbusch@kernel.org,
rajatja@google.com, mika.westerberg@linux.intel.com
In-Reply-To: <20200424233016.GA218665@google.com>
Hi Bjorn,
On Fri, 2020-04-24 at 18:30 -0500, Bjorn Helgaas wrote:
> Hi Jon,
>
> I'm glad you raised this because I think the way we handle
> FIRMWARE_FIRST is really screwed up.
>
> On Mon, Apr 20, 2020 at 03:37:09PM -0600, Jon Derrick wrote:
> > Some platforms have a mix of ports whose capabilities can be negotiated
> > by _OSC, and some ports which are not described by ACPI and instead
> > managed by Native drivers. The existing Firmware-First HEST model can
> > incorrectly tag these Native, Non-ACPI ports as Firmware-First managed
> > ports by advertising the HEST Global Flag and matching the type and
> > class of the port (aer_hest_parse).
> >
> > If the port requests Native AER through the Host Bridge's capability
> > settings, the AER driver should honor those settings and allow the port
> > to bind. This patch changes the definition of Firmware-First to exclude
> > ports whose Host Bridges request Native AER.
> >
> > Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
> > ---
> > drivers/pci/pcie/aer.c | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> > index f4274d3..30fbd1f 100644
> > --- a/drivers/pci/pcie/aer.c
> > +++ b/drivers/pci/pcie/aer.c
> > @@ -314,6 +314,9 @@ int pcie_aer_get_firmware_first(struct pci_dev *dev)
> > if (pcie_ports_native)
> > return 0;
> >
> > + if (pci_find_host_bridge(dev->bus)->native_aer)
> > + return 0;
>
> I hope we don't have to complicate pcie_aer_get_firmware_first() by
> adding this "native_aer" check here. I'm not sure what we actually
> *should* do based on FIRMWARE_FIRST, but I don't think the current
> uses really make sense.
>
> I think Linux makes too many assumptions based on the FIRMWARE_FIRST
> bit. The ACPI spec really only says (ACPI v6.3, sec 18.3.2.4):
>
> If set, FIRMWARE_FIRST indicates to the OSPM that system firmware
> will handle errors from this source first.
>
> If FIRMWARE_FIRST is set in the flags field, the Enabled field [of
> the HEST AER structure] is ignored by the OSPM.
>
> I do not see anything there about who owns the AER Capability, but
> Linux assumes that if FIRMWARE_FIRST is set, firmware must own the AER
> Capability. I think that's reading too much into the spec.
>
> We already have _OSC, which *does* explicitly talk about who owns the
> AER Capability, and I think we should rely on that. If firmware
> doesn't want the OS to touch the AER Capability, it should decline to
> give ownership to the OS via _OSC.
>
> > if (!dev->__aer_firmware_first_valid)
> > aer_set_firmware_first(dev);
> > return dev->__aer_firmware_first;
> > --
> > 1.8.3.1
> >
Just a little bit of reading and my interpretation, as it seems like
some of this is just layers upon layers of possibly conflicting yet
intentionally vague descriptions.
_OSC seems to describe that OSPM can handle AER (6.2.11.3):
PCI Express Advanced Error Reporting (AER) control
The OS sets this bit to 1 to request control over PCI Express AER.
If the OS successfully receives control of this feature, it must
handle error reporting through the AER Capability as described in
the PCI Express Base Specification.
For AER and DPC the ACPI root port enumeration will properly set
native_aer/dpc based on _OSC:
struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
...
if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL))
host_bridge->native_aer = 0;
if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL))
host_bridge->native_pme = 0;
if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
host_bridge->native_ltr = 0;
if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL))
host_bridge->native_dpc = 0;
As DPC was defined in an ECN [1], I would imagine AER will need to
cover DPC for legacy platforms prior to the ECN.
The complication is that HEST also seems to describe how ports (and
other devices) are managed either individually or globally:
Table 18-387 PCI Express Root Port AER Structure
...
Flags:
[0] - FIRMWARE_FIRST: If set, this bit indicates to the OSPM that
system firmware will handle errors from this source
[1] - GLOBAL: If set, indicates that the settings contained in this
structure apply globally to all PCI Express Devices. All other bits
must be set to zero
The _OSC definition seems to contradict/negate the above FIRMWARE_FIRST
definition that says only firmware will handle errors. It's a bit
different than the IA_32 MCE definition which allows for a GHES_ASSIST
condition, which would cause Firmware 'First', however does allow the
error to be received by OSPM AER via GHES:
Table 18-385 IA-32 Architecture Corrected Machine Check Structure
[0] - FIRMWARE_FIRST: If set, this bit indicates that system
firmware will handle errors from this source first.
[2] - GHES_ASSIST: If set, this bit indicates that although OSPM is
responsible for directly handling the error (as expected when
FIRMWARE_FIRST is not set), system firmware reports additional
information in the context of an interrupt generated by the error.
The additional information is reported in a Generic Hardware Error
Source structure with a matching Related Source Id.
I think Linux needs to make an assumption that devices either
enumerated in HEST or enumerated globally by HEST should be managed by
FFS. However it seems that Linux should also be correlating that with
_OSC as _OSC seems to directly contradict and possibly supercede the
HEST expectation.
[1] https://members.pcisig.com/wg/PCI-SIG/document/12888
^ permalink raw reply
* Re: [PATCH v2 2/2] PCI/DPC: Allow Native DPC Host Bridges to use DPC
From: Kuppuswamy, Sathyanarayanan @ 2020-04-27 15:43 UTC (permalink / raw)
To: Derrick, Jonathan, helgaas@kernel.org
Cc: bhelgaas@google.com, Patel, Mayurkumar, fred@fredlawl.com,
sbobroff@linux.ibm.com, linuxppc-dev@lists.ozlabs.org,
Wysocki, Rafael J, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, andriy.shevchenko@linux.intel.com,
olof@lixom.net, alex.williamson@redhat.com, oohall@gmail.com,
kbusch@kernel.org, rajatja@google.com,
mika.westerberg@linux.intel.com
In-Reply-To: <6344a9afcc585504c5dfbc00174280613683064d.camel@intel.com>
On 4/27/20 8:15 AM, Derrick, Jonathan wrote:
> Hi Sathyanarayanan,
>
> On Sat, 2020-04-25 at 13:46 -0700, Kuppuswamy, Sathyanarayanan wrote:
>>
>> On 4/23/20 8:11 AM, Derrick, Jonathan wrote:
>>> Hi Sathyanarayanan,
>>>
>>> On Wed, 2020-04-22 at 15:50 -0700, Kuppuswamy, Sathyanarayanan wrote:
>>>> On 4/20/20 2:37 PM, Jon Derrick wrote:
>>>>> The existing portdrv model prevents DPC services without either OS
>>>>> control (_OSC) granted to AER services, a Host Bridge requesting Native
>>>>> AER, or using one of the 'pcie_ports=' parameters of 'native' or
>>>>> 'dpc-native'.
>>>>>
>>>>> The DPC port service driver itself will also fail to probe if the kernel
>>>>> assumes the port is using Firmware-First AER. It's a reasonable
>>>>> expectation that a port using Firmware-First AER will also be using
>>>>> Firmware-First DPC, however if a Host Bridge requests Native DPC, the
>>>>> DPC driver should allow it and not fail to bind due to AER capability
>>>>> settings.
>>>>>
>>>>> Host Bridges which request Native DPC port services will also likely
>>>>> request Native AER, however it shouldn't be a requirement. This patch
>>>>> allows ports on those Host Bridges to have DPC port services.
>>>>>
>>>>> This will avoid the unlikely situation where the port is Firmware-First
>>>>> AER and Native DPC, and a BIOS or switch firmware preconfiguration of
>>>>> the DPC trigger could result in unhandled DPC events.
>>>>>
>>>>> Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
>>>>> ---
>>>>> drivers/pci/pcie/dpc.c | 3 ++-
>>>>> drivers/pci/pcie/portdrv_core.c | 3 ++-
>>>>> 2 files changed, 4 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
>>>>> index 7621704..3f3106f 100644
>>>>> --- a/drivers/pci/pcie/dpc.c
>>>>> +++ b/drivers/pci/pcie/dpc.c
>>>>> @@ -284,7 +284,8 @@ static int dpc_probe(struct pcie_device *dev)
>>>>> int status;
>>>>> u16 ctl, cap;
>>>>>
>>>>> - if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native)
>>>>> + if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native &&
>>>>> + !pci_find_host_bridge(pdev->bus)->native_dpc)
>>>> Why do it in probe as well ? if host->native_dpc is not set then the
>>>> device DPC probe it self won't happen right ?
>>>
>>> Portdrv only enables the interrupt and allows the probe to occur.
>>
>> Please check the following snippet of code (from portdrv_core.c).
>>
>> IIUC, pcie_device_init() will not be called if PCIE_PORT_SERVICE_DPC is
>> not set in capabilities. Your change in portdrv_core.c already
>> selectively enables the PCIE_PORT_SERVICE_DPC service based on
>> native_dpc value.
>>
> That's right. So pcie_device_init registers the port service driver
> allowing the services enumeration to occur.
>
>> So IMO, adding native_dpc check in dpc_probe() is redundant.
>>
>> int pcie_port_device_register(struct pci_dev *dev)
>> /* Allocate child services if any */
>> status = -ENODEV;
>> nr_service = 0;
>> for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
>> int service = 1 << i;
>> if (!(capabilities & service))
>> continue;
>> if (!pcie_device_init(dev, service, irqs[i]))
>> nr_service++;
>> }
>>
> This is the tricky part
> There's still a check in dpc_probe for AER FFS or pcie_ports=dpc-
> native:
>
> if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native)
> return -ENOTSUPP;
>
> One option is to move that to get_port_device_capability and remove the
> dpc_probe check
Yes, its better to group them together in get_port_device_capability().
But it should be done in a separate patch.
>
>>> The probe itself will still fail if there's a mixed-mode _OSC
>>> negotiated AER & DPC, due to pcie_aer_get_firmware_first returning 1
>>> for AER and no check for DPC.
>>>
>>> I don't know if such a platform will exist, but the kernel is already
>>> wired for 'dpc-native' so it makes sense to extend it for this..
>>>
>>> This transform might be more readable:
>>> if (pcie_aer_get_firmware_first(pdev) &&
>>> !(pcie_ports_dpc_native || hb->native_dpc))
>>>
>>>
>>>
>>>>> return -ENOTSUPP;
>>>>>
>>>>> status = devm_request_threaded_irq(device, dev->irq, dpc_irq,
>>>>> diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
>>>>> index 50a9522..f2139a1 100644
>>>>> --- a/drivers/pci/pcie/portdrv_core.c
>>>>> +++ b/drivers/pci/pcie/portdrv_core.c
>>>>> @@ -256,7 +256,8 @@ static int get_port_device_capability(struct pci_dev *dev)
>>>>> */
>>>>> if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) &&
>>>>> pci_aer_available() &&
>>>>> - (pcie_ports_dpc_native || (services & PCIE_PORT_SERVICE_AER)))
>>>>> + (pcie_ports_dpc_native || host->native_dpc ||
>>>>> + (services & PCIE_PORT_SERVICE_AER)))
>>>>> services |= PCIE_PORT_SERVICE_DPC;
>>>>>
>>>>> if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM ||
>>>>>
^ permalink raw reply
* Re: [PATCH v2 2/2] PCI/DPC: Allow Native DPC Host Bridges to use DPC
From: Derrick, Jonathan @ 2020-04-27 15:15 UTC (permalink / raw)
To: sathyanarayanan.kuppuswamy@linux.intel.com, helgaas@kernel.org
Cc: bhelgaas@google.com, Patel, Mayurkumar, fred@fredlawl.com,
sbobroff@linux.ibm.com, linuxppc-dev@lists.ozlabs.org,
Wysocki, Rafael J, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, andriy.shevchenko@linux.intel.com,
olof@lixom.net, alex.williamson@redhat.com, oohall@gmail.com,
kbusch@kernel.org, rajatja@google.com,
mika.westerberg@linux.intel.com
In-Reply-To: <7e574cc1-a24b-5c4b-7d4f-3fda3f395390@linux.intel.com>
Hi Sathyanarayanan,
On Sat, 2020-04-25 at 13:46 -0700, Kuppuswamy, Sathyanarayanan wrote:
>
> On 4/23/20 8:11 AM, Derrick, Jonathan wrote:
> > Hi Sathyanarayanan,
> >
> > On Wed, 2020-04-22 at 15:50 -0700, Kuppuswamy, Sathyanarayanan wrote:
> > > On 4/20/20 2:37 PM, Jon Derrick wrote:
> > > > The existing portdrv model prevents DPC services without either OS
> > > > control (_OSC) granted to AER services, a Host Bridge requesting Native
> > > > AER, or using one of the 'pcie_ports=' parameters of 'native' or
> > > > 'dpc-native'.
> > > >
> > > > The DPC port service driver itself will also fail to probe if the kernel
> > > > assumes the port is using Firmware-First AER. It's a reasonable
> > > > expectation that a port using Firmware-First AER will also be using
> > > > Firmware-First DPC, however if a Host Bridge requests Native DPC, the
> > > > DPC driver should allow it and not fail to bind due to AER capability
> > > > settings.
> > > >
> > > > Host Bridges which request Native DPC port services will also likely
> > > > request Native AER, however it shouldn't be a requirement. This patch
> > > > allows ports on those Host Bridges to have DPC port services.
> > > >
> > > > This will avoid the unlikely situation where the port is Firmware-First
> > > > AER and Native DPC, and a BIOS or switch firmware preconfiguration of
> > > > the DPC trigger could result in unhandled DPC events.
> > > >
> > > > Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
> > > > ---
> > > > drivers/pci/pcie/dpc.c | 3 ++-
> > > > drivers/pci/pcie/portdrv_core.c | 3 ++-
> > > > 2 files changed, 4 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
> > > > index 7621704..3f3106f 100644
> > > > --- a/drivers/pci/pcie/dpc.c
> > > > +++ b/drivers/pci/pcie/dpc.c
> > > > @@ -284,7 +284,8 @@ static int dpc_probe(struct pcie_device *dev)
> > > > int status;
> > > > u16 ctl, cap;
> > > >
> > > > - if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native)
> > > > + if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native &&
> > > > + !pci_find_host_bridge(pdev->bus)->native_dpc)
> > > Why do it in probe as well ? if host->native_dpc is not set then the
> > > device DPC probe it self won't happen right ?
> >
> > Portdrv only enables the interrupt and allows the probe to occur.
>
> Please check the following snippet of code (from portdrv_core.c).
>
> IIUC, pcie_device_init() will not be called if PCIE_PORT_SERVICE_DPC is
> not set in capabilities. Your change in portdrv_core.c already
> selectively enables the PCIE_PORT_SERVICE_DPC service based on
> native_dpc value.
>
That's right. So pcie_device_init registers the port service driver
allowing the services enumeration to occur.
> So IMO, adding native_dpc check in dpc_probe() is redundant.
>
> int pcie_port_device_register(struct pci_dev *dev)
> /* Allocate child services if any */
> status = -ENODEV;
> nr_service = 0;
> for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
> int service = 1 << i;
> if (!(capabilities & service))
> continue;
> if (!pcie_device_init(dev, service, irqs[i]))
> nr_service++;
> }
>
This is the tricky part
There's still a check in dpc_probe for AER FFS or pcie_ports=dpc-
native:
if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native)
return -ENOTSUPP;
One option is to move that to get_port_device_capability and remove the
dpc_probe check
> > The probe itself will still fail if there's a mixed-mode _OSC
> > negotiated AER & DPC, due to pcie_aer_get_firmware_first returning 1
> > for AER and no check for DPC.
> >
> > I don't know if such a platform will exist, but the kernel is already
> > wired for 'dpc-native' so it makes sense to extend it for this..
> >
> > This transform might be more readable:
> > if (pcie_aer_get_firmware_first(pdev) &&
> > !(pcie_ports_dpc_native || hb->native_dpc))
> >
> >
> >
> > > > return -ENOTSUPP;
> > > >
> > > > status = devm_request_threaded_irq(device, dev->irq, dpc_irq,
> > > > diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
> > > > index 50a9522..f2139a1 100644
> > > > --- a/drivers/pci/pcie/portdrv_core.c
> > > > +++ b/drivers/pci/pcie/portdrv_core.c
> > > > @@ -256,7 +256,8 @@ static int get_port_device_capability(struct pci_dev *dev)
> > > > */
> > > > if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) &&
> > > > pci_aer_available() &&
> > > > - (pcie_ports_dpc_native || (services & PCIE_PORT_SERVICE_AER)))
> > > > + (pcie_ports_dpc_native || host->native_dpc ||
> > > > + (services & PCIE_PORT_SERVICE_AER)))
> > > > services |= PCIE_PORT_SERVICE_DPC;
> > > >
> > > > if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM ||
> > > >
^ permalink raw reply
* Re: [PATCH v2 6/7] debugfs: switch to simplefs inode creation API
From: Paolo Bonzini @ 2020-04-27 15:15 UTC (permalink / raw)
To: Emanuele Giuseppe Esposito, linux-fsdevel
Cc: Rafael J. Wysocki, David Airlie, dri-devel, Christoph Hellwig,
Andrew Donnellan, linux-scsi, James Morris, Serge E. Hallyn,
Daniel Vetter, Arnd Bergmann, James E.J. Bottomley,
Maarten Lankhorst, Maxime Ripard, Manoj N. Kumar, Alexander Viro,
Matthew R. Ochs, Uma Krishnan, John Johansen, Martin K. Petersen,
Greg Kroah-Hartman, linux-kernel, linux-security-module,
Thomas Zimmermann, Frederic Barrat, linuxppc-dev, Joel Becker
In-Reply-To: <20200421135741.30657-4-eesposit@redhat.com>
On 21/04/20 15:57, Emanuele Giuseppe Esposito wrote:
> - inode = debugfs_get_inode(dentry->d_sb);
You're not removing debugfs_get_inode so I think you're going to get a
warning (same in tracefs)?
You can wait a few more days for reviews and/or Acked-bys (especially
for patches 6 and 7) and then post v3.
Since the touch-everything patch (#2) has already been reviewed, and
it's mechanical and not introducing any semantic change, you can
probably reduce the To/Cc list to filesystem, debugfs and tracefs
maintainers.
Thanks,
Paolo
^ permalink raw reply
* Re: [PATCH v2, RESEND] misc: new driver sram_uapi for user level SRAM access
From: Rob Herring @ 2020-04-27 14:13 UTC (permalink / raw)
To: Wang Wenhu
Cc: Arnd Bergmann, Greg Kroah-Hartman, Randy Dunlap,
linux-kernel@vger.kernel.org, Scott Wood, kernel, linuxppc-dev
In-Reply-To: <20200420030538.101696-1-wenhu.wang@vivo.com>
On Sun, Apr 19, 2020 at 10:06 PM Wang Wenhu <wenhu.wang@vivo.com> wrote:
>
> A generic User-Kernel interface that allows a misc device created
> by it to support file-operations of ioctl and mmap to access SRAM
> memory from user level. Different kinds of SRAM alloction and free
> APIs could be registered by specific SRAM hardware level driver to
> the available list and then be chosen by users to allocate and map
> SRAM memory from user level.
>
> It is extremely helpful for the user space applications that require
> high performance memory accesses, such as embedded networking devices
> that would process data in user space, and PowerPC e500 is a case.
>
> Signed-off-by: Wang Wenhu <wenhu.wang@vivo.com>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: Christophe Leroy <christophe.leroy@c-s.fr>
> Cc: Scott Wood <oss@buserror.net>
> Cc: Michael Ellerman <mpe@ellerman.id.au>
> Cc: Randy Dunlap <rdunlap@infradead.org>
> Cc: linuxppc-dev@lists.ozlabs.org
> ---
> Changes since v1: addressed comments from Arnd
> * Changed the ioctl cmd definitions using _IO micros
> * Export interfaces for HW-SRAM drivers to register apis to available list
> * Modified allocation alignment to PAGE_SIZE
> * Use phys_addr_t as type of SRAM resource size and offset
> * Support compat_ioctl
> * Misc device name:sram
>
> Note: From this on, the SRAM_UAPI driver is independent to any hardware
> drivers, so I would only commit the patch itself as v2, while the v1 of
> it was wrapped together with patches for Freescale L2-Cache-SRAM device.
> Then after, I'd create patches for Freescale L2-Cache-SRAM device as
> another series.
There's work to add SRAM support to dma-buf heaps[1]. Take a look and
see if that works for you.
Rob
[1] https://lore.kernel.org/lkml/20200424222740.16259-1-afd@ti.com/
^ permalink raw reply
* Re: [RFC 3/3] powernv/cpuidle : Introduce capability for firmware-enabled-stop
From: Gautham R Shenoy @ 2020-04-27 13:48 UTC (permalink / raw)
To: Abhishek Goel
Cc: ego, mikey, linux-kernel, npiggin, linuxppc-dev, oohall, psampat
In-Reply-To: <20200427021027.114582-3-huntbag@linux.vnet.ibm.com>
On Sun, Apr 26, 2020 at 09:10:27PM -0500, Abhishek Goel wrote:
> This patch introduces the capability for firmware to handle the stop
> states instead. A bit is set based on the discovery of the feature
> and correspondingly also the responsibility to handle the stop states.
>
> If Kernel does not know about stop version, it can fallback to opal for
> idle stop support if firmware-stop-supported property is present.
>
> Earlier this patch was posted as part of this series :
> https://lkml.org/lkml/2020/3/4/589
>
> Signed-off-by: Pratik Rajesh Sampat <psampat@linux.ibm.com>
> Signed-off-by: Abhishek Goel <huntbag@linux.vnet.ibm.com>
> ---
>
> v1->v2: This patch is newly added in this series.
>
> arch/powerpc/include/asm/processor.h | 1 +
> arch/powerpc/kernel/dt_cpu_ftrs.c | 8 ++++++++
> arch/powerpc/platforms/powernv/idle.c | 27 ++++++++++++++++-----------
> 3 files changed, 25 insertions(+), 11 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
> index 66fa20476d0e..d5c6532b11ef 100644
> --- a/arch/powerpc/include/asm/processor.h
> +++ b/arch/powerpc/include/asm/processor.h
> @@ -430,6 +430,7 @@ extern unsigned long cpuidle_disable;
> enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
>
> #define STOP_ENABLE 0x00000001
> +#define FIRMWARE_STOP_ENABLE 0x00000010
>
> #define STOP_VERSION_P9 0x1
>
> diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c b/arch/powerpc/kernel/dt_cpu_ftrs.c
> index db1a525e090d..ff4a87b79702 100644
> --- a/arch/powerpc/kernel/dt_cpu_ftrs.c
> +++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
> @@ -298,6 +298,13 @@ static int __init feat_enable_idle_stop(struct dt_cpu_feature *f)
> return 1;
> }
>
> +static int __init feat_enable_firmware_stop(struct dt_cpu_feature *f)
> +{
> + stop_dep.cpuidle_prop |= FIRMWARE_STOP_ENABLE;
> +
> + return 1;
> +}
> +
> static int __init feat_enable_mmu_hash(struct dt_cpu_feature *f)
> {
> u64 lpcr;
> @@ -592,6 +599,7 @@ static struct dt_cpu_feature_match __initdata
> {"idle-nap", feat_enable_idle_nap, 0},
> {"alignment-interrupt-dsisr", feat_enable_align_dsisr, 0},
> {"idle-stop", feat_enable_idle_stop, 0},
> + {"firmware-stop-supported", feat_enable_firmware_stop, 0},
> {"machine-check-power8", feat_enable_mce_power8, 0},
> {"performance-monitor-power8", feat_enable_pmu_power8, 0},
> {"data-stream-control-register", feat_enable_dscr, CPU_FTR_DSCR},
> diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c
> index 538f0842ac3f..0de5de81902e 100644
> --- a/arch/powerpc/platforms/powernv/idle.c
> +++ b/arch/powerpc/platforms/powernv/idle.c
> @@ -633,16 +633,6 @@ static unsigned long power9_idle_stop(unsigned long psscr, bool mmu_on)
> unsigned long mmcr0 = 0;
> struct p9_sprs sprs = {}; /* avoid false used-uninitialised */
> bool sprs_saved = false;
> - int rc = 0;
> -
> - /*
> - * Kernel takes decision whether to make OPAL call or not. This logic
> - * will be combined with the logic for BE opal to take decision.
> - */
> - if (firmware_stop_supported) {
> - rc = opal_cpu_idle(cpu_to_be64(__pa(&srr1)), (uint64_t) psscr);
> - goto out;
> - }
>
> if (!(psscr & (PSSCR_EC|PSSCR_ESL))) {
> /* EC=ESL=0 case */
> @@ -835,6 +825,19 @@ static unsigned long power9_idle_stop(unsigned long psscr, bool mmu_on)
> return srr1;
> }
>
> +static unsigned long power9_firmware_idle_stop(unsigned long psscr, bool mmu_on)
> +{
> + unsigned long srr1;
> + int rc;
> +
> + rc = opal_cpu_idle(cpu_to_be64(__pa(&srr1)), (uint64_t) psscr);
> +
> + if (mmu_on)
> + mtmsr(MSR_KERNEL);
> + return srr1;
> +
> +}
> +
> #ifdef CONFIG_HOTPLUG_CPU
> static unsigned long power9_offline_stop(unsigned long psscr)
> {
> @@ -1394,9 +1397,11 @@ static int __init pnv_init_idle_states(void)
> !(stop_dep.cpuidle_prop & STOP_ENABLE))
> goto out;
>
> - /* Check for supported version in kernel */
> + /* Check for supported version in kernel or fallback to kernel*/
> if (stop_dep.stop_version & STOP_VERSION_P9) {
> stop_dep.idle_stop = power9_idle_stop;
> + } else if (stop_dep.cpuidle_prop & FIRMWARE_STOP_ENABLE) {
> + stop_dep.idle_stop = power9_firmware_idle_stop;
Ok, so in this patch you first check if the "idle-stop" feature is
available. Only otherwise you fallback to the OPAL based cpuidle
driver.
This looks ok to me.
> } else {
> stop_dep.idle_stop = NULL;
> goto out;
> --
> 2.17.1
>
--
Thanks and Regards
gautham.
^ permalink raw reply
* Re: [RFC 2/3] powernv/cpuidle : Interface for an idle-stop dependency structure
From: Gautham R Shenoy @ 2020-04-27 13:47 UTC (permalink / raw)
To: Abhishek Goel
Cc: ego, mikey, linux-kernel, npiggin, linuxppc-dev, oohall, psampat
In-Reply-To: <20200427021027.114582-2-huntbag@linux.vnet.ibm.com>
On Sun, Apr 26, 2020 at 09:10:26PM -0500, Abhishek Goel wrote:
> This patch introduces the idea of having a dependency structure for
> idle-stop. The structure encapsulates the following:
> 1. Bitmask for version of idle-stop
> 2. Bitmask for propterties like ENABLE/DISABLE
> 3. Function pointer which helps handle how the stop must be invoked
>
> This patch lays a foundation for other idle-stop versions to be added
> and handled cleanly based on their specified requirments.
> Currently it handles the existing "idle-stop" version by setting the
> discovery bits and the function pointer.
>
> Earlier this patch was posted as part of this series :
> https://lkml.org/lkml/2020/3/4/589
Please see the review comments to the earlier version:
https://lkml.org/lkml/2020/4/8/245
I still feel that we don't need cpuidle_prop and stop_version to be
separate fields.
>
> Signed-off-by: Pratik Rajesh Sampat <psampat@linux.ibm.com>
> Signed-off-by: Abhishek Goel <huntbag@linux.vnet.ibm.com>
> ---
>
> v1->v2: This patch is newly added in this series.
>
> arch/powerpc/include/asm/processor.h | 17 +++++++++++++++++
> arch/powerpc/kernel/dt_cpu_ftrs.c | 5 +++++
> arch/powerpc/platforms/powernv/idle.c | 18 ++++++++++++++----
> drivers/cpuidle/cpuidle-powernv.c | 3 ++-
> 4 files changed, 38 insertions(+), 5 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
> index eedcbfb9a6ff..66fa20476d0e 100644
> --- a/arch/powerpc/include/asm/processor.h
> +++ b/arch/powerpc/include/asm/processor.h
> @@ -429,6 +429,23 @@ extern void power4_idle_nap(void);
> extern unsigned long cpuidle_disable;
> enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
>
> +#define STOP_ENABLE 0x00000001
> +
> +#define STOP_VERSION_P9 0x1
> +
> +/*
> + * Classify the dependencies of the stop states
> + * @idle_stop: function handler to handle the quirk stop version
> + * @cpuidle_prop: Signify support for stop states through kernel and/or firmware
> + * @stop_version: Classify quirk versions for stop states
> + */
> +typedef struct {
> + unsigned long (*idle_stop)(unsigned long psscr, bool mmu_on);
> + uint8_t cpuidle_prop;
> + uint8_t stop_version;
> +} stop_deps_t;
> +extern stop_deps_t stop_dep;
> +
> extern int powersave_nap; /* set if nap mode can be used in idle loop */
>
> extern void power7_idle_type(unsigned long type);
> diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c b/arch/powerpc/kernel/dt_cpu_ftrs.c
> index 182b4047c1ef..db1a525e090d 100644
> --- a/arch/powerpc/kernel/dt_cpu_ftrs.c
> +++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
> @@ -292,6 +292,8 @@ static int __init feat_enable_idle_stop(struct dt_cpu_feature *f)
> lpcr |= LPCR_PECE1;
> lpcr |= LPCR_PECE2;
> mtspr(SPRN_LPCR, lpcr);
> + stop_dep.cpuidle_prop |= STOP_ENABLE;
> + stop_dep.stop_version = STOP_VERSION_P9;
>
> return 1;
> }
> @@ -657,6 +659,9 @@ static void __init cpufeatures_setup_start(u32 isa)
> }
> }
>
> +stop_deps_t stop_dep = {NULL, 0x0, 0x0};
> +EXPORT_SYMBOL(stop_dep);
> +
> static bool __init cpufeatures_process_feature(struct dt_cpu_feature *f)
> {
> const struct dt_cpu_feature_match *m;
> diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c
> index 1841027b25c5..538f0842ac3f 100644
> --- a/arch/powerpc/platforms/powernv/idle.c
> +++ b/arch/powerpc/platforms/powernv/idle.c
> @@ -842,7 +842,7 @@ static unsigned long power9_offline_stop(unsigned long psscr)
>
> #ifndef CONFIG_KVM_BOOK3S_HV_POSSIBLE
> __ppc64_runlatch_off();
> - srr1 = power9_idle_stop(psscr, true);
> + srr1 = stop_dep.idle_stop(psscr, true);
> __ppc64_runlatch_on();
> #else
> /*
> @@ -858,7 +858,7 @@ static unsigned long power9_offline_stop(unsigned long psscr)
> local_paca->kvm_hstate.hwthread_state = KVM_HWTHREAD_IN_IDLE;
>
> __ppc64_runlatch_off();
> - srr1 = power9_idle_stop(psscr, false);
> + srr1 = stop_dep.idle_stop(psscr, true);
> __ppc64_runlatch_on();
>
> local_paca->kvm_hstate.hwthread_state = KVM_HWTHREAD_IN_KERNEL;
> @@ -886,7 +886,7 @@ void power9_idle_type(unsigned long stop_psscr_val,
> psscr = (psscr & ~stop_psscr_mask) | stop_psscr_val;
>
> __ppc64_runlatch_off();
> - srr1 = power9_idle_stop(psscr, true);
> + srr1 = stop_dep.idle_stop(psscr, true);
> __ppc64_runlatch_on();
>
> fini_irq_for_idle_irqsoff();
> @@ -1390,8 +1390,18 @@ static int __init pnv_init_idle_states(void)
> nr_pnv_idle_states = 0;
> supported_cpuidle_states = 0;
>
> - if (cpuidle_disable != IDLE_NO_OVERRIDE)
> + if (cpuidle_disable != IDLE_NO_OVERRIDE ||
> + !(stop_dep.cpuidle_prop & STOP_ENABLE))
> goto out;
> +
> + /* Check for supported version in kernel */
> + if (stop_dep.stop_version & STOP_VERSION_P9) {
> + stop_dep.idle_stop = power9_idle_stop;
> + } else {
> + stop_dep.idle_stop = NULL;
> + goto out;
> + }
> +
> rc = pnv_parse_cpuidle_dt();
> if (rc)
> return rc;
> diff --git a/drivers/cpuidle/cpuidle-powernv.c b/drivers/cpuidle/cpuidle-powernv.c
> index 1b299e801f74..7430a8edf5c9 100644
> --- a/drivers/cpuidle/cpuidle-powernv.c
> +++ b/drivers/cpuidle/cpuidle-powernv.c
> @@ -371,7 +371,8 @@ static int powernv_add_idle_states(void)
> */
> static int powernv_idle_probe(void)
> {
> - if (cpuidle_disable != IDLE_NO_OVERRIDE)
> + if (cpuidle_disable != IDLE_NO_OVERRIDE ||
> + !(stop_dep.cpuidle_prop & STOP_ENABLE))
> return -ENODEV;
>
> if (firmware_has_feature(FW_FEATURE_OPAL)) {
> --
> 2.17.1
>
^ permalink raw reply
* Re: [PATCH v5 0/6] implement KASLR for powerpc/fsl_booke/64
From: Daniel Axtens @ 2020-04-27 13:34 UTC (permalink / raw)
To: Jason Yan, mpe, linuxppc-dev, diana.craciun, christophe.leroy,
benh, paulus, npiggin, keescook, kernel-hardening, oss
Cc: linux-kernel, zhaohongjiang
In-Reply-To: <7362ac94-8f3a-1eed-4445-10772eebea38@huawei.com>
[-- Attachment #1: Type: text/plain, Size: 157 bytes --]
Hi Jason,
> Thanks for the test. Can you send me the full log which may contain the
> system info such as the following:
It's attached.
Regards,
Daniel
[-- Attachment #2: fail-log --]
[-- Type: application/octet-stream, Size: 40438 bytes --]
[ 0.000000] KASLR: No safe seed for randomizing the kernel base.
[ 0.000000] MMU: Supported page sizes
[ 0.000000] 4 KB as direct
[ 0.000000] 2048 KB as direct & indirect
[ 0.000000] 4096 KB as direct
[ 0.000000] 16384 KB as direct
[ 0.000000] 65536 KB as direct
[ 0.000000] 262144 KB as direct
[ 0.000000] 1048576 KB as direct
[ 0.000000] MMU: Book3E HW tablewalk enabled
[ 0.000000] Linux version 5.7.0-rc2-00865-gf55c3370c485 (dja@dja-thinkpad) (gcc version 9.2.1 20191008 (Ubuntu 9.2.1-9ubuntu1), GNU ld (GNU Binutils for Ubuntu) 2.33) #326 SMP Mon Apr 27 23:26:22 AEST 2020
[ 0.000000] Argh, can't find dcache properties !
[ 0.000000] Argh, can't find icache properties !
[ 0.000000] Using CoreNet Generic machine description
[ 0.000000] Found legacy serial port 0 for /soc@ffe000000/serial@11c500
[ 0.000000] mem=ffe11c500, taddr=ffe11c500, irq=0, clk=366666663, speed=0
[ 0.000000] Found legacy serial port 1 for /soc@ffe000000/serial@11c600
[ 0.000000] mem=ffe11c600, taddr=ffe11c600, irq=0, clk=366666663, speed=0
[ 0.000000] Found legacy serial port 2 for /soc@ffe000000/serial@11d500
[ 0.000000] mem=ffe11d500, taddr=ffe11d500, irq=0, clk=366666663, speed=0
[ 0.000000] Found legacy serial port 3 for /soc@ffe000000/serial@11d600
[ 0.000000] mem=ffe11d600, taddr=ffe11d600, irq=0, clk=366666663, speed=0
[ 0.000000] ioremap() called early from .find_legacy_serial_ports+0x6d0/0x7c0. Use early_ioremap() instead
[ 0.000000] printk: bootconsole [udbg0] enabled
[ 0.000000] CPU maps initialized for 2 threads per core
[ 0.000000] (thread shift is 1)
[ 0.000000] Allocated 1984 bytes for 24 pacas
[ 0.000000] -----------------------------------------------------
[ 0.000000] phys_mem_size = 0x180000000
[ 0.000000] dcache_bsize = 0x40
[ 0.000000] icache_bsize = 0x40
[ 0.000000] cpu_features = 0x00000003009003b6
[ 0.000000] possible = 0x00000003009003b6
[ 0.000000] always = 0x00000003008003b4
[ 0.000000] cpu_user_features = 0xdc008000 0x08000000
[ 0.000000] mmu_features = 0x000a0010
[ 0.000000] firmware_features = 0x0000000000000000
[ 0.000000] physical_start = 0x10080000
[ 0.000000] -----------------------------------------------------
[ 0.000000] CoreNet Generic board
[ 0.000000] barrier-nospec: using isync; sync as speculation barrier
[ 0.000000] barrier-nospec: patched 395 locations
[ 0.000000] Top of RAM: 0x180000000, Total RAM: 0x180000000
[ 0.000000] Memory hole size: 0MB
[ 0.000000] Zone ranges:
[ 0.000000] DMA [mem 0x0000000000000000-0x000000007fffffff]
[ 0.000000] Normal [mem 0x0000000080000000-0x000000017fffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x000000017fffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x000000017fffffff]
[ 0.000000] On node 0 totalpages: 1572864
[ 0.000000] DMA zone: 8192 pages used for memmap
[ 0.000000] DMA zone: 0 pages reserved
[ 0.000000] DMA zone: 524288 pages, LIFO batch:63
[ 0.000000] Normal zone: 16384 pages used for memmap
[ 0.000000] Normal zone: 1048576 pages, LIFO batch:63
[ 0.000000] MMU: Allocated 2112 bytes of context maps for 255 contexts
[ 0.000000] percpu: Embedded 32 pages/cpu s91736 r0 d39336 u131072
[ 0.000000] pcpu-alloc: s91736 r0 d39336 u131072 alloc=1*1048576
[ 0.000000] pcpu-alloc: [0] 00 01 02 03 04 05 06 07 [0] 08 09 10 11 12 13 14 15
[ 0.000000] pcpu-alloc: [0] 16 17 18 19 20 21 22 23
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1548288
[ 0.000000] Kernel command line: root=/dev/nfs rw nfsroot=10.1.2.1:/srv/sid-ppc64 ip=10.1.2.2:10.1.2.1:10.1.1.1:255.255.0.0:t4240rdb:eth0:off console=ttyS0,115200
[ 0.000000] printk: log_buf_len individual max cpu contribution: 16384 bytes
[ 0.000000] printk: log_buf_len total cpu_extra contributions: 376832 bytes
[ 0.000000] printk: log_buf_len min size: 131072 bytes
[ 0.000000] printk: log_buf_len: 524288 bytes
[ 0.000000] printk: early log buf free: 126824(96%)
[ 0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear)
[ 0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Memory: 6004108K/6291456K available (10468K kernel code, 1988K rwdata, 3396K rodata, 4112K init, 355K bss, 287348K reserved, 0K cma-reserved)
[ 0.000000] rcu: Hierarchical RCU implementation.
[ 0.000000] rcu: RCU event tracing is enabled.
[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[ 0.000000] NR_IRQS: 512, nr_irqs: 512, preallocated irqs: 16
[ 0.000000] mpic: Setting up MPIC " OpenPIC " version 1.2 at ffe040000, max 24 CPUs
[ 0.000000] mpic: ISU size: 512, shift: 9, mask: 1ff
[ 0.000000] mpic: Initializing for 512 sources
[ 0.000000] random: get_random_u64 called from .start_kernel+0x734/0x964 with crng_init=0
[ 0.000000] time_init: decrementer frequency = 45.833333 MHz
[ 0.000000] time_init: processor frequency = 1666.666650 MHz
[ 0.000003] clocksource: timebase: mask: 0xffffffffffffffff max_cycles: 0xa9210e89c, max_idle_ns: 440795203878 ns
[ 0.008944] clocksource: timebase mult[15d17460] shift[24] registered
[ 0.014079] clockevent: decrementer mult[bbbbbba] shift[32] cpu[0]
[ 0.018750] Console: colour dummy device 80x25
[ 0.021832] pid_max: default: 32768 minimum: 301
[ 0.025363] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
[ 0.031553] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
[ 0.039224] e6500 family performance monitor hardware support registered
[ 0.044587] rcu: Hierarchical SRCU implementation.
[ 0.048540] smp: Bringing up secondary CPUs ...
[ 4.961490] Processor 2 is stuck.
[ 9.872983] Processor 3 is stuck.
[ 14.784302] Processor 4 is stuck.
[ 19.695729] Processor 5 is stuck.
[ 24.607059] Processor 6 is stuck.
[ 29.518496] Processor 7 is stuck.
[ 34.429831] Processor 8 is stuck.
[ 39.341233] Processor 9 is stuck.
[ 44.252586] Processor 10 is stuck.
[ 49.164063] Processor 11 is stuck.
[ 54.075512] Processor 12 is stuck.
[ 58.986907] Processor 13 is stuck.
[ 63.898321] Processor 14 is stuck.
[ 68.809721] Processor 15 is stuck.
[ 73.721128] Processor 16 is stuck.
[ 78.632517] Processor 17 is stuck.
[ 83.543916] Processor 18 is stuck.
[ 88.455324] Processor 19 is stuck.
[ 93.366712] Processor 20 is stuck.
[ 98.278111] Processor 21 is stuck.
[ 103.189490] Processor 22 is stuck.
[ 108.100890] Processor 23 is stuck.
[ 108.102924] smp: Brought up 1 node, 2 CPUs
[ 108.105671] Using standard scheduler topology
[ 108.109270] devtmpfs: initialized
[ 108.118401] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[ 108.126769] futex hash table entries: 8192 (order: 7, 524288 bytes, linear)
[ 108.132956] NET: Registered protocol family 16
[ 108.136218] audit: initializing netlink subsys (disabled)
[ 108.140280] audit: type=2000 audit(108.036:1): state=initialized audit_enabled=0 res=1
[ 108.166744] Machine: fsl,T4240RDB
[ 108.168666] SoC family: QorIQ T4240
[ 108.170832] SoC ID: svr:0x82480020, Revision: 2.0
[ 108.177249] OF: Can't handle multiple dma-ranges with different offsets on node(/pcie@ffe240000)
[ 108.184647] OF: Can't handle multiple dma-ranges with different offsets on node(/pcie@ffe240000)
[ 108.192110] fsl-pci ffe240000.pcie: Invalid size 0xfffff9 for dma-range
[ 108.197445] Found FSL PCI host bridge at 0x0000000ffe240000. Firmware bus number: 0->1
[ 108.204005] PCI host bridge /pcie@ffe240000 ranges:
[ 108.207652] MEM 0x0000000c00000000..0x0000000c1fffffff -> 0x00000000e0000000
[ 108.213558] IO 0x0000000ff8000000..0x0000000ff800ffff -> 0x0000000000000000
[ 108.219436] /pcie@ffe240000: PCICSRBAR @ 0xdf000007
[ 108.222930] setup_pci_atmu: end of DRAM 180000000
[ 108.226328] /pcie@ffe240000: Setup 64-bit PCI DMA window
[ 108.230313] /pcie@ffe240000: DMA window size is 0xdf000007
[ 108.234723] OF: Can't handle multiple dma-ranges with different offsets on node(/pcie@ffe260000)
[ 108.242117] OF: Can't handle multiple dma-ranges with different offsets on node(/pcie@ffe260000)
[ 108.249582] fsl-pci ffe260000.pcie: Invalid size 0xfffff9 for dma-range
[ 108.254908] Found FSL PCI host bridge at 0x0000000ffe260000. Firmware bus number: 0->0
[ 108.261479] PCI host bridge /pcie@ffe260000 ranges:
[ 108.265126] MEM 0x0000000c40000000..0x0000000c5fffffff -> 0x00000000e0000000
[ 108.271031] IO 0x0000000ff8020000..0x0000000ff802ffff -> 0x0000000000000000
[ 108.276867] /pcie@ffe260000: PCICSRBAR @ 0xdf000007
[ 108.280404] setup_pci_atmu: end of DRAM 180000000
[ 108.283804] /pcie@ffe260000: Setup 64-bit PCI DMA window
[ 108.287786] /pcie@ffe260000: DMA window size is 0xdf000007
[ 108.292195] OF: Can't handle multiple dma-ranges with different offsets on node(/pcie@ffe270000)
[ 108.299589] OF: Can't handle multiple dma-ranges with different offsets on node(/pcie@ffe270000)
[ 108.307053] fsl-pci ffe270000.pcie: Invalid size 0xfffff9 for dma-range
[ 108.312381] Found FSL PCI host bridge at 0x0000000ffe270000. Firmware bus number: 0->0
[ 108.318950] PCI host bridge /pcie@ffe270000 ranges:
[ 108.322597] MEM 0x0000000c60000000..0x0000000c7fffffff -> 0x00000000e0000000
[ 108.328503] IO 0x0000000ff8030000..0x0000000ff803ffff -> 0x0000000000000000
[ 108.334339] /pcie@ffe270000: PCICSRBAR @ 0xdf000007
[ 108.337875] setup_pci_atmu: end of DRAM 180000000
[ 108.341273] /pcie@ffe270000: Setup 64-bit PCI DMA window
[ 108.345258] /pcie@ffe270000: DMA window size is 0xdf000007
[ 108.351988] platform ff6000000.qman-portal: Adding to iommu group 0
[ 108.356886] platform ff6004000.qman-portal: Adding to iommu group 1
[ 108.361828] platform ff6008000.qman-portal: Adding to iommu group 2
[ 108.366779] platform ff600c000.qman-portal: Adding to iommu group 3
[ 108.371727] platform ff6010000.qman-portal: Adding to iommu group 4
[ 108.376675] platform ff6014000.qman-portal: Adding to iommu group 5
[ 108.381624] platform ff6018000.qman-portal: Adding to iommu group 6
[ 108.386577] platform ff601c000.qman-portal: Adding to iommu group 7
[ 108.391527] platform ff6020000.qman-portal: Adding to iommu group 8
[ 108.396474] platform ff6024000.qman-portal: Adding to iommu group 9
[ 108.401424] platform ff6028000.qman-portal: Adding to iommu group 10
[ 108.406460] platform ff602c000.qman-portal: Adding to iommu group 11
[ 108.411499] platform ff6030000.qman-portal: Adding to iommu group 12
[ 108.416537] platform ff6034000.qman-portal: Adding to iommu group 13
[ 108.421570] platform ff6038000.qman-portal: Adding to iommu group 14
[ 108.426606] platform ff603c000.qman-portal: Adding to iommu group 15
[ 108.431645] platform ff6040000.qman-portal: Adding to iommu group 16
[ 108.436681] platform ff6044000.qman-portal: Adding to iommu group 17
[ 108.441715] platform ff6048000.qman-portal: Adding to iommu group 18
[ 108.446752] platform ff604c000.qman-portal: Adding to iommu group 19
[ 108.451791] platform ff6050000.qman-portal: Adding to iommu group 20
[ 108.456826] platform ff6054000.qman-portal: Adding to iommu group 21
[ 108.461861] platform ff6058000.qman-portal: Adding to iommu group 22
[ 108.466899] platform ff605c000.qman-portal: Adding to iommu group 23
[ 108.471939] platform ff6060000.qman-portal: Adding to iommu group 24
[ 108.476971] platform ff6064000.qman-portal: Adding to iommu group 25
[ 108.482008] platform ff6068000.qman-portal: Adding to iommu group 26
[ 108.487046] platform ff606c000.qman-portal: Adding to iommu group 27
[ 108.492083] platform ff6070000.qman-portal: Adding to iommu group 28
[ 108.497118] platform ff6074000.qman-portal: Adding to iommu group 29
[ 108.502156] platform ff6078000.qman-portal: Adding to iommu group 30
[ 108.507191] platform ff607c000.qman-portal: Adding to iommu group 31
[ 108.512229] platform ff6080000.qman-portal: Adding to iommu group 32
[ 108.517265] platform ff6084000.qman-portal: Adding to iommu group 33
[ 108.522301] platform ff6088000.qman-portal: Adding to iommu group 34
[ 108.527337] platform ff608c000.qman-portal: Adding to iommu group 35
[ 108.532375] platform ff6090000.qman-portal: Adding to iommu group 36
[ 108.537410] platform ff6094000.qman-portal: Adding to iommu group 37
[ 108.542446] platform ff6098000.qman-portal: Adding to iommu group 38
[ 108.547483] platform ff609c000.qman-portal: Adding to iommu group 39
[ 108.552521] platform ff60a0000.qman-portal: Adding to iommu group 40
[ 108.557555] platform ff60a4000.qman-portal: Adding to iommu group 41
[ 108.562592] platform ff60a8000.qman-portal: Adding to iommu group 42
[ 108.567629] platform ff60ac000.qman-portal: Adding to iommu group 43
[ 108.572669] platform ff60b0000.qman-portal: Adding to iommu group 44
[ 108.577702] platform ff60b4000.qman-portal: Adding to iommu group 45
[ 108.582738] platform ff60b8000.qman-portal: Adding to iommu group 46
[ 108.587777] platform ff60bc000.qman-portal: Adding to iommu group 47
[ 108.592813] platform ff60c0000.qman-portal: Adding to iommu group 48
[ 108.597849] platform ff60c4000.qman-portal: Adding to iommu group 49
[ 108.602920] platform ffe488000.port: Adding to iommu group 50
[ 108.607318] platform ffe489000.port: Adding to iommu group 51
[ 108.611746] platform ffe48a000.port: Adding to iommu group 52
[ 108.616173] platform ffe48b000.port: Adding to iommu group 53
[ 108.620602] platform ffe48c000.port: Adding to iommu group 54
[ 108.625030] platform ffe48d000.port: Adding to iommu group 55
[ 108.629460] platform ffe490000.port: Adding to iommu group 56
[ 108.633887] platform ffe491000.port: Adding to iommu group 57
[ 108.638343] platform ffe588000.port: Adding to iommu group 58
[ 108.642745] platform ffe589000.port: Adding to iommu group 59
[ 108.647174] platform ffe58a000.port: Adding to iommu group 60
[ 108.651602] platform ffe58b000.port: Adding to iommu group 61
[ 108.656032] platform ffe58c000.port: Adding to iommu group 62
[ 108.660459] platform ffe58d000.port: Adding to iommu group 63
[ 108.664890] platform ffe590000.port: Adding to iommu group 64
[ 108.669319] platform ffe591000.port: Adding to iommu group 65
[ 108.673744] platform ffe114000.sdhc: Adding to iommu group 66
[ 108.678191] platform ffe100300.dma: Adding to iommu group 67
[ 108.682515] platform ffe101300.dma: Adding to iommu group 68
[ 108.686868] platform ffe210000.usb: Adding to iommu group 69
[ 108.691199] platform ffe211000.usb: Adding to iommu group 70
[ 108.695538] platform ffe220000.sata: Adding to iommu group 71
[ 108.699968] platform ffe221000.sata: Adding to iommu group 72
[ 108.704400] platform ffe316000.pme: Adding to iommu group 73
[ 108.708737] platform ffe318000.qman: Adding to iommu group 74
[ 108.713167] platform ffe31a000.bman: Adding to iommu group 75
[ 108.717600] fsl-pci ffe240000.pcie: Adding to iommu group 76
[ 108.721938] fsl-pci ffe260000.pcie: Adding to iommu group 77
[ 108.726279] fsl-pci ffe270000.pcie: Adding to iommu group 78
[ 108.764910] software IO TLB: mapped [mem 0x1145a000-0x1545a000] (64MB)
[ 108.770049] PCI: Probing PCI hardware
[ 108.772447] fsl-pci ffe240000.pcie: PCI host bridge to bus 0000:00
[ 108.777256] pci_bus 0000:00: root bus resource [io 0x8000080000010000-0x800008000001ffff] (bus address [0x0000-0xffff])
[ 108.786806] pci_bus 0000:00: root bus resource [mem 0xc00000000-0xc1fffffff] (bus address [0xe0000000-0xffffffff])
[ 108.795836] pci_bus 0000:00: root bus resource [bus 00-01]
[ 108.800004] pci_bus 0000:00: busn_res: [bus 00-01] end is updated to ff
[ 108.805319] pci 0000:00:00.0: [1957:0440] type 01 class 0x0b2000
[ 108.810014] pci 0000:00:00.0: reg 0x10: [io 0xdf000004-0xdf000007]
[ 108.814948] pci 0000:00:00.0: reg 0x38: [mem 0xc00000000-0xc00ffffff pref]
[ 108.820560] pci 0000:00:00.0: supports D1 D2
[ 108.823445] pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot
[ 108.828237] fsl-pci ffe240000.pcie: Removing from iommu group 76
[ 108.832868] pci 0000:00:00.0: Adding to iommu group 79
[ 108.841338] pci 0000:01:00.0: [8086:10d3] type 00 class 0x020000
[ 108.845992] pci 0000:01:00.0: reg 0x10: [mem 0xc01000000-0xc0101ffff]
[ 108.851086] pci 0000:01:00.0: reg 0x14: [mem 0xc01080000-0xc010fffff]
[ 108.856209] pci 0000:01:00.0: reg 0x18: [io 0x8000080000011000-0x800008000001101f]
[ 108.862548] pci 0000:01:00.0: reg 0x1c: [mem 0xc01100000-0xc01103fff]
[ 108.867704] pci 0000:01:00.0: reg 0x30: [mem 0xc01140000-0xc0117ffff pref]
[ 108.873343] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
[ 108.878165] pci 0000:01:00.0: Adding to iommu group 79
[ 108.898576] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
[ 108.902408] pci 0000:00:00.0: bridge window [io 0x8000080000011000-0x8000080000011fff]
[ 108.909268] pci 0000:00:00.0: bridge window [mem 0xc00000000-0xc011fffff]
[ 108.914919] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[ 108.920209] pci_bus 0000:00: busn_res: [bus 00-ff] end is updated to 01
[ 108.925555] fsl-pci ffe260000.pcie: PCI host bridge to bus 0001:00
[ 108.930369] pci_bus 0001:00: root bus resource [io 0x8000080000021000-0x8000080000030fff] (bus address [0x0000-0xffff])
[ 108.939924] pci_bus 0001:00: root bus resource [mem 0xc40000000-0xc5fffffff] (bus address [0xe0000000-0xffffffff])
[ 108.948951] pci_bus 0001:00: root bus resource [bus 00]
[ 108.952855] pci_bus 0001:00: busn_res: [bus 00] end is updated to ff
[ 108.957910] pci 0001:00:00.0: [1957:0440] type 01 class 0x0b2000
[ 108.962599] pci 0001:00:00.0: reg 0x10: [io 0xdf000004-0xdf000007]
[ 108.967542] pci 0001:00:00.0: reg 0x38: [mem 0x00000000-0x00ffffff pref]
[ 108.972964] pci 0001:00:00.0: supports D1 D2
[ 108.975866] pci 0001:00:00.0: PME# supported from D0 D1 D2 D3hot
[ 108.980635] fsl-pci ffe260000.pcie: Removing from iommu group 77
[ 108.985263] pci 0001:00:00.0: Adding to iommu group 76
[ 108.993609] pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 109.004762] pci 0001:00:00.0: PCI bridge to [bus 01-ff]
[ 109.008596] pci 0001:00:00.0: bridge window [io 0x8000080000021000-0x8000080000021fff]
[ 109.015454] pci 0001:00:00.0: bridge window [mem 0x00000000-0x000fffff]
[ 109.020926] pci 0001:00:00.0: bridge window [mem 0x00000000-0x000fffff 64bit pref]
[ 109.027357] pci_bus 0001:01: busn_res: [bus 01-ff] end is updated to 01
[ 109.032647] pci_bus 0001:00: busn_res: [bus 00-ff] end is updated to 01
[ 109.037991] fsl-pci ffe270000.pcie: PCI host bridge to bus 0002:00
[ 109.042807] pci_bus 0002:00: root bus resource [io 0x8000080000032000-0x8000080000041fff] (bus address [0x0000-0xffff])
[ 109.052359] pci_bus 0002:00: root bus resource [mem 0xc60000000-0xc7fffffff] (bus address [0xe0000000-0xffffffff])
[ 109.061388] pci_bus 0002:00: root bus resource [bus 00]
[ 109.065293] pci_bus 0002:00: busn_res: [bus 00] end is updated to ff
[ 109.070345] pci 0002:00:00.0: [1957:0440] type 01 class 0x0b2000
[ 109.075037] pci 0002:00:00.0: reg 0x10: [io 0xdf000004-0xdf000007]
[ 109.079980] pci 0002:00:00.0: reg 0x38: [mem 0x00000000-0x00ffffff pref]
[ 109.085402] pci 0002:00:00.0: supports D1 D2
[ 109.088304] pci 0002:00:00.0: PME# supported from D0 D1 D2 D3hot
[ 109.093075] fsl-pci ffe270000.pcie: Removing from iommu group 78
[ 109.097702] pci 0002:00:00.0: Adding to iommu group 77
[ 109.106035] pci 0002:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 109.117184] pci 0002:00:00.0: PCI bridge to [bus 01-ff]
[ 109.121017] pci 0002:00:00.0: bridge window [io 0x8000080000032000-0x8000080000032fff]
[ 109.127876] pci 0002:00:00.0: bridge window [mem 0x00000000-0x000fffff]
[ 109.133348] pci 0002:00:00.0: bridge window [mem 0x00000000-0x000fffff 64bit pref]
[ 109.139779] pci_bus 0002:01: busn_res: [bus 01-ff] end is updated to 01
[ 109.145069] pci_bus 0002:00: busn_res: [bus 00-ff] end is updated to 01
[ 109.150369] PCI: Cannot allocate resource region 0 of device 0000:00:00.0, will remap
[ 109.156876] PCI: Cannot allocate resource region 6 of device 0000:00:00.0, will remap
[ 109.163397] PCI: Cannot allocate resource region 0 of device 0001:00:00.0, will remap
[ 109.169904] PCI: Cannot allocate resource region 0 of device 0002:00:00.0, will remap
[ 109.176424] PCI 0000:00 Cannot reserve Legacy IO [io 0x8000080000010000-0x10fff]
[ 109.176427] PCI 0001:00 Cannot reserve Legacy IO [io 0x8000080000021000-0x21fff]
[ 109.176429] PCI 0002:00 Cannot reserve Legacy IO [io 0x8000080000032000-0x32fff]
[ 109.176440] pci 0000:00:00.0: BAR 6: no space for [mem size 0x01000000 pref]
[ 109.182147] pci 0000:00:00.0: BAR 6: failed to assign [mem size 0x01000000 pref]
[ 109.188226] pci 0000:00:00.0: BAR 0: no space for [io size 0x0004]
[ 109.193176] pci 0000:00:00.0: BAR 0: failed to assign [io size 0x0004]
[ 109.198473] pci 0000:00:00.0: PCI bridge to [bus 01]
[ 109.202117] pci 0000:00:00.0: bridge window [io 0x8000080000010000-0x800008000001ffff]
[ 109.208981] pci 0000:00:00.0: bridge window [mem 0xc00000000-0xc1fffffff]
[ 109.214625] pci_bus 0000:00: Some PCI device resources are unassigned, try booting with pci=realloc
[ 109.222352] pci_bus 0000:00: resource 4 [io 0x8000080000010000-0x800008000001ffff]
[ 109.228691] pci_bus 0000:00: resource 5 [mem 0xc00000000-0xc1fffffff]
[ 109.233814] pci_bus 0000:01: resource 0 [io 0x8000080000010000-0x800008000001ffff]
[ 109.240153] pci_bus 0000:01: resource 1 [mem 0xc00000000-0xc1fffffff]
[ 109.245279] pci 0001:00:00.0: BAR 6: no space for [mem size 0x01000000 pref]
[ 109.251008] pci 0001:00:00.0: BAR 6: failed to assign [mem size 0x01000000 pref]
[ 109.257087] pci 0001:00:00.0: BAR 0: no space for [io size 0x0004]
[ 109.262036] pci 0001:00:00.0: BAR 0: failed to assign [io size 0x0004]
[ 109.267333] pci 0001:00:00.0: PCI bridge to [bus 01]
[ 109.270978] pci 0001:00:00.0: bridge window [io 0x8000080000021000-0x8000080000030fff]
[ 109.277842] pci 0001:00:00.0: bridge window [mem 0xc40000000-0xc5fffffff]
[ 109.283486] pci_bus 0001:00: Some PCI device resources are unassigned, try booting with pci=realloc
[ 109.291214] pci_bus 0001:00: resource 4 [io 0x8000080000021000-0x8000080000030fff]
[ 109.297554] pci_bus 0001:00: resource 5 [mem 0xc40000000-0xc5fffffff]
[ 109.302676] pci_bus 0001:01: resource 0 [io 0x8000080000021000-0x8000080000030fff]
[ 109.309015] pci_bus 0001:01: resource 1 [mem 0xc40000000-0xc5fffffff]
[ 109.314140] pci 0002:00:00.0: BAR 6: no space for [mem size 0x01000000 pref]
[ 109.319869] pci 0002:00:00.0: BAR 6: failed to assign [mem size 0x01000000 pref]
[ 109.325948] pci 0002:00:00.0: BAR 0: no space for [io size 0x0004]
[ 109.330897] pci 0002:00:00.0: BAR 0: failed to assign [io size 0x0004]
[ 109.336195] pci 0002:00:00.0: PCI bridge to [bus 01]
[ 109.339838] pci 0002:00:00.0: bridge window [io 0x8000080000032000-0x8000080000041fff]
[ 109.346703] pci 0002:00:00.0: bridge window [mem 0xc60000000-0xc7fffffff]
[ 109.352348] pci_bus 0002:00: Some PCI device resources are unassigned, try booting with pci=realloc
[ 109.360074] pci_bus 0002:00: resource 4 [io 0x8000080000032000-0x8000080000041fff]
[ 109.366413] pci_bus 0002:00: resource 5 [mem 0xc60000000-0xc7fffffff]
[ 109.371537] pci_bus 0002:01: resource 0 [io 0x8000080000032000-0x8000080000041fff]
[ 109.377876] pci_bus 0002:01: resource 1 [mem 0xc60000000-0xc7fffffff]
[ 109.383056] PCI: Probing PCI hardware done
[ 109.383569] Setting up Freescale MSI support
[ 109.383936] Setting up Freescale MSI support
[ 109.384295] Setting up Freescale MSI support
[ 109.384660] Setting up Freescale MSI support
[ 109.393666] HugeTLB registered 4.00 MiB page size, pre-allocated 0 pages
[ 109.398983] HugeTLB registered 16.0 MiB page size, pre-allocated 0 pages
[ 109.404365] HugeTLB registered 64.0 MiB page size, pre-allocated 0 pages
[ 109.409742] HugeTLB registered 256 MiB page size, pre-allocated 0 pages
[ 109.415039] HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages
[ 109.424164] iommu: Default domain type: Translated
[ 109.427708] vgaarb: loaded
[ 109.429148] SCSI subsystem initialized
[ 109.431659] libata version 3.00 loaded.
[ 109.431785] usbcore: registered new interface driver usbfs
[ 109.435898] usbcore: registered new interface driver hub
[ 109.439955] usbcore: registered new device driver usb
[ 109.443658] pps_core: LinuxPPS API ver. 1 registered
[ 109.447258] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 109.455082] PTP clock support registered
[ 109.457851] EDAC MC: Ver: 3.0.0
[ 109.460700] clocksource: Switched to clocksource timebase
[ 109.710567] NET: Registered protocol family 2
[ 109.713985] tcp_listen_portaddr_hash hash table entries: 4096 (order: 4, 65536 bytes, linear)
[ 109.721183] TCP established hash table entries: 65536 (order: 7, 524288 bytes, linear)
[ 109.727979] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes, linear)
[ 109.734380] TCP: Hash tables configured (established 65536 bind 65536)
[ 109.739615] UDP hash table entries: 4096 (order: 5, 131072 bytes, linear)
[ 109.745090] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes, linear)
[ 109.751134] NET: Registered protocol family 1
[ 109.754303] RPC: Registered named UNIX socket transport module.
[ 109.758831] RPC: Registered udp transport module.
[ 109.762214] RPC: Registered tcp transport module.
[ 109.765602] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 109.770760] pci 0000:01:00.0: CLS mismatch (32 != 64), using 64 bytes
[ 109.777400] workingset: timestamp_bits=46 max_order=21 bucket_order=0
[ 109.783109] NFS: Registering the id_resolver key type
[ 109.786778] Key type id_resolver registered
[ 109.789630] Key type id_legacy registered
[ 109.792332] ntfs: driver 2.1.32 [Flags: R/O].
[ 109.795394] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
[ 109.815523] io scheduler mq-deadline registered
[ 109.818662] io scheduler kyber registered
[ 109.821456] OF: Can't handle multiple dma-ranges with different offsets on node(/pcie@ffe240000)
[ 109.828855] OF: Can't handle multiple dma-ranges with different offsets on node(/pcie@ffe240000)
[ 109.836319] pcieport 0000:00:00.0: Invalid size 0xfffff9 for dma-range
[ 109.841688] pcieport 0000:00:00.0: AER: enabled with IRQ 20
[ 109.845986] OF: Can't handle multiple dma-ranges with different offsets on node(/pcie@ffe260000)
[ 109.853382] OF: Can't handle multiple dma-ranges with different offsets on node(/pcie@ffe260000)
[ 109.860845] pcieport 0001:00:00.0: Invalid size 0xfffff9 for dma-range
[ 109.866203] pcieport 0001:00:00.0: AER: enabled with IRQ 22
[ 109.870485] OF: Can't handle multiple dma-ranges with different offsets on node(/pcie@ffe270000)
[ 109.877880] OF: Can't handle multiple dma-ranges with different offsets on node(/pcie@ffe270000)
[ 109.885343] pcieport 0002:00:00.0: Invalid size 0xfffff9 for dma-range
[ 109.890696] pcieport 0002:00:00.0: AER: enabled with IRQ 23
[ 109.895997] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[ 109.901344] printk: console [ttyS0] disabled
[ 109.904233] serial8250.0: ttyS0 at MMIO 0xffe11c500 (irq = 36, base_baud = 22916666) is a 16550A
[ 109.911704] printk: console [ttyS0] enabled
[ 109.917421] printk: bootconsole [udbg0] disabled
[ 109.924167] serial8250.0: ttyS1 at MMIO 0xffe11c600 (irq = 36, base_baud = 22916666) is a 16550A
[ 109.931796] serial8250.0: ttyS2 at MMIO 0xffe11d500 (irq = 37, base_baud = 22916666) is a 16550A
[ 109.939427] serial8250.0: ttyS3 at MMIO 0xffe11d600 (irq = 37, base_baud = 22916666) is a 16550A
[ 109.947077] ePAPR hypervisor byte channel driver
[ 109.954200] brd: module loaded
[ 109.962388] loop: module loaded
[ 109.964250] st: Version 20160209, fixed bufsize 32768, s/g segs 256
[ 109.969931] fsl-sata ffe220000.sata: Sata FSL Platform/CSB Driver init
[ 109.975448] scsi host0: sata_fsl
[ 109.977470] ata1: SATA max UDMA/133 irq 68
[ 109.980307] fsl-sata ffe221000.sata: Sata FSL Platform/CSB Driver init
[ 109.985759] scsi host1: sata_fsl
[ 109.987745] ata2: SATA max UDMA/133 irq 69
[ 109.991308] fsl_espi ffe110000.spi: cs=0, init_csmode=0x100008
[ 109.996085] spi-nor spi0.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff
[ 110.001666] fsl_espi ffe110000.spi: at 0x(____ptrval____) (irq = 53)
[ 110.007869] libphy: Fixed MDIO Bus: probed
[ 110.011211] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.015080] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.018943] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.022812] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.026678] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.030548] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.034415] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.038272] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.042130] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.048770] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.058922] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.062781] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.066639] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.070499] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.074355] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.078212] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.082073] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.085943] libphy: Freescale XGMAC MDIO Bus: probed
[ 110.089719] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
[ 110.094244] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
[ 110.098881] OF: Can't handle multiple dma-ranges with different offsets on node(/pcie@ffe240000)
[ 110.106364] OF: Can't handle multiple dma-ranges with different offsets on node(/pcie@ffe240000)
[ 110.113844] e1000e 0000:01:00.0: Invalid size 0xfffff9 for dma-range
[ 110.119049] e1000e 0000:01:00.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode
[ 110.173151] e1000e 0000:01:00.0 0000:01:00.0 (uninitialized): registered PHC clock
[ 110.230696] e1000e 0000:01:00.0 eth0: (PCI Express:2.5GT/s:Width x1) 68:05:ca:2e:24:a8
[ 110.237311] e1000e 0000:01:00.0 eth0: Intel(R) PRO/1000 Network Connection
[ 110.242892] e1000e 0000:01:00.0 eth0: MAC: 3, PHY: 8, PBA No: E46981-008
[ 110.248350] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 110.253892] ehci-pci: EHCI PCI platform driver
[ 110.257475] ehci-fsl: Freescale EHCI Host controller driver
[ 110.261834] fsl-ehci fsl-ehci.0: Freescale On-Chip EHCI Host Controller
[ 110.267153] fsl-ehci fsl-ehci.0: new USB bus registered, assigned bus number 1
[ 110.282931] fsl-ehci fsl-ehci.0: irq 44, io mem 0xffe210000
[ 110.300705] fsl-ehci fsl-ehci.0: USB 2.0 started, EHCI 1.00
[ 110.305249] hub 1-0:1.0: USB hub found
[ 110.307702] hub 1-0:1.0: 1 port detected
[ 110.310464] fsl-ehci fsl-ehci.1: Freescale On-Chip EHCI Host Controller
[ 110.315783] fsl-ehci fsl-ehci.1: new USB bus registered, assigned bus number 2
[ 110.331547] fsl-ehci fsl-ehci.1: irq 45, io mem 0xffe211000
[ 110.348699] fsl-ehci fsl-ehci.1: USB 2.0 started, EHCI 1.00
[ 110.353215] hub 2-0:1.0: USB hub found
[ 110.355667] hub 2-0:1.0: 1 port detected
[ 110.358489] usbcore: registered new interface driver usb-storage
[ 110.364395] i2c /dev entries driver
[ 110.366998] mpc-i2c ffe118000.i2c: timeout 1000000 us
[ 110.375814] rtc-ds1374 0-0068: registered as rtc0
[ 110.379883] rtc-ds1374 0-0068: setting system clock to 1970-01-01T00:04:57 UTC (297)
[ 110.386680] mpc-i2c ffe118100.i2c: timeout 1000000 us
[ 110.390570] mpc-i2c ffe119000.i2c: timeout 1000000 us
[ 110.394452] mpc-i2c ffe119100.i2c: timeout 1000000 us
[ 110.402034] hwmon_vid: Unknown VRM version of your CPU
[ 110.406051] w83793 0-002f: hwmon_device_register() is deprecated. Please convert the driver to use hwmon_device_register_with_info().
[ 110.418175] w83793 0-002f: Registered watchdog chardev major 10, minor: 130
[ 110.423944] Freescale(R) MPC85xx EDAC driver, (C) 2006 Montavista Software
[ 110.430923] EDAC MC0: Giving out device to module fsl_ddr_edac controller fsl_mc_err: DEV fsl_mc_err (INTERRUPT)
[ 110.439809] fsl_ddr_edac acquired irq 490 for MC
[ 110.443117] fsl_ddr_edac MC err registered
[ 110.446008] EDAC MC1: Giving out device to module fsl_ddr_edac controller fsl_mc_err: DEV fsl_mc_err (INTERRUPT)
[ 110.454893] fsl_ddr_edac acquired irq 489 for MC
[ 110.458201] fsl_ddr_edac MC err registered
[ 110.461091] EDAC MC2: Giving out device to module fsl_ddr_edac controller fsl_mc_err: DEV fsl_mc_err (INTERRUPT)
[ 110.469976] fsl_ddr_edac acquired irq 488 for MC
[ 110.473286] fsl_ddr_edac MC err registered
[ 110.477997] EDAC PCI0: Giving out device to module MPC85xx_edac controller mpc85xx_pci_err: DEV mpc85xx-pci-edac.0.auto (INTERRUPT)
[ 110.480814] ata1: No Device OR PHYRDY change,Hstatus = 0xa0000000
[ 110.488525] MPC85xx_edac acquired irq 20 for PCI Err
[ 110.493309] ata1: SATA link down (SStatus 10 SControl 300)
[ 110.496955] MPC85xx_edac PCI err registered
[ 110.501150] ata2: No Device OR PHYRDY change,Hstatus = 0xa0000000
[ 110.504041] EDAC PCI1: Giving out device to module MPC85xx_edac controller mpc85xx_pci_err: DEV mpc85xx-pci-edac.1.auto (INTERRUPT)
[ 110.508791] ata2: SATA link down (SStatus 10 SControl 300)
[ 110.519308] MPC85xx_edac acquired irq 22 for PCI Err
[ 110.527127] MPC85xx_edac PCI err registered
[ 110.530046] EDAC PCI2: Giving out device to module MPC85xx_edac controller mpc85xx_pci_err: DEV mpc85xx-pci-edac.2.auto (INTERRUPT)
[ 110.540574] MPC85xx_edac acquired irq 23 for PCI Err
[ 110.544230] MPC85xx_edac PCI err registered
[ 110.547545] sdhci: Secure Digital Host Controller Interface driver
[ 110.552417] sdhci: Copyright(c) Pierre Ossman
[ 110.555464] sdhci-pltfm: SDHCI platform and OF driver helper
[ 110.585880] mmc0: SDHCI controller on ffe114000.sdhc [ffe114000.sdhc] using ADMA
[ 110.592744] caam ffe300000.crypto: RNG4 SH0 was previously instantiated without prediction resistance. Tearing it down
[ 110.602143] caam ffe300000.crypto: Deinstantiated RNG4 SH0
[ 110.606326] caam ffe300000.crypto: Instantiated RNG4 SH0
[ 110.628202] caam ffe300000.crypto: Instantiated RNG4 SH1
[ 110.632209] caam ffe300000.crypto: device ID = 0x0a1c020000000000 (Era 6)
[ 110.637690] caam ffe300000.crypto: job rings = 4, qi = 1
[ 110.641822] platform ffe301000.jr: Adding to iommu group 78
[ 110.646261] platform ffe302000.jr: Adding to iommu group 80
[ 110.650681] platform ffe303000.jr: Adding to iommu group 81
[ 110.655102] platform ffe304000.jr: Adding to iommu group 82
[ 110.670179] caam algorithms registered in /proc/crypto
[ 110.675861] caam ffe300000.crypto: caam pkc algorithms registered in /proc/crypto
[ 110.682046] caam ffe300000.crypto: registering rng-caam
[ 110.686575] usbcore: registered new interface driver usbhid
[ 110.690851] usbhid: USB HID core driver
[ 110.693378] Freescale hypervisor management driver
[ 110.696865] fsl-hv: no hypervisor found
[ 110.699548] ipip: IPv4 and MPLS over IPv4 tunneling driver
[ 110.703975] Initializing XFRM netlink socket
[ 110.707032] NET: Registered protocol family 10
[ 110.710655] Segment Routing with IPv6
[ 110.713521] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[ 110.718383] NET: Registered protocol family 17
[ 110.721525] NET: Registered protocol family 15
[ 110.724675] 8021q: 802.1Q VLAN Support v1.8
[ 110.727566] Key type dns_resolver registered
[ 110.730593] drmem: No dynamic reconfiguration memory found
[ 110.773502] random: fast init done
[ 110.802913] 8021q: adding VLAN 0 to HW filter on device eth0
[ 110.817272] random: crng init done
[ 113.993688] e1000e 0000:01:00.0 eth0: NIC Link is Up 1000 Mbps Full Duplex, Flow Control: Rx/Tx
[ 114.008711] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[ 114.028706] IP-Config: Complete:
[ 114.030624] device=eth0, hwaddr=68:05:ca:2e:24:a8, ipaddr=10.1.2.2, mask=255.255.0.0, gw=10.1.1.1
[ 114.038628] host=t4240rdb, domain=, nis-domain=(none)
[ 114.042805] bootserver=10.1.2.1, rootserver=10.1.2.1, rootpath=
[ 114.048141] md: Skipping autodetection of RAID arrays. (raid=autodetect will force)
[ 114.060967] VFS: Mounted root (nfs filesystem) on device 0:18.
[ 114.065743] devtmpfs: mounted
[ 114.068395] Freeing unused kernel memory: 4112K
[ 114.071661] This architecture does not have kernel memory protection.
[ 114.076794] Run /sbin/init as init process
[ 114.079577] with arguments:
[ 114.079578] /sbin/init
[ 114.079579] with environment:
[ 114.079580] HOME=/
[ 114.079581] TERM=linux
[ 115.315377] systemd[1]: System time before build time, advancing clock.
[ 115.350215] systemd[1]: Failed to lookup module alias 'autofs4': Function not implemented
[ 115.380593] systemd[1]: systemd 240 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD -IDN2 +IDN -PCRE2 default-hierarchy=hybrid)
[ 115.401073] systemd[1]: Detected architecture ppc64.
[ 115.429616] systemd[1]: Set hostname to <t4240rdb>.
[ 115.455850] systemd[1]: Failed to bump fs.file-max, ignoring: Invalid argument
[ 115.861866] systemd[1]: File /lib/systemd/system/systemd-journald.service:12 configures an IP firewall (IPAddressDeny=any), but the local system does not support BPF/cgroup based firewalling.
[ 115.877607] systemd[1]: Proceeding WITHOUT firewalling in effect! (This warning is only shown for the first loaded unit using IP firewalling.)
[ 116.029117] systemd[1]: /lib/systemd/system/fancontrol.service:9: PIDFile= references path below legacy directory /var/run/, updating /var/run/fancontrol.pid → /run/fancontrol.pid; please update the unit file accordingly.
[ 116.080232] systemd[1]: Created slice system-serial\x2dgetty.slice.
[ 116.100793] systemd[1]: Reached target Remote File Systems.
[ 116.120751] systemd[1]: Reached target Swap.
[ 116.774505] systemd-journald[1440]: Received request to flush runtime journal from PID 1
[ 117.323688] pcieport 0000:00:00.0: AER: Corrected error received: 0000:01:00.0
[ 117.329694] e1000e 0000:01:00.0: AER: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Transmitter ID)
[ 117.338582] e1000e 0000:01:00.0: AER: device [8086:10d3] error status/mask=00001000/00002000
[ 117.345919] e1000e 0000:01:00.0: AER: [12] Timeout
[ 119.035056] pcieport 0000:00:00.0: AER: Corrected error received: 0000:01:00.0
[ 119.042196] e1000e 0000:01:00.0: AER: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Transmitter ID)
[ 119.052409] e1000e 0000:01:00.0: AER: device [8086:10d3] error status/mask=00001000/00002000
[ 119.061092] e1000e 0000:01:00.0: AER: [12] Timeout
[ 119.066684] pcieport 0000:00:00.0: AER: Corrected error received: 0000:01:00.0
[ 119.262731] pcieport 0000:00:00.0: AER: Corrected error received: 0000:01:00.0
[ 119.268724] e1000e 0000:01:00.0: AER: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Transmitter ID)
[ 119.277619] e1000e 0000:01:00.0: AER: device [8086:10d3] error status/mask=00001000/00002000
[ 119.284953] e1000e 0000:01:00.0: AER: [12] Timeout
[ 119.486153] pcieport 0000:00:00.0: AER: Corrected error received: 0000:01:00.0
[ 119.492124] e1000e 0000:01:00.0: AER: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Transmitter ID)
[ 119.501054] e1000e 0000:01:00.0: AER: device [8086:10d3] error status/mask=00001000/00002000
[ 119.508399] e1000e 0000:01:00.0: AER: [12] Timeout
[ 142.345527] pcieport 0000:00:00.0: AER: Corrected error received: 0000:01:00.0
[ 142.351469] e1000e 0000:01:00.0: AER: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Transmitter ID)
[ 142.360359] e1000e 0000:01:00.0: AER: device [8086:10d3] error status/mask=00001000/00002000
[ 142.367684] e1000e 0000:01:00.0: AER: [12] Timeout
[-- Attachment #3: Type: text/plain, Size: 8062 bytes --]
>
> -----------------------------------------------------
> phys_mem_size = 0x200000000
> dcache_bsize = 0x20
> icache_bsize = 0x20
> cpu_features = 0x00000003008003b6
> possible = 0x00000003009003b6
> always = 0x00000003008003b4
> cpu_user_features = 0xdc008000 0x08000000
> mmu_features = 0x000a0010
> firmware_features = 0x0000000000000000
> physical_start = 0x20000000
> -----------------------------------------------------
> barrier-nospec: using isync; sync as speculation barrier
> Zone ranges:
> DMA [mem 0x0000000000000000-0x000000007fffffff]
> Normal [mem 0x0000000080000000-0x00000001ffffffff]
> Movable zone start for each node
> Early memory node ranges
> node 0: [mem 0x0000000000000000-0x00000001ffffffff]
> Initmem setup node 0 [mem 0x0000000000000000-0x00000001ffffffff]
> MMU: Allocated 2112 bytes of context maps for 255 contexts
> percpu: Embedded 32 pages/cpu s91736 r0 d39336 u131072
> Built 1 zonelists, mobility grouping on. Total pages: 2064384
> Kernel command line: console=ttyS0 root=/dev/ram0
> printk: log_buf_len individual max cpu contribution: 16384 bytes
> printk: log_buf_len total cpu_extra contributions: 376832 bytes
> printk: log_buf_len min size: 131072 bytes
> printk: log_buf_len: 524288 bytes
> printk: early log buf free: 127460(97%)
> Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear)
> Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
> mem auto-init: stack:off, heap alloc:off, heap free:off
> Memory: 8135632K/8388608K available (10572K kernel code, 2000K rwdata,
> 3396K rodata, 4124K init, 358K bss, 252976K reserved, 0K cma-reserved)
> rcu: Hierarchical RCU implementation.
> rcu: RCU event tracing is enabled.
> rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
> NR_IRQS: 512, nr_irqs: 512, preallocated irqs: 16
> mpic: Setting up MPIC " OpenPIC " version 1.2 at fe0040000, max 24 CPUs
> mpic: ISU size: 256, shift: 8, mask: ff
> mpic: Initializing for 256 sources
> random: get_random_u64 called from .start_kernel+0x724/0x954 with
> crng_init=0
> clocksource: timebase: mask: 0xffffffffffffffff max_cycles:
> 0x5c4093a7d1, max_idle_ns: 440795210635 ns
> clocksource: timebase mult[2800000] shift[24] registered
> Console: colour dummy device 80x25
> pid_max: default: 32768 minimum: 301
> Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
> Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
> e6500 family performance monitor hardware support registered
> rcu: Hierarchical SRCU implementation.
> smp: Bringing up secondary CPUs ...
> smp: Brought up 1 node, 24 CPUs
>
>
>
> 在 2020/4/25 1:17, Daniel Axtens 写道:
>> Hi Jason,
>>
>> Apologies for the delay in testing.
>>
>> I'm seeing this problem when I try to boot on a t4240rdb:
>>
>> random: get_random_u64 called from .start_kernel+0x734/0x964 with crng_init=0 [8/973]
>> clocksource: timebase: mask: 0xffffffffffffffff max_cycles: 0xa9210e89c, max_idle_ns: 440795203878 ns
>> clocksource: timebase mult[15d17460] shift[24] registered
>> Console: colour dummy device 80x25
>> pid_max: default: 32768 minimum: 301
>> Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
>> Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
>> e6500 family performance monitor hardware support registered
>> rcu: Hierarchical SRCU implementation.
>> smp: Bringing up secondary CPUs ...
>> Processor 2 is stuck.
>> Processor 3 is stuck.
>> Processor 4 is stuck.
>> Processor 5 is stuck.
>> Processor 6 is stuck.
>> Processor 7 is stuck.
>> Processor 8 is stuck.
>> Processor 9 is stuck.
>> Processor 10 is stuck.
>> Processor 11 is stuck.
>> Processor 12 is stuck.
>> Processor 13 is stuck.
>> Processor 14 is stuck.
>> ...
>> Processor 22 is stuck.
>> Processor 23 is stuck.
>> smp: Brought up 1 node, 2 CPUs
>> Using standard scheduler topology
>> devtmpfs: initialized
>> clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
>> futex hash table entries: 8192 (order: 7, 524288 bytes, linear)
>> NET: Registered protocol family 16
>> audit: initializing netlink subsys (disabled)
>> audit: type=2000 audit(108.032:1): state=initialized audit_enabled=0 res=1
>> Machine: fsl,T4240RDB
>> SoC family: QorIQ T4240
>> SoC ID: svr:0x82480020, Revision: 2.0
>> ... boot continues ...
>>
>>
>> If I boot with nokaslr, all the CPUs come up with no issue.
>>
>> This is on top of powerpc/merge at
>> 8299da600ad05b8aa0f15ec0f5f03bd40e37d6f0. If you'd like me to test any
>> debug patches I can do that.
>>
>> I've attached my .config.
>>
>> Regards,
>> Daniel
>>
>>
>>
>>> This is a try to implement KASLR for Freescale BookE64 which is based on
>>> my earlier implementation for Freescale BookE32:
>>> https://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=131718&state=*
>>>
>>> The implementation for Freescale BookE64 is similar as BookE32. One
>>> difference is that Freescale BookE64 set up a TLB mapping of 1G during
>>> booting. Another difference is that ppc64 needs the kernel to be
>>> 64K-aligned. So we can randomize the kernel in this 1G mapping and make
>>> it 64K-aligned. This can save some code to creat another TLB map at
>>> early boot. The disadvantage is that we only have about 1G/64K = 16384
>>> slots to put the kernel in.
>>>
>>> KERNELBASE
>>>
>>> 64K |--> kernel <--|
>>> | | |
>>> +--+--+--+ +--+--+--+--+--+--+--+--+--+ +--+--+
>>> | | | |....| | | | | | | | | |....| | |
>>> +--+--+--+ +--+--+--+--+--+--+--+--+--+ +--+--+
>>> | | 1G
>>> |-----> offset <-----|
>>>
>>> kernstart_virt_addr
>>>
>>> I'm not sure if the slot numbers is enough or the design has any
>>> defects. If you have some better ideas, I would be happy to hear that.
>>>
>>> Thank you all.
>>>
>>> v4->v5:
>>> Fix "-Werror=maybe-uninitialized" compile error.
>>> Fix typo "similar as" -> "similar to".
>>> v3->v4:
>>> Do not define __kaslr_offset as a fixed symbol. Reference __run_at_load and
>>> __kaslr_offset by symbol instead of magic offsets.
>>> Use IS_ENABLED(CONFIG_PPC32) instead of #ifdef CONFIG_PPC32.
>>> Change kaslr-booke32 to kaslr-booke in index.rst
>>> Switch some instructions to 64-bit.
>>> v2->v3:
>>> Fix build error when KASLR is disabled.
>>> v1->v2:
>>> Add __kaslr_offset for the secondary cpu boot up.
>>>
>>> Jason Yan (6):
>>> powerpc/fsl_booke/kaslr: refactor kaslr_legal_offset() and
>>> kaslr_early_init()
>>> powerpc/fsl_booke/64: introduce reloc_kernel_entry() helper
>>> powerpc/fsl_booke/64: implement KASLR for fsl_booke64
>>> powerpc/fsl_booke/64: do not clear the BSS for the second pass
>>> powerpc/fsl_booke/64: clear the original kernel if randomized
>>> powerpc/fsl_booke/kaslr: rename kaslr-booke32.rst to kaslr-booke.rst
>>> and add 64bit part
>>>
>>> Documentation/powerpc/index.rst | 2 +-
>>> .../{kaslr-booke32.rst => kaslr-booke.rst} | 35 ++++++-
>>> arch/powerpc/Kconfig | 2 +-
>>> arch/powerpc/kernel/exceptions-64e.S | 23 +++++
>>> arch/powerpc/kernel/head_64.S | 13 +++
>>> arch/powerpc/kernel/setup_64.c | 3 +
>>> arch/powerpc/mm/mmu_decl.h | 23 +++--
>>> arch/powerpc/mm/nohash/kaslr_booke.c | 91 +++++++++++++------
>>> 8 files changed, 147 insertions(+), 45 deletions(-)
>>> rename Documentation/powerpc/{kaslr-booke32.rst => kaslr-booke.rst} (59%)
>>>
>>> --
>>> 2.17.2
^ permalink raw reply
* Re: New powerpc vdso calling convention
From: Adhemerval Zanella @ 2020-04-27 13:09 UTC (permalink / raw)
To: Nicholas Piggin, Rich Felker
Cc: libc-alpha, musl, binutils, Andy Lutomirski, libc-dev,
Thomas Gleixner, Vincenzo Frascino, linuxppc-dev
In-Reply-To: <1587872025.rtx2ygrmn0.astroid@bobo.none>
On 26/04/2020 00:41, Nicholas Piggin wrote:
> Excerpts from Rich Felker's message of April 26, 2020 9:11 am:
>> On Sun, Apr 26, 2020 at 08:58:19AM +1000, Nicholas Piggin wrote:
>>> Excerpts from Christophe Leroy's message of April 25, 2020 10:20 pm:
>>>>
>>>>
>>>> Le 25/04/2020 à 12:56, Nicholas Piggin a écrit :
>>>>> Excerpts from Christophe Leroy's message of April 25, 2020 5:47 pm:
>>>>>>
>>>>>>
>>>>>> Le 25/04/2020 à 07:22, Nicholas Piggin a écrit :
>>>>>>> As noted in the 'scv' thread, powerpc's vdso calling convention does not
>>>>>>> match the C ELF ABI calling convention (or the proposed scv convention).
>>>>>>> I think we could implement a new ABI by basically duplicating function
>>>>>>> entry points with different names.
>>>>>>
>>>>>> I think doing this is a real good idea.
>>>>>>
>>>>>> I've been working at porting powerpc VDSO to the GENERIC C VDSO, and the
>>>>>> main pitfall has been that our vdso calling convention is not compatible
>>>>>> with C calling convention, so we have go through an ASM entry/exit.
>>>>>>
>>>>>> See https://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=171469
>>>>>>
>>>>>> We should kill this error flag return through CR[SO] and get it the
>>>>>> "modern" way like other architectectures implementing the C VDSO: return
>>>>>> 0 when successfull, return -err when failed.
>>>>>
>>>>> Agreed.
>>>>>
>>>>>>> The ELF v2 ABI convention would suit it well, because the caller already
>>>>>>> requires the function address for ctr, so having it in r12 will
>>>>>>> eliminate the need for address calculation, which suits the vdso data
>>>>>>> page access.
>>>>>>>
>>>>>>> Is there a need for ELF v1 specific calls as well, or could those just be
>>>>>>> deprecated and remain on existing functions or required to use the ELF
>>>>>>> v2 calls using asm wrappers?
>>>>>>
>>>>>> What's ELF v1 and ELF v2 ? Is ELF v1 what PPC32 uses ? If so, I'd say
>>>>>> yes, it would be good to have it to avoid going through ASM in the middle.
>>>>>
>>>>> I'm not sure about PPC32. On PPC64, ELFv2 functions must be called with
>>>>> their address in r12 if called at their global entry point. ELFv1 have a
>>>>> function descriptor with call address and TOC in it, caller has to load
>>>>> the TOC if it's global.
>>>>>
>>>>> The vdso doesn't have TOC, it has one global address (the vdso data
>>>>> page) which it loads by calculating its own address.
>>>>>
>>>>> The kernel doesn't change the vdso based on whether it's called by a v1
>>>>> or v2 userspace (it doesn't really know itself and would have to export
>>>>> different functions). glibc has a hack to create something:
>>>>>
>>>>> # define VDSO_IFUNC_RET(value) \
>>>>> ({ \
>>>>> static Elf64_FuncDesc vdso_opd = { .fd_toc = ~0x0 }; \
>>>>> vdso_opd.fd_func = (Elf64_Addr)value; \
>>>>> &vdso_opd; \
>>>>> })
>>>>>
>>>>> If we could make something which links more like any other dso with
>>>>> ELFv1, that would be good. Otherwise I think v2 is preferable so it
>>>>> doesn't have to calculate its own address.
>>>>
>>>> I see the following in glibc. So looks like PPC32 is like PPC64 elfv1.
>>>> By the way, they are talking about something not completely finished in
>>>> the kernel. Can we finish it ?
>>>
>>> Possibly can. It seems like a good idea to fix all loose ends if we are
>>> going to add new versions. Will have to check with the toolchain people
>>> to make sure we're doing the right thing.
>>
>> "ELFv1" and "ELFv2" are PPC64-specific names for the old and new
>> version of the ELF psABI for PPC64. They have nothing at all to do
>> with PPC32 which is a completely different ABI from either.
>
> Right, I'm just talking about those comments -- it seems like the kernel
> vdso should contain an .opd section with function descriptors in it for
> elfv1 calls, rather than the hack it has now of creating one in the
> caller's .data section.
>
> But all that function descriptor code is gated by
>
> #if (defined(__PPC64__) || defined(__powerpc64__)) && _CALL_ELF != 2
>
> So it seems PPC32 does not use function descriptors but a direct pointer
> to the entry point like PPC64 with ELFv2.
Yes, this hack is only for ELFv1. The missing ODP has not been an issue
or glibc because it has been using the inline assembly to emulate the
functions call since initial vDSO support (INTERNAL_VSYSCALL_CALL_TYPE).
It just has become an issue when I added a ifunc optimization to
gettimeofday so it can bypass the libc.so and make plt branch to vDSO
directly.
Recently on some y2038 refactoring it was suggested to get rid of this
and make gettimeofday call clock_gettime regardless. But some felt that
the performance degradation was not worth for a symbol that is still used
extensibility, so we stuck with the hack.
And I think having this synthetic opd entry is not an issue, since for
full relro the program's will be used and correctly set as read-only.
The issue is more for glibc itself, and I wouldn't mind to just remove the
gettimeofday and time optimizations and use the default vDSO support
(which might increase in function latency though).
As Rich has put, it would be simpler to just have powerpc vDSO symbols
to have a default function call semantic so we could issue a function
call directly. But for powerpc64, we glibc will need to continue to
support this non-standard call on older kernels and I am not sure if
adding new symbols with a different semantic will help much.
GLibc already hides this powerpc semantic on INTERNAL_VSYSCALL_CALL_TYPE,
so internally all syscalls are assumed to have the new semantic (-errno
on error, 0 on success). Adding another ELFv1 would require to add
more logic to handle multiple symbol version for vDSO setup
(sysdeps/unix/sysv/linux/dl-vdso-setup.h), which would mostly likely to
require an arch-specific implementation to handle it.
^ permalink raw reply
* Re: [PATCH v2] ASoC: fsl_easrc: Check for null pointer before dereferencing "ctx" in fsl_easrc_hw_free()
From: Mark Brown @ 2020-04-27 13:09 UTC (permalink / raw)
To: perex, timur, alsa-devel, tiwai, festevam, Shengjiu Wang,
Xiubo.Lee, nicoleotsuka, lgirdwood
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <d23c939f1c9eeb3fce34b6c34d44e2d6156f663a.1587799355.git.shengjiu.wang@nxp.com>
On Sat, 25 Apr 2020 15:19:29 +0800, Shengjiu Wang wrote:
> The patch 955ac624058f: "ASoC: fsl_easrc: Add EASRC ASoC CPU DAI
> drivers" from Apr 16, 2020, leads to the following Smatch complaint:
>
> sound/soc/fsl/fsl_easrc.c:1529 fsl_easrc_hw_free()
> warn: variable dereferenced before check 'ctx' (see line 1527)
>
> sound/soc/fsl/fsl_easrc.c
> 1526 struct fsl_asrc_pair *ctx = runtime->private_data;
> 1527 struct fsl_easrc_ctx_priv *ctx_priv = ctx->private;
> ^^^^^
> Dereference
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.8
Thanks!
[1/1] ASoC: fsl_easrc: Check for null pointer before dereferencing "ctx" in fsl_easrc_hw_free()
commit: f3fc1ea011f09156886e8f4beb240ea814f2197a
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
^ permalink raw reply
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