* Re: [PATCH v5 03/10] powerpc/signal64: Move non-inline functions out of setup_sigcontext()
From: Christopher M. Riedl @ 2021-02-10 4:37 UTC (permalink / raw)
To: Daniel Axtens, linuxppc-dev
In-Reply-To: <87czxbdv8c.fsf@dja-thinkpad.axtens.net>
On Sun Feb 7, 2021 at 10:44 PM CST, Daniel Axtens wrote:
> Hi Chris,
>
> These two paragraphs are a little confusing and they seem slightly
> repetitive. But I get the general idea. Two specific comments below:
Umm... yeah only one of those was supposed to be sent. I will reword
this for the next spin and address the comment below about how it is
not entirely clear that the inline functions are being moved out.
>
> > There are non-inline functions which get called in setup_sigcontext() to
> > save register state to the thread struct. Move these functions into a
> > separate prepare_setup_sigcontext() function so that
> > setup_sigcontext() can be refactored later into an "unsafe" version
> > which assumes an open uaccess window. Non-inline functions should be
> > avoided when uaccess is open.
>
> Why do we want to avoid non-inline functions? We came up with:
>
> - we want KUAP protection for as much of the kernel as possible: each
> extra bit of code run with the window open is another piece of attack
> surface.
>
> - non-inline functions default to traceable, which means we could end
> up ftracing while uaccess is enabled. That's a pretty big hole in the
> defences that KUAP provides.
>
> I think we've also had problems with the window being opened or closed
> unexpectedly by various bits of code? So the less code runs in uaccess
> context the less likely that is to occur.
That is my understanding as well.
>
> > The majority of setup_sigcontext() can be refactored to execute in an
> > "unsafe" context (uaccess window is opened) except for some non-inline
> > functions. Move these out into a separate prepare_setup_sigcontext()
> > function which must be called first and before opening up a uaccess
> > window. A follow-up commit converts setup_sigcontext() to be "unsafe".
>
> This was a bit confusing until we realise that you're moving the _calls_
> to the non-inline functions out, not the non-inline functions
> themselves.
>
> > Signed-off-by: Christopher M. Riedl <cmr@codefail.de>
> > ---
> > arch/powerpc/kernel/signal_64.c | 32 +++++++++++++++++++++-----------
> > 1 file changed, 21 insertions(+), 11 deletions(-)
> >
> > diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
> > index f9e4a1ac440f..b211a8ea4f6e 100644
> > --- a/arch/powerpc/kernel/signal_64.c
> > +++ b/arch/powerpc/kernel/signal_64.c
> > @@ -79,6 +79,24 @@ static elf_vrreg_t __user *sigcontext_vmx_regs(struct sigcontext __user *sc)
> > }
> > #endif
> >
> > +static void prepare_setup_sigcontext(struct task_struct *tsk, int ctx_has_vsx_region)
>
> ctx_has_vsx_region should probably be a bool? Although setup_sigcontext
> also has it as an int so I guess that's arguable, and maybe it's better
> to stick with this for constency.
I've been told not to introduce unrelated changes in my patches before
so chose to keep this as an int for consistency.
>
> > +{
> > +#ifdef CONFIG_ALTIVEC
> > + /* save altivec registers */
> > + if (tsk->thread.used_vr)
> > + flush_altivec_to_thread(tsk);
> > + if (cpu_has_feature(CPU_FTR_ALTIVEC))
> > + tsk->thread.vrsave = mfspr(SPRN_VRSAVE);
> > +#endif /* CONFIG_ALTIVEC */
> > +
> > + flush_fp_to_thread(tsk);
> > +
> > +#ifdef CONFIG_VSX
> > + if (tsk->thread.used_vsr && ctx_has_vsx_region)
> > + flush_vsx_to_thread(tsk);
> > +#endif /* CONFIG_VSX */
>
> Alternatively, given that this is the only use of ctx_has_vsx_region,
> mpe suggested that perhaps we could drop it entirely and always
> flush_vsx if used_vsr. The function is only ever called with either
> `current` or wth ctx_has_vsx_region set to 1, so in either case I think
> that's safe? I'm not sure if it would have performance implications.
I think that could work as long as we can guarantee that the context
passed to swapcontext will always be sufficiently sized if used_vsr,
which I think *has* to be the case?
>
> Should we move this and the altivec ifdef to IS_ENABLED(CONFIG_VSX) etc?
> I'm not sure if that runs into any problems with things like 'used_vsr'
> only being defined if CONFIG_VSX is set, but I thought I'd ask.
That's why I didn't use IS_ENABLED(CONFIG_...) here - all of these
field (used_vr, vrsave, used_vsr) declarations are guarded by #ifdefs :/
>
>
> > +}
> > +
> > /*
> > * Set up the sigcontext for the signal frame.
> > */
> > @@ -97,7 +115,6 @@ static long setup_sigcontext(struct sigcontext __user *sc,
> > */
> > #ifdef CONFIG_ALTIVEC
> > elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc);
> > - unsigned long vrsave;
> > #endif
> > struct pt_regs *regs = tsk->thread.regs;
> > unsigned long msr = regs->msr;
> > @@ -112,7 +129,6 @@ static long setup_sigcontext(struct sigcontext __user *sc,
> >
> > /* save altivec registers */
> > if (tsk->thread.used_vr) {
> > - flush_altivec_to_thread(tsk);
> > /* Copy 33 vec registers (vr0..31 and vscr) to the stack */
> > err |= __copy_to_user(v_regs, &tsk->thread.vr_state,
> > 33 * sizeof(vector128));
> > @@ -124,17 +140,10 @@ static long setup_sigcontext(struct sigcontext __user *sc,
> > /* We always copy to/from vrsave, it's 0 if we don't have or don't
> > * use altivec.
> > */
> > - vrsave = 0;
> > - if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
> > - vrsave = mfspr(SPRN_VRSAVE);
> > - tsk->thread.vrsave = vrsave;
> > - }
> > -
> > - err |= __put_user(vrsave, (u32 __user *)&v_regs[33]);
> > + err |= __put_user(tsk->thread.vrsave, (u32 __user *)&v_regs[33]);
>
> Previously, if !cpu_has_feature(ALTIVEC), v_regs[33] had vrsave stored,
> which was set to 0 explicitly. Now we store thread.vrsave instead of the
> local vrsave. That should be safe - it is initalised to 0 elsewhere.
>
> So you don't have to do anything here, this is just letting you know
> that we checked it and thought about it.
Thanks! I thought about adding a comment/note here as I had to convince
myself that thread.vrsave is indeed initialized to 0 before making this
change as well. I will mention it in the word-smithed commit message for
posterity.
>
> > #else /* CONFIG_ALTIVEC */
> > err |= __put_user(0, &sc->v_regs);
> > #endif /* CONFIG_ALTIVEC */
> > - flush_fp_to_thread(tsk);
> > /* copy fpr regs and fpscr */
> > err |= copy_fpr_to_user(&sc->fp_regs, tsk);
> >
> > @@ -150,7 +159,6 @@ static long setup_sigcontext(struct sigcontext __user *sc,
> > * VMX data.
> > */
> > if (tsk->thread.used_vsr && ctx_has_vsx_region) {
> > - flush_vsx_to_thread(tsk);
> > v_regs += ELF_NVRREG;
> > err |= copy_vsx_to_user(v_regs, tsk);
> > /* set MSR_VSX in the MSR value in the frame to
> > @@ -655,6 +663,7 @@ SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx,
> > ctx_has_vsx_region = 1;
> >
> > if (old_ctx != NULL) {
> > + prepare_setup_sigcontext(current, ctx_has_vsx_region);
> > if (!access_ok(old_ctx, ctx_size)
> > || setup_sigcontext(&old_ctx->uc_mcontext, current, 0, NULL, 0,
> > ctx_has_vsx_region)
>
> I had a think about whether there was a problem with bubbling
> prepare_setup_sigcontext over the access_ok() test, but given that
> prepare_setup_sigcontext(current ...) doesn't access any of old_ctx, I'm
> satisfied that it's OK - no changes needed.
Not sure I understand what you mean by 'bubbling over'?
>
>
> > @@ -842,6 +851,7 @@ int handle_rt_signal64(struct ksignal *ksig, sigset_t *set,
> > #endif
> > {
> > err |= __put_user(0, &frame->uc.uc_link);
> > + prepare_setup_sigcontext(tsk, 1);
>
> Why do we call with ctx_has_vsx_region = 1 here? It's not immediately
> clear to me why this is correct, but mpe and Mikey seem pretty convinced
> that it is.
I think it's because we always have a "complete" sigcontext w/ the VSX
save area here, unlike in swapcontext where we have to check. Also, the
following unsafe_setup_sigcontext() is called with ctx_has_vsx_region=1
so assumes that the VSX data was copied by prepare_setup_sigcontext().
>
> > err |= setup_sigcontext(&frame->uc.uc_mcontext, tsk, ksig->sig,
> > NULL, (unsigned long)ksig->ka.sa.sa_handler,
> > 1);
>
>
> Finally, it's a bit hard to figure out where to put this, but we spent
> some time making sure that the various things you moved into the
> prepare_setup_sigcontext() function were called under the same
> circumstances as they were before, and there were no concerns there.
Thanks for reviewing and double checking my work :)
>
> Kind regards,
> Daniel
^ permalink raw reply
* Re: [PATCH] mm/pmem: Avoid inserting hugepage PTE entry with fsdax if hugepage support is disabled
From: Pankaj Gupta @ 2021-02-10 5:18 UTC (permalink / raw)
To: Aneesh Kumar K.V
Cc: Jan Kara, linux-nvdimm, Linux MM, Dan Williams, linuxppc-dev,
Kirill A . Shutemov
In-Reply-To: <20210205023956.417587-1-aneesh.kumar@linux.ibm.com>
> Differentiate between hardware not supporting hugepages and user disabling THP
> via 'echo never > /sys/kernel/mm/transparent_hugepage/enabled'
>
> For the devdax namespace, the kernel handles the above via the
> supported_alignment attribute and failing to initialize the namespace
> if the namespace align value is not supported on the platform.
>
> For the fsdax namespace, the kernel will continue to initialize
> the namespace. This can result in the kernel creating a huge pte
> entry even though the hardware don't support the same.
>
> We do want hugepage support with pmem even if the end-user disabled THP
> via sysfs file (/sys/kernel/mm/transparent_hugepage/enabled). Hence
> differentiate between hardware/firmware lacking support vs user-controlled
> disable of THP and prevent a huge fault if the hardware lacks hugepage
> support.
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
> ---
> include/linux/huge_mm.h | 15 +++++++++------
> mm/huge_memory.c | 6 +++++-
> 2 files changed, 14 insertions(+), 7 deletions(-)
>
> diff --git a/include/linux/huge_mm.h b/include/linux/huge_mm.h
> index 6a19f35f836b..ba973efcd369 100644
> --- a/include/linux/huge_mm.h
> +++ b/include/linux/huge_mm.h
> @@ -78,6 +78,7 @@ static inline vm_fault_t vmf_insert_pfn_pud(struct vm_fault *vmf, pfn_t pfn,
> }
>
> enum transparent_hugepage_flag {
> + TRANSPARENT_HUGEPAGE_NEVER_DAX,
> TRANSPARENT_HUGEPAGE_FLAG,
> TRANSPARENT_HUGEPAGE_REQ_MADV_FLAG,
> TRANSPARENT_HUGEPAGE_DEFRAG_DIRECT_FLAG,
> @@ -123,6 +124,13 @@ extern unsigned long transparent_hugepage_flags;
> */
> static inline bool __transparent_hugepage_enabled(struct vm_area_struct *vma)
> {
> +
> + /*
> + * If the hardware/firmware marked hugepage support disabled.
> + */
> + if (transparent_hugepage_flags & (1 << TRANSPARENT_HUGEPAGE_NEVER_DAX))
> + return false;
> +
> if (vma->vm_flags & VM_NOHUGEPAGE)
> return false;
>
> @@ -134,12 +142,7 @@ static inline bool __transparent_hugepage_enabled(struct vm_area_struct *vma)
>
> if (transparent_hugepage_flags & (1 << TRANSPARENT_HUGEPAGE_FLAG))
> return true;
> - /*
> - * For dax vmas, try to always use hugepage mappings. If the kernel does
> - * not support hugepages, fsdax mappings will fallback to PAGE_SIZE
> - * mappings, and device-dax namespaces, that try to guarantee a given
> - * mapping size, will fail to enable
> - */
> +
> if (vma_is_dax(vma))
> return true;
>
> diff --git a/mm/huge_memory.c b/mm/huge_memory.c
> index 9237976abe72..d698b7e27447 100644
> --- a/mm/huge_memory.c
> +++ b/mm/huge_memory.c
> @@ -386,7 +386,11 @@ static int __init hugepage_init(void)
> struct kobject *hugepage_kobj;
>
> if (!has_transparent_hugepage()) {
> - transparent_hugepage_flags = 0;
> + /*
> + * Hardware doesn't support hugepages, hence disable
> + * DAX PMD support.
> + */
> + transparent_hugepage_flags = 1 << TRANSPARENT_HUGEPAGE_NEVER_DAX;
> return -EINVAL;
> }
Reviewed-by: Pankaj Gupta <pankaj.gupta@cloud.ionos.com>
^ permalink raw reply
* [PATCH] selftests/powerpc: Fix L1D flushing tests for Power10
From: Russell Currey @ 2021-02-10 5:22 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Russell Currey, dja
The rfi_flush and entry_flush selftests work by using the PM_LD_MISS_L1
perf event to count L1D misses. The value of this event has changed
over time:
- Power7 uses 0x400f0
- Power8 and Power9 use both 0x400f0 and 0x3e054
- Power10 uses only 0x3e054
Update these selftests to use the value 0x3e054 on P10 and later,
fixing the tests from finding 0 events.
Signed-off-by: Russell Currey <ruscur@russell.cc>
---
tools/testing/selftests/powerpc/security/entry_flush.c | 4 +++-
tools/testing/selftests/powerpc/security/flush_utils.c | 9 +++++++++
tools/testing/selftests/powerpc/security/flush_utils.h | 9 ++++++++-
tools/testing/selftests/powerpc/security/rfi_flush.c | 4 +++-
4 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/tools/testing/selftests/powerpc/security/entry_flush.c b/tools/testing/selftests/powerpc/security/entry_flush.c
index 78cf914fa321..ffcc93be7df1 100644
--- a/tools/testing/selftests/powerpc/security/entry_flush.c
+++ b/tools/testing/selftests/powerpc/security/entry_flush.c
@@ -26,6 +26,7 @@ int entry_flush_test(void)
__u64 l1d_misses_total = 0;
unsigned long iterations = 100000, zero_size = 24 * 1024;
unsigned long l1d_misses_expected;
+ unsigned long perf_l1d_miss_event;
int rfi_flush_orig;
int entry_flush, entry_flush_orig;
@@ -53,7 +54,8 @@ int entry_flush_test(void)
entry_flush = entry_flush_orig;
- fd = perf_event_open_counter(PERF_TYPE_RAW, /* L1d miss */ 0x400f0, -1);
+ perf_l1d_miss_event = get_perf_l1d_miss_event();
+ fd = perf_event_open_counter(PERF_TYPE_RAW, perf_l1d_miss_event, -1);
FAIL_IF(fd < 0);
p = (char *)memalign(zero_size, CACHELINE_SIZE);
diff --git a/tools/testing/selftests/powerpc/security/flush_utils.c b/tools/testing/selftests/powerpc/security/flush_utils.c
index 0c3c4c40c7fb..7a5ef1a7a228 100644
--- a/tools/testing/selftests/powerpc/security/flush_utils.c
+++ b/tools/testing/selftests/powerpc/security/flush_utils.c
@@ -68,3 +68,12 @@ void set_dscr(unsigned long val)
asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
}
+
+unsigned long get_perf_l1d_miss_event(void)
+{
+ bool is_p10_or_later = ((mfspr(SPRN_PVR) >> 16) & 0xFFFF) >= 0x80;
+
+ if (is_p10_or_later)
+ return PERF_L1D_MISS_P10;
+ return PERF_L1D_MISS_P7;
+}
diff --git a/tools/testing/selftests/powerpc/security/flush_utils.h b/tools/testing/selftests/powerpc/security/flush_utils.h
index 07a5eb301466..c60d15f3eb4b 100644
--- a/tools/testing/selftests/powerpc/security/flush_utils.h
+++ b/tools/testing/selftests/powerpc/security/flush_utils.h
@@ -7,11 +7,18 @@
#ifndef _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H
#define _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H
-#define CACHELINE_SIZE 128
+#define CACHELINE_SIZE 128
+
+#define SPRN_PVR 287
+
+#define PERF_L1D_MISS_P7 0x400f0
+#define PERF_L1D_MISS_P10 0x3e054
void syscall_loop(char *p, unsigned long iterations,
unsigned long zero_size);
void set_dscr(unsigned long val);
+unsigned long get_perf_l1d_miss_event(void);
+
#endif /* _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H */
diff --git a/tools/testing/selftests/powerpc/security/rfi_flush.c b/tools/testing/selftests/powerpc/security/rfi_flush.c
index 7565fd786640..edf67c91ef79 100644
--- a/tools/testing/selftests/powerpc/security/rfi_flush.c
+++ b/tools/testing/selftests/powerpc/security/rfi_flush.c
@@ -26,6 +26,7 @@ int rfi_flush_test(void)
__u64 l1d_misses_total = 0;
unsigned long iterations = 100000, zero_size = 24 * 1024;
unsigned long l1d_misses_expected;
+ unsigned long perf_l1d_miss_event;
int rfi_flush_orig, rfi_flush;
int have_entry_flush, entry_flush_orig;
@@ -54,7 +55,8 @@ int rfi_flush_test(void)
rfi_flush = rfi_flush_orig;
- fd = perf_event_open_counter(PERF_TYPE_RAW, /* L1d miss */ 0x400f0, -1);
+ perf_l1d_miss_event = get_perf_l1d_miss_event();
+ fd = perf_event_open_counter(PERF_TYPE_RAW, perf_l1d_miss_event, -1);
FAIL_IF(fd < 0);
p = (char *)memalign(zero_size, CACHELINE_SIZE);
--
2.30.1
^ permalink raw reply related
* [powerpc:merge] BUILD SUCCESS 393ff0ee1405c44af2720c953d1090b9bb8d0226
From: kernel test robot @ 2021-02-10 5:41 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git merge
branch HEAD: 393ff0ee1405c44af2720c953d1090b9bb8d0226 Automatic merge of 'master' into merge (2021-02-07 21:53)
elapsed time: 1361m
configs tested: 125
configs skipped: 2
The following configs have been built successfully.
More configs may be tested in the coming days.
gcc tested configs:
arm defconfig
arm64 allyesconfig
arm64 defconfig
arm allyesconfig
arm allmodconfig
m68k m5208evb_defconfig
sh edosk7760_defconfig
sparc alldefconfig
arm palmz72_defconfig
h8300 h8300h-sim_defconfig
powerpc ep88xc_defconfig
arm zx_defconfig
x86_64 alldefconfig
mips rb532_defconfig
powerpc mpc836x_mds_defconfig
sh rts7751r2d1_defconfig
powerpc klondike_defconfig
arm sunxi_defconfig
powerpc sam440ep_defconfig
nios2 defconfig
m68k m5307c3_defconfig
m68k m5275evb_defconfig
xtensa common_defconfig
powerpc mpc8315_rdb_defconfig
arm versatile_defconfig
powerpc stx_gp3_defconfig
sh sh7785lcr_defconfig
riscv nommu_k210_defconfig
mips rm200_defconfig
arm aspeed_g5_defconfig
powerpc bamboo_defconfig
powerpc mpc85xx_cds_defconfig
arm zeus_defconfig
powerpc pq2fads_defconfig
mips e55_defconfig
powerpc mpc837x_rdb_defconfig
arc vdk_hs38_defconfig
mips rs90_defconfig
powerpc sequoia_defconfig
powerpc taishan_defconfig
mips maltaaprp_defconfig
arm cns3420vb_defconfig
alpha allyesconfig
sh shx3_defconfig
arm ixp4xx_defconfig
xtensa nommu_kc705_defconfig
arm hackkit_defconfig
m68k m5475evb_defconfig
arm stm32_defconfig
sh rsk7201_defconfig
h8300 edosk2674_defconfig
powerpc socrates_defconfig
powerpc mpc832x_rdb_defconfig
powerpc mpc8313_rdb_defconfig
powerpc ppc40x_defconfig
m68k multi_defconfig
ia64 allmodconfig
ia64 defconfig
ia64 allyesconfig
m68k allmodconfig
m68k defconfig
m68k allyesconfig
arc allyesconfig
nds32 allnoconfig
c6x allyesconfig
nds32 defconfig
nios2 allyesconfig
csky defconfig
alpha defconfig
xtensa allyesconfig
h8300 allyesconfig
arc defconfig
sh allmodconfig
parisc defconfig
s390 allyesconfig
s390 allmodconfig
parisc allyesconfig
s390 defconfig
i386 allyesconfig
sparc allyesconfig
sparc defconfig
i386 tinyconfig
i386 defconfig
mips allyesconfig
mips allmodconfig
powerpc allyesconfig
powerpc allmodconfig
powerpc allnoconfig
x86_64 randconfig-a006-20210209
x86_64 randconfig-a001-20210209
x86_64 randconfig-a005-20210209
x86_64 randconfig-a004-20210209
x86_64 randconfig-a002-20210209
x86_64 randconfig-a003-20210209
i386 randconfig-a001-20210209
i386 randconfig-a005-20210209
i386 randconfig-a003-20210209
i386 randconfig-a002-20210209
i386 randconfig-a006-20210209
i386 randconfig-a004-20210209
i386 randconfig-a016-20210209
i386 randconfig-a013-20210209
i386 randconfig-a012-20210209
i386 randconfig-a014-20210209
i386 randconfig-a011-20210209
i386 randconfig-a015-20210209
riscv allyesconfig
riscv nommu_virt_defconfig
riscv allnoconfig
riscv defconfig
riscv rv32_defconfig
riscv allmodconfig
x86_64 rhel
x86_64 allyesconfig
x86_64 rhel-7.6-kselftests
x86_64 defconfig
x86_64 rhel-8.3
x86_64 rhel-8.3-kbuiltin
x86_64 kexec
clang tested configs:
x86_64 randconfig-a013-20210209
x86_64 randconfig-a014-20210209
x86_64 randconfig-a015-20210209
x86_64 randconfig-a012-20210209
x86_64 randconfig-a016-20210209
x86_64 randconfig-a011-20210209
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply
* [powerpc:fixes-test] BUILD SUCCESS 8c511eff1827239f24ded212b1bcda7ca5b16203
From: kernel test robot @ 2021-02-10 5:41 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git fixes-test
branch HEAD: 8c511eff1827239f24ded212b1bcda7ca5b16203 powerpc/kuap: Allow kernel thread to access userspace after kthread_use_mm
elapsed time: 5331m
configs tested: 245
configs skipped: 23
The following configs have been built successfully.
More configs may be tested in the coming days.
gcc tested configs:
arm defconfig
arm64 allyesconfig
arm allyesconfig
arm allmodconfig
arm64 defconfig
powerpc tqm8xx_defconfig
m68k q40_defconfig
powerpc tqm5200_defconfig
openrisc defconfig
sh shx3_defconfig
m68k m5208evb_defconfig
sh edosk7760_defconfig
sparc alldefconfig
arm palmz72_defconfig
h8300 h8300h-sim_defconfig
sh r7785rp_defconfig
sparc64 defconfig
arm am200epdkit_defconfig
sh shmin_defconfig
powerpc tqm8540_defconfig
mips ci20_defconfig
nds32 allnoconfig
mips tb0226_defconfig
riscv defconfig
xtensa cadence_csp_defconfig
powerpc ep88xc_defconfig
arm zx_defconfig
x86_64 alldefconfig
mips rb532_defconfig
powerpc mpc836x_mds_defconfig
m68k m5249evb_defconfig
sh sh7770_generic_defconfig
mips cobalt_defconfig
arc nsimosci_defconfig
xtensa virt_defconfig
microblaze defconfig
powerpc ksi8560_defconfig
sh sh03_defconfig
mips rs90_defconfig
powerpc pseries_defconfig
arm spear13xx_defconfig
powerpc kmeter1_defconfig
mips lemote2f_defconfig
mips rt305x_defconfig
mips fuloong2e_defconfig
powerpc mpc8313_rdb_defconfig
arm exynos_defconfig
arm ixp4xx_defconfig
arm colibri_pxa300_defconfig
powerpc mpc832x_rdb_defconfig
powerpc ppc6xx_defconfig
powerpc wii_defconfig
arc axs103_defconfig
powerpc sam440ep_defconfig
nios2 defconfig
m68k m5307c3_defconfig
m68k m5275evb_defconfig
xtensa common_defconfig
powerpc mpc8315_rdb_defconfig
mips pic32mzda_defconfig
mips maltaup_defconfig
mips rbtx49xx_defconfig
ia64 gensparse_defconfig
sh lboxre2_defconfig
s390 debug_defconfig
openrisc or1klitex_defconfig
powerpc linkstation_defconfig
arm xcep_defconfig
powerpc mpc7448_hpc2_defconfig
ia64 alldefconfig
mips cu1830-neo_defconfig
arm mini2440_defconfig
arm ep93xx_defconfig
arm sunxi_defconfig
powerpc makalu_defconfig
riscv nommu_k210_defconfig
sh kfr2r09-romimage_defconfig
powerpc mpc8560_ads_defconfig
arm s5pv210_defconfig
sh rts7751r2d1_defconfig
arm stm32_defconfig
mips bmips_be_defconfig
um kunit_defconfig
powerpc ppa8548_defconfig
arc allyesconfig
arm versatile_defconfig
powerpc stx_gp3_defconfig
sh sh7785lcr_defconfig
arm sama5_defconfig
sh sh7763rdp_defconfig
mips bcm47xx_defconfig
openrisc or1ksim_defconfig
powerpc pasemi_defconfig
arm mxs_defconfig
arc alldefconfig
mips ath79_defconfig
c6x evmc6474_defconfig
arm pxa3xx_defconfig
powerpc socrates_defconfig
xtensa smp_lx200_defconfig
mips jmr3927_defconfig
powerpc ppc64_defconfig
c6x allyesconfig
mips rm200_defconfig
arm aspeed_g5_defconfig
powerpc bamboo_defconfig
powerpc mpc85xx_cds_defconfig
xtensa audio_kc705_defconfig
sh allmodconfig
m68k alldefconfig
powerpc adder875_defconfig
sh migor_defconfig
mips sb1250_swarm_defconfig
arm zeus_defconfig
powerpc pq2fads_defconfig
mips e55_defconfig
powerpc mpc837x_rdb_defconfig
arm vt8500_v6_v7_defconfig
arm pxa_defconfig
mips xway_defconfig
arm netwinder_defconfig
mips gpr_defconfig
arc vdk_hs38_defconfig
powerpc sequoia_defconfig
powerpc taishan_defconfig
alpha defconfig
mips maltaaprp_defconfig
m68k m5475evb_defconfig
mips malta_defconfig
m68k mvme147_defconfig
arm cns3420vb_defconfig
alpha allyesconfig
xtensa nommu_kc705_defconfig
arm mvebu_v7_defconfig
arm s3c2410_defconfig
powerpc cell_defconfig
sh rts7751r2dplus_defconfig
arm hackkit_defconfig
sh rsk7201_defconfig
m68k allyesconfig
arc axs101_defconfig
openrisc simple_smp_defconfig
powerpc mpc8540_ads_defconfig
m68k mac_defconfig
sh dreamcast_defconfig
mips decstation_r4k_defconfig
arm imx_v4_v5_defconfig
microblaze mmu_defconfig
sh sh7785lcr_32bit_defconfig
nios2 3c120_defconfig
powerpc powernv_defconfig
sh sh7710voipgw_defconfig
h8300 edosk2674_defconfig
powerpc ppc40x_defconfig
m68k multi_defconfig
arm socfpga_defconfig
um x86_64_defconfig
arm lart_defconfig
arm keystone_defconfig
ia64 allmodconfig
ia64 defconfig
ia64 allyesconfig
m68k allmodconfig
m68k defconfig
nds32 defconfig
nios2 allyesconfig
csky defconfig
xtensa allyesconfig
h8300 allyesconfig
arc defconfig
parisc defconfig
s390 allyesconfig
s390 allmodconfig
parisc allyesconfig
s390 defconfig
i386 allyesconfig
sparc allyesconfig
sparc defconfig
i386 tinyconfig
i386 defconfig
mips allyesconfig
mips allmodconfig
powerpc allyesconfig
powerpc allmodconfig
powerpc allnoconfig
x86_64 randconfig-a006-20210209
x86_64 randconfig-a001-20210209
x86_64 randconfig-a005-20210209
x86_64 randconfig-a004-20210209
x86_64 randconfig-a002-20210209
x86_64 randconfig-a003-20210209
i386 randconfig-a001-20210209
i386 randconfig-a005-20210209
i386 randconfig-a003-20210209
i386 randconfig-a002-20210209
i386 randconfig-a006-20210209
i386 randconfig-a004-20210209
i386 randconfig-a001-20210206
i386 randconfig-a005-20210206
i386 randconfig-a003-20210206
i386 randconfig-a006-20210206
i386 randconfig-a002-20210206
i386 randconfig-a004-20210206
x86_64 randconfig-a013-20210206
x86_64 randconfig-a014-20210206
x86_64 randconfig-a015-20210206
x86_64 randconfig-a011-20210206
x86_64 randconfig-a016-20210206
x86_64 randconfig-a012-20210206
i386 randconfig-a016-20210209
i386 randconfig-a013-20210209
i386 randconfig-a012-20210209
i386 randconfig-a014-20210209
i386 randconfig-a011-20210209
i386 randconfig-a015-20210209
i386 randconfig-a013-20210206
i386 randconfig-a016-20210206
i386 randconfig-a014-20210206
i386 randconfig-a012-20210206
i386 randconfig-a015-20210206
i386 randconfig-a011-20210206
riscv allyesconfig
riscv nommu_virt_defconfig
riscv allnoconfig
riscv rv32_defconfig
riscv allmodconfig
x86_64 rhel
x86_64 allyesconfig
x86_64 rhel-7.6-kselftests
x86_64 defconfig
x86_64 rhel-8.3
x86_64 rhel-8.3-kbuiltin
x86_64 kexec
clang tested configs:
x86_64 randconfig-a013-20210209
x86_64 randconfig-a014-20210209
x86_64 randconfig-a015-20210209
x86_64 randconfig-a012-20210209
x86_64 randconfig-a016-20210209
x86_64 randconfig-a011-20210209
x86_64 randconfig-a006-20210206
x86_64 randconfig-a001-20210206
x86_64 randconfig-a005-20210206
x86_64 randconfig-a002-20210206
x86_64 randconfig-a004-20210206
x86_64 randconfig-a003-20210206
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply
* [powerpc:next-test] BUILD REGRESSION 5811244192fc4e18c001c69300044c2acf30bd91
From: kernel test robot @ 2021-02-10 5:41 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next-test
branch HEAD: 5811244192fc4e18c001c69300044c2acf30bd91 powerpc/64s: power4 nap fixup in C
Error/Warning reports:
https://lore.kernel.org/linuxppc-dev/202102100438.UVRTpNeN-lkp@intel.com
https://lore.kernel.org/linuxppc-dev/202102100601.eLtCMofO-lkp@intel.com
https://lore.kernel.org/linuxppc-dev/202102101057.KqISSfvf-lkp@intel.com
Error/Warning in current branch:
arch/powerpc/mm/book3s64/radix_tlb.c:646:6: warning: no previous prototype for function 'exit_lazy_flush_tlb' [-Wmissing-prototypes]
arch/powerpc/platforms/83xx/km83xx.c:183:19: error: 'mpc83xx_setup_pci' undeclared here (not in a function); did you mean 'mpc83xx_setup_arch'?
arch/powerpc/platforms/amigaone/setup.c:73:13: error: no previous prototype for 'amigaone_discover_phbs' [-Werror=missing-prototypes]
possible Error/Warning in current branch:
arch/powerpc/mm/book3s64/radix_tlb.c:646:6: error: no previous prototype for 'exit_lazy_flush_tlb' [-Werror=missing-prototypes]
Error/Warning ids grouped by kconfigs:
gcc_recent_errors
|-- powerpc-cell_defconfig
| `-- arch-powerpc-mm-book3s64-radix_tlb.c:error:no-previous-prototype-for-exit_lazy_flush_tlb
|-- powerpc-kmeter1_defconfig
| `-- arch-powerpc-platforms-83xx-km83xx.c:error:mpc83xx_setup_pci-undeclared-here-(not-in-a-function)
|-- powerpc-pasemi_defconfig
| `-- arch-powerpc-mm-book3s64-radix_tlb.c:error:no-previous-prototype-for-exit_lazy_flush_tlb
|-- powerpc-ppc64_defconfig
| `-- arch-powerpc-mm-book3s64-radix_tlb.c:error:no-previous-prototype-for-exit_lazy_flush_tlb
`-- powerpc64-randconfig-r036-20210209
`-- arch-powerpc-platforms-amigaone-setup.c:error:no-previous-prototype-for-amigaone_discover_phbs
clang_recent_errors
`-- powerpc-randconfig-r026-20210209
`-- arch-powerpc-mm-book3s64-radix_tlb.c:warning:no-previous-prototype-for-function-exit_lazy_flush_tlb
elapsed time: 720m
configs tested: 116
configs skipped: 2
gcc tested configs:
arm defconfig
arm64 allyesconfig
arm64 defconfig
arm allyesconfig
arm allmodconfig
powerpc pasemi_defconfig
arm mxs_defconfig
arc alldefconfig
mips ath79_defconfig
c6x evmc6474_defconfig
arm pxa3xx_defconfig
powerpc socrates_defconfig
xtensa smp_lx200_defconfig
mips jmr3927_defconfig
powerpc ppc64_defconfig
c6x allyesconfig
xtensa audio_kc705_defconfig
sh allmodconfig
arm vt8500_v6_v7_defconfig
arm pxa_defconfig
mips xway_defconfig
arm netwinder_defconfig
mips gpr_defconfig
arc vdk_hs38_defconfig
mips rs90_defconfig
powerpc sequoia_defconfig
powerpc taishan_defconfig
alpha defconfig
mips maltaaprp_defconfig
arc allyesconfig
m68k m5475evb_defconfig
arm stm32_defconfig
mips malta_defconfig
m68k mvme147_defconfig
arm cns3420vb_defconfig
alpha allyesconfig
sh shx3_defconfig
arm ixp4xx_defconfig
xtensa nommu_kc705_defconfig
arm mvebu_v7_defconfig
arm s3c2410_defconfig
powerpc cell_defconfig
sh rts7751r2dplus_defconfig
arm hackkit_defconfig
sh rsk7201_defconfig
arm imx_v4_v5_defconfig
arm am200epdkit_defconfig
microblaze mmu_defconfig
sh sh7785lcr_32bit_defconfig
ia64 allmodconfig
ia64 defconfig
ia64 allyesconfig
m68k allmodconfig
m68k defconfig
m68k allyesconfig
nios2 defconfig
nds32 allnoconfig
nds32 defconfig
nios2 allyesconfig
csky defconfig
xtensa allyesconfig
h8300 allyesconfig
arc defconfig
parisc defconfig
s390 allyesconfig
s390 allmodconfig
parisc allyesconfig
s390 defconfig
i386 allyesconfig
sparc allyesconfig
sparc defconfig
i386 tinyconfig
i386 defconfig
mips allyesconfig
mips allmodconfig
powerpc allyesconfig
powerpc allmodconfig
powerpc allnoconfig
x86_64 randconfig-a006-20210209
x86_64 randconfig-a001-20210209
x86_64 randconfig-a005-20210209
x86_64 randconfig-a004-20210209
x86_64 randconfig-a002-20210209
x86_64 randconfig-a003-20210209
i386 randconfig-a001-20210209
i386 randconfig-a005-20210209
i386 randconfig-a003-20210209
i386 randconfig-a002-20210209
i386 randconfig-a006-20210209
i386 randconfig-a004-20210209
i386 randconfig-a016-20210209
i386 randconfig-a013-20210209
i386 randconfig-a012-20210209
i386 randconfig-a014-20210209
i386 randconfig-a011-20210209
i386 randconfig-a015-20210209
riscv nommu_k210_defconfig
riscv allyesconfig
riscv nommu_virt_defconfig
riscv allnoconfig
riscv defconfig
riscv rv32_defconfig
riscv allmodconfig
x86_64 rhel-7.6-kselftests
x86_64 rhel-8.3
x86_64 rhel-8.3-kbuiltin
x86_64 rhel
x86_64 allyesconfig
x86_64 defconfig
x86_64 kexec
clang tested configs:
x86_64 randconfig-a013-20210209
x86_64 randconfig-a014-20210209
x86_64 randconfig-a015-20210209
x86_64 randconfig-a012-20210209
x86_64 randconfig-a016-20210209
x86_64 randconfig-a011-20210209
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply
* [powerpc:next] BUILD SUCCESS e7eb919057c3450cdd9d335e4a23a4da8da58db4
From: kernel test robot @ 2021-02-10 5:41 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
branch HEAD: e7eb919057c3450cdd9d335e4a23a4da8da58db4 powerpc/64s: Handle program checks in wrong endian during early boot
elapsed time: 1360m
configs tested: 158
configs skipped: 2
The following configs have been built successfully.
More configs may be tested in the coming days.
gcc tested configs:
arm defconfig
arm64 allyesconfig
arm64 defconfig
arm allyesconfig
arm allmodconfig
m68k m5208evb_defconfig
sh edosk7760_defconfig
sparc alldefconfig
arm palmz72_defconfig
h8300 h8300h-sim_defconfig
arm davinci_all_defconfig
s390 debug_defconfig
arm hackkit_defconfig
sh se7721_defconfig
powerpc ep88xc_defconfig
arm zx_defconfig
x86_64 alldefconfig
mips rb532_defconfig
powerpc mpc836x_mds_defconfig
sh sh03_defconfig
mips rs90_defconfig
sparc64 defconfig
sh shx3_defconfig
powerpc ksi8560_defconfig
powerpc sam440ep_defconfig
nios2 defconfig
m68k m5307c3_defconfig
m68k m5275evb_defconfig
xtensa common_defconfig
powerpc mpc8315_rdb_defconfig
mips cu1830-neo_defconfig
arm mini2440_defconfig
arm ep93xx_defconfig
arm sunxi_defconfig
powerpc makalu_defconfig
powerpc pasemi_defconfig
arm mxs_defconfig
arc alldefconfig
mips ath79_defconfig
c6x evmc6474_defconfig
arm pxa3xx_defconfig
powerpc socrates_defconfig
xtensa smp_lx200_defconfig
mips jmr3927_defconfig
powerpc ppc64_defconfig
c6x allyesconfig
riscv nommu_k210_defconfig
mips rm200_defconfig
arm aspeed_g5_defconfig
powerpc bamboo_defconfig
powerpc mpc85xx_cds_defconfig
xtensa audio_kc705_defconfig
sh allmodconfig
arm zeus_defconfig
powerpc pq2fads_defconfig
mips e55_defconfig
powerpc mpc837x_rdb_defconfig
arm vt8500_v6_v7_defconfig
arm pxa_defconfig
mips xway_defconfig
arm netwinder_defconfig
mips gpr_defconfig
arc vdk_hs38_defconfig
powerpc sequoia_defconfig
powerpc taishan_defconfig
alpha defconfig
mips maltaaprp_defconfig
arc allyesconfig
m68k m5475evb_defconfig
arm stm32_defconfig
mips malta_defconfig
m68k mvme147_defconfig
arm cns3420vb_defconfig
arm ixp4xx_defconfig
xtensa nommu_kc705_defconfig
alpha allyesconfig
arm mvebu_v7_defconfig
arm s3c2410_defconfig
powerpc cell_defconfig
sh rts7751r2dplus_defconfig
powerpc mpc8540_ads_defconfig
m68k mac_defconfig
sh dreamcast_defconfig
mips decstation_r4k_defconfig
arm imx_v4_v5_defconfig
arm am200epdkit_defconfig
microblaze mmu_defconfig
sh sh7785lcr_32bit_defconfig
h8300 edosk2674_defconfig
powerpc mpc832x_rdb_defconfig
powerpc mpc8313_rdb_defconfig
powerpc ppc40x_defconfig
m68k multi_defconfig
ia64 allmodconfig
ia64 defconfig
ia64 allyesconfig
m68k allmodconfig
m68k defconfig
m68k allyesconfig
nds32 allnoconfig
nds32 defconfig
nios2 allyesconfig
csky defconfig
xtensa allyesconfig
h8300 allyesconfig
arc defconfig
parisc defconfig
s390 allyesconfig
s390 allmodconfig
parisc allyesconfig
s390 defconfig
i386 allyesconfig
sparc allyesconfig
sparc defconfig
i386 tinyconfig
i386 defconfig
mips allyesconfig
mips allmodconfig
powerpc allyesconfig
powerpc allmodconfig
powerpc allnoconfig
x86_64 randconfig-a006-20210209
x86_64 randconfig-a001-20210209
x86_64 randconfig-a005-20210209
x86_64 randconfig-a004-20210209
x86_64 randconfig-a002-20210209
x86_64 randconfig-a003-20210209
i386 randconfig-a001-20210209
i386 randconfig-a005-20210209
i386 randconfig-a003-20210209
i386 randconfig-a002-20210209
i386 randconfig-a006-20210209
i386 randconfig-a004-20210209
i386 randconfig-a016-20210209
i386 randconfig-a013-20210209
i386 randconfig-a012-20210209
i386 randconfig-a014-20210209
i386 randconfig-a011-20210209
i386 randconfig-a015-20210209
riscv allyesconfig
riscv nommu_virt_defconfig
riscv allnoconfig
riscv defconfig
riscv rv32_defconfig
riscv allmodconfig
x86_64 rhel
x86_64 allyesconfig
x86_64 rhel-7.6-kselftests
x86_64 defconfig
x86_64 rhel-8.3
x86_64 rhel-8.3-kbuiltin
x86_64 kexec
clang tested configs:
x86_64 randconfig-a013-20210209
x86_64 randconfig-a014-20210209
x86_64 randconfig-a015-20210209
x86_64 randconfig-a012-20210209
x86_64 randconfig-a016-20210209
x86_64 randconfig-a011-20210209
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply
* Re: [PATCH v2 2/7] ASoC: fsl_rpmsg: Add CPU DAI driver for audio base on rpmsg
From: Shengjiu Wang @ 2021-02-10 6:35 UTC (permalink / raw)
To: Mark Brown
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
alsa-devel, Timur Tabi, Xiubo Li, Fabio Estevam, Shengjiu Wang,
Takashi Iwai, Liam Girdwood, linux-kernel, Nicolin Chen,
Rob Herring, linuxppc-dev
In-Reply-To: <20210209222953.GF4916@sirena.org.uk>
On Wed, Feb 10, 2021 at 6:30 AM Mark Brown <broonie@kernel.org> wrote:
>
> On Tue, Feb 09, 2021 at 05:16:16PM +0800, Shengjiu Wang wrote:
> > On Mon, Feb 8, 2021 at 7:53 PM Mark Brown <broonie@kernel.org> wrote:
>
> > > hw_params() can be called multiple times and there's no need for it to
> > > be balanced with hw_free(), I'd move this to a different callback (DAPM
> > > should work well).
>
> > Which callback should I use? Is there an example?
>
> Like I say I'd actually recommend moving this control to DAPM.
I may understand your point, you suggest to use the .set_bias_level
interface. But in my case I need to enable the clock in earlier stage
and keep the clock on when system go to suspend.
I am not sure .set_bias_level can met my requirement. we start
the Chinese new year holiday now, so currently I can't do test for this
recommendation.
Maybe we can keep current implementation, can we?
Later after I do the test, I can submit another patch for it.
Best regards
Wang Shengjiu
^ permalink raw reply
* Re: [PATCH 00/20] Rid W=1 warnings in Crypto
From: Herbert Xu @ 2021-02-10 6:51 UTC (permalink / raw)
To: Lee Jones
Cc: Alexandre Belloni, Aymen Sghaier, Takashi Iwai, Kent Yoder,
Ayush Sawal, Joakim Bech, Gustavo A. R. Silva, Paul Mackerras,
Andreas Westin, Breno Leitão, Atul Gupta, Niklas Hernaeus,
M R Gowda, Horia Geantă, Rohit Maheshwari, Nayna Jain,
Manoj Malviya, Ludovic Desroches, Jonas Linde, Rob Rice, Zaibo Xu,
Harsh Jain, Declan Murphy, Vinay Kumar Yadav, Tudor Ambarus,
Nicolas Ferre, Shujuan Chen, Henrique Cerri,
Daniele Alessandrelli, linux-arm-kernel, Jonathan Cameron,
linux-kernel, Berne Hebark, linux-crypto, Jitendra Lulla,
Paulo Flabiano Smorigo, linuxppc-dev, David S. Miller
In-Reply-To: <20210204111000.2800436-1-lee.jones@linaro.org>
On Thu, Feb 04, 2021 at 11:09:40AM +0000, Lee Jones wrote:
> This set is part of a larger effort attempting to clean-up W=1
> kernel builds, which are currently overwhelmingly riddled with
> niggly little warnings.
>
> This is set 1 of 2 sets required to fully clean Crypto.
>
> Lee Jones (20):
> crypto: hisilicon: sec_drv: Supply missing description for
> 'sec_queue_empty()'s 'queue' param
> crypto: bcm: util: Repair a couple of documentation formatting issues
> crypto: chelsio: chcr_core: File headers are not good candidates for
> kernel-doc
> crypto: ux500: hash: hash_core: Fix worthy kernel-doc headers and
> remove others
> crypto: bcm: spu: Fix formatting and misspelling issues
> crypto: keembay: ocs-hcu: Fix incorrectly named functions/structs
> crypto: bcm: spu2: Fix a whole host of kernel-doc misdemeanours
> crypto: ux500: cryp: Demote some conformant non-kernel headers fix
> another
> crypto: ux500: cryp_irq: File headers are not good kernel-doc
> candidates
> crypto: chelsio: chcr_algo: Fix a couple of kernel-doc issues caused
> by doc-rot
> crypto: ux500: cryp_core: Fix formatting issue and add description for
> 'session_id'
> crypto: atmel-ecc: Struct headers need to start with keyword 'struct'
> crypto: bcm: cipher: Provide description for 'req' and fix formatting
> issues
> crypto: caam: caampkc: Provide the name of the function
> crypto: caam: caamalg_qi2: Supply a couple of 'fallback' related
> descriptions
> crypto: vmx: Source headers are not good kernel-doc candidates
> crypto: nx: nx-aes-cbc: Headers comments should not be kernel-doc
> crypto: nx: nx_debugfs: Header comments should not be kernel-doc
> crypto: nx: Demote header comment and add description for 'nbytes'
> crypto: cavium: nitrox_isr: Demote non-compliant kernel-doc headers
Thanks for doing this. But please don't split the patches at the
file level. Instead split them at the driver level. For example,
all of your bcm changes should be one patch.
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply
* Re: [PATCH] crypto: powerpc: remove unneeded semicolon
From: Herbert Xu @ 2021-02-10 7:22 UTC (permalink / raw)
To: Yang Li; +Cc: linux-kernel, paulus, linux-crypto, linuxppc-dev, davem
In-Reply-To: <1612235850-87446-1-git-send-email-yang.lee@linux.alibaba.com>
On Tue, Feb 02, 2021 at 11:17:30AM +0800, Yang Li wrote:
> Eliminate the following coccicheck warning:
> ./arch/powerpc/crypto/sha256-spe-glue.c:132:2-3: Unneeded
> semicolon
>
> Reported-by: Abaci Robot <abaci@linux.alibaba.com>
> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
> ---
> arch/powerpc/crypto/sha256-spe-glue.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Patch applied. Thanks.
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply
* Re: linux-next: build failure after merge of the powerpc tree
From: Nicholas Piggin @ 2021-02-10 8:20 UTC (permalink / raw)
To: PowerPC, Michael Ellerman, Stephen Rothwell
Cc: Linux Next Mailing List, Linux Kernel Mailing List
In-Reply-To: <20210209211921.777e3053@canb.auug.org.au>
Excerpts from Stephen Rothwell's message of February 9, 2021 8:19 pm:
> Hi all,
>
> After merging the powerpc tree, today's linux-next build (powerpc
> allyesconfig) failed like this:
>
> arch/powerpc/kernel/head_64.o:(__ftr_alt_97+0x0): relocation truncated to fit: R_PPC64_REL24 (OPD) against symbol `do_page_fault' defined in .opd section in arch/powerpc/mm/fault.o
> arch/powerpc/kernel/head_64.o:(__ftr_alt_97+0x8): relocation truncated to fit: R_PPC64_REL24 (OPD) against symbol `do_page_fault' defined in .opd section in arch/powerpc/mm/fault.o
> arch/powerpc/kernel/head_64.o:(__ftr_alt_97+0x28): relocation truncated to fit: R_PPC64_REL24 (OPD) against symbol `unknown_exception' defined in .opd section in arch/powerpc/kernel/traps.o
>
> Not sure exactly which commit caused this, but it is most likkely part
> of a series in the powerpc tree.
>
> I have left the allyesconfig build broken for today.
Hey Stephen,
Thanks for that, it's due to .noinstr section being put on the other
side of .text, so all our interrupt handler asm code can't reach them
directly anymore since the ppc interrupt wrappers patch added noinstr
attribute.
That's not strictly required though, we've used NOKPROBE_SYMBOL okay
until now. If you can take this patch for now, it should get
allyesconfig to build again. I'll fix it in the powerpc tree before the
merge window.
Thanks,
Nick
--
diff --git a/arch/powerpc/include/asm/interrupt.h b/arch/powerpc/include/asm/interrupt.h
index 4badb3e51c19..fee1e4dd1e84 100644
--- a/arch/powerpc/include/asm/interrupt.h
+++ b/arch/powerpc/include/asm/interrupt.h
@@ -172,6 +172,8 @@ static inline void interrupt_nmi_exit_prepare(struct pt_regs *regs, struct inter
#define DECLARE_INTERRUPT_HANDLER_RAW(func) \
__visible long func(struct pt_regs *regs)
+#define ppc_noinstr noinline notrace __no_kcsan __no_sanitize_address
+
/**
* DEFINE_INTERRUPT_HANDLER_RAW - Define raw interrupt handler function
* @func: Function name of the entry point
@@ -198,7 +200,7 @@ static inline void interrupt_nmi_exit_prepare(struct pt_regs *regs, struct inter
#define DEFINE_INTERRUPT_HANDLER_RAW(func) \
static __always_inline long ____##func(struct pt_regs *regs); \
\
-__visible noinstr long func(struct pt_regs *regs) \
+__visible ppc_noinstr long func(struct pt_regs *regs) \
{ \
long ret; \
\
@@ -228,7 +230,7 @@ static __always_inline long ____##func(struct pt_regs *regs)
#define DEFINE_INTERRUPT_HANDLER(func) \
static __always_inline void ____##func(struct pt_regs *regs); \
\
-__visible noinstr void func(struct pt_regs *regs) \
+__visible ppc_noinstr void func(struct pt_regs *regs) \
{ \
struct interrupt_state state; \
\
@@ -262,7 +264,7 @@ static __always_inline void ____##func(struct pt_regs *regs)
#define DEFINE_INTERRUPT_HANDLER_RET(func) \
static __always_inline long ____##func(struct pt_regs *regs); \
\
-__visible noinstr long func(struct pt_regs *regs) \
+__visible ppc_noinstr long func(struct pt_regs *regs) \
{ \
struct interrupt_state state; \
long ret; \
@@ -297,7 +299,7 @@ static __always_inline long ____##func(struct pt_regs *regs)
#define DEFINE_INTERRUPT_HANDLER_ASYNC(func) \
static __always_inline void ____##func(struct pt_regs *regs); \
\
-__visible noinstr void func(struct pt_regs *regs) \
+__visible ppc_noinstr void func(struct pt_regs *regs) \
{ \
struct interrupt_state state; \
\
@@ -331,7 +333,7 @@ static __always_inline void ____##func(struct pt_regs *regs)
#define DEFINE_INTERRUPT_HANDLER_NMI(func) \
static __always_inline long ____##func(struct pt_regs *regs); \
\
-__visible noinstr long func(struct pt_regs *regs) \
+__visible ppc_noinstr long func(struct pt_regs *regs) \
{ \
struct interrupt_nmi_state state; \
long ret; \
^ permalink raw reply related
* [PATCH v6 3/2] powerpc/syscall: Avoid storing 'current' in another pointer
From: Christophe Leroy @ 2021-02-10 8:44 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, npiggin,
msuchanek
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <cover.1612898425.git.christophe.leroy@csgroup.eu>
By saving the pointer pointing to thread_info.flags, gcc copies r2
in a non-volatile register.
We know 'current' doesn't change, so avoid that intermediaite pointer.
Reduces null_syscall benchmark by 2 cycles (322 => 320 cycles)
On PPC64, gcc seems to know that 'current' is not changing, and it keeps
it in a non volatile register to avoid multiple read of 'current' in paca.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
v5: Also in interrupt exit prepare
v6: Removed change related to booke current->thread.debug
v7: Rebased on top of "powerpc/32: Handle bookE debugging in C in syscall entry/exit"
---
arch/powerpc/kernel/interrupt.c | 21 +++++++++------------
1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrupt.c
index f93664ad4a5e..398cd86b6ada 100644
--- a/arch/powerpc/kernel/interrupt.c
+++ b/arch/powerpc/kernel/interrupt.c
@@ -241,7 +241,6 @@ notrace unsigned long syscall_exit_prepare(unsigned long r3,
struct pt_regs *regs,
long scv)
{
- unsigned long *ti_flagsp = ¤t_thread_info()->flags;
unsigned long ti_flags;
unsigned long ret = 0;
bool is_not_scv = !IS_ENABLED(CONFIG_PPC_BOOK3S_64) || !scv;
@@ -257,7 +256,7 @@ notrace unsigned long syscall_exit_prepare(unsigned long r3,
/* Check whether the syscall is issued inside a restartable sequence */
rseq_syscall(regs);
- ti_flags = *ti_flagsp;
+ ti_flags = current_thread_info()->flags;
if (unlikely(r3 >= (unsigned long)-MAX_ERRNO) && is_not_scv) {
if (likely(!(ti_flags & (_TIF_NOERROR | _TIF_RESTOREALL)))) {
@@ -271,7 +270,7 @@ notrace unsigned long syscall_exit_prepare(unsigned long r3,
ret = _TIF_RESTOREALL;
else
regs->gpr[3] = r3;
- clear_bits(_TIF_PERSYSCALL_MASK, ti_flagsp);
+ clear_bits(_TIF_PERSYSCALL_MASK, ¤t_thread_info()->flags);
} else {
regs->gpr[3] = r3;
}
@@ -284,7 +283,7 @@ notrace unsigned long syscall_exit_prepare(unsigned long r3,
local_irq_disable();
again:
- ti_flags = READ_ONCE(*ti_flagsp);
+ ti_flags = READ_ONCE(current_thread_info()->flags);
while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) {
local_irq_enable();
if (ti_flags & _TIF_NEED_RESCHED) {
@@ -300,7 +299,7 @@ notrace unsigned long syscall_exit_prepare(unsigned long r3,
do_notify_resume(regs, ti_flags);
}
local_irq_disable();
- ti_flags = READ_ONCE(*ti_flagsp);
+ ti_flags = READ_ONCE(current_thread_info()->flags);
}
if (IS_ENABLED(CONFIG_PPC_BOOK3S) && IS_ENABLED(CONFIG_PPC_FPU)) {
@@ -357,7 +356,6 @@ notrace unsigned long syscall_exit_prepare(unsigned long r3,
#ifndef CONFIG_PPC_BOOK3E_64 /* BOOK3E not yet using this */
notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs, unsigned long msr)
{
- unsigned long *ti_flagsp = ¤t_thread_info()->flags;
unsigned long ti_flags;
unsigned long flags;
unsigned long ret = 0;
@@ -380,7 +378,7 @@ notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs, unsigned
local_irq_save(flags);
again:
- ti_flags = READ_ONCE(*ti_flagsp);
+ ti_flags = READ_ONCE(current_thread_info()->flags);
while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) {
local_irq_enable(); /* returning to user: may enable */
if (ti_flags & _TIF_NEED_RESCHED) {
@@ -391,7 +389,7 @@ notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs, unsigned
do_notify_resume(regs, ti_flags);
}
local_irq_disable();
- ti_flags = READ_ONCE(*ti_flagsp);
+ ti_flags = READ_ONCE(current_thread_info()->flags);
}
if (IS_ENABLED(CONFIG_PPC_BOOK3S) && IS_ENABLED(CONFIG_PPC_FPU)) {
@@ -443,7 +441,6 @@ void preempt_schedule_irq(void);
notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs, unsigned long msr)
{
- unsigned long *ti_flagsp = ¤t_thread_info()->flags;
unsigned long flags;
unsigned long ret = 0;
#ifdef CONFIG_PPC64
@@ -466,8 +463,8 @@ notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs, unsign
amr = kuap_get_and_check_amr();
#endif
- if (unlikely(*ti_flagsp & _TIF_EMULATE_STACK_STORE)) {
- clear_bits(_TIF_EMULATE_STACK_STORE, ti_flagsp);
+ if (unlikely(current_thread_info()->flags & _TIF_EMULATE_STACK_STORE)) {
+ clear_bits(_TIF_EMULATE_STACK_STORE, ¤t_thread_info()->flags);
ret = 1;
}
@@ -479,7 +476,7 @@ notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs, unsign
again:
if (IS_ENABLED(CONFIG_PREEMPT)) {
/* Return to preemptible kernel context */
- if (unlikely(*ti_flagsp & _TIF_NEED_RESCHED)) {
+ if (unlikely(current_thread_info()->flags & _TIF_NEED_RESCHED)) {
if (preempt_count() == 0)
preempt_schedule_irq();
}
--
2.25.0
^ permalink raw reply related
* Re: [PATCH v5 20/22] powerpc/syscall: Avoid storing 'current' in another pointer
From: Christophe Leroy @ 2021-02-10 8:45 UTC (permalink / raw)
To: Nicholas Piggin, David Laight, 'Segher Boessenkool'
Cc: Paul Mackerras, msuchanek@suse.de, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org
In-Reply-To: <1612922312.mnpowzgd0r.astroid@bobo.none>
Le 10/02/2021 à 03:00, Nicholas Piggin a écrit :
> Excerpts from Christophe Leroy's message of February 10, 2021 3:03 am:
>>
>>
>> Le 09/02/2021 à 15:31, David Laight a écrit :
>>> From: Segher Boessenkool
>>>> Sent: 09 February 2021 13:51
>>>>
>>>> On Tue, Feb 09, 2021 at 12:36:20PM +1000, Nicholas Piggin wrote:
>>>>> What if you did this?
>>>>
>>>>> +static inline struct task_struct *get_current(void)
>>>>> +{
>>>>> + register struct task_struct *task asm ("r2");
>>>>> +
>>>>> + return task;
>>>>> +}
>>>>
>>>> Local register asm variables are *only* guaranteed to live in that
>>>> register as operands to an asm. See
>>>> https://gcc.gnu.org/onlinedocs/gcc/Local-Register-Variables.html#Local-Register-Variables
>>>> ("The only supported use" etc.)
>>>>
>>>> You can do something like
>>>>
>>>> static inline struct task_struct *get_current(void)
>>>> {
>>>> register struct task_struct *task asm ("r2");
>>>>
>>>> asm("" : "+r"(task));
>>>>
>>>> return task;
>>>> }
>>>>
>>>> which makes sure that "task" actually is in r2 at the point of that asm.
>>>
>>> If "r2" always contains current (and is never assigned by the compiler)
>>> why not use a global register variable for it?
>>>
>>
>>
>> The change proposed by Nick doesn't solve the issue.
>
> It seemed to change code generation in a simple test case, oh well.
>
>>
>> The problem is that at the begining of the function we have:
>>
>> unsigned long *ti_flagsp = ¤t_thread_info()->flags;
>>
>> When the function uses ti_flagsp for the first time, it does use 112(r2)
>>
>> Then the function calls some other functions.
>>
>> Most likely because the function could update 'current', GCC copies r2 into r30, so that if r2 get
>> changed by the called function, ti_flagsp is still based on the previous value of current.
>>
>> Allthough we know r2 wont change, GCC doesn't know it. And in order to save r2 into r30, it needs to
>> save r30 in the stack.
>>
>>
>> By using ¤t_thread_info()->flags directly instead of this intermediaite ti_flagsp pointer, GCC
>> uses r2 instead instead of doing a copy.
>>
>>
>> Nick, I don't understand the reason why you need that 'ti_flagsp' local var.
>
> Just to save typing, I don't mind your patch I was just wondering if
> current could be improved in general.
>
Thanks,
I'll post v6 of it as a follow-up of yesterday's two remaining follow-up patches.
Christophe
^ permalink raw reply
* interrupt_exit_kernel_prepare() on booke/32 has a useless 'mfmsr' and two 'wrteei 0'
From: Christophe Leroy @ 2021-02-10 9:21 UTC (permalink / raw)
To: Nicholas Piggin, linuxppc-dev@lists.ozlabs.org
44x/bamboo_defconfig
For the mfmsr, that's because mfmsr is defined as 'asm volatile'. Is that correct ? Reading MSR
doesn't have any side effects as far as I know, should we remove the volatile ?
For the wrteei, that's because we are calling __hard_EE_RI_disable() after local_irq_save(). On
booke those two fonctions do exactly the same because RI doesn't exist. Could we replace that by a
__hard_RI_disable() that would be a nop on booke ?
00000364 <interrupt_exit_kernel_prepare>:
364: 81 23 00 84 lwz r9,132(r3)
368: 55 29 04 62 rlwinm r9,r9,0,17,17
36c: 0f 09 00 00 twnei r9,0
370: 81 22 00 4c lwz r9,76(r2)
374: 75 23 00 01 andis. r3,r9,1
378: 40 82 00 14 bne 38c <interrupt_exit_kernel_prepare+0x28>
37c: 7d 20 00 a6 mfmsr r9
380: 7c 00 01 46 wrteei 0
384: 7c 00 01 46 wrteei 0
388: 4e 80 00 20 blr
38c: 38 e2 00 4c addi r7,r2,76
390: 3d 20 00 01 lis r9,1
394: 7c c0 38 28 lwarx r6,0,r7
398: 7c c6 48 78 andc r6,r6,r9
39c: 7c c0 39 2d stwcx. r6,0,r7
3a0: 40 a2 ff f4 bne 394 <interrupt_exit_kernel_prepare+0x30>
3a4: 38 60 00 01 li r3,1
3a8: 4b ff ff d4 b 37c <interrupt_exit_kernel_prepare+0x18>
^ permalink raw reply
* Re: linux-next: build failure after merge of the powerpc tree
From: Stephen Rothwell @ 2021-02-10 11:18 UTC (permalink / raw)
To: Nicholas Piggin
Cc: Linux Next Mailing List, PowerPC, Linux Kernel Mailing List
In-Reply-To: <1612945076.ng7h3tp2jn.astroid@bobo.none>
[-- Attachment #1: Type: text/plain, Size: 3420 bytes --]
Hi Nick,
On Wed, 10 Feb 2021 18:20:54 +1000 Nicholas Piggin <npiggin@gmail.com> wrote:
>
> Thanks for that, it's due to .noinstr section being put on the other
> side of .text, so all our interrupt handler asm code can't reach them
> directly anymore since the ppc interrupt wrappers patch added noinstr
> attribute.
>
> That's not strictly required though, we've used NOKPROBE_SYMBOL okay
> until now. If you can take this patch for now, it should get
> allyesconfig to build again. I'll fix it in the powerpc tree before the
> merge window.
>
> --
>
> diff --git a/arch/powerpc/include/asm/interrupt.h b/arch/powerpc/include/asm/interrupt.h
> index 4badb3e51c19..fee1e4dd1e84 100644
> --- a/arch/powerpc/include/asm/interrupt.h
> +++ b/arch/powerpc/include/asm/interrupt.h
> @@ -172,6 +172,8 @@ static inline void interrupt_nmi_exit_prepare(struct pt_regs *regs, struct inter
> #define DECLARE_INTERRUPT_HANDLER_RAW(func) \
> __visible long func(struct pt_regs *regs)
>
> +#define ppc_noinstr noinline notrace __no_kcsan __no_sanitize_address
> +
> /**
> * DEFINE_INTERRUPT_HANDLER_RAW - Define raw interrupt handler function
> * @func: Function name of the entry point
> @@ -198,7 +200,7 @@ static inline void interrupt_nmi_exit_prepare(struct pt_regs *regs, struct inter
> #define DEFINE_INTERRUPT_HANDLER_RAW(func) \
> static __always_inline long ____##func(struct pt_regs *regs); \
> \
> -__visible noinstr long func(struct pt_regs *regs) \
> +__visible ppc_noinstr long func(struct pt_regs *regs) \
> { \
> long ret; \
> \
> @@ -228,7 +230,7 @@ static __always_inline long ____##func(struct pt_regs *regs)
> #define DEFINE_INTERRUPT_HANDLER(func) \
> static __always_inline void ____##func(struct pt_regs *regs); \
> \
> -__visible noinstr void func(struct pt_regs *regs) \
> +__visible ppc_noinstr void func(struct pt_regs *regs) \
> { \
> struct interrupt_state state; \
> \
> @@ -262,7 +264,7 @@ static __always_inline void ____##func(struct pt_regs *regs)
> #define DEFINE_INTERRUPT_HANDLER_RET(func) \
> static __always_inline long ____##func(struct pt_regs *regs); \
> \
> -__visible noinstr long func(struct pt_regs *regs) \
> +__visible ppc_noinstr long func(struct pt_regs *regs) \
> { \
> struct interrupt_state state; \
> long ret; \
> @@ -297,7 +299,7 @@ static __always_inline long ____##func(struct pt_regs *regs)
> #define DEFINE_INTERRUPT_HANDLER_ASYNC(func) \
> static __always_inline void ____##func(struct pt_regs *regs); \
> \
> -__visible noinstr void func(struct pt_regs *regs) \
> +__visible ppc_noinstr void func(struct pt_regs *regs) \
> { \
> struct interrupt_state state; \
> \
> @@ -331,7 +333,7 @@ static __always_inline void ____##func(struct pt_regs *regs)
> #define DEFINE_INTERRUPT_HANDLER_NMI(func) \
> static __always_inline long ____##func(struct pt_regs *regs); \
> \
> -__visible noinstr long func(struct pt_regs *regs) \
> +__visible ppc_noinstr long func(struct pt_regs *regs) \
> { \
> struct interrupt_nmi_state state; \
> long ret; \
Tested-by: Stephen Rothwell <sfr@canb.auug.org.au> # allyesconfig build
--
Cheers,
Stephen Rothwell
[-- Attachment #2: OpenPGP digital signature --]
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^ permalink raw reply
* [powerpc:next-test 105/159] arch/powerpc/kernel/syscall_64.c:177:28: error: unused function 'prep_irq_for_enabled_exit'
From: kernel test robot @ 2021-02-10 11:42 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: clang-built-linux, kbuild-all, linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 3086 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next-test
head: 5811244192fc4e18c001c69300044c2acf30bd91
commit: 2a06bf3e95cd93e3640d431960181b8e47415f33 [105/159] powerpc/64: context tracking remove _TIF_NOHZ
config: powerpc-randconfig-r022-20210209 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project c9439ca36342fb6013187d0a69aef92736951476)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc cross compiling tool for clang build
# apt-get install binutils-powerpc-linux-gnu
# https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id=2a06bf3e95cd93e3640d431960181b8e47415f33
git remote add powerpc https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
git fetch --no-tags powerpc next-test
git checkout 2a06bf3e95cd93e3640d431960181b8e47415f33
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=powerpc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> arch/powerpc/kernel/syscall_64.c:177:28: error: unused function 'prep_irq_for_enabled_exit' [-Werror,-Wunused-function]
static notrace inline bool prep_irq_for_enabled_exit(bool clear_ri, bool irqs_enabled)
^
1 error generated.
vim +/prep_irq_for_enabled_exit +177 arch/powerpc/kernel/syscall_64.c
176
> 177 static notrace inline bool prep_irq_for_enabled_exit(bool clear_ri, bool irqs_enabled)
178 {
179 if (__prep_irq_for_enabled_exit(clear_ri))
180 return true;
181
182 /*
183 * Must replay pending soft-masked interrupts now. Don't just
184 * local_irq_enabe(); local_irq_disable(); because if we are
185 * returning from an asynchronous interrupt here, another one
186 * might hit after irqs are enabled, and it would exit via this
187 * same path allowing another to fire, and so on unbounded.
188 *
189 * If interrupts were enabled when this interrupt exited,
190 * indicating a process context (synchronous) interrupt,
191 * local_irq_enable/disable can be used, which will enable
192 * interrupts rather than keeping them masked (unclear how
193 * much benefit this is over just replaying for all cases,
194 * because we immediately disable again, so all we're really
195 * doing is allowing hard interrupts to execute directly for
196 * a very small time, rather than being masked and replayed).
197 */
198 if (irqs_enabled) {
199 local_irq_enable();
200 local_irq_disable();
201 } else {
202 replay_soft_interrupts();
203 }
204
205 return false;
206 }
207
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 29433 bytes --]
^ permalink raw reply
* Re: interrupt_exit_kernel_prepare() on booke/32 has a useless 'mfmsr' and two 'wrteei 0'
From: Nicholas Piggin @ 2021-02-10 11:45 UTC (permalink / raw)
To: Christophe Leroy, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <f143d4a9-bb8f-82d6-8b17-c39aff486caa@csgroup.eu>
Excerpts from Christophe Leroy's message of February 10, 2021 7:21 pm:
> 44x/bamboo_defconfig
>
> For the mfmsr, that's because mfmsr is defined as 'asm volatile'. Is that correct ? Reading MSR
> doesn't have any side effects as far as I know, should we remove the volatile ?
Well I'm not really sure. It depends on the MSR value, so it must not
assume it's unchanging.
If you just have asm ("mfmsr %0" : "=r"(msr)) then that's wrong because
it will omit the second mfmsr in a mfmsr() ; mtmsr() ; mfmsr() sequence.
Adding a "memory" clobber there makes gcc produce the second mfmsr, but
I don't know if that's really the right thing to do.
>
> For the wrteei, that's because we are calling __hard_EE_RI_disable() after local_irq_save(). On
> booke those two fonctions do exactly the same because RI doesn't exist. Could we replace that by a
> __hard_RI_disable() that would be a nop on booke ?
Not on 64-bit because local_irq_disable() doesn't disable EE there.
You could have something like __hard_EE_RI_disable_irqoff() that is to
be called only in irq disabled region. But is that just adding too much
complexity to try to keep 32 and 64 bit unified?
Maybe just making different code paths for 32 and 64 would be best.
32-bit seems fairly simple
if (!arch_irq_disabled_regs(regs)) {
/* Returning to a kernel context with local irqs enabled. */
WARN_ON_ONCE(!(regs->msr & MSR_EE));
local_irq_disable();
if (IS_ENABLED(CONFIG_PREEMPT)) {
/* Return to preemptible kernel context */
if (unlikely(*ti_flagsp & _TIF_NEED_RESCHED)) {
if (preempt_count() == 0)
preempt_schedule_irq();
}
}
trace_hardirqs_on();
__hard_RI_disable();
} else {
__hard_EE_RI_disable();
}
You could get rid of that entirely if no preempt or irq tracing and just
have __hard_EE_RI_disable even AFAIKS.
Thanks,
Nick
^ permalink raw reply
* Re: [PATCH] selftests/powerpc: Fix L1D flushing tests for Power10
From: Michael Ellerman @ 2021-02-10 12:22 UTC (permalink / raw)
To: Russell Currey, linuxppc-dev; +Cc: dja
In-Reply-To: <20210210052242.2862462-1-ruscur@russell.cc>
Russell Currey <ruscur@russell.cc> writes:
> The rfi_flush and entry_flush selftests work by using the PM_LD_MISS_L1
> perf event to count L1D misses. The value of this event has changed
> over time:
>
> - Power7 uses 0x400f0
> - Power8 and Power9 use both 0x400f0 and 0x3e054
> - Power10 uses only 0x3e054
>
> Update these selftests to use the value 0x3e054 on P10 and later,
> fixing the tests from finding 0 events.
I wonder if we can just use the cache events that the kernel knows
about.
ie, switch the type to PERF_TYPE_HW_CACHE and the event to
PERF_COUNT_HW_CACHE_MISSES.
That would end up using the same event on power7 and power8:
$ git grep PERF_COUNT_HW_CACHE_MISSES arch/powerpc/perf/power{7,8,9,10}*.c
arch/powerpc/perf/power7-pmu.c: [PERF_COUNT_HW_CACHE_MISSES] = PM_LD_MISS_L1,
arch/powerpc/perf/power8-pmu.c: [PERF_COUNT_HW_CACHE_MISSES] = PM_LD_MISS_L1,
arch/powerpc/perf/power9-pmu.c: [PERF_COUNT_HW_CACHE_MISSES] = PM_LD_MISS_L1_FIN,
arch/powerpc/perf/power10-pmu.c: [PERF_COUNT_HW_CACHE_MISSES] = PM_LD_MISS_L1,
arch/powerpc/perf/power10-pmu.c: [PERF_COUNT_HW_CACHE_MISSES] = PM_LD_DEMAND_MISS_L1_FIN,
On power9 and power10 it's using slightly different events. But I think
it should still work, because these tests just counts misses
with/without the various flushes enabled.
The distinction between loads that miss at execute vs finish shouldn't
matter, but you'd need to test.
The advantage would be we wouldn't then need to update the test again
for future CPUs.
cheers
^ permalink raw reply
* Re: [PATCH 0/3] powerpc/perf: Add Performance Monitor Counters to extended regs
From: Michael Ellerman @ 2021-02-10 12:57 UTC (permalink / raw)
To: acme, jolsa, Athira Rajeev, mpe; +Cc: kjain, maddy, linuxppc-dev
In-Reply-To: <1612335337-1888-1-git-send-email-atrajeev@linux.vnet.ibm.com>
On Wed, 3 Feb 2021 01:55:34 -0500, Athira Rajeev wrote:
> Patch set to add Performance Monitor Counter SPR's as
> part of extended regs in powerpc.
>
> Patch 1/3 saves the PMC values in the perf interrupt
> handler as part of per-cpu array.
> Patch 2/3 adds PMC1 to PMC6 as part of the extended
> regs mask.
> Patch 3/3 includes perf tools side changes to add
> PMC1 to PMC6 to sample_reg_mask to use with -I? option.
>
> [...]
Patches 1 & 2 applied to powerpc/next.
[1/3] powerpc/perf: Include PMCs as part of per-cpu cpuhw_events struct
https://git.kernel.org/powerpc/c/91f3469a43fd1fb831649c2a2e684bf5ad4818b2
[2/3] powerpc/perf: Expose Performance Monitor Counter SPR's as part of extended regs
https://git.kernel.org/powerpc/c/e79b76e03b712e42c58d9649c92571e346abc38b
cheers
^ permalink raw reply
* Re: [PATCH 1/3] powerpc/32s: Change mfsrin() into a static inline function
From: Michael Ellerman @ 2021-02-10 12:57 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Michael Ellerman, Christophe Leroy,
Paul Mackerras
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <72c7b9879e2e2e6f5c27dadda6486386c2b50f23.1612612022.git.christophe.leroy@csgroup.eu>
On Sat, 6 Feb 2021 11:47:26 +0000 (UTC), Christophe Leroy wrote:
> mfsrin() is a macro.
>
> Change in into an inline function to avoid conflicts in KVM
> and make it more evolutive.
Applied to powerpc/next.
[1/3] powerpc/32s: Change mfsrin() into a static inline function
https://git.kernel.org/powerpc/c/fd659e8f2c6d1e1e96fd5bdb515518801cd02012
[2/3] powerpc/32s: mfsrin()/mtsrin() become mfsr()/mtsr()
https://git.kernel.org/powerpc/c/179ae57dbad1b9a83eec376aa44d54fc24352e37
[3/3] powerpc/32s: Allow constant folding in mtsr()/mfsr()
https://git.kernel.org/powerpc/c/b842d131c7983f8f0b9c9572c073130b5f2bcf11
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/8xx: Fix software emulation interrupt
From: Michael Ellerman @ 2021-02-10 12:57 UTC (permalink / raw)
To: npiggin, Michael Ellerman, Benjamin Herrenschmidt,
Christophe Leroy, Paul Mackerras
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <ad782af87a222efc79cfb06079b0fd23d4224eaf.1612515180.git.christophe.leroy@csgroup.eu>
On Fri, 5 Feb 2021 08:56:13 +0000 (UTC), Christophe Leroy wrote:
> For unimplemented instructions or unimplemented SPRs, the 8xx triggers
> a "Software Emulation Exception" (0x1000). That interrupt doesn't set
> reason bits in SRR1 as the "Program Check Exception" does.
>
> Go through emulation_assist_interrupt() to set REASON_ILLEGAL.
Applied to powerpc/next.
[1/1] powerpc/8xx: Fix software emulation interrupt
https://git.kernel.org/powerpc/c/903178d0ce6bb30ef80a3604ab9ee2b57869fbc9
cheers
^ permalink raw reply
* Re: [PATCH V2] powerpc/perf: Record counter overflow always if SAMPLE_IP is unset
From: Michael Ellerman @ 2021-02-10 12:57 UTC (permalink / raw)
To: Athira Rajeev, mpe; +Cc: maddy, linuxppc-dev
In-Reply-To: <1612516492-1428-1-git-send-email-atrajeev@linux.vnet.ibm.com>
On Fri, 5 Feb 2021 04:14:52 -0500, Athira Rajeev wrote:
> While sampling for marked events, currently we record the sample only
> if the SIAR valid bit of Sampled Instruction Event Register (SIER) is
> set. SIAR_VALID bit is used for fetching the instruction address from
> Sampled Instruction Address Register(SIAR). But there are some usecases,
> where the user is interested only in the PMU stats at each counter
> overflow and the exact IP of the overflow event is not required.
> Dropping SIAR invalid samples will fail to record some of the counter
> overflows in such cases.
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/perf: Record counter overflow always if SAMPLE_IP is unset
https://git.kernel.org/powerpc/c/d137845c973147a22622cc76c7b0bc16f6206323
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/uaccess: Perform barrier_nospec() in KUAP allowance helpers
From: Michael Ellerman @ 2021-02-10 12:57 UTC (permalink / raw)
To: Michael Ellerman, cmr, Benjamin Herrenschmidt, Christophe Leroy,
Paul Mackerras
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <c72f014730823b413528e90ab6c4d3bcb79f8497.1612692067.git.christophe.leroy@csgroup.eu>
On Sun, 7 Feb 2021 10:08:11 +0000 (UTC), Christophe Leroy wrote:
> barrier_nospec() in uaccess helpers is there to protect against
> speculative accesses around access_ok().
>
> When using user_access_begin() sequences together with
> unsafe_get_user() like macros, barrier_nospec() is called for
> every single read although we know the access_ok() is done
> onece.
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/uaccess: Perform barrier_nospec() in KUAP allowance helpers
https://git.kernel.org/powerpc/c/8524e2e76441fc615a3b5c1415823e051cc79eae
cheers
^ permalink raw reply
* Re: [PATCH v2] powerpc64/idle: Fix SP offsets when saving GPRs
From: Michael Ellerman @ 2021-02-10 12:57 UTC (permalink / raw)
To: linuxppc-dev, Christopher M. Riedl
In-Reply-To: <20210206072342.5067-1-cmr@codefail.de>
On Sat, 6 Feb 2021 01:23:42 -0600, Christopher M. Riedl wrote:
> The idle entry/exit code saves/restores GPRs in the stack "red zone"
> (Protected Zone according to PowerPC64 ELF ABI v2). However, the offset
> used for the first GPR is incorrect and overwrites the back chain - the
> Protected Zone actually starts below the current SP. In practice this is
> probably not an issue, but it's still incorrect so fix it.
>
> Also expand the comments to explain why using the stack "red zone"
> instead of creating a new stackframe is appropriate here.
Applied to powerpc/next.
[1/1] powerpc64/idle: Fix SP offsets when saving GPRs
https://git.kernel.org/powerpc/c/73287caa9210ded6066833195f4335f7f688a46b
cheers
^ permalink raw reply
* Re: [PATCH] powerpc: remove unneeded semicolons
From: Michael Ellerman @ 2021-02-10 12:57 UTC (permalink / raw)
To: Chengyang Fan, mpe; +Cc: joe, linuxppc-dev
In-Reply-To: <20210125095338.1719405-1-cy.fan@huawei.com>
On Mon, 25 Jan 2021 17:53:38 +0800, Chengyang Fan wrote:
> Remove superfluous semicolons after function definitions.
Applied to powerpc/next.
[1/1] powerpc: remove unneeded semicolons
https://git.kernel.org/powerpc/c/6c6fdbb2b7002aa04e418b5d2b26df1c5ba5ab80
cheers
^ permalink raw reply
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