* Re: [PATCH v6 4/6] KVM: PPC: Book3S HV: Nested support in H_RPT_INVALIDATE
From: David Gibson @ 2021-03-23 2:33 UTC (permalink / raw)
To: Bharata B Rao; +Cc: farosas, aneesh.kumar, npiggin, kvm-ppc, linuxppc-dev
In-Reply-To: <20210311083939.595568-5-bharata@linux.ibm.com>
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On Thu, Mar 11, 2021 at 02:09:37PM +0530, Bharata B Rao wrote:
> Enable support for process-scoped invalidations from nested
> guests and partition-scoped invalidations for nested guests.
>
> Process-scoped invalidations for any level of nested guests
> are handled by implementing H_RPT_INVALIDATE handler in the
> nested guest exit path in L0.
>
> Partition-scoped invalidation requests are forwarded to the
> right nested guest, handled there and passed down to L0
> for eventual handling.
>
> Signed-off-by: Bharata B Rao <bharata@linux.ibm.com>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
> [Nested guest partition-scoped invalidation changes]
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> arch/powerpc/include/asm/kvm_book3s.h | 3 +
> arch/powerpc/kvm/book3s_hv.c | 71 +++++++++++++++++-
> arch/powerpc/kvm/book3s_hv_nested.c | 104 ++++++++++++++++++++++++++
> 3 files changed, 175 insertions(+), 3 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
> index 2f5f919f6cd3..de8fc5a4d19c 100644
> --- a/arch/powerpc/include/asm/kvm_book3s.h
> +++ b/arch/powerpc/include/asm/kvm_book3s.h
> @@ -305,6 +305,9 @@ void kvmhv_set_ptbl_entry(unsigned int lpid, u64 dw0, u64 dw1);
> void kvmhv_release_all_nested(struct kvm *kvm);
> long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu);
> long kvmhv_do_nested_tlbie(struct kvm_vcpu *vcpu);
> +long do_h_rpt_invalidate_pat(struct kvm_vcpu *vcpu, unsigned long lpid,
> + unsigned long type, unsigned long pg_sizes,
> + unsigned long start, unsigned long end);
> int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu,
> u64 time_limit, unsigned long lpcr);
> void kvmhv_save_hv_regs(struct kvm_vcpu *vcpu, struct hv_guest_state *hr);
> diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
> index 5d008468347c..03755389efd1 100644
> --- a/arch/powerpc/kvm/book3s_hv.c
> +++ b/arch/powerpc/kvm/book3s_hv.c
> @@ -922,6 +922,46 @@ static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu)
> return yield_count;
> }
>
> +/*
> + * H_RPT_INVALIDATE hcall handler for nested guests.
> + *
> + * Handles only nested process-scoped invalidation requests in L0.
> + */
> +static int kvmppc_nested_h_rpt_invalidate(struct kvm_vcpu *vcpu)
> +{
> + unsigned long type = kvmppc_get_gpr(vcpu, 6);
> + unsigned long pid, pg_sizes, start, end, psize;
> + struct kvm_nested_guest *gp;
> + struct mmu_psize_def *def;
> +
> + /*
> + * The partition-scoped invalidations aren't handled here in L0.
> + */
> + if (type & H_RPTI_TYPE_NESTED)
> + return RESUME_HOST;
> +
> + pid = kvmppc_get_gpr(vcpu, 4);
> + pg_sizes = kvmppc_get_gpr(vcpu, 7);
> + start = kvmppc_get_gpr(vcpu, 8);
> + end = kvmppc_get_gpr(vcpu, 9);
> +
> + gp = kvmhv_get_nested(vcpu->kvm, vcpu->kvm->arch.lpid, false);
> + if (!gp)
> + goto out;
> +
> + for (psize = 0; psize < MMU_PAGE_COUNT; psize++) {
> + def = &mmu_psize_defs[psize];
> + if (pg_sizes & def->h_rpt_pgsize)
> + do_h_rpt_invalidate_prt(pid, gp->shadow_lpid, type,
> + (1UL << def->shift), psize,
> + start, end);
> + }
> + kvmhv_put_nested(gp);
> +out:
> + kvmppc_set_gpr(vcpu, 3, H_SUCCESS);
> + return RESUME_GUEST;
> +}
> +
> static long kvmppc_h_rpt_invalidate(struct kvm_vcpu *vcpu,
> unsigned long id, unsigned long target,
> unsigned long type, unsigned long pg_sizes,
> @@ -938,10 +978,18 @@ static long kvmppc_h_rpt_invalidate(struct kvm_vcpu *vcpu,
>
> /*
> * Partition-scoped invalidation for nested guests.
> - * Not yet supported
> */
> - if (type & H_RPTI_TYPE_NESTED)
> - return H_P3;
> + if (type & H_RPTI_TYPE_NESTED) {
> + if (!nesting_enabled(vcpu->kvm))
> + return H_FUNCTION;
> +
> + /* Support only cores as target */
> + if (target != H_RPTI_TARGET_CMMU)
> + return H_P2;
> +
> + return do_h_rpt_invalidate_pat(vcpu, id, type, pg_sizes,
> + start, end);
> + }
>
> /*
> * Process-scoped invalidation for L1 guests.
> @@ -1636,6 +1684,23 @@ static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu)
> if (!xics_on_xive())
> kvmppc_xics_rm_complete(vcpu, 0);
> break;
> + case BOOK3S_INTERRUPT_SYSCALL:
> + {
> + unsigned long req = kvmppc_get_gpr(vcpu, 3);
> +
> + /*
> + * The H_RPT_INVALIDATE hcalls issued by nested
> + * guests for process-scoped invalidations when
> + * GTSE=0, are handled here in L0.
> + */
> + if (req == H_RPT_INVALIDATE) {
> + r = kvmppc_nested_h_rpt_invalidate(vcpu);
> + break;
> + }
> +
> + r = RESUME_HOST;
> + break;
> + }
> default:
> r = RESUME_HOST;
> break;
> diff --git a/arch/powerpc/kvm/book3s_hv_nested.c b/arch/powerpc/kvm/book3s_hv_nested.c
> index 0cd0e7aad588..adcc8e26ef22 100644
> --- a/arch/powerpc/kvm/book3s_hv_nested.c
> +++ b/arch/powerpc/kvm/book3s_hv_nested.c
> @@ -1191,6 +1191,110 @@ long kvmhv_do_nested_tlbie(struct kvm_vcpu *vcpu)
> return H_SUCCESS;
> }
>
> +static long do_tlb_invalidate_nested_tlb(struct kvm_vcpu *vcpu,
> + unsigned long lpid,
> + unsigned long page_size,
> + unsigned long ap,
> + unsigned long start,
> + unsigned long end)
> +{
> + unsigned long addr = start;
> + int ret;
> +
> + do {
> + ret = kvmhv_emulate_tlbie_tlb_addr(vcpu, lpid, ap,
> + get_epn(addr));
> + if (ret)
> + return ret;
> + addr += page_size;
> + } while (addr < end);
> +
> + return ret;
> +}
> +
> +static long do_tlb_invalidate_nested_all(struct kvm_vcpu *vcpu,
> + unsigned long lpid, unsigned long ric)
> +{
> + struct kvm *kvm = vcpu->kvm;
> + struct kvm_nested_guest *gp;
> +
> + gp = kvmhv_get_nested(kvm, lpid, false);
> + if (gp) {
> + kvmhv_emulate_tlbie_lpid(vcpu, gp, ric);
> + kvmhv_put_nested(gp);
> + }
> + return H_SUCCESS;
> +}
> +
> +/*
> + * Performs partition-scoped invalidations for nested guests
> + * as part of H_RPT_INVALIDATE hcall.
> + */
> +long do_h_rpt_invalidate_pat(struct kvm_vcpu *vcpu, unsigned long lpid,
> + unsigned long type, unsigned long pg_sizes,
> + unsigned long start, unsigned long end)
> +{
> + struct kvm_nested_guest *gp;
> + long ret;
> + unsigned long psize, ap;
> +
> + /*
> + * If L2 lpid isn't valid, we need to return H_PARAMETER.
> + *
> + * However, nested KVM issues a L2 lpid flush call when creating
> + * partition table entries for L2. This happens even before the
> + * corresponding shadow lpid is created in HV which happens in
> + * H_ENTER_NESTED call. Since we can't differentiate this case from
> + * the invalid case, we ignore such flush requests and return success.
> + */
> + gp = kvmhv_find_nested(vcpu->kvm, lpid);
> + if (!gp)
> + return H_SUCCESS;
> +
> + /*
> + * A flush all request can be handled by a full lpid flush only.
> + */
> + if ((type & H_RPTI_TYPE_NESTED_ALL) == H_RPTI_TYPE_NESTED_ALL)
> + return do_tlb_invalidate_nested_all(vcpu, lpid, RIC_FLUSH_ALL);
> +
> +#if 0
> + /*
> + * We don't need to handle a PWC flush like process table here,
> + * because intermediate partition scoped table in nested guest doesn't
> + * really have PWC. Only level we have PWC is in L0 and for nested
> + * invalidate at L0 we always do kvm_flush_lpid() which does
> + * radix__flush_all_lpid(). For range invalidate at any level, we
> + * are not removing the higher level page tables and hence there is
> + * no PWC invalidate needed.
> + */
> + if (type & H_RPTI_TYPE_PWC) {
> + ret = do_tlb_invalidate_nested_all(vcpu, lpid, RIC_FLUSH_PWC);
> + if (ret)
> + return H_P4;
> + }
> +#endif
> +
> + if (start == 0 && end == -1)
> + return do_tlb_invalidate_nested_all(vcpu, lpid, RIC_FLUSH_TLB);
> +
> + if (type & H_RPTI_TYPE_TLB) {
> + struct mmu_psize_def *def;
> +
> + for (psize = 0; psize < MMU_PAGE_COUNT; psize++) {
> + def = &mmu_psize_defs[psize];
> + if (!(pg_sizes & def->h_rpt_pgsize))
> + continue;
> +
> + ret = do_tlb_invalidate_nested_tlb(vcpu, lpid,
> + (1UL << def->shift),
> + ap, start, end);
> + if (ret)
> + return H_P4;
> + }
> + }
> + return H_SUCCESS;
> +}
> +
> /* Used to convert a nested guest real address to a L1 guest real address */
> static int kvmhv_translate_addr_nested(struct kvm_vcpu *vcpu,
> struct kvm_nested_guest *gp,
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply
* Re: [PATCH v6 3/6] KVM: PPC: Book3S HV: Add support for H_RPT_INVALIDATE
From: David Gibson @ 2021-03-23 2:26 UTC (permalink / raw)
To: Bharata B Rao; +Cc: farosas, aneesh.kumar, npiggin, kvm-ppc, linuxppc-dev
In-Reply-To: <20210311083939.595568-4-bharata@linux.ibm.com>
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On Thu, Mar 11, 2021 at 02:09:36PM +0530, Bharata B Rao wrote:
> H_RPT_INVALIDATE does two types of TLB invalidations:
>
> 1. Process-scoped invalidations for guests when LPCR[GTSE]=0.
> This is currently not used in KVM as GTSE is not usually
> disabled in KVM.
> 2. Partition-scoped invalidations that an L1 hypervisor does on
> behalf of an L2 guest. This is currently handled
> by H_TLB_INVALIDATE hcall and this new replaces the old that.
>
> This commit enables process-scoped invalidations for L1 guests.
> Support for process-scoped and partition-scoped invalidations
> from/for nested guests will be added separately.
>
> Process scoped tlbie invalidations from L1 and nested guests
> need RS register for TLBIE instruction to contain both PID and
> LPID. This patch introduces primitives that execute tlbie
> instruction with both PID and LPID set in prepartion for
> H_RPT_INVALIDATE hcall.
>
> A description of H_RPT_INVALIDATE follows:
>
> int64 /* H_Success: Return code on successful completion */
> /* H_Busy - repeat the call with the same */
> /* H_Parameter, H_P2, H_P3, H_P4, H_P5 : Invalid
> parameters */
> hcall(const uint64 H_RPT_INVALIDATE, /* Invalidate RPT
> translation
> lookaside information */
> uint64 id, /* PID/LPID to invalidate */
> uint64 target, /* Invalidation target */
> uint64 type, /* Type of lookaside information */
> uint64 pg_sizes, /* Page sizes */
> uint64 start, /* Start of Effective Address (EA)
> range (inclusive) */
> uint64 end) /* End of EA range (exclusive) */
>
> Invalidation targets (target)
> -----------------------------
> Core MMU 0x01 /* All virtual processors in the
> partition */
> Core local MMU 0x02 /* Current virtual processor */
> Nest MMU 0x04 /* All nest/accelerator agents
> in use by the partition */
>
> A combination of the above can be specified,
> except core and core local.
>
> Type of translation to invalidate (type)
> ---------------------------------------
> NESTED 0x0001 /* invalidate nested guest partition-scope */
> TLB 0x0002 /* Invalidate TLB */
> PWC 0x0004 /* Invalidate Page Walk Cache */
> PRT 0x0008 /* Invalidate caching of Process Table
> Entries if NESTED is clear */
> PAT 0x0008 /* Invalidate caching of Partition Table
> Entries if NESTED is set */
>
> A combination of the above can be specified.
>
> Page size mask (pages)
> ----------------------
> 4K 0x01
> 64K 0x02
> 2M 0x04
> 1G 0x08
> All sizes (-1UL)
>
> A combination of the above can be specified.
> All page sizes can be selected with -1.
>
> Semantics: Invalidate radix tree lookaside information
> matching the parameters given.
> * Return H_P2, H_P3 or H_P4 if target, type, or pageSizes parameters
> are different from the defined values.
> * Return H_PARAMETER if NESTED is set and pid is not a valid nested
> LPID allocated to this partition
> * Return H_P5 if (start, end) doesn't form a valid range. Start and
> end should be a valid Quadrant address and end > start.
> * Return H_NotSupported if the partition is not in running in radix
> translation mode.
> * May invalidate more translation information than requested.
> * If start = 0 and end = -1, set the range to cover all valid
> addresses. Else start and end should be aligned to 4kB (lower 11
> bits clear).
> * If NESTED is clear, then invalidate process scoped lookaside
> information. Else pid specifies a nested LPID, and the invalidation
> is performed on nested guest partition table and nested guest
> partition scope real addresses.
> * If pid = 0 and NESTED is clear, then valid addresses are quadrant 3
> and quadrant 0 spaces, Else valid addresses are quadrant 0.
> * Pages which are fully covered by the range are to be invalidated.
> Those which are partially covered are considered outside
> invalidation range, which allows a caller to optimally invalidate
> ranges that may contain mixed page sizes.
> * Return H_SUCCESS on success.
>
> Signed-off-by: Bharata B Rao <bharata@linux.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
with the exception of one nit noted below.
> ---
> .../include/asm/book3s/64/tlbflush-radix.h | 4 +
> arch/powerpc/include/asm/mmu_context.h | 11 ++
> arch/powerpc/kvm/book3s_hv.c | 46 ++++++
> arch/powerpc/mm/book3s64/radix_tlb.c | 152 +++++++++++++++++-
> 4 files changed, 209 insertions(+), 4 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> index 8b33601cdb9d..a46fd37ad552 100644
> --- a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> @@ -4,6 +4,10 @@
>
> #include <asm/hvcall.h>
>
> +#define RIC_FLUSH_TLB 0
> +#define RIC_FLUSH_PWC 1
> +#define RIC_FLUSH_ALL 2
Is there a reason for moving these? You don't appear to be adding a
use of them outside the .c file they were in before.
> +
> struct vm_area_struct;
> struct mm_struct;
> struct mmu_gather;
> diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h
> index 652ce85f9410..da25aef657c6 100644
> --- a/arch/powerpc/include/asm/mmu_context.h
> +++ b/arch/powerpc/include/asm/mmu_context.h
> @@ -124,8 +124,19 @@ static inline bool need_extra_context(struct mm_struct *mm, unsigned long ea)
>
> #if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE) && defined(CONFIG_PPC_RADIX_MMU)
> extern void radix_kvm_prefetch_workaround(struct mm_struct *mm);
> +void do_h_rpt_invalidate_prt(unsigned long pid, unsigned long lpid,
> + unsigned long type, unsigned long page_size,
> + unsigned long psize, unsigned long start,
> + unsigned long end);
> #else
> static inline void radix_kvm_prefetch_workaround(struct mm_struct *mm) { }
> +static inline void do_h_rpt_invalidate_prt(unsigned long pid,
> + unsigned long lpid,
> + unsigned long type,
> + unsigned long page_size,
> + unsigned long psize,
> + unsigned long start,
> + unsigned long end) { }
> #endif
>
> extern void switch_cop(struct mm_struct *next);
> diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
> index 13bad6bf4c95..5d008468347c 100644
> --- a/arch/powerpc/kvm/book3s_hv.c
> +++ b/arch/powerpc/kvm/book3s_hv.c
> @@ -76,6 +76,7 @@
> #include <asm/kvm_book3s_uvmem.h>
> #include <asm/ultravisor.h>
> #include <asm/dtl.h>
> +#include <asm/plpar_wrappers.h>
>
> #include "book3s.h"
>
> @@ -921,6 +922,42 @@ static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu)
> return yield_count;
> }
>
> +static long kvmppc_h_rpt_invalidate(struct kvm_vcpu *vcpu,
> + unsigned long id, unsigned long target,
> + unsigned long type, unsigned long pg_sizes,
> + unsigned long start, unsigned long end)
> +{
> + unsigned long psize;
> + struct mmu_psize_def *def;
> +
> + if (!kvm_is_radix(vcpu->kvm))
> + return H_UNSUPPORTED;
> +
> + if (end < start)
> + return H_P5;
> +
> + /*
> + * Partition-scoped invalidation for nested guests.
> + * Not yet supported
> + */
> + if (type & H_RPTI_TYPE_NESTED)
> + return H_P3;
> +
> + /*
> + * Process-scoped invalidation for L1 guests.
> + */
> + for (psize = 0; psize < MMU_PAGE_COUNT; psize++) {
> + def = &mmu_psize_defs[psize];
> + if (!(pg_sizes & def->h_rpt_pgsize))
> + continue;
> +
> + do_h_rpt_invalidate_prt(id, vcpu->kvm->arch.lpid,
> + type, (1UL << def->shift),
> + psize, start, end);
> + }
> + return H_SUCCESS;
> +}
> +
> int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
> {
> unsigned long req = kvmppc_get_gpr(vcpu, 3);
> @@ -1129,6 +1166,14 @@ int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
> */
> ret = kvmppc_h_svm_init_abort(vcpu->kvm);
> break;
> + case H_RPT_INVALIDATE:
> + ret = kvmppc_h_rpt_invalidate(vcpu, kvmppc_get_gpr(vcpu, 4),
> + kvmppc_get_gpr(vcpu, 5),
> + kvmppc_get_gpr(vcpu, 6),
> + kvmppc_get_gpr(vcpu, 7),
> + kvmppc_get_gpr(vcpu, 8),
> + kvmppc_get_gpr(vcpu, 9));
> + break;
>
> default:
> return RESUME_HOST;
> @@ -1175,6 +1220,7 @@ static int kvmppc_hcall_impl_hv(unsigned long cmd)
> case H_XIRR_X:
> #endif
> case H_PAGE_INIT:
> + case H_RPT_INVALIDATE:
> return 1;
> }
>
> diff --git a/arch/powerpc/mm/book3s64/radix_tlb.c b/arch/powerpc/mm/book3s64/radix_tlb.c
> index 409e61210789..613198c41006 100644
> --- a/arch/powerpc/mm/book3s64/radix_tlb.c
> +++ b/arch/powerpc/mm/book3s64/radix_tlb.c
> @@ -20,10 +20,6 @@
>
> #include "internal.h"
>
> -#define RIC_FLUSH_TLB 0
> -#define RIC_FLUSH_PWC 1
> -#define RIC_FLUSH_ALL 2
> -
> /*
> * tlbiel instruction for radix, set invalidation
> * i.e., r=1 and is=01 or is=10 or is=11
> @@ -130,6 +126,21 @@ static __always_inline void __tlbie_pid(unsigned long pid, unsigned long ric)
> trace_tlbie(0, 0, rb, rs, ric, prs, r);
> }
>
> +static __always_inline void __tlbie_pid_lpid(unsigned long pid,
> + unsigned long lpid,
> + unsigned long ric)
> +{
> + unsigned long rb, rs, prs, r;
> +
> + rb = PPC_BIT(53); /* IS = 1 */
> + rs = (pid << PPC_BITLSHIFT(31)) | (lpid & ~(PPC_BITMASK(0, 31)));
> + prs = 1; /* process scoped */
> + r = 1; /* radix format */
> +
> + asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
> + : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");
> + trace_tlbie(0, 0, rb, rs, ric, prs, r);
> +}
> static __always_inline void __tlbie_lpid(unsigned long lpid, unsigned long ric)
> {
> unsigned long rb,rs,prs,r;
> @@ -190,6 +201,23 @@ static __always_inline void __tlbie_va(unsigned long va, unsigned long pid,
> trace_tlbie(0, 0, rb, rs, ric, prs, r);
> }
>
> +static __always_inline void __tlbie_va_lpid(unsigned long va, unsigned long pid,
> + unsigned long lpid,
> + unsigned long ap, unsigned long ric)
> +{
> + unsigned long rb, rs, prs, r;
> +
> + rb = va & ~(PPC_BITMASK(52, 63));
> + rb |= ap << PPC_BITLSHIFT(58);
> + rs = (pid << PPC_BITLSHIFT(31)) | (lpid & ~(PPC_BITMASK(0, 31)));
> + prs = 1; /* process scoped */
> + r = 1; /* radix format */
> +
> + asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
> + : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");
> + trace_tlbie(0, 0, rb, rs, ric, prs, r);
> +}
> +
> static __always_inline void __tlbie_lpid_va(unsigned long va, unsigned long lpid,
> unsigned long ap, unsigned long ric)
> {
> @@ -235,6 +263,22 @@ static inline void fixup_tlbie_va_range(unsigned long va, unsigned long pid,
> }
> }
>
> +static inline void fixup_tlbie_va_range_lpid(unsigned long va,
> + unsigned long pid,
> + unsigned long lpid,
> + unsigned long ap)
> +{
> + if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) {
> + asm volatile("ptesync" : : : "memory");
> + __tlbie_pid_lpid(0, lpid, RIC_FLUSH_TLB);
> + }
> +
> + if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) {
> + asm volatile("ptesync" : : : "memory");
> + __tlbie_va_lpid(va, pid, lpid, ap, RIC_FLUSH_TLB);
> + }
> +}
> +
> static inline void fixup_tlbie_pid(unsigned long pid)
> {
> /*
> @@ -254,6 +298,25 @@ static inline void fixup_tlbie_pid(unsigned long pid)
> }
> }
>
> +static inline void fixup_tlbie_pid_lpid(unsigned long pid, unsigned long lpid)
> +{
> + /*
> + * We can use any address for the invalidation, pick one which is
> + * probably unused as an optimisation.
> + */
> + unsigned long va = ((1UL << 52) - 1);
> +
> + if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) {
> + asm volatile("ptesync" : : : "memory");
> + __tlbie_pid_lpid(0, lpid, RIC_FLUSH_TLB);
> + }
> +
> + if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) {
> + asm volatile("ptesync" : : : "memory");
> + __tlbie_va_lpid(va, pid, lpid, mmu_get_ap(MMU_PAGE_64K),
> + RIC_FLUSH_TLB);
> + }
> +}
>
> static inline void fixup_tlbie_lpid_va(unsigned long va, unsigned long lpid,
> unsigned long ap)
> @@ -344,6 +407,31 @@ static inline void _tlbie_pid(unsigned long pid, unsigned long ric)
> asm volatile("eieio; tlbsync; ptesync": : :"memory");
> }
>
> +static inline void _tlbie_pid_lpid(unsigned long pid, unsigned long lpid,
> + unsigned long ric)
> +{
> + asm volatile("ptesync" : : : "memory");
> +
> + /*
> + * Workaround the fact that the "ric" argument to __tlbie_pid
> + * must be a compile-time contraint to match the "i" constraint
> + * in the asm statement.
> + */
> + switch (ric) {
> + case RIC_FLUSH_TLB:
> + __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_TLB);
> + fixup_tlbie_pid_lpid(pid, lpid);
> + break;
> + case RIC_FLUSH_PWC:
> + __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_PWC);
> + break;
> + case RIC_FLUSH_ALL:
> + default:
> + __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_ALL);
> + fixup_tlbie_pid_lpid(pid, lpid);
> + }
> + asm volatile("eieio; tlbsync; ptesync" : : : "memory");
> +}
> struct tlbiel_pid {
> unsigned long pid;
> unsigned long ric;
> @@ -469,6 +557,20 @@ static inline void __tlbie_va_range(unsigned long start, unsigned long end,
> fixup_tlbie_va_range(addr - page_size, pid, ap);
> }
>
> +static inline void __tlbie_va_range_lpid(unsigned long start, unsigned long end,
> + unsigned long pid, unsigned long lpid,
> + unsigned long page_size,
> + unsigned long psize)
> +{
> + unsigned long addr;
> + unsigned long ap = mmu_get_ap(psize);
> +
> + for (addr = start; addr < end; addr += page_size)
> + __tlbie_va_lpid(addr, pid, lpid, ap, RIC_FLUSH_TLB);
> +
> + fixup_tlbie_va_range_lpid(addr - page_size, pid, lpid, ap);
> +}
> +
> static __always_inline void _tlbie_va(unsigned long va, unsigned long pid,
> unsigned long psize, unsigned long ric)
> {
> @@ -549,6 +651,18 @@ static inline void _tlbie_va_range(unsigned long start, unsigned long end,
> asm volatile("eieio; tlbsync; ptesync": : :"memory");
> }
>
> +static inline void _tlbie_va_range_lpid(unsigned long start, unsigned long end,
> + unsigned long pid, unsigned long lpid,
> + unsigned long page_size,
> + unsigned long psize, bool also_pwc)
> +{
> + asm volatile("ptesync" : : : "memory");
> + if (also_pwc)
> + __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_PWC);
> + __tlbie_va_range_lpid(start, end, pid, lpid, page_size, psize);
> + asm volatile("eieio; tlbsync; ptesync" : : : "memory");
> +}
> +
> static inline void _tlbiel_va_range_multicast(struct mm_struct *mm,
> unsigned long start, unsigned long end,
> unsigned long pid, unsigned long page_size,
> @@ -1381,4 +1495,34 @@ extern void radix_kvm_prefetch_workaround(struct mm_struct *mm)
> }
> }
> EXPORT_SYMBOL_GPL(radix_kvm_prefetch_workaround);
> +
> +/*
> + * Performs process-scoped invalidations for a given LPID
> + * as part of H_RPT_INVALIDATE hcall.
> + */
> +void do_h_rpt_invalidate_prt(unsigned long pid, unsigned long lpid,
> + unsigned long type, unsigned long page_size,
> + unsigned long psize, unsigned long start,
> + unsigned long end)
> +{
> + /*
> + * A H_RPTI_TYPE_ALL request implies RIC=3, hence
> + * do a single IS=1 based flush.
> + */
> + if ((type & H_RPTI_TYPE_ALL) == H_RPTI_TYPE_ALL) {
> + _tlbie_pid_lpid(pid, lpid, RIC_FLUSH_ALL);
> + return;
> + }
> +
> + if (type & H_RPTI_TYPE_PWC)
> + _tlbie_pid_lpid(pid, lpid, RIC_FLUSH_PWC);
> +
> + if (start == 0 && end == -1) /* PID */
> + _tlbie_pid_lpid(pid, lpid, RIC_FLUSH_TLB);
> + else /* EA */
> + _tlbie_va_range_lpid(start, end, pid, lpid, page_size,
> + psize, false);
> +}
> +EXPORT_SYMBOL_GPL(do_h_rpt_invalidate_prt);
> +
> #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply
* Re: [PATCH v6 5/6] KVM: PPC: Book3S HV: Add KVM_CAP_PPC_RPT_INVALIDATE capability
From: David Gibson @ 2021-03-23 2:34 UTC (permalink / raw)
To: Bharata B Rao; +Cc: farosas, aneesh.kumar, npiggin, kvm-ppc, linuxppc-dev
In-Reply-To: <20210311083939.595568-6-bharata@linux.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 2737 bytes --]
On Thu, Mar 11, 2021 at 02:09:38PM +0530, Bharata B Rao wrote:
> Now that we have H_RPT_INVALIDATE fully implemented, enable
> support for the same via KVM_CAP_PPC_RPT_INVALIDATE KVM capability
>
> Signed-off-by: Bharata B Rao <bharata@linux.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> Documentation/virt/kvm/api.rst | 18 ++++++++++++++++++
> arch/powerpc/kvm/powerpc.c | 3 +++
> include/uapi/linux/kvm.h | 1 +
> 3 files changed, 22 insertions(+)
>
> diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
> index 1a2b5210cdbf..d769cef5f904 100644
> --- a/Documentation/virt/kvm/api.rst
> +++ b/Documentation/virt/kvm/api.rst
> @@ -6227,6 +6227,24 @@ KVM_RUN_BUS_LOCK flag is used to distinguish between them.
> This capability can be used to check / enable 2nd DAWR feature provided
> by POWER10 processor.
>
> +7.24 KVM_CAP_PPC_RPT_INVALIDATE
> +------------------------------
> +
> +:Capability: KVM_CAP_PPC_RPT_INVALIDATE
> +:Architectures: ppc
> +:Type: vm
> +
> +This capability indicates that the kernel is capable of handling
> +H_RPT_INVALIDATE hcall.
> +
> +In order to enable the use of H_RPT_INVALIDATE in the guest,
> +user space might have to advertise it for the guest. For example,
> +IBM pSeries (sPAPR) guest starts using it if "hcall-rpt-invalidate" is
> +present in the "ibm,hypertas-functions" device-tree property.
> +
> +This capability is enabled for hypervisors on platforms like POWER9
> +that support radix MMU.
> +
> 8. Other capabilities.
> ======================
>
> diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
> index a2a68a958fa0..be33b5321a76 100644
> --- a/arch/powerpc/kvm/powerpc.c
> +++ b/arch/powerpc/kvm/powerpc.c
> @@ -682,6 +682,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
> r = !!(hv_enabled && kvmppc_hv_ops->enable_dawr1 &&
> !kvmppc_hv_ops->enable_dawr1(NULL));
> break;
> + case KVM_CAP_PPC_RPT_INVALIDATE:
> + r = 1;
> + break;
> #endif
> default:
> r = 0;
> diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
> index f6afee209620..2b2370475cec 100644
> --- a/include/uapi/linux/kvm.h
> +++ b/include/uapi/linux/kvm.h
> @@ -1078,6 +1078,7 @@ struct kvm_ppc_resize_hpt {
> #define KVM_CAP_DIRTY_LOG_RING 192
> #define KVM_CAP_X86_BUS_LOCK_EXIT 193
> #define KVM_CAP_PPC_DAWR1 194
> +#define KVM_CAP_PPC_RPT_INVALIDATE 195
>
> #ifdef KVM_CAP_IRQ_ROUTING
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply
* [PATCH 0/4] Rust for Linux for ppc64le
From: Michael Ellerman @ 2021-03-23 3:26 UTC (permalink / raw)
To: rust-for-linux; +Cc: linuxppc-dev, linux-kernel
Hi all,
Here's a first attempt at getting the kernel Rust support building on powerpc.
It's powerpc64le only for now, as that's what I can easily test given the
distros I have installed. Though powerpc and powerpc64 are also Tier 2 platforms
so in theory should work. Supporting those would require something more
complicated than just pointing rustc at arch/$(ARCH)/rust/target.json.
This is based on 832575d934a2 from the Rust-for-Linux tree. Anything newer gives
me errors about symbol name lengths. I figured I'd send this anyway, as it seems
like those errors are probably not powerpc specific.
I'm not sure that all the values in target.json are correct, or required (or if
any are missing), but what I have there seems to work. Would be happy for
someone to scrutinise it though.
Example output:
# uname -r
5.12.0-rc3-47689-ge4e12dd7cb75
# uname -m
ppc64le
# modprobe rust_example
Rust Example (init)
Am I built-in? false
Parameters:
my_bool: true
my_i32: 42
my_str: default str val
my_usize: 42
my_array: [0, 1]
Value: 10
Value: 10
Large array has length: 514
modprobe (1589) used greatest stack depth: 6800 bytes left
# modprobe rust_example_2
[2] Rust Example (init)
[2] Am I built-in? false
[2] Parameters:
[2] my_bool: true
[2] my_i32: 42
[2] my_str: default str val
[2] my_usize: 42
[2] my_array: [0, 1]
Large array has length: 1028
modprobe (1593) used greatest stack depth: 3680 bytes left
# modprobe rust_example_3
[3] Rust Example (init)
[3] Am I built-in? false
[3] Parameters:
[3] my_bool: true
[3] my_i32: 42
[3] my_str: default str val
[3] my_usize: 42
[3] my_array: [0, 1]
Large array has length: 1028
# modprobe rust_example_4
[4] Rust Example (init)
[4] Am I built-in? false
[4] Parameters:
[4] my_bool: true
[4] my_i32: 42
[4] my_str: default str val
[4] my_usize: 42
[4] my_array: [0, 1]
Large array has length: 1028
cheers
Michael Ellerman (4):
rust: Export symbols in initialized data section
rust: Add powerpc64 as a 64-bit target_arch in c_types.rs
powerpc/rust: Add target.json for ppc64le
rust: Enable for ppc64le
arch/powerpc/rust/target.json | 30 ++++++++++++++++++++++++++++++
init/Kconfig | 2 +-
rust/Makefile | 2 +-
rust/kernel/c_types.rs | 2 +-
4 files changed, 33 insertions(+), 3 deletions(-)
create mode 100644 arch/powerpc/rust/target.json
base-commit: 832575d934a2bc5e2fd0aa881d8e6b64bf062fd2
--
2.25.1
^ permalink raw reply
* [PATCH 1/4] rust: Export symbols in initialized data section
From: Michael Ellerman @ 2021-03-23 3:26 UTC (permalink / raw)
To: rust-for-linux; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <20210323032624.1039422-1-mpe@ellerman.id.au>
On powerpc some symbols end up in the initialized data section, which
means they aren't detected by the logic in cmd_export, leading to errors
such as:
ERROR: modpost: "_RNvNtCsbDqzXfLQacH_6kernel12module_param15PARAM_OPS_USIZE" [drivers/char/rust_example_4.ko] undefined!
nm represents the "initialized data section" with "D", so also look for
that when exporting symbols.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
rust/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/rust/Makefile b/rust/Makefile
index eb8f12ce1644..4cddae9d4a25 100644
--- a/rust/Makefile
+++ b/rust/Makefile
@@ -73,7 +73,7 @@ $(objtree)/rust/bindings_generated.rs: $(srctree)/rust/kernel/bindings_helper.h
quiet_cmd_exports = EXPORTS $@
cmd_exports = \
$(NM) -p --defined-only $< \
- | grep -E ' (T|R) ' | cut -d ' ' -f 3 | grep -E '^(__rust_|_R)' \
+ | grep -E ' (T|R|D) ' | cut -d ' ' -f 3 | grep -E '^(__rust_|_R)' \
| xargs -n1 -Isymbol \
echo 'EXPORT_SYMBOL$(exports_target_type)(symbol);' > $@
--
2.25.1
^ permalink raw reply related
* [PATCH 2/4] rust: Add powerpc64 as a 64-bit target_arch in c_types.rs
From: Michael Ellerman @ 2021-03-23 3:26 UTC (permalink / raw)
To: rust-for-linux; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <20210323032624.1039422-1-mpe@ellerman.id.au>
powerpc kernel code uses int-ll64.h.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
rust/kernel/c_types.rs | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/rust/kernel/c_types.rs b/rust/kernel/c_types.rs
index 423ac1108ddb..988fd84b0d66 100644
--- a/rust/kernel/c_types.rs
+++ b/rust/kernel/c_types.rs
@@ -60,7 +60,7 @@ mod c {
pub type c_size_t = usize;
}
-#[cfg(any(target_arch = "aarch64", target_arch = "x86_64"))]
+#[cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "powerpc64"))]
mod c {
/// C `void` type.
pub type c_void = core::ffi::c_void;
--
2.25.1
^ permalink raw reply related
* [PATCH 3/4] powerpc/rust: Add target.json for ppc64le
From: Michael Ellerman @ 2021-03-23 3:26 UTC (permalink / raw)
To: rust-for-linux; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <20210323032624.1039422-1-mpe@ellerman.id.au>
Based on the x86 and arm64 versions, as well as output from:
$ rustc +nightly -Z unstable-options --target=powerpc64le-unknown-linux-gnu --print target-spec-json
Notably disables altivec, vsx and hard-float.
The very cryptic data-layout:
"data-layout": "e-m:e-i64:64-n32:64-S128",
Has the following meaning:
e: little endian
m:e ELF name mangling
i64:64 64-bit integers 64-bit aligned
n32:64 Native integer widths, 32-bit and 64-bit.
S128 16-byte stack alignment
Those all come from the rustc output, with the exception of the stack
alignment. We obviously do have 8-bit & 16-bit integer types, but I'm
not sure if there's any need to specify that.
ppc64le only for now. We'll eventually need to come up with some way to
change the target.json that's used based on more than just $(ARCH).
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/rust/target.json | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
create mode 100644 arch/powerpc/rust/target.json
diff --git a/arch/powerpc/rust/target.json b/arch/powerpc/rust/target.json
new file mode 100644
index 000000000000..1e53f8308092
--- /dev/null
+++ b/arch/powerpc/rust/target.json
@@ -0,0 +1,30 @@
+{
+ "arch": "powerpc64",
+ "code-mode": "kernel",
+ "cpu": "ppc64le",
+ "data-layout": "e-m:e-i64:64-n32:64",
+ "env": "gnu",
+ "features": "-altivec,-vsx,-hard-float",
+ "function-sections": false,
+ "is-builtin": true,
+ "linker-flavor": "gcc",
+ "linker-is-gnu": true,
+ "llvm-target": "powerpc64le-elf",
+ "max-atomic-width": 64,
+ "os": "none",
+ "panic-strategy": "abort",
+ "position-independent-executables": true,
+ "pre-link-args": {
+ "gcc": [
+ "-Wl,--as-needed",
+ "-Wl,-z,noexecstack",
+ "-m64"
+ ]
+ },
+ "relocation-model": "static",
+ "relro-level": "full",
+ "target-family": "unix",
+ "target-mcount": "_mcount",
+ "target-endian": "little",
+ "target-pointer-width": "64"
+}
--
2.25.1
^ permalink raw reply related
* [PATCH 4/4] rust: Enable for ppc64le
From: Michael Ellerman @ 2021-03-23 3:26 UTC (permalink / raw)
To: rust-for-linux; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <20210323032624.1039422-1-mpe@ellerman.id.au>
All the pieces are in place now for us to enable building rust support
on ppc64le.
Only works with clang for now.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
init/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/init/Kconfig b/init/Kconfig
index d73ac9de186d..ddc2fda1a22c 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -58,7 +58,7 @@ config LLD_VERSION
default 0
config HAS_RUST
- depends on ARM64 || X86_64
+ depends on ARM64 || X86_64 || (PPC64 && CPU_LITTLE_ENDIAN && CC_IS_CLANG)
def_bool $(success,$(RUSTC) --version)
config RUSTC_VERSION
--
2.25.1
^ permalink raw reply related
* Re: [PATCH v6 3/6] KVM: PPC: Book3S HV: Add support for H_RPT_INVALIDATE
From: Bharata B Rao @ 2021-03-23 4:05 UTC (permalink / raw)
To: David Gibson; +Cc: farosas, aneesh.kumar, npiggin, kvm-ppc, linuxppc-dev
In-Reply-To: <YFlR8BROYwX0i0A9@yekko.fritz.box>
On Tue, Mar 23, 2021 at 01:26:56PM +1100, David Gibson wrote:
> On Thu, Mar 11, 2021 at 02:09:36PM +0530, Bharata B Rao wrote:
> > H_RPT_INVALIDATE does two types of TLB invalidations:
> >
> > 1. Process-scoped invalidations for guests when LPCR[GTSE]=0.
> > This is currently not used in KVM as GTSE is not usually
> > disabled in KVM.
> > 2. Partition-scoped invalidations that an L1 hypervisor does on
> > behalf of an L2 guest. This is currently handled
> > by H_TLB_INVALIDATE hcall and this new replaces the old that.
> >
> > This commit enables process-scoped invalidations for L1 guests.
> > Support for process-scoped and partition-scoped invalidations
> > from/for nested guests will be added separately.
> >
> > Process scoped tlbie invalidations from L1 and nested guests
> > need RS register for TLBIE instruction to contain both PID and
> > LPID. This patch introduces primitives that execute tlbie
> > instruction with both PID and LPID set in prepartion for
> > H_RPT_INVALIDATE hcall.
> >
> > A description of H_RPT_INVALIDATE follows:
> >
> > int64 /* H_Success: Return code on successful completion */
> > /* H_Busy - repeat the call with the same */
> > /* H_Parameter, H_P2, H_P3, H_P4, H_P5 : Invalid
> > parameters */
> > hcall(const uint64 H_RPT_INVALIDATE, /* Invalidate RPT
> > translation
> > lookaside information */
> > uint64 id, /* PID/LPID to invalidate */
> > uint64 target, /* Invalidation target */
> > uint64 type, /* Type of lookaside information */
> > uint64 pg_sizes, /* Page sizes */
> > uint64 start, /* Start of Effective Address (EA)
> > range (inclusive) */
> > uint64 end) /* End of EA range (exclusive) */
> >
> > Invalidation targets (target)
> > -----------------------------
> > Core MMU 0x01 /* All virtual processors in the
> > partition */
> > Core local MMU 0x02 /* Current virtual processor */
> > Nest MMU 0x04 /* All nest/accelerator agents
> > in use by the partition */
> >
> > A combination of the above can be specified,
> > except core and core local.
> >
> > Type of translation to invalidate (type)
> > ---------------------------------------
> > NESTED 0x0001 /* invalidate nested guest partition-scope */
> > TLB 0x0002 /* Invalidate TLB */
> > PWC 0x0004 /* Invalidate Page Walk Cache */
> > PRT 0x0008 /* Invalidate caching of Process Table
> > Entries if NESTED is clear */
> > PAT 0x0008 /* Invalidate caching of Partition Table
> > Entries if NESTED is set */
> >
> > A combination of the above can be specified.
> >
> > Page size mask (pages)
> > ----------------------
> > 4K 0x01
> > 64K 0x02
> > 2M 0x04
> > 1G 0x08
> > All sizes (-1UL)
> >
> > A combination of the above can be specified.
> > All page sizes can be selected with -1.
> >
> > Semantics: Invalidate radix tree lookaside information
> > matching the parameters given.
> > * Return H_P2, H_P3 or H_P4 if target, type, or pageSizes parameters
> > are different from the defined values.
> > * Return H_PARAMETER if NESTED is set and pid is not a valid nested
> > LPID allocated to this partition
> > * Return H_P5 if (start, end) doesn't form a valid range. Start and
> > end should be a valid Quadrant address and end > start.
> > * Return H_NotSupported if the partition is not in running in radix
> > translation mode.
> > * May invalidate more translation information than requested.
> > * If start = 0 and end = -1, set the range to cover all valid
> > addresses. Else start and end should be aligned to 4kB (lower 11
> > bits clear).
> > * If NESTED is clear, then invalidate process scoped lookaside
> > information. Else pid specifies a nested LPID, and the invalidation
> > is performed on nested guest partition table and nested guest
> > partition scope real addresses.
> > * If pid = 0 and NESTED is clear, then valid addresses are quadrant 3
> > and quadrant 0 spaces, Else valid addresses are quadrant 0.
> > * Pages which are fully covered by the range are to be invalidated.
> > Those which are partially covered are considered outside
> > invalidation range, which allows a caller to optimally invalidate
> > ranges that may contain mixed page sizes.
> > * Return H_SUCCESS on success.
> >
> > Signed-off-by: Bharata B Rao <bharata@linux.ibm.com>
>
> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
>
> with the exception of one nit noted below.
>
> > ---
> > .../include/asm/book3s/64/tlbflush-radix.h | 4 +
> > arch/powerpc/include/asm/mmu_context.h | 11 ++
> > arch/powerpc/kvm/book3s_hv.c | 46 ++++++
> > arch/powerpc/mm/book3s64/radix_tlb.c | 152 +++++++++++++++++-
> > 4 files changed, 209 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> > index 8b33601cdb9d..a46fd37ad552 100644
> > --- a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> > +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> > @@ -4,6 +4,10 @@
> >
> > #include <asm/hvcall.h>
> >
> > +#define RIC_FLUSH_TLB 0
> > +#define RIC_FLUSH_PWC 1
> > +#define RIC_FLUSH_ALL 2
>
> Is there a reason for moving these? You don't appear to be adding a
> use of them outside the .c file they were in before.
They are used in arch/powerpc/kvm/book3s_hv_nested.c. It was all in the
same patchset earlier, but during reorgazing the hcall into 3 separate patches,
this change remained here. May be I should move this change to the next patch
where it is used.
Thanks for your review.
Regards,
Bharata.
^ permalink raw reply
* [PATCH] arch/powerpc/kernel: Duplicate include asm/interrupt.h
From: zhouchuangao @ 2021-03-23 1:57 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Nicholas Piggin, Christophe Leroy, Michal Suchanek,
Aneesh Kumar K.V, linuxppc-dev, linux-kernel
Cc: zhouchuangao
asm/interrupt.h is repeatedly in the file interrupt.c.
Signed-off-by: zhouchuangao <zhouchuangao@vivo.com>
---
arch/powerpc/kernel/interrupt.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrupt.c
index c475a22..6deaccc 100644
--- a/arch/powerpc/kernel/interrupt.c
+++ b/arch/powerpc/kernel/interrupt.c
@@ -9,7 +9,6 @@
#include <asm/cputime.h>
#include <asm/interrupt.h>
#include <asm/hw_irq.h>
-#include <asm/interrupt.h>
#include <asm/kprobes.h>
#include <asm/paca.h>
#include <asm/ptrace.h>
--
2.7.4
^ permalink raw reply related
* [PATCH] arch: powerpc: bug.h is included twice
From: Wan Jiabing @ 2021-03-23 2:23 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Aneesh Kumar K.V, Nicholas Piggin, Cédric Le Goater,
Wan Jiabing, Ganesh Goudar, Randy Dunlap, linuxppc-dev,
linux-kernel
Cc: kael_w
asm/bug.h has been included at line 12, so remove
the duplicate one at line 21.
Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
---
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
index f911bdb68d8b..3004f3323144 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
@@ -18,7 +18,6 @@
* complete pgtable.h but only a portion of it.
*/
#include <asm/book3s/64/pgtable.h>
-#include <asm/bug.h>
#include <asm/task_size_64.h>
#include <asm/cpu_has_feature.h>
--
2.25.1
^ permalink raw reply related
* [PATCH] arch: powerpc: Remove duplicate include of interrupt.h
From: Wan Jiabing @ 2021-03-23 2:41 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Nicholas Piggin, Christophe Leroy, Michal Suchanek,
Aneesh Kumar K.V, linuxppc-dev, linux-kernel
Cc: kael_w, Wan Jiabing
asm/interrupt.h has been included at line 12. According to
alphabetic order,we remove the duplicate one at line 10.
Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
---
arch/powerpc/kernel/interrupt.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrupt.c
index c475a229a42a..11d456896772 100644
--- a/arch/powerpc/kernel/interrupt.c
+++ b/arch/powerpc/kernel/interrupt.c
@@ -7,7 +7,6 @@
#include <asm/asm-prototypes.h>
#include <asm/kup.h>
#include <asm/cputime.h>
-#include <asm/interrupt.h>
#include <asm/hw_irq.h>
#include <asm/interrupt.h>
#include <asm/kprobes.h>
--
2.25.1
^ permalink raw reply related
* [PATCH] arch: powerpc: Remove duplicate include of clock.h
From: Wan Jiabing @ 2021-03-23 3:04 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Nicholas Piggin, Christophe Leroy, Peter Zijlstra, Stephen Boyd,
Pingfan Liu, Frederic Weisbecker, linuxppc-dev, linux-kernel
Cc: kael_w, Wan Jiabing
linux/sched/clock.h has been included at line 33.
So we remove the duplicate one at line 56. For better
understanding, we also move sched/cputime.h under the
sched including segment.
Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
---
arch/powerpc/kernel/time.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index b67d93a609a2..e2766e0e2a3a 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -31,6 +31,7 @@
#include <linux/export.h>
#include <linux/sched.h>
#include <linux/sched/clock.h>
+#include <linux/sched/cputime.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
@@ -52,8 +53,6 @@
#include <linux/irq_work.h>
#include <linux/of_clk.h>
#include <linux/suspend.h>
-#include <linux/sched/cputime.h>
-#include <linux/sched/clock.h>
#include <linux/processor.h>
#include <asm/trace.h>
--
2.25.1
^ permalink raw reply related
* [PATCH] tools: testing: Remove duplicate include of sched.h
From: Wan Jiabing @ 2021-03-23 3:34 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Shuah Khan, Wan Jiabing, linuxppc-dev, linux-kselftest,
linux-kernel
Cc: kael_w
sched.h has been included at line 33.
So we remove the duplicate one at line 36.
Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
---
tools/testing/selftests/powerpc/mm/tlbie_test.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/tools/testing/selftests/powerpc/mm/tlbie_test.c b/tools/testing/selftests/powerpc/mm/tlbie_test.c
index f85a0938ab25..48344a74b212 100644
--- a/tools/testing/selftests/powerpc/mm/tlbie_test.c
+++ b/tools/testing/selftests/powerpc/mm/tlbie_test.c
@@ -33,7 +33,6 @@
#include <sched.h>
#include <time.h>
#include <stdarg.h>
-#include <sched.h>
#include <pthread.h>
#include <signal.h>
#include <sys/prctl.h>
--
2.25.1
^ permalink raw reply related
* [PATCH] tools: testing: pthread.h is included twice
From: Wan Jiabing @ 2021-03-23 3:39 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Shuah Khan, Wan Jiabing, linuxppc-dev, linux-kselftest,
linux-kernel
Cc: kael_w
pthread.h has been included at line 17.
So we remove the duplicate one at line 20.
Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
---
tools/testing/selftests/powerpc/tm/tm-vmx-unavail.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/tools/testing/selftests/powerpc/tm/tm-vmx-unavail.c b/tools/testing/selftests/powerpc/tm/tm-vmx-unavail.c
index e2a0c07e8362..9ef37a9836ac 100644
--- a/tools/testing/selftests/powerpc/tm/tm-vmx-unavail.c
+++ b/tools/testing/selftests/powerpc/tm/tm-vmx-unavail.c
@@ -17,7 +17,6 @@
#include <pthread.h>
#include <sys/mman.h>
#include <unistd.h>
-#include <pthread.h>
#include "tm.h"
#include "utils.h"
--
2.25.1
^ permalink raw reply related
* [PATCH] tools: testing: inttypes.h is included twice
From: Wan Jiabing @ 2021-03-23 3:43 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Shuah Khan, Wan Jiabing, linuxppc-dev, linux-kselftest,
linux-kernel
Cc: kael_w
inttypes.h has been included at line 19.
So we remove the duplicate one at line 23.
Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
---
tools/testing/selftests/powerpc/tm/tm-poison.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/tools/testing/selftests/powerpc/tm/tm-poison.c b/tools/testing/selftests/powerpc/tm/tm-poison.c
index 29e5f26af7b9..27c083a03d1f 100644
--- a/tools/testing/selftests/powerpc/tm/tm-poison.c
+++ b/tools/testing/selftests/powerpc/tm/tm-poison.c
@@ -20,7 +20,6 @@
#include <sched.h>
#include <sys/types.h>
#include <signal.h>
-#include <inttypes.h>
#include "tm.h"
--
2.25.1
^ permalink raw reply related
* Re: [PATCH] arch: powerpc: Remove duplicate include of interrupt.h
From: Christophe Leroy @ 2021-03-23 5:41 UTC (permalink / raw)
To: Wan Jiabing, zhouchuangao
Cc: linux-kernel, Nicholas Piggin, Paul Mackerras, Aneesh Kumar K.V,
kael_w, Michal Suchanek, linuxppc-dev, Qiang Zhao
In-Reply-To: <20210323024126.237840-1-wanjiabing@vivo.com>
Le 23/03/2021 à 03:41, Wan Jiabing a écrit :
> asm/interrupt.h has been included at line 12. According to
> alphabetic order,we remove the duplicate one at line 10.
Could you please cook a single patch for all files in arch/powerpc/
Thanks
Christophe
>
> Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
> ---
> arch/powerpc/kernel/interrupt.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrupt.c
> index c475a229a42a..11d456896772 100644
> --- a/arch/powerpc/kernel/interrupt.c
> +++ b/arch/powerpc/kernel/interrupt.c
> @@ -7,7 +7,6 @@
> #include <asm/asm-prototypes.h>
> #include <asm/kup.h>
> #include <asm/cputime.h>
> -#include <asm/interrupt.h>
> #include <asm/hw_irq.h>
> #include <asm/interrupt.h>
> #include <asm/kprobes.h>
>
^ permalink raw reply
* Re: [PATCH] tools: testing: Remove duplicate include of sched.h
From: Christophe Leroy @ 2021-03-23 5:44 UTC (permalink / raw)
To: Wan Jiabing, Michael Ellerman, Benjamin Herrenschmidt,
Paul Mackerras, Shuah Khan, linuxppc-dev, linux-kselftest,
linux-kernel
Cc: kael_w
In-Reply-To: <20210323033413.284420-1-wanjiabing@vivo.com>
Le 23/03/2021 à 04:34, Wan Jiabing a écrit :
> sched.h has been included at line 33.
> So we remove the duplicate one at line 36.
Can you please send a single patch for all files in tools/testing/selftests/powerpc/
Thanks
Christophe
>
> Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
> ---
> tools/testing/selftests/powerpc/mm/tlbie_test.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/tools/testing/selftests/powerpc/mm/tlbie_test.c b/tools/testing/selftests/powerpc/mm/tlbie_test.c
> index f85a0938ab25..48344a74b212 100644
> --- a/tools/testing/selftests/powerpc/mm/tlbie_test.c
> +++ b/tools/testing/selftests/powerpc/mm/tlbie_test.c
> @@ -33,7 +33,6 @@
> #include <sched.h>
> #include <time.h>
> #include <stdarg.h>
> -#include <sched.h>
> #include <pthread.h>
> #include <signal.h>
> #include <sys/prctl.h>
>
^ permalink raw reply
* [PATCH] [v2] tools: testing: Remove duplicate includes
From: Wan Jiabing @ 2021-03-23 6:15 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Shuah Khan, Wan Jiabing, linuxppc-dev, linux-kselftest,
linux-kernel
Cc: kael_w
sched.h has been included at line 33, so remove the
duplicate one at line 36.
inttypes.h has been included at line 19, so remove the
duplicate one at line 23.
pthread.h has been included at line 17,so remove the
duplicate one at line 20.
Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
---
tools/testing/selftests/powerpc/mm/tlbie_test.c | 1 -
tools/testing/selftests/powerpc/tm/tm-poison.c | 1 -
tools/testing/selftests/powerpc/tm/tm-vmx-unavail.c | 1 -
3 files changed, 3 deletions(-)
diff --git a/tools/testing/selftests/powerpc/mm/tlbie_test.c b/tools/testing/selftests/powerpc/mm/tlbie_test.c
index f85a0938ab25..48344a74b212 100644
--- a/tools/testing/selftests/powerpc/mm/tlbie_test.c
+++ b/tools/testing/selftests/powerpc/mm/tlbie_test.c
@@ -33,7 +33,6 @@
#include <sched.h>
#include <time.h>
#include <stdarg.h>
-#include <sched.h>
#include <pthread.h>
#include <signal.h>
#include <sys/prctl.h>
diff --git a/tools/testing/selftests/powerpc/tm/tm-poison.c b/tools/testing/selftests/powerpc/tm/tm-poison.c
index 29e5f26af7b9..27c083a03d1f 100644
--- a/tools/testing/selftests/powerpc/tm/tm-poison.c
+++ b/tools/testing/selftests/powerpc/tm/tm-poison.c
@@ -20,7 +20,6 @@
#include <sched.h>
#include <sys/types.h>
#include <signal.h>
-#include <inttypes.h>
#include "tm.h"
diff --git a/tools/testing/selftests/powerpc/tm/tm-vmx-unavail.c b/tools/testing/selftests/powerpc/tm/tm-vmx-unavail.c
index e2a0c07e8362..9ef37a9836ac 100644
--- a/tools/testing/selftests/powerpc/tm/tm-vmx-unavail.c
+++ b/tools/testing/selftests/powerpc/tm/tm-vmx-unavail.c
@@ -17,7 +17,6 @@
#include <pthread.h>
#include <sys/mman.h>
#include <unistd.h>
-#include <pthread.h>
#include "tm.h"
#include "utils.h"
--
2.25.1
^ permalink raw reply related
* Re: [PATCH -next] powerpc: kernel/time.c - cleanup warnings
From: heying (H) @ 2021-03-23 6:21 UTC (permalink / raw)
To: Christophe Leroy, mpe, benh, paulus, npiggin, msuchanek, peterz,
geert+renesas, kernelfans, frederic
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <5ee06736-7fc4-7993-a8b5-042e1890a6de@huawei.com>
Dear Christophe,
在 2021/3/18 10:28, heying (H) 写道:
>
> 在 2021/3/17 19:16, Christophe Leroy 写道:
>>
>>
>> Le 17/03/2021 à 11:34, He Ying a écrit :
>>> We found these warnings in arch/powerpc/kernel/time.c as follows:
>>> warning: symbol 'decrementer_max' was not declared. Should it be
>>> static?
>>> warning: symbol 'rtc_lock' was not declared. Should it be static?
>>> warning: symbol 'dtl_consumer' was not declared. Should it be static?
>>>
>>> Declare 'decrementer_max' in arch/powerpc/include/asm/time.h. And
>>> include
>>> proper header in which 'rtc_lock' is declared. Move 'dtl_consumer'
>>> definition behind "include <asm/dtl.h>" because 'dtl_consumer' is
>>> declared
>>> there.
>>>
>>> Reported-by: Hulk Robot <hulkci@huawei.com>
>>> Signed-off-by: He Ying <heying24@huawei.com>
>>> ---
>>> arch/powerpc/include/asm/time.h | 1 +
>>> arch/powerpc/kernel/time.c | 7 +++----
>>> 2 files changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/powerpc/include/asm/time.h
>>> b/arch/powerpc/include/asm/time.h
>>> index 8dd3cdb25338..2cd2b50bedda 100644
>>> --- a/arch/powerpc/include/asm/time.h
>>> +++ b/arch/powerpc/include/asm/time.h
>>> @@ -22,6 +22,7 @@ extern unsigned long tb_ticks_per_jiffy;
>>> extern unsigned long tb_ticks_per_usec;
>>> extern unsigned long tb_ticks_per_sec;
>>> extern struct clock_event_device decrementer_clockevent;
>>> +extern u64 decrementer_max;
>>> extern void generic_calibrate_decr(void);
>>> diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
>>> index b67d93a609a2..409967713ca6 100644
>>> --- a/arch/powerpc/kernel/time.c
>>> +++ b/arch/powerpc/kernel/time.c
>>> @@ -55,6 +55,7 @@
>>> #include <linux/sched/cputime.h>
>>> #include <linux/sched/clock.h>
>>> #include <linux/processor.h>
>>> +#include <linux/mc146818rtc.h>
>>
>> I don't think that's the good place. It has no link to powerpc, it is
>> only by chance that it has the same name.
>>
>> As rtc_lock is defined in powerpc time.c, I think you should declare
>> it in powerpc asm/time.h
>
> My first thought was the same as yours. I tried to add declaration in
> powerpc asm/time.h, but got a compiling error:
>
> drivers/rtc/rtc-vr41xx.c:75:24: error: static declaration of
> ‘rtc_lock’ follows non-static declaration
> static DEFINE_SPINLOCK(rtc_lock);
>
> In file included from ./arch/powerpc/include/asm/delay.h:7:0,
> from ./arch/powerpc/include/asm/io.h:33,
> from ./include/linux/io.h:13,
> from drivers/rtc/rtc-vr41xx.c:11:
> ./arch/powerpc/include/asm/time.h:25:19: note: previous declaration of
> ‘rtc_lock’ was here
> extern spinlock_t rtc_lock;
>
> There's a conflict. Perhaps I can rename it in drivers/rtc/rtc-vr41xx.c.
>
>
> But I find an existing declaration in linux/mc146818rtc.h and there's
> only one definition for 'rtc_lock' in powerpc.
>
> There's some includes of mc146818rtc.h in powperc. I wonder they point
> to the same thing. But I'm not very sure
>
> because the header's name looks a bit strange.
How about including mc146818rtc.h in powperpc kernel/time.c? May I have
your opinions please?
Thanks.
^ permalink raw reply
* [PATCH] [v2] arch: powerpc: Remove duplicate includes
From: Wan Jiabing @ 2021-03-23 6:29 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Nicholas Piggin, Aneesh Kumar K.V, Cédric Le Goater,
Randy Dunlap, Wan Jiabing, Ganesh Goudar, Christophe Leroy,
Michal Suchanek, Geert Uytterhoeven, Pingfan Liu,
Frederic Weisbecker, linuxppc-dev, linux-kernel
Cc: kael_w
mmu-hash.h: asm/bug.h has been included at line 12, so remove
the duplicate one at line 21.
interrupt.c: asm/interrupt.h has been included at line 12, so
remove the duplicate one at line 10.
time.c: linux/sched/clock.h has been included at line 33,so
remove the duplicate one at line 56 and move sched/cputime.h
under sched including segament.
Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
---
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 1 -
arch/powerpc/kernel/interrupt.c | 1 -
arch/powerpc/kernel/time.c | 3 +--
3 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
index f911bdb68d8b..3004f3323144 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
@@ -18,7 +18,6 @@
* complete pgtable.h but only a portion of it.
*/
#include <asm/book3s/64/pgtable.h>
-#include <asm/bug.h>
#include <asm/task_size_64.h>
#include <asm/cpu_has_feature.h>
diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrupt.c
index c475a229a42a..11d456896772 100644
--- a/arch/powerpc/kernel/interrupt.c
+++ b/arch/powerpc/kernel/interrupt.c
@@ -7,7 +7,6 @@
#include <asm/asm-prototypes.h>
#include <asm/kup.h>
#include <asm/cputime.h>
-#include <asm/interrupt.h>
#include <asm/hw_irq.h>
#include <asm/interrupt.h>
#include <asm/kprobes.h>
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index b67d93a609a2..e2766e0e2a3a 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -31,6 +31,7 @@
#include <linux/export.h>
#include <linux/sched.h>
#include <linux/sched/clock.h>
+#include <linux/sched/cputime.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
@@ -52,8 +53,6 @@
#include <linux/irq_work.h>
#include <linux/of_clk.h>
#include <linux/suspend.h>
-#include <linux/sched/cputime.h>
-#include <linux/sched/clock.h>
#include <linux/processor.h>
#include <asm/trace.h>
--
2.25.1
^ permalink raw reply related
* Re: [PATCH -next] powerpc: kernel/time.c - cleanup warnings
From: Christophe Leroy @ 2021-03-23 6:33 UTC (permalink / raw)
To: heying (H), mpe, benh, paulus, npiggin, msuchanek, peterz,
geert+renesas, kernelfans, frederic
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <c6908c07-1814-a7f8-5f48-a4c316fb567c@huawei.com>
Le 23/03/2021 à 07:21, heying (H) a écrit :
> Dear Christophe,
>
>
> 在 2021/3/18 10:28, heying (H) 写道:
>>
>> 在 2021/3/17 19:16, Christophe Leroy 写道:
>>>
>>>
>>> Le 17/03/2021 à 11:34, He Ying a écrit :
>>>> We found these warnings in arch/powerpc/kernel/time.c as follows:
>>>> warning: symbol 'decrementer_max' was not declared. Should it be static?
>>>> warning: symbol 'rtc_lock' was not declared. Should it be static?
>>>> warning: symbol 'dtl_consumer' was not declared. Should it be static?
>>>>
>>>> Declare 'decrementer_max' in arch/powerpc/include/asm/time.h. And include
>>>> proper header in which 'rtc_lock' is declared. Move 'dtl_consumer'
>>>> definition behind "include <asm/dtl.h>" because 'dtl_consumer' is declared
>>>> there.
>>>>
>>>> Reported-by: Hulk Robot <hulkci@huawei.com>
>>>> Signed-off-by: He Ying <heying24@huawei.com>
>>>> ---
>>>> arch/powerpc/include/asm/time.h | 1 +
>>>> arch/powerpc/kernel/time.c | 7 +++----
>>>> 2 files changed, 4 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/arch/powerpc/include/asm/time.h b/arch/powerpc/include/asm/time.h
>>>> index 8dd3cdb25338..2cd2b50bedda 100644
>>>> --- a/arch/powerpc/include/asm/time.h
>>>> +++ b/arch/powerpc/include/asm/time.h
>>>> @@ -22,6 +22,7 @@ extern unsigned long tb_ticks_per_jiffy;
>>>> extern unsigned long tb_ticks_per_usec;
>>>> extern unsigned long tb_ticks_per_sec;
>>>> extern struct clock_event_device decrementer_clockevent;
>>>> +extern u64 decrementer_max;
>>>> extern void generic_calibrate_decr(void);
>>>> diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
>>>> index b67d93a609a2..409967713ca6 100644
>>>> --- a/arch/powerpc/kernel/time.c
>>>> +++ b/arch/powerpc/kernel/time.c
>>>> @@ -55,6 +55,7 @@
>>>> #include <linux/sched/cputime.h>
>>>> #include <linux/sched/clock.h>
>>>> #include <linux/processor.h>
>>>> +#include <linux/mc146818rtc.h>
>>>
>>> I don't think that's the good place. It has no link to powerpc, it is only by chance that it has
>>> the same name.
>>>
>>> As rtc_lock is defined in powerpc time.c, I think you should declare it in powerpc asm/time.h
>>
>> My first thought was the same as yours. I tried to add declaration in powerpc asm/time.h, but got
>> a compiling error:
>>
>> drivers/rtc/rtc-vr41xx.c:75:24: error: static declaration of ‘rtc_lock’ follows non-static
>> declaration
>> static DEFINE_SPINLOCK(rtc_lock);
>>
>> In file included from ./arch/powerpc/include/asm/delay.h:7:0,
>> from ./arch/powerpc/include/asm/io.h:33,
>> from ./include/linux/io.h:13,
>> from drivers/rtc/rtc-vr41xx.c:11:
>> ./arch/powerpc/include/asm/time.h:25:19: note: previous declaration of ‘rtc_lock’ was here
>> extern spinlock_t rtc_lock;
>>
>> There's a conflict. Perhaps I can rename it in drivers/rtc/rtc-vr41xx.c.
>>
>>
>> But I find an existing declaration in linux/mc146818rtc.h and there's only one definition for
>> 'rtc_lock' in powerpc.
>>
>> There's some includes of mc146818rtc.h in powperc. I wonder they point to the same thing. But I'm
>> not very sure
>>
>> because the header's name looks a bit strange.
>
> How about including mc146818rtc.h in powperpc kernel/time.c? May I have your opinions please?
>
As I said, mc146818rtc.h is not related to powerpc, and if it works that's just chance, and there is
no certainty that it will still work in the future.
If you can't find a clean solution, it is better to leave the warning.
Christophe
^ permalink raw reply
* Re: [PATCH -next] powerpc: kernel/time.c - cleanup warnings
From: heying (H) @ 2021-03-23 6:53 UTC (permalink / raw)
To: Christophe Leroy, mpe, benh, paulus, npiggin, msuchanek, peterz,
geert+renesas, kernelfans, frederic
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <5f4ec5e0-af9c-ba47-4a01-589b1b724cb9@csgroup.eu>
Dear Christophe,
在 2021/3/23 14:33, Christophe Leroy 写道:
>
>
> Le 23/03/2021 à 07:21, heying (H) a écrit :
>> Dear Christophe,
>>
>>
>> 在 2021/3/18 10:28, heying (H) 写道:
>>>
>>> 在 2021/3/17 19:16, Christophe Leroy 写道:
>>>>
>>>>
>>>> Le 17/03/2021 à 11:34, He Ying a écrit :
>>>>> We found these warnings in arch/powerpc/kernel/time.c as follows:
>>>>> warning: symbol 'decrementer_max' was not declared. Should it be
>>>>> static?
>>>>> warning: symbol 'rtc_lock' was not declared. Should it be static?
>>>>> warning: symbol 'dtl_consumer' was not declared. Should it be static?
>>>>>
>>>>> Declare 'decrementer_max' in arch/powerpc/include/asm/time.h. And
>>>>> include
>>>>> proper header in which 'rtc_lock' is declared. Move 'dtl_consumer'
>>>>> definition behind "include <asm/dtl.h>" because 'dtl_consumer' is
>>>>> declared
>>>>> there.
>>>>>
>>>>> Reported-by: Hulk Robot <hulkci@huawei.com>
>>>>> Signed-off-by: He Ying <heying24@huawei.com>
>>>>> ---
>>>>> arch/powerpc/include/asm/time.h | 1 +
>>>>> arch/powerpc/kernel/time.c | 7 +++----
>>>>> 2 files changed, 4 insertions(+), 4 deletions(-)
>>>>>
>>>>> diff --git a/arch/powerpc/include/asm/time.h
>>>>> b/arch/powerpc/include/asm/time.h
>>>>> index 8dd3cdb25338..2cd2b50bedda 100644
>>>>> --- a/arch/powerpc/include/asm/time.h
>>>>> +++ b/arch/powerpc/include/asm/time.h
>>>>> @@ -22,6 +22,7 @@ extern unsigned long tb_ticks_per_jiffy;
>>>>> extern unsigned long tb_ticks_per_usec;
>>>>> extern unsigned long tb_ticks_per_sec;
>>>>> extern struct clock_event_device decrementer_clockevent;
>>>>> +extern u64 decrementer_max;
>>>>> extern void generic_calibrate_decr(void);
>>>>> diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
>>>>> index b67d93a609a2..409967713ca6 100644
>>>>> --- a/arch/powerpc/kernel/time.c
>>>>> +++ b/arch/powerpc/kernel/time.c
>>>>> @@ -55,6 +55,7 @@
>>>>> #include <linux/sched/cputime.h>
>>>>> #include <linux/sched/clock.h>
>>>>> #include <linux/processor.h>
>>>>> +#include <linux/mc146818rtc.h>
>>>>
>>>> I don't think that's the good place. It has no link to powerpc, it
>>>> is only by chance that it has the same name.
>>>>
>>>> As rtc_lock is defined in powerpc time.c, I think you should
>>>> declare it in powerpc asm/time.h
>>>
>>> My first thought was the same as yours. I tried to add declaration
>>> in powerpc asm/time.h, but got a compiling error:
>>>
>>> drivers/rtc/rtc-vr41xx.c:75:24: error: static declaration of
>>> ‘rtc_lock’ follows non-static declaration
>>> static DEFINE_SPINLOCK(rtc_lock);
>>>
>>> In file included from ./arch/powerpc/include/asm/delay.h:7:0,
>>> from ./arch/powerpc/include/asm/io.h:33,
>>> from ./include/linux/io.h:13,
>>> from drivers/rtc/rtc-vr41xx.c:11:
>>> ./arch/powerpc/include/asm/time.h:25:19: note: previous declaration
>>> of ‘rtc_lock’ was here
>>> extern spinlock_t rtc_lock;
>>>
>>> There's a conflict. Perhaps I can rename it in
>>> drivers/rtc/rtc-vr41xx.c.
>>>
>>>
>>> But I find an existing declaration in linux/mc146818rtc.h and
>>> there's only one definition for 'rtc_lock' in powerpc.
>>>
>>> There's some includes of mc146818rtc.h in powperc. I wonder they
>>> point to the same thing. But I'm not very sure
>>>
>>> because the header's name looks a bit strange.
>>
>> How about including mc146818rtc.h in powperpc kernel/time.c? May I
>> have your opinions please?
>>
>
> As I said, mc146818rtc.h is not related to powerpc, and if it works
> that's just chance, and there is no certainty that it will still work
> in the future.
>
> If you can't find a clean solution, it is better to leave the warning.
OK. I see. Thanks for you relpy. I'll try to find some other better way.
Thanks.
^ permalink raw reply
* Re: [PATCH v3 19/41] KVM: PPC: Book3S HV P9: Stop handling hcalls in real-mode in the P9 path
From: Cédric Le Goater @ 2021-03-23 7:26 UTC (permalink / raw)
To: Nicholas Piggin, Alexey Kardashevskiy, kvm-ppc; +Cc: linuxppc-dev
In-Reply-To: <1616436906.owrt3o4wh1.astroid@bobo.none>
On 3/22/21 7:22 PM, Nicholas Piggin wrote:
> Excerpts from Cédric Le Goater's message of March 23, 2021 2:01 am:
>> On 3/22/21 2:15 PM, Nicholas Piggin wrote:
>>> Excerpts from Alexey Kardashevskiy's message of March 22, 2021 5:30 pm:
>>>>
>>>>
>>>> On 06/03/2021 02:06, Nicholas Piggin wrote:
>>>>> In the interest of minimising the amount of code that is run in>>> "real-mode", don't handle hcalls in real mode in the P9 path.
>>>>>
>>>>> POWER8 and earlier are much more expensive to exit from HV real mode
>>>>> and switch to host mode, because on those processors HV interrupts get
>>>>> to the hypervisor with the MMU off, and the other threads in the core
>>>>> need to be pulled out of the guest, and SLBs all need to be saved,
>>>>> ERATs invalidated, and host SLB reloaded before the MMU is re-enabled
>>>>> in host mode. Hash guests also require a lot of hcalls to run. The
>>>>> XICS interrupt controller requires hcalls to run.
>>>>>
>>>>> By contrast, POWER9 has independent thread switching, and in radix mode
>>>>> the hypervisor is already in a host virtual memory mode when the HV
>>>>> interrupt is taken. Radix + xive guests don't need hcalls to handle
>>>>> interrupts or manage translations.
>>
>> Do we need to handle the host-is-a-P9-without-xive case ?
>
> I'm not sure really. Is there an intention for OPAL to be able to
> provide a fallback layer in the worst case?
yes. OPAL has a XICS-on-XIVE emulation for P9, implemented for bringup,
and it still boots, XICS guest can run. P10 doesn't have it though.
> Maybe microwatt grows HV capability before XIVE?
I don't know if we should develop the same XIVE logic for microwatt.
It's awfully complex and we have the XICS interface which works already.
>>>>> So it's much less important to handle hcalls in real mode in P9.
>>>>
>>>> So acde25726bc6034b (which added if(kvm_is_radix(vcpu->kvm))return
>>>> H_TOO_HARD) can be reverted, pretty much?
>>>
>>> Yes. Although that calls attention to the fact I missed doing
>>> a P9 h_random handler in this patch. I'll fix that, then I think
>>> acde2572 could be reverted entirely.
>>>
>>> [...]
>>>
>>>>> } else {
>>>>> kvmppc_xive_push_vcpu(vcpu);
>>>>> trap = kvmhv_load_hv_regs_and_go(vcpu, time_limit, lpcr);
>>>>> - kvmppc_xive_pull_vcpu(vcpu);
>>>>> + /* H_CEDE has to be handled now, not later */
>>>>> + /* XICS hcalls must be handled before xive is pulled */
>>>>> + if (trap == BOOK3S_INTERRUPT_SYSCALL &&
>>>>> + !(vcpu->arch.shregs.msr & MSR_PR)) {
>>>>> + unsigned long req = kvmppc_get_gpr(vcpu, 3);
>>>>>
>>>>> + if (req == H_CEDE) {
>>>>> + kvmppc_cede(vcpu);
>>>>> + kvmppc_xive_cede_vcpu(vcpu); /* may un-cede */
>>>>> + kvmppc_set_gpr(vcpu, 3, 0);
>>>>> + trap = 0;
>>>>> + }
>>>>> + if (req == H_EOI || req == H_CPPR ||
>>>>
>>>> else if (req == H_EOI ... ?
>>>
>>> Hummm, sure.
>>
>> you could integrate the H_CEDE in the switch statement below.
>
> Below is in a different file just for the emulation calls.
>
>>>
>>> [...]
>>>
>>>>> +void kvmppc_xive_cede_vcpu(struct kvm_vcpu *vcpu)
>>>>> +{
>>>>> + void __iomem *esc_vaddr = (void __iomem *)vcpu->arch.xive_esc_vaddr;
>>>>> +
>>>>> + if (!esc_vaddr)
>>>>> + return;
>>>>> +
>>>>> + /* we are using XIVE with single escalation */
>>>>> +
>>>>> + if (vcpu->arch.xive_esc_on) {
>>>>> + /*
>>>>> + * If we still have a pending escalation, abort the cede,
>>>>> + * and we must set PQ to 10 rather than 00 so that we don't
>>>>> + * potentially end up with two entries for the escalation
>>>>> + * interrupt in the XIVE interrupt queue. In that case
>>>>> + * we also don't want to set xive_esc_on to 1 here in
>>>>> + * case we race with xive_esc_irq().
>>>>> + */
>>>>> + vcpu->arch.ceded = 0;
>>>>> + /*
>>>>> + * The escalation interrupts are special as we don't EOI them.
>>>>> + * There is no need to use the load-after-store ordering offset
>>>>> + * to set PQ to 10 as we won't use StoreEOI.
>>>>> + */
>>>>> + __raw_readq(esc_vaddr + XIVE_ESB_SET_PQ_10);
>>>>> + } else {
>>>>> + vcpu->arch.xive_esc_on = true;
>>>>> + mb();
>>>>> + __raw_readq(esc_vaddr + XIVE_ESB_SET_PQ_00);
>>>>> + }
>>>>> + mb();
>>>>
>>>>
>>>> Uff. Thanks for cut-n-pasting the comments, helped a lot to match this c
>>>> to that asm!
>>>
>>> Glad it helped.
>>>>> +}
>>
>> I had to do the PowerNV models in QEMU to start understanding that stuff ...
>>
>>>>> +EXPORT_SYMBOL_GPL(kvmppc_xive_cede_vcpu);
>>>>> +
>>>>> /*
>>>>> * This is a simple trigger for a generic XIVE IRQ. This must
>>>>> * only be called for interrupts that support a trigger page
>>>>> @@ -2106,6 +2140,32 @@ static int kvmppc_xive_create(struct kvm_device *dev, u32 type)
>>>>> return 0;
>>>>> }
>>>>>
>>>>> +int kvmppc_xive_xics_hcall(struct kvm_vcpu *vcpu, u32 req)
>>>>> +{
>>>>> + struct kvmppc_vcore *vc = vcpu->arch.vcore;
>>>>
>>>>
>>>> Can a XIVE enabled guest issue these hcalls? Don't we want if
>>>> (!kvmppc_xics_enabled(vcpu)) and
>>>> if (xics_on_xive()) here, as kvmppc_rm_h_xirr() have? Some of these
>>>> hcalls do write to XIVE registers but some seem to change
>>>> kvmppc_xive_vcpu. Thanks,
>>>
>>> Yes I think you're right, good catch. I'm not completely sure about all
>>> the xive and xics modes but a guest certainly can make any kind of hcall
>>> it likes and we have to sanity check it.
>>
>> Yes.
>>
>>> We want to take the hcall here (in replacement of the real mode hcalls)
>>> with the same condition. So it would be:
>>>
>>> if (!kvmppc_xics_enabled(vcpu))
>>> return H_TOO_HARD;
>>
>> Yes.
>>
>> This test covers the case in which a vCPU does XICS hcalls without QEMU
>> having connected the vCPU to a XICS ICP. The ICP is the KVM XICS device
>> on P8 or XICS-on-XIVE on P9. It catches QEMU errors when the interrupt
>> mode is negotiated, we don't want the OS to do XICS hcalls after having
>> negotiated the XIVE interrupt mode.
>
> Okay.
>
>> It's different for the XIVE hcalls (when running under XICS) because they
>> are all handled in QEMU.
>
> XIVE guest hcalls running on XICS host?
What I meant is that in anycase, XICS or XIVE host, the XIVE hcalls are
trapped in KVM but always handled in QEMU. So We don't need to check
anything in KVM, as QEMU will take care of it.
( It also make the implementation cleaner since the hcall frontend is in
one place. )
C.
>>> if (!xics_on_xive())
>>> return H_TOO_HARD;
>>
>> I understand that this code is only called on P9 and with translation on.
>
> Yes.
>
>> On P9, we could have xics_on_xive() == 0 if XIVE is disabled at compile
>> time or with "xive=off" at boot time. But guests should be supported.
>> I don't see a reason to restrict the support even if these scenarios
>> are rather unusual if not very rare.
>>
>> on P10, it's the same but since we don't have the XICS emulation layer
>> in OPAL, the host will be pretty useless. We don't care.
>>
>> Since we are trying to handle hcalls, this is L0 and it can not be called
>> for nested guests, which would be another case of xics_on_xive() == 0.
>> We don't care either.
>
> Okay so no xics_on_xive() test. I'll change that.
>
>
> Thanks,
> Nick
>
^ permalink raw reply
* Re: [PATCH 1/1] powerpc/iommu: Enable remaining IOMMU Pagesizes present in LoPAR
From: Alexey Kardashevskiy @ 2021-03-23 7:41 UTC (permalink / raw)
To: Leonardo Bras, Michael Ellerman, Benjamin Herrenschmidt,
Paul Mackerras, Christophe Leroy, Joel Stanley, brking
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <20210322190943.715368-1-leobras.c@gmail.com>
On 23/03/2021 06:09, Leonardo Bras wrote:
> According to LoPAR, ibm,query-pe-dma-window output named "IO Page Sizes"
> will let the OS know all possible pagesizes that can be used for creating a
> new DDW.
>
> Currently Linux will only try using 3 of the 8 available options:
> 4K, 64K and 16M. According to LoPAR, Hypervisor may also offer 32M, 64M,
> 128M, 256M and 16G.
>
> Enabling bigger pages would be interesting for direct mapping systems
> with a lot of RAM, while using less TCE entries.
> > Signed-off-by: Leonardo Bras <leobras.c@gmail.com>
> ---
> arch/powerpc/include/asm/iommu.h | 8 ++++++++
> arch/powerpc/platforms/pseries/iommu.c | 28 +++++++++++++++++++-------
> 2 files changed, 29 insertions(+), 7 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
> index deef7c94d7b6..c170048b7a1b 100644
> --- a/arch/powerpc/include/asm/iommu.h
> +++ b/arch/powerpc/include/asm/iommu.h
> @@ -19,6 +19,14 @@
> #include <asm/pci-bridge.h>
> #include <asm/asm-const.h>
>
> +#define IOMMU_PAGE_SHIFT_16G 34
> +#define IOMMU_PAGE_SHIFT_256M 28
> +#define IOMMU_PAGE_SHIFT_128M 27
> +#define IOMMU_PAGE_SHIFT_64M 26
> +#define IOMMU_PAGE_SHIFT_32M 25
> +#define IOMMU_PAGE_SHIFT_16M 24
> +#define IOMMU_PAGE_SHIFT_64K 16
These are not very descriptive, these are just normal shifts, could be
as simple as __builtin_ctz(SZ_4K) (gcc will optimize this) and so on.
OTOH the PAPR page sizes need macros as they are the ones which are
weird and screaming for macros.
I'd steal/rework spapr_page_mask_to_query_mask() from QEMU. Thanks,
> +
> #define IOMMU_PAGE_SHIFT_4K 12
> #define IOMMU_PAGE_SIZE_4K (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K)
> #define IOMMU_PAGE_MASK_4K (~((1 << IOMMU_PAGE_SHIFT_4K) - 1))
> diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
> index 9fc5217f0c8e..02958e80aa91 100644
> --- a/arch/powerpc/platforms/pseries/iommu.c
> +++ b/arch/powerpc/platforms/pseries/iommu.c
> @@ -1099,6 +1099,24 @@ static void reset_dma_window(struct pci_dev *dev, struct device_node *par_dn)
> ret);
> }
>
> +/* Returns page shift based on "IO Page Sizes" output at ibm,query-pe-dma-window. SeeL LoPAR */
> +static int iommu_get_page_shift(u32 query_page_size)
> +{
> + const int shift[] = {IOMMU_PAGE_SHIFT_4K, IOMMU_PAGE_SHIFT_64K, IOMMU_PAGE_SHIFT_16M,
> + IOMMU_PAGE_SHIFT_32M, IOMMU_PAGE_SHIFT_64M, IOMMU_PAGE_SHIFT_128M,
> + IOMMU_PAGE_SHIFT_256M, IOMMU_PAGE_SHIFT_16G};
> + int i = ARRAY_SIZE(shift) - 1;
> +
> + /* Looks for the largest page size supported */
> + for (; i >= 0; i--) {
> + if (query_page_size & (1 << i))
> + return shift[i];
> + }
> +
> + /* No valid page size found. */
> + return 0;
> +}
> +
> /*
> * If the PE supports dynamic dma windows, and there is space for a table
> * that can map all pages in a linear offset, then setup such a table,
> @@ -1206,13 +1224,9 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
> goto out_failed;
> }
> }
> - if (query.page_size & 4) {
> - page_shift = 24; /* 16MB */
> - } else if (query.page_size & 2) {
> - page_shift = 16; /* 64kB */
> - } else if (query.page_size & 1) {
> - page_shift = 12; /* 4kB */
> - } else {
> +
> + page_shift = iommu_get_page_shift(query.page_size);
> + if (!page_shift) {
> dev_dbg(&dev->dev, "no supported direct page size in mask %x",
> query.page_size);
> goto out_failed;
>
--
Alexey
^ permalink raw reply
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