* [patch V2 17/23] PCI/MSI: Split out !IRQDOMAIN code
From: Thomas Gleixner @ 2021-12-06 22:27 UTC (permalink / raw)
To: LKML
Cc: linux-hyperv, Paul Mackerras, sparclinux, Wei Liu, Ashok Raj, x86,
Christian Borntraeger, Bjorn Helgaas, Megha Dey, Jason Gunthorpe,
linux-pci, xen-devel, ath11k, Kevin Tian, Heiko Carstens,
Alex Williamson, Cedric Le Goater, Kalle Valo, Juergen Gross,
Thomas Bogendoerfer, Greg Kroah-Hartman, linux-mips, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210147.872865823@linutronix.de>
Split out the non irqdomain code into its own file.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
---
V2: Add proper includes and fix variable name - Cedric
---
drivers/pci/msi/Makefile | 5 ++--
drivers/pci/msi/legacy.c | 52 +++++++++++++++++++++++++++++++++++++++++++++++
drivers/pci/msi/msi.c | 46 -----------------------------------------
3 files changed, 55 insertions(+), 48 deletions(-)
--- a/drivers/pci/msi/Makefile
+++ b/drivers/pci/msi/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
#
# Makefile for the PCI/MSI
-obj-$(CONFIG_PCI) += pcidev_msi.o
-obj-$(CONFIG_PCI_MSI) += msi.o
+obj-$(CONFIG_PCI) += pcidev_msi.o
+obj-$(CONFIG_PCI_MSI) += msi.o
+obj-$(CONFIG_PCI_MSI_ARCH_FALLBACKS) += legacy.o
--- /dev/null
+++ b/drivers/pci/msi/legacy.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * PCI Message Signaled Interrupt (MSI).
+ *
+ * Legacy architecture specific setup and teardown mechanism.
+ */
+#include <linux/msi.h>
+#include <linux/pci.h>
+
+/* Arch hooks */
+int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
+{
+ return -EINVAL;
+}
+
+void __weak arch_teardown_msi_irq(unsigned int irq)
+{
+}
+
+int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+{
+ struct msi_desc *desc;
+ int ret;
+
+ /*
+ * If an architecture wants to support multiple MSI, it needs to
+ * override arch_setup_msi_irqs()
+ */
+ if (type == PCI_CAP_ID_MSI && nvec > 1)
+ return 1;
+
+ for_each_pci_msi_entry(desc, dev) {
+ ret = arch_setup_msi_irq(dev, desc);
+ if (ret)
+ return ret < 0 ? ret : -ENOSPC;
+ }
+
+ return 0;
+}
+
+void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
+{
+ struct msi_desc *desc;
+ int i;
+
+ for_each_pci_msi_entry(desc, dev) {
+ if (desc->irq) {
+ for (i = 0; i < desc->nvec_used; i++)
+ arch_teardown_msi_irq(desc->irq + i);
+ }
+ }
+}
--- a/drivers/pci/msi/msi.c
+++ b/drivers/pci/msi/msi.c
@@ -50,52 +50,6 @@ static void pci_msi_teardown_msi_irqs(st
#define pci_msi_teardown_msi_irqs arch_teardown_msi_irqs
#endif
-#ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS
-/* Arch hooks */
-int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
-{
- return -EINVAL;
-}
-
-void __weak arch_teardown_msi_irq(unsigned int irq)
-{
-}
-
-int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
-{
- struct msi_desc *entry;
- int ret;
-
- /*
- * If an architecture wants to support multiple MSI, it needs to
- * override arch_setup_msi_irqs()
- */
- if (type == PCI_CAP_ID_MSI && nvec > 1)
- return 1;
-
- for_each_pci_msi_entry(entry, dev) {
- ret = arch_setup_msi_irq(dev, entry);
- if (ret < 0)
- return ret;
- if (ret > 0)
- return -ENOSPC;
- }
-
- return 0;
-}
-
-void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
-{
- int i;
- struct msi_desc *entry;
-
- for_each_pci_msi_entry(entry, dev)
- if (entry->irq)
- for (i = 0; i < entry->nvec_used; i++)
- arch_teardown_msi_irq(entry->irq + i);
-}
-#endif /* CONFIG_PCI_MSI_ARCH_FALLBACKS */
-
/*
* PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
* mask all MSI interrupts by clearing the MSI enable bit does not work
^ permalink raw reply
* [patch V2 18/23] PCI/MSI: Split out irqdomain code
From: Thomas Gleixner @ 2021-12-06 22:27 UTC (permalink / raw)
To: LKML
Cc: linux-hyperv, Paul Mackerras, sparclinux, Wei Liu, Ashok Raj, x86,
Christian Borntraeger, Bjorn Helgaas, Megha Dey, Jason Gunthorpe,
linux-pci, xen-devel, ath11k, Kevin Tian, Heiko Carstens,
Alex Williamson, Cedric Le Goater, Kalle Valo, Juergen Gross,
Thomas Bogendoerfer, Greg Kroah-Hartman, linux-mips, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210147.872865823@linutronix.de>
Move the irqdomain specific code into it's own file.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
---
drivers/pci/msi/Makefile | 1
drivers/pci/msi/irqdomain.c | 279 ++++++++++++++++++++++++++++++++++++++
drivers/pci/msi/legacy.c | 13 +
drivers/pci/msi/msi.c | 319 +-------------------------------------------
drivers/pci/msi/msi.h | 39 +++++
include/linux/msi.h | 11 -
6 files changed, 340 insertions(+), 322 deletions(-)
--- a/drivers/pci/msi/Makefile
+++ b/drivers/pci/msi/Makefile
@@ -3,4 +3,5 @@
# Makefile for the PCI/MSI
obj-$(CONFIG_PCI) += pcidev_msi.o
obj-$(CONFIG_PCI_MSI) += msi.o
+obj-$(CONFIG_PCI_MSI_IRQ_DOMAIN) += irqdomain.o
obj-$(CONFIG_PCI_MSI_ARCH_FALLBACKS) += legacy.o
--- /dev/null
+++ b/drivers/pci/msi/irqdomain.c
@@ -0,0 +1,279 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * PCI Message Signaled Interrupt (MSI) - irqdomain support
+ */
+#include <linux/acpi_iort.h>
+#include <linux/irqdomain.h>
+#include <linux/of_irq.h>
+
+#include "msi.h"
+
+int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+{
+ struct irq_domain *domain;
+
+ domain = dev_get_msi_domain(&dev->dev);
+ if (domain && irq_domain_is_hierarchy(domain))
+ return msi_domain_alloc_irqs(domain, &dev->dev, nvec);
+
+ return pci_msi_legacy_setup_msi_irqs(dev, nvec, type);
+}
+
+void pci_msi_teardown_msi_irqs(struct pci_dev *dev)
+{
+ struct irq_domain *domain;
+
+ domain = dev_get_msi_domain(&dev->dev);
+ if (domain && irq_domain_is_hierarchy(domain))
+ msi_domain_free_irqs(domain, &dev->dev);
+ else
+ pci_msi_legacy_teardown_msi_irqs(dev);
+}
+
+/**
+ * pci_msi_domain_write_msg - Helper to write MSI message to PCI config space
+ * @irq_data: Pointer to interrupt data of the MSI interrupt
+ * @msg: Pointer to the message
+ */
+static void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg)
+{
+ struct msi_desc *desc = irq_data_get_msi_desc(irq_data);
+
+ /*
+ * For MSI-X desc->irq is always equal to irq_data->irq. For
+ * MSI only the first interrupt of MULTI MSI passes the test.
+ */
+ if (desc->irq == irq_data->irq)
+ __pci_write_msi_msg(desc, msg);
+}
+
+/**
+ * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
+ * @desc: Pointer to the MSI descriptor
+ *
+ * The ID number is only used within the irqdomain.
+ */
+static irq_hw_number_t pci_msi_domain_calc_hwirq(struct msi_desc *desc)
+{
+ struct pci_dev *dev = msi_desc_to_pci_dev(desc);
+
+ return (irq_hw_number_t)desc->pci.msi_attrib.entry_nr |
+ pci_dev_id(dev) << 11 |
+ (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27;
+}
+
+static inline bool pci_msi_desc_is_multi_msi(struct msi_desc *desc)
+{
+ return !desc->pci.msi_attrib.is_msix && desc->nvec_used > 1;
+}
+
+/**
+ * pci_msi_domain_check_cap - Verify that @domain supports the capabilities
+ * for @dev
+ * @domain: The interrupt domain to check
+ * @info: The domain info for verification
+ * @dev: The device to check
+ *
+ * Returns:
+ * 0 if the functionality is supported
+ * 1 if Multi MSI is requested, but the domain does not support it
+ * -ENOTSUPP otherwise
+ */
+int pci_msi_domain_check_cap(struct irq_domain *domain,
+ struct msi_domain_info *info, struct device *dev)
+{
+ struct msi_desc *desc = first_pci_msi_entry(to_pci_dev(dev));
+
+ /* Special handling to support __pci_enable_msi_range() */
+ if (pci_msi_desc_is_multi_msi(desc) &&
+ !(info->flags & MSI_FLAG_MULTI_PCI_MSI))
+ return 1;
+ else if (desc->pci.msi_attrib.is_msix && !(info->flags & MSI_FLAG_PCI_MSIX))
+ return -ENOTSUPP;
+
+ return 0;
+}
+
+static int pci_msi_domain_handle_error(struct irq_domain *domain,
+ struct msi_desc *desc, int error)
+{
+ /* Special handling to support __pci_enable_msi_range() */
+ if (pci_msi_desc_is_multi_msi(desc) && error == -ENOSPC)
+ return 1;
+
+ return error;
+}
+
+static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
+ struct msi_desc *desc)
+{
+ arg->desc = desc;
+ arg->hwirq = pci_msi_domain_calc_hwirq(desc);
+}
+
+static struct msi_domain_ops pci_msi_domain_ops_default = {
+ .set_desc = pci_msi_domain_set_desc,
+ .msi_check = pci_msi_domain_check_cap,
+ .handle_error = pci_msi_domain_handle_error,
+};
+
+static void pci_msi_domain_update_dom_ops(struct msi_domain_info *info)
+{
+ struct msi_domain_ops *ops = info->ops;
+
+ if (ops == NULL) {
+ info->ops = &pci_msi_domain_ops_default;
+ } else {
+ if (ops->set_desc == NULL)
+ ops->set_desc = pci_msi_domain_set_desc;
+ if (ops->msi_check == NULL)
+ ops->msi_check = pci_msi_domain_check_cap;
+ if (ops->handle_error == NULL)
+ ops->handle_error = pci_msi_domain_handle_error;
+ }
+}
+
+static void pci_msi_domain_update_chip_ops(struct msi_domain_info *info)
+{
+ struct irq_chip *chip = info->chip;
+
+ BUG_ON(!chip);
+ if (!chip->irq_write_msi_msg)
+ chip->irq_write_msi_msg = pci_msi_domain_write_msg;
+ if (!chip->irq_mask)
+ chip->irq_mask = pci_msi_mask_irq;
+ if (!chip->irq_unmask)
+ chip->irq_unmask = pci_msi_unmask_irq;
+}
+
+/**
+ * pci_msi_create_irq_domain - Create a MSI interrupt domain
+ * @fwnode: Optional fwnode of the interrupt controller
+ * @info: MSI domain info
+ * @parent: Parent irq domain
+ *
+ * Updates the domain and chip ops and creates a MSI interrupt domain.
+ *
+ * Returns:
+ * A domain pointer or NULL in case of failure.
+ */
+struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
+ struct msi_domain_info *info,
+ struct irq_domain *parent)
+{
+ struct irq_domain *domain;
+
+ if (WARN_ON(info->flags & MSI_FLAG_LEVEL_CAPABLE))
+ info->flags &= ~MSI_FLAG_LEVEL_CAPABLE;
+
+ if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
+ pci_msi_domain_update_dom_ops(info);
+ if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
+ pci_msi_domain_update_chip_ops(info);
+
+ info->flags |= MSI_FLAG_ACTIVATE_EARLY;
+ if (IS_ENABLED(CONFIG_GENERIC_IRQ_RESERVATION_MODE))
+ info->flags |= MSI_FLAG_MUST_REACTIVATE;
+
+ /* PCI-MSI is oneshot-safe */
+ info->chip->flags |= IRQCHIP_ONESHOT_SAFE;
+
+ domain = msi_create_irq_domain(fwnode, info, parent);
+ if (!domain)
+ return NULL;
+
+ irq_domain_update_bus_token(domain, DOMAIN_BUS_PCI_MSI);
+ return domain;
+}
+EXPORT_SYMBOL_GPL(pci_msi_create_irq_domain);
+
+/*
+ * Users of the generic MSI infrastructure expect a device to have a single ID,
+ * so with DMA aliases we have to pick the least-worst compromise. Devices with
+ * DMA phantom functions tend to still emit MSIs from the real function number,
+ * so we ignore those and only consider topological aliases where either the
+ * alias device or RID appears on a different bus number. We also make the
+ * reasonable assumption that bridges are walked in an upstream direction (so
+ * the last one seen wins), and the much braver assumption that the most likely
+ * case is that of PCI->PCIe so we should always use the alias RID. This echoes
+ * the logic from intel_irq_remapping's set_msi_sid(), which presumably works
+ * well enough in practice; in the face of the horrible PCIe<->PCI-X conditions
+ * for taking ownership all we can really do is close our eyes and hope...
+ */
+static int get_msi_id_cb(struct pci_dev *pdev, u16 alias, void *data)
+{
+ u32 *pa = data;
+ u8 bus = PCI_BUS_NUM(*pa);
+
+ if (pdev->bus->number != bus || PCI_BUS_NUM(alias) != bus)
+ *pa = alias;
+
+ return 0;
+}
+
+/**
+ * pci_msi_domain_get_msi_rid - Get the MSI requester id (RID)
+ * @domain: The interrupt domain
+ * @pdev: The PCI device.
+ *
+ * The RID for a device is formed from the alias, with a firmware
+ * supplied mapping applied
+ *
+ * Returns: The RID.
+ */
+u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev)
+{
+ struct device_node *of_node;
+ u32 rid = pci_dev_id(pdev);
+
+ pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
+
+ of_node = irq_domain_get_of_node(domain);
+ rid = of_node ? of_msi_map_id(&pdev->dev, of_node, rid) :
+ iort_msi_map_id(&pdev->dev, rid);
+
+ return rid;
+}
+
+/**
+ * pci_msi_get_device_domain - Get the MSI domain for a given PCI device
+ * @pdev: The PCI device
+ *
+ * Use the firmware data to find a device-specific MSI domain
+ * (i.e. not one that is set as a default).
+ *
+ * Returns: The corresponding MSI domain or NULL if none has been found.
+ */
+struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
+{
+ struct irq_domain *dom;
+ u32 rid = pci_dev_id(pdev);
+
+ pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
+ dom = of_msi_map_get_device_domain(&pdev->dev, rid, DOMAIN_BUS_PCI_MSI);
+ if (!dom)
+ dom = iort_get_device_domain(&pdev->dev, rid,
+ DOMAIN_BUS_PCI_MSI);
+ return dom;
+}
+
+/**
+ * pci_dev_has_special_msi_domain - Check whether the device is handled by
+ * a non-standard PCI-MSI domain
+ * @pdev: The PCI device to check.
+ *
+ * Returns: True if the device irqdomain or the bus irqdomain is
+ * non-standard PCI/MSI.
+ */
+bool pci_dev_has_special_msi_domain(struct pci_dev *pdev)
+{
+ struct irq_domain *dom = dev_get_msi_domain(&pdev->dev);
+
+ if (!dom)
+ dom = dev_get_msi_domain(&pdev->bus->dev);
+
+ if (!dom)
+ return true;
+
+ return dom->bus_token != DOMAIN_BUS_PCI_MSI;
+}
--- a/drivers/pci/msi/legacy.c
+++ b/drivers/pci/msi/legacy.c
@@ -4,8 +4,7 @@
*
* Legacy architecture specific setup and teardown mechanism.
*/
-#include <linux/msi.h>
-#include <linux/pci.h>
+#include "msi.h"
/* Arch hooks */
int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
@@ -50,3 +49,13 @@ void __weak arch_teardown_msi_irqs(struc
}
}
}
+
+int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+{
+ return arch_setup_msi_irqs(dev, nvec, type);
+}
+
+void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev)
+{
+ arch_teardown_msi_irqs(dev);
+}
--- a/drivers/pci/msi/msi.c
+++ b/drivers/pci/msi/msi.c
@@ -6,64 +6,16 @@
* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
* Copyright (C) 2016 Christoph Hellwig.
*/
-
-#include <linux/acpi_iort.h>
#include <linux/err.h>
#include <linux/export.h>
#include <linux/irq.h>
-#include <linux/irqdomain.h>
-#include <linux/msi.h>
-#include <linux/of_irq.h>
-#include <linux/pci.h>
#include "../pci.h"
+#include "msi.h"
static int pci_msi_enable = 1;
int pci_msi_ignore_mask;
-#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
-
-#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
-static int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
-{
- struct irq_domain *domain;
-
- domain = dev_get_msi_domain(&dev->dev);
- if (domain && irq_domain_is_hierarchy(domain))
- return msi_domain_alloc_irqs(domain, &dev->dev, nvec);
-
- return arch_setup_msi_irqs(dev, nvec, type);
-}
-
-static void pci_msi_teardown_msi_irqs(struct pci_dev *dev)
-{
- struct irq_domain *domain;
-
- domain = dev_get_msi_domain(&dev->dev);
- if (domain && irq_domain_is_hierarchy(domain))
- msi_domain_free_irqs(domain, &dev->dev);
- else
- arch_teardown_msi_irqs(dev);
-}
-#else
-#define pci_msi_setup_msi_irqs arch_setup_msi_irqs
-#define pci_msi_teardown_msi_irqs arch_teardown_msi_irqs
-#endif
-
-/*
- * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
- * mask all MSI interrupts by clearing the MSI enable bit does not work
- * reliably as devices without an INTx disable bit will then generate a
- * level IRQ which will never be cleared.
- */
-static inline __attribute_const__ u32 msi_multi_mask(struct msi_desc *desc)
-{
- /* Don't shift by >= width of type */
- if (desc->pci.msi_attrib.multi_cap >= 5)
- return 0xffffffff;
- return (1 << (1 << desc->pci.msi_attrib.multi_cap)) - 1;
-}
-
static noinline void pci_msi_update_mask(struct msi_desc *desc, u32 clear, u32 set)
{
raw_spinlock_t *lock = &desc->dev->msi_lock;
@@ -903,23 +855,6 @@ void pci_disable_msix(struct pci_dev *de
}
EXPORT_SYMBOL(pci_disable_msix);
-void pci_no_msi(void)
-{
- pci_msi_enable = 0;
-}
-
-/**
- * pci_msi_enabled - is MSI enabled?
- *
- * Returns true if MSI has not been disabled by the command-line option
- * pci=nomsi.
- **/
-int pci_msi_enabled(void)
-{
- return pci_msi_enable;
-}
-EXPORT_SYMBOL(pci_msi_enabled);
-
static int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec,
struct irq_affinity *affd)
{
@@ -1195,253 +1130,19 @@ struct pci_dev *msi_desc_to_pci_dev(stru
}
EXPORT_SYMBOL(msi_desc_to_pci_dev);
-#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
-/**
- * pci_msi_domain_write_msg - Helper to write MSI message to PCI config space
- * @irq_data: Pointer to interrupt data of the MSI interrupt
- * @msg: Pointer to the message
- */
-static void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg)
-{
- struct msi_desc *desc = irq_data_get_msi_desc(irq_data);
-
- /*
- * For MSI-X desc->irq is always equal to irq_data->irq. For
- * MSI only the first interrupt of MULTI MSI passes the test.
- */
- if (desc->irq == irq_data->irq)
- __pci_write_msi_msg(desc, msg);
-}
-
-/**
- * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
- * @desc: Pointer to the MSI descriptor
- *
- * The ID number is only used within the irqdomain.
- */
-static irq_hw_number_t pci_msi_domain_calc_hwirq(struct msi_desc *desc)
-{
- struct pci_dev *dev = msi_desc_to_pci_dev(desc);
-
- return (irq_hw_number_t)desc->pci.msi_attrib.entry_nr |
- pci_dev_id(dev) << 11 |
- (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27;
-}
-
-static inline bool pci_msi_desc_is_multi_msi(struct msi_desc *desc)
-{
- return !desc->pci.msi_attrib.is_msix && desc->nvec_used > 1;
-}
-
-/**
- * pci_msi_domain_check_cap - Verify that @domain supports the capabilities
- * for @dev
- * @domain: The interrupt domain to check
- * @info: The domain info for verification
- * @dev: The device to check
- *
- * Returns:
- * 0 if the functionality is supported
- * 1 if Multi MSI is requested, but the domain does not support it
- * -ENOTSUPP otherwise
- */
-int pci_msi_domain_check_cap(struct irq_domain *domain,
- struct msi_domain_info *info, struct device *dev)
-{
- struct msi_desc *desc = first_pci_msi_entry(to_pci_dev(dev));
-
- /* Special handling to support __pci_enable_msi_range() */
- if (pci_msi_desc_is_multi_msi(desc) &&
- !(info->flags & MSI_FLAG_MULTI_PCI_MSI))
- return 1;
- else if (desc->pci.msi_attrib.is_msix && !(info->flags & MSI_FLAG_PCI_MSIX))
- return -ENOTSUPP;
-
- return 0;
-}
-
-static int pci_msi_domain_handle_error(struct irq_domain *domain,
- struct msi_desc *desc, int error)
-{
- /* Special handling to support __pci_enable_msi_range() */
- if (pci_msi_desc_is_multi_msi(desc) && error == -ENOSPC)
- return 1;
-
- return error;
-}
-
-static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
- struct msi_desc *desc)
-{
- arg->desc = desc;
- arg->hwirq = pci_msi_domain_calc_hwirq(desc);
-}
-
-static struct msi_domain_ops pci_msi_domain_ops_default = {
- .set_desc = pci_msi_domain_set_desc,
- .msi_check = pci_msi_domain_check_cap,
- .handle_error = pci_msi_domain_handle_error,
-};
-
-static void pci_msi_domain_update_dom_ops(struct msi_domain_info *info)
-{
- struct msi_domain_ops *ops = info->ops;
-
- if (ops == NULL) {
- info->ops = &pci_msi_domain_ops_default;
- } else {
- if (ops->set_desc == NULL)
- ops->set_desc = pci_msi_domain_set_desc;
- if (ops->msi_check == NULL)
- ops->msi_check = pci_msi_domain_check_cap;
- if (ops->handle_error == NULL)
- ops->handle_error = pci_msi_domain_handle_error;
- }
-}
-
-static void pci_msi_domain_update_chip_ops(struct msi_domain_info *info)
-{
- struct irq_chip *chip = info->chip;
-
- BUG_ON(!chip);
- if (!chip->irq_write_msi_msg)
- chip->irq_write_msi_msg = pci_msi_domain_write_msg;
- if (!chip->irq_mask)
- chip->irq_mask = pci_msi_mask_irq;
- if (!chip->irq_unmask)
- chip->irq_unmask = pci_msi_unmask_irq;
-}
-
-/**
- * pci_msi_create_irq_domain - Create a MSI interrupt domain
- * @fwnode: Optional fwnode of the interrupt controller
- * @info: MSI domain info
- * @parent: Parent irq domain
- *
- * Updates the domain and chip ops and creates a MSI interrupt domain.
- *
- * Returns:
- * A domain pointer or NULL in case of failure.
- */
-struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
- struct msi_domain_info *info,
- struct irq_domain *parent)
-{
- struct irq_domain *domain;
-
- if (WARN_ON(info->flags & MSI_FLAG_LEVEL_CAPABLE))
- info->flags &= ~MSI_FLAG_LEVEL_CAPABLE;
-
- if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
- pci_msi_domain_update_dom_ops(info);
- if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
- pci_msi_domain_update_chip_ops(info);
-
- info->flags |= MSI_FLAG_ACTIVATE_EARLY;
- if (IS_ENABLED(CONFIG_GENERIC_IRQ_RESERVATION_MODE))
- info->flags |= MSI_FLAG_MUST_REACTIVATE;
-
- /* PCI-MSI is oneshot-safe */
- info->chip->flags |= IRQCHIP_ONESHOT_SAFE;
-
- domain = msi_create_irq_domain(fwnode, info, parent);
- if (!domain)
- return NULL;
-
- irq_domain_update_bus_token(domain, DOMAIN_BUS_PCI_MSI);
- return domain;
-}
-EXPORT_SYMBOL_GPL(pci_msi_create_irq_domain);
-
-/*
- * Users of the generic MSI infrastructure expect a device to have a single ID,
- * so with DMA aliases we have to pick the least-worst compromise. Devices with
- * DMA phantom functions tend to still emit MSIs from the real function number,
- * so we ignore those and only consider topological aliases where either the
- * alias device or RID appears on a different bus number. We also make the
- * reasonable assumption that bridges are walked in an upstream direction (so
- * the last one seen wins), and the much braver assumption that the most likely
- * case is that of PCI->PCIe so we should always use the alias RID. This echoes
- * the logic from intel_irq_remapping's set_msi_sid(), which presumably works
- * well enough in practice; in the face of the horrible PCIe<->PCI-X conditions
- * for taking ownership all we can really do is close our eyes and hope...
- */
-static int get_msi_id_cb(struct pci_dev *pdev, u16 alias, void *data)
-{
- u32 *pa = data;
- u8 bus = PCI_BUS_NUM(*pa);
-
- if (pdev->bus->number != bus || PCI_BUS_NUM(alias) != bus)
- *pa = alias;
-
- return 0;
-}
-
-/**
- * pci_msi_domain_get_msi_rid - Get the MSI requester id (RID)
- * @domain: The interrupt domain
- * @pdev: The PCI device.
- *
- * The RID for a device is formed from the alias, with a firmware
- * supplied mapping applied
- *
- * Returns: The RID.
- */
-u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev)
-{
- struct device_node *of_node;
- u32 rid = pci_dev_id(pdev);
-
- pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
-
- of_node = irq_domain_get_of_node(domain);
- rid = of_node ? of_msi_map_id(&pdev->dev, of_node, rid) :
- iort_msi_map_id(&pdev->dev, rid);
-
- return rid;
-}
-
-/**
- * pci_msi_get_device_domain - Get the MSI domain for a given PCI device
- * @pdev: The PCI device
- *
- * Use the firmware data to find a device-specific MSI domain
- * (i.e. not one that is set as a default).
- *
- * Returns: The corresponding MSI domain or NULL if none has been found.
- */
-struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
+void pci_no_msi(void)
{
- struct irq_domain *dom;
- u32 rid = pci_dev_id(pdev);
-
- pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
- dom = of_msi_map_get_device_domain(&pdev->dev, rid, DOMAIN_BUS_PCI_MSI);
- if (!dom)
- dom = iort_get_device_domain(&pdev->dev, rid,
- DOMAIN_BUS_PCI_MSI);
- return dom;
+ pci_msi_enable = 0;
}
/**
- * pci_dev_has_special_msi_domain - Check whether the device is handled by
- * a non-standard PCI-MSI domain
- * @pdev: The PCI device to check.
+ * pci_msi_enabled - is MSI enabled?
*
- * Returns: True if the device irqdomain or the bus irqdomain is
- * non-standard PCI/MSI.
- */
-bool pci_dev_has_special_msi_domain(struct pci_dev *pdev)
+ * Returns true if MSI has not been disabled by the command-line option
+ * pci=nomsi.
+ **/
+int pci_msi_enabled(void)
{
- struct irq_domain *dom = dev_get_msi_domain(&pdev->dev);
-
- if (!dom)
- dom = dev_get_msi_domain(&pdev->bus->dev);
-
- if (!dom)
- return true;
-
- return dom->bus_token != DOMAIN_BUS_PCI_MSI;
+ return pci_msi_enable;
}
-
-#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
+EXPORT_SYMBOL(pci_msi_enabled);
--- /dev/null
+++ b/drivers/pci/msi/msi.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#include <linux/pci.h>
+#include <linux/msi.h>
+
+#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
+
+extern int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
+extern void pci_msi_teardown_msi_irqs(struct pci_dev *dev);
+
+#ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS
+extern int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
+extern void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev);
+#else
+static inline int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+{
+ WARN_ON_ONCE(1);
+ return -ENODEV;
+}
+
+static inline void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev)
+{
+ WARN_ON_ONCE(1);
+}
+#endif
+
+/*
+ * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
+ * mask all MSI interrupts by clearing the MSI enable bit does not work
+ * reliably as devices without an INTx disable bit will then generate a
+ * level IRQ which will never be cleared.
+ */
+static inline __attribute_const__ u32 msi_multi_mask(struct msi_desc *desc)
+{
+ /* Don't shift by >= width of type */
+ if (desc->pci.msi_attrib.multi_cap >= 5)
+ return 0xffffffff;
+ return (1 << (1 << desc->pci.msi_attrib.multi_cap)) - 1;
+}
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -259,17 +259,6 @@ int arch_setup_msi_irq(struct pci_dev *d
void arch_teardown_msi_irq(unsigned int irq);
int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
void arch_teardown_msi_irqs(struct pci_dev *dev);
-#else
-static inline int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
-{
- WARN_ON_ONCE(1);
- return -ENODEV;
-}
-
-static inline void arch_teardown_msi_irqs(struct pci_dev *dev)
-{
- WARN_ON_ONCE(1);
-}
#endif
/*
^ permalink raw reply
* [patch V2 19/23] PCI/MSI: Sanitize MSIX table map handling
From: Thomas Gleixner @ 2021-12-06 22:27 UTC (permalink / raw)
To: LKML
Cc: linux-hyperv, Paul Mackerras, sparclinux, Wei Liu, Ashok Raj, x86,
Christian Borntraeger, Bjorn Helgaas, Megha Dey, Jason Gunthorpe,
linux-pci, xen-devel, ath11k, Kevin Tian, Heiko Carstens,
Alex Williamson, Cedric Le Goater, Kalle Valo, Juergen Gross,
Thomas Bogendoerfer, Greg Kroah-Hartman, linux-mips, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210147.872865823@linutronix.de>
Unmapping the MSIX base mapping in the loops which allocate/free MSI
desciptors is daft and in the way of allowing runtime expansion of MSI-X
descriptors.
Store the mapping in struct pci_dev and free it after freeing the MSI-X
descriptors.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
---
drivers/pci/msi/msi.c | 18 ++++++++----------
include/linux/pci.h | 1 +
2 files changed, 9 insertions(+), 10 deletions(-)
--- a/drivers/pci/msi/msi.c
+++ b/drivers/pci/msi/msi.c
@@ -241,14 +241,14 @@ static void free_msi_irqs(struct pci_dev
pci_msi_teardown_msi_irqs(dev);
list_for_each_entry_safe(entry, tmp, msi_list, list) {
- if (entry->pci.msi_attrib.is_msix) {
- if (list_is_last(&entry->list, msi_list))
- iounmap(entry->pci.mask_base);
- }
-
list_del(&entry->list);
free_msi_entry(entry);
}
+
+ if (dev->msix_base) {
+ iounmap(dev->msix_base);
+ dev->msix_base = NULL;
+ }
}
static void pci_intx_for_msi(struct pci_dev *dev, int enable)
@@ -501,10 +501,6 @@ static int msix_setup_entries(struct pci
for (i = 0, curmsk = masks; i < nvec; i++) {
entry = alloc_msi_entry(&dev->dev, 1, curmsk);
if (!entry) {
- if (!i)
- iounmap(base);
- else
- free_msi_irqs(dev);
/* No enough memory. Don't try again */
ret = -ENOMEM;
goto out;
@@ -602,12 +598,14 @@ static int msix_capability_init(struct p
goto out_disable;
}
+ dev->msix_base = base;
+
/* Ensure that all table entries are masked. */
msix_mask_all(base, tsize);
ret = msix_setup_entries(dev, base, entries, nvec, affd);
if (ret)
- goto out_disable;
+ goto out_free;
ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
if (ret)
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -473,6 +473,7 @@ struct pci_dev {
u8 ptm_granularity;
#endif
#ifdef CONFIG_PCI_MSI
+ void __iomem *msix_base;
const struct attribute_group **msi_irq_groups;
#endif
struct pci_vpd vpd;
^ permalink raw reply
* [patch V2 20/23] PCI/MSI: Move msi_lock to struct pci_dev
From: Thomas Gleixner @ 2021-12-06 22:27 UTC (permalink / raw)
To: LKML
Cc: linux-hyperv, Paul Mackerras, sparclinux, Wei Liu, Ashok Raj, x86,
Christian Borntraeger, Bjorn Helgaas, Megha Dey, Jason Gunthorpe,
linux-pci, xen-devel, ath11k, Kevin Tian, Heiko Carstens,
Alex Williamson, Cedric Le Goater, Kalle Valo, Juergen Gross,
Thomas Bogendoerfer, Greg Kroah-Hartman, linux-mips, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210147.872865823@linutronix.de>
It's only required for PCI/MSI. So no point in having it in every struct
device.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V2: New patch
---
drivers/base/core.c | 1 -
drivers/pci/msi/msi.c | 2 +-
drivers/pci/probe.c | 4 +++-
include/linux/device.h | 2 --
include/linux/pci.h | 1 +
5 files changed, 5 insertions(+), 5 deletions(-)
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
@@ -2875,7 +2875,6 @@ void device_initialize(struct device *de
device_pm_init(dev);
set_dev_node(dev, NUMA_NO_NODE);
#ifdef CONFIG_GENERIC_MSI_IRQ
- raw_spin_lock_init(&dev->msi_lock);
INIT_LIST_HEAD(&dev->msi_list);
#endif
INIT_LIST_HEAD(&dev->links.consumers);
--- a/drivers/pci/msi/msi.c
+++ b/drivers/pci/msi/msi.c
@@ -18,7 +18,7 @@ int pci_msi_ignore_mask;
static noinline void pci_msi_update_mask(struct msi_desc *desc, u32 clear, u32 set)
{
- raw_spinlock_t *lock = &desc->dev->msi_lock;
+ raw_spinlock_t *lock = &to_pci_dev(desc->dev)->msi_lock;
unsigned long flags;
if (!desc->pci.msi_attrib.can_mask)
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -2311,7 +2311,9 @@ struct pci_dev *pci_alloc_dev(struct pci
INIT_LIST_HEAD(&dev->bus_list);
dev->dev.type = &pci_dev_type;
dev->bus = pci_bus_get(bus);
-
+#ifdef CONFIG_PCI_MSI
+ raw_spin_lock_init(&dev->msi_lock);
+#endif
return dev;
}
EXPORT_SYMBOL(pci_alloc_dev);
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -407,7 +407,6 @@ struct dev_links_info {
* @em_pd: device's energy model performance domain
* @pins: For device pin management.
* See Documentation/driver-api/pin-control.rst for details.
- * @msi_lock: Lock to protect MSI mask cache and mask register
* @msi_list: Hosts MSI descriptors
* @msi_domain: The generic MSI domain this device is using.
* @numa_node: NUMA node this device is close to.
@@ -508,7 +507,6 @@ struct device {
struct dev_pin_info *pins;
#endif
#ifdef CONFIG_GENERIC_MSI_IRQ
- raw_spinlock_t msi_lock;
struct list_head msi_list;
#endif
#ifdef CONFIG_DMA_OPS
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -474,6 +474,7 @@ struct pci_dev {
#endif
#ifdef CONFIG_PCI_MSI
void __iomem *msix_base;
+ raw_spinlock_t msi_lock;
const struct attribute_group **msi_irq_groups;
#endif
struct pci_vpd vpd;
^ permalink raw reply
* [patch V2 21/23] PCI/MSI: Make pci_msi_domain_check_cap() static
From: Thomas Gleixner @ 2021-12-06 22:27 UTC (permalink / raw)
To: LKML
Cc: linux-hyperv, Paul Mackerras, sparclinux, Wei Liu, Ashok Raj, x86,
Christian Borntraeger, Bjorn Helgaas, Megha Dey, Jason Gunthorpe,
linux-pci, xen-devel, ath11k, Kevin Tian, Heiko Carstens,
Alex Williamson, Cedric Le Goater, Kalle Valo, Juergen Gross,
Thomas Bogendoerfer, Greg Kroah-Hartman, linux-mips, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210147.872865823@linutronix.de>
No users outside of that file.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
---
drivers/pci/msi/irqdomain.c | 5 +++--
include/linux/msi.h | 2 --
2 files changed, 3 insertions(+), 4 deletions(-)
--- a/drivers/pci/msi/irqdomain.c
+++ b/drivers/pci/msi/irqdomain.c
@@ -79,8 +79,9 @@ static inline bool pci_msi_desc_is_multi
* 1 if Multi MSI is requested, but the domain does not support it
* -ENOTSUPP otherwise
*/
-int pci_msi_domain_check_cap(struct irq_domain *domain,
- struct msi_domain_info *info, struct device *dev)
+static int pci_msi_domain_check_cap(struct irq_domain *domain,
+ struct msi_domain_info *info,
+ struct device *dev)
{
struct msi_desc *desc = first_pci_msi_entry(to_pci_dev(dev));
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -439,8 +439,6 @@ void *platform_msi_get_host_data(struct
struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
struct msi_domain_info *info,
struct irq_domain *parent);
-int pci_msi_domain_check_cap(struct irq_domain *domain,
- struct msi_domain_info *info, struct device *dev);
u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);
bool pci_dev_has_special_msi_domain(struct pci_dev *pdev);
^ permalink raw reply
* [patch V2 22/23] genirq/msi: Handle PCI/MSI allocation fail in core code
From: Thomas Gleixner @ 2021-12-06 22:27 UTC (permalink / raw)
To: LKML
Cc: linux-hyperv, Paul Mackerras, sparclinux, Wei Liu, Ashok Raj, x86,
Christian Borntraeger, Bjorn Helgaas, Megha Dey, Jason Gunthorpe,
linux-pci, xen-devel, ath11k, Kevin Tian, Heiko Carstens,
Alex Williamson, Cedric Le Goater, Kalle Valo, Juergen Gross,
Thomas Bogendoerfer, Greg Kroah-Hartman, linux-mips, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210147.872865823@linutronix.de>
Get rid of yet another irqdomain callback and let the core code return the
already available information of how many descriptors could be allocated.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
---
drivers/pci/msi/irqdomain.c | 13 -------------
include/linux/msi.h | 5 +----
kernel/irq/msi.c | 29 +++++++++++++++++++++++++----
3 files changed, 26 insertions(+), 21 deletions(-)
--- a/drivers/pci/msi/irqdomain.c
+++ b/drivers/pci/msi/irqdomain.c
@@ -95,16 +95,6 @@ static int pci_msi_domain_check_cap(stru
return 0;
}
-static int pci_msi_domain_handle_error(struct irq_domain *domain,
- struct msi_desc *desc, int error)
-{
- /* Special handling to support __pci_enable_msi_range() */
- if (pci_msi_desc_is_multi_msi(desc) && error == -ENOSPC)
- return 1;
-
- return error;
-}
-
static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
struct msi_desc *desc)
{
@@ -115,7 +105,6 @@ static void pci_msi_domain_set_desc(msi_
static struct msi_domain_ops pci_msi_domain_ops_default = {
.set_desc = pci_msi_domain_set_desc,
.msi_check = pci_msi_domain_check_cap,
- .handle_error = pci_msi_domain_handle_error,
};
static void pci_msi_domain_update_dom_ops(struct msi_domain_info *info)
@@ -129,8 +118,6 @@ static void pci_msi_domain_update_dom_op
ops->set_desc = pci_msi_domain_set_desc;
if (ops->msi_check == NULL)
ops->msi_check = pci_msi_domain_check_cap;
- if (ops->handle_error == NULL)
- ops->handle_error = pci_msi_domain_handle_error;
}
}
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -286,7 +286,6 @@ struct msi_domain_info;
* @msi_check: Callback for verification of the domain/info/dev data
* @msi_prepare: Prepare the allocation of the interrupts in the domain
* @set_desc: Set the msi descriptor for an interrupt
- * @handle_error: Optional error handler if the allocation fails
* @domain_alloc_irqs: Optional function to override the default allocation
* function.
* @domain_free_irqs: Optional function to override the default free
@@ -295,7 +294,7 @@ struct msi_domain_info;
* @get_hwirq, @msi_init and @msi_free are callbacks used by the underlying
* irqdomain.
*
- * @msi_check, @msi_prepare, @handle_error and @set_desc are callbacks used by
+ * @msi_check, @msi_prepare and @set_desc are callbacks used by
* msi_domain_alloc/free_irqs().
*
* @domain_alloc_irqs, @domain_free_irqs can be used to override the
@@ -332,8 +331,6 @@ struct msi_domain_ops {
msi_alloc_info_t *arg);
void (*set_desc)(msi_alloc_info_t *arg,
struct msi_desc *desc);
- int (*handle_error)(struct irq_domain *domain,
- struct msi_desc *desc, int error);
int (*domain_alloc_irqs)(struct irq_domain *domain,
struct device *dev, int nvec);
void (*domain_free_irqs)(struct irq_domain *domain,
--- a/kernel/irq/msi.c
+++ b/kernel/irq/msi.c
@@ -538,6 +538,27 @@ static bool msi_check_reservation_mode(s
return desc->pci.msi_attrib.is_msix || desc->pci.msi_attrib.can_mask;
}
+static int msi_handle_pci_fail(struct irq_domain *domain, struct msi_desc *desc,
+ int allocated)
+{
+ switch(domain->bus_token) {
+ case DOMAIN_BUS_PCI_MSI:
+ case DOMAIN_BUS_VMD_MSI:
+ if (IS_ENABLED(CONFIG_PCI_MSI))
+ break;
+ fallthrough;
+ default:
+ return -ENOSPC;
+ }
+
+ /* Let a failed PCI multi MSI allocation retry */
+ if (desc->nvec_used > 1)
+ return 1;
+
+ /* If there was a successful allocation let the caller know */
+ return allocated ? allocated : -ENOSPC;
+}
+
int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
int nvec)
{
@@ -546,6 +567,7 @@ int __msi_domain_alloc_irqs(struct irq_d
struct irq_data *irq_data;
struct msi_desc *desc;
msi_alloc_info_t arg = { };
+ int allocated = 0;
int i, ret, virq;
bool can_reserve;
@@ -560,16 +582,15 @@ int __msi_domain_alloc_irqs(struct irq_d
dev_to_node(dev), &arg, false,
desc->affinity);
if (virq < 0) {
- ret = -ENOSPC;
- if (ops->handle_error)
- ret = ops->handle_error(domain, desc, ret);
- return ret;
+ ret = msi_handle_pci_fail(domain, desc, allocated);
+ goto cleanup;
}
for (i = 0; i < desc->nvec_used; i++) {
irq_set_msi_desc_off(virq, i, desc);
irq_debugfs_copy_devname(virq + i, dev);
}
+ allocated++;
}
can_reserve = msi_check_reservation_mode(domain, info, dev);
^ permalink raw reply
* [patch V2 23/23] PCI/MSI: Move descriptor counting on allocation fail to the legacy code
From: Thomas Gleixner @ 2021-12-06 22:28 UTC (permalink / raw)
To: LKML
Cc: linux-hyperv, Paul Mackerras, sparclinux, Wei Liu, Ashok Raj, x86,
Christian Borntraeger, Bjorn Helgaas, Megha Dey, Jason Gunthorpe,
linux-pci, xen-devel, ath11k, Kevin Tian, Heiko Carstens,
Alex Williamson, Cedric Le Goater, Kalle Valo, Juergen Gross,
Thomas Bogendoerfer, Greg Kroah-Hartman, linux-mips, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210147.872865823@linutronix.de>
The irqdomain code already returns the information. Move the loop to the
legacy code.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
---
drivers/pci/msi/legacy.c | 20 +++++++++++++++++++-
drivers/pci/msi/msi.c | 19 +------------------
2 files changed, 20 insertions(+), 19 deletions(-)
--- a/drivers/pci/msi/legacy.c
+++ b/drivers/pci/msi/legacy.c
@@ -50,9 +50,27 @@ void __weak arch_teardown_msi_irqs(struc
}
}
+static int pci_msi_setup_check_result(struct pci_dev *dev, int type, int ret)
+{
+ struct msi_desc *entry;
+ int avail = 0;
+
+ if (type != PCI_CAP_ID_MSIX || ret >= 0)
+ return ret;
+
+ /* Scan the MSI descriptors for successfully allocated ones. */
+ for_each_pci_msi_entry(entry, dev) {
+ if (entry->irq != 0)
+ avail++;
+ }
+ return avail ? avail : ret;
+}
+
int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
{
- return arch_setup_msi_irqs(dev, nvec, type);
+ int ret = arch_setup_msi_irqs(dev, nvec, type);
+
+ return pci_msi_setup_check_result(dev, type, ret);
}
void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev)
--- a/drivers/pci/msi/msi.c
+++ b/drivers/pci/msi/msi.c
@@ -609,7 +609,7 @@ static int msix_capability_init(struct p
ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
if (ret)
- goto out_avail;
+ goto out_free;
/* Check if all MSI entries honor device restrictions */
ret = msi_verify_entries(dev);
@@ -634,23 +634,6 @@ static int msix_capability_init(struct p
pcibios_free_irq(dev);
return 0;
-out_avail:
- if (ret < 0) {
- /*
- * If we had some success, report the number of IRQs
- * we succeeded in setting up.
- */
- struct msi_desc *entry;
- int avail = 0;
-
- for_each_pci_msi_entry(entry, dev) {
- if (entry->irq != 0)
- avail++;
- }
- if (avail != 0)
- ret = avail;
- }
-
out_free:
free_msi_irqs(dev);
^ permalink raw reply
* Re: [PATCH v5 5/5] powerpc/inst: Optimise copy_inst_from_kernel_nofault()
From: Michael Ellerman @ 2021-12-07 3:37 UTC (permalink / raw)
To: Bill Wendling, Nathan Chancellor
Cc: kbuild-all, kernel test robot, llvm, Nick Desaulniers,
linux-kernel, Paul Mackerras, linuxppc-dev
In-Reply-To: <CAGG=3QVQ9bwWWyKDN3_C2B0v7H6iZ4ZpNybXGCqbzwWrPjuPrg@mail.gmail.com>
Bill Wendling <morbo@google.com> writes:
> On Tue, Nov 30, 2021 at 10:38 AM Bill Wendling <morbo@google.com> wrote:
>> On Tue, Nov 30, 2021 at 10:17 AM Nathan Chancellor <nathan@kernel.org> wrote:
>> > On Tue, Nov 30, 2021 at 10:25:43PM +1100, Michael Ellerman wrote:
>> > > Christophe Leroy <christophe.leroy@csgroup.eu> writes:
>> > > > Le 29/11/2021 à 23:55, kernel test robot a écrit :
...
>> > > >> All warnings (new ones prefixed by >>):
>> > > >>
>> > > >> In file included from arch/powerpc/kernel/asm-offsets.c:71:
>> > > >> In file included from arch/powerpc/kernel/../xmon/xmon_bpts.h:7:
>> > > >>>> arch/powerpc/include/asm/inst.h:165:20: warning: variable 'val' is uninitialized when used here [-Wuninitialized]
>> > > >> *inst = ppc_inst(val);
>> > > >> ^~~
>> > > >> arch/powerpc/include/asm/inst.h:53:22: note: expanded from macro 'ppc_inst'
>> > > >> #define ppc_inst(x) (x)
>> > > >> ^
>> > > >> arch/powerpc/include/asm/inst.h:155:18: note: initialize the variable 'val' to silence this warning
>> > > >> unsigned int val, suffix;
>> > > >> ^
>> > > >> = 0
>> > > >
>> > > > I can't understand what's wrong here.
...
>> > > >
>> > > > I see no possibility, no alternative path where val wouldn't be set. The
>> > > > asm clearly has *addr as an output param so it is always set.
>> > >
>> > > I guess clang can't convince itself of that?
...
>> >
>> > It certainly looks like there is something wrong with how clang is
>> > tracking the initialization of the variable because it looks to me like
>> > val is only used in the fallthrough path, which happens after it is
>> > initialized via lwz. Perhaps something is wrong with the logic of
>> > https://reviews.llvm.org/D71314? I've added Bill to CC (LLVM issues are
>> > being migrated from Bugzilla to GitHub Issues right now so I cannot file
>> > this upstream at the moment).
>> >
>> If I remove the casts of "val" the warning doesn't appear. I suspect
>> that when I wrote that patch I forgot to remove those when checking.
>> #include "Captain_Picard_facepalm.h"
>>
>> I'll look into it.
>>
> Small retraction. It's the "*(<cast>)&val" that's the issue. (I.e. the "*&")
I guess for now I'll just squash this in as a workaround?
diff --git a/arch/powerpc/include/asm/inst.h b/arch/powerpc/include/asm/inst.h
index 631436f3f5c3..5b591c51fec9 100644
--- a/arch/powerpc/include/asm/inst.h
+++ b/arch/powerpc/include/asm/inst.h
@@ -157,6 +157,9 @@ static inline int copy_inst_from_kernel_nofault(ppc_inst_t *inst, u32 *src)
if (unlikely(!is_kernel_addr((unsigned long)src)))
return -ERANGE;
+#ifdef CONFIG_CC_IS_CLANG
+ val = suffix = 0;
+#endif
__get_kernel_nofault(&val, src, u32, Efault);
if (IS_ENABLED(CONFIG_PPC64) && get_op(val) == OP_PREFIX) {
__get_kernel_nofault(&suffix, src + 1, u32, Efault);
cheers
^ permalink raw reply related
* Re: [PATCH v5 5/5] powerpc/inst: Optimise copy_inst_from_kernel_nofault()
From: Nathan Chancellor @ 2021-12-07 4:48 UTC (permalink / raw)
To: Michael Ellerman
Cc: kbuild-all, kernel test robot, llvm, Nick Desaulniers,
linux-kernel, Paul Mackerras, Bill Wendling, linuxppc-dev
In-Reply-To: <87o85tnkzt.fsf@mpe.ellerman.id.au>
On Tue, Dec 07, 2021 at 02:37:26PM +1100, Michael Ellerman wrote:
> Bill Wendling <morbo@google.com> writes:
> > On Tue, Nov 30, 2021 at 10:38 AM Bill Wendling <morbo@google.com> wrote:
> >> On Tue, Nov 30, 2021 at 10:17 AM Nathan Chancellor <nathan@kernel.org> wrote:
> >> > On Tue, Nov 30, 2021 at 10:25:43PM +1100, Michael Ellerman wrote:
> >> > > Christophe Leroy <christophe.leroy@csgroup.eu> writes:
> >> > > > Le 29/11/2021 à 23:55, kernel test robot a écrit :
> ...
> >> > > >> All warnings (new ones prefixed by >>):
> >> > > >>
> >> > > >> In file included from arch/powerpc/kernel/asm-offsets.c:71:
> >> > > >> In file included from arch/powerpc/kernel/../xmon/xmon_bpts.h:7:
> >> > > >>>> arch/powerpc/include/asm/inst.h:165:20: warning: variable 'val' is uninitialized when used here [-Wuninitialized]
> >> > > >> *inst = ppc_inst(val);
> >> > > >> ^~~
> >> > > >> arch/powerpc/include/asm/inst.h:53:22: note: expanded from macro 'ppc_inst'
> >> > > >> #define ppc_inst(x) (x)
> >> > > >> ^
> >> > > >> arch/powerpc/include/asm/inst.h:155:18: note: initialize the variable 'val' to silence this warning
> >> > > >> unsigned int val, suffix;
> >> > > >> ^
> >> > > >> = 0
> >> > > >
> >> > > > I can't understand what's wrong here.
> ...
> >> > > >
> >> > > > I see no possibility, no alternative path where val wouldn't be set. The
> >> > > > asm clearly has *addr as an output param so it is always set.
> >> > >
> >> > > I guess clang can't convince itself of that?
> ...
> >> >
> >> > It certainly looks like there is something wrong with how clang is
> >> > tracking the initialization of the variable because it looks to me like
> >> > val is only used in the fallthrough path, which happens after it is
> >> > initialized via lwz. Perhaps something is wrong with the logic of
> >> > https://reviews.llvm.org/D71314? I've added Bill to CC (LLVM issues are
> >> > being migrated from Bugzilla to GitHub Issues right now so I cannot file
> >> > this upstream at the moment).
> >> >
> >> If I remove the casts of "val" the warning doesn't appear. I suspect
> >> that when I wrote that patch I forgot to remove those when checking.
> >> #include "Captain_Picard_facepalm.h"
> >>
> >> I'll look into it.
> >>
> > Small retraction. It's the "*(<cast>)&val" that's the issue. (I.e. the "*&")
>
> I guess for now I'll just squash this in as a workaround?
>
>
> diff --git a/arch/powerpc/include/asm/inst.h b/arch/powerpc/include/asm/inst.h
> index 631436f3f5c3..5b591c51fec9 100644
> --- a/arch/powerpc/include/asm/inst.h
> +++ b/arch/powerpc/include/asm/inst.h
> @@ -157,6 +157,9 @@ static inline int copy_inst_from_kernel_nofault(ppc_inst_t *inst, u32 *src)
> if (unlikely(!is_kernel_addr((unsigned long)src)))
> return -ERANGE;
Could we add a version check to this and a link to our bug tracker:
/* https://github.com/ClangBuiltLinux/linux/issues/1521 */
#if defined(CONFIG_CC_IS_CLANG) && CONFIG_CLANG_VERSION < 140000
> +#ifdef CONFIG_CC_IS_CLANG
> + val = suffix = 0;
> +#endif
> __get_kernel_nofault(&val, src, u32, Efault);
> if (IS_ENABLED(CONFIG_PPC64) && get_op(val) == OP_PREFIX) {
> __get_kernel_nofault(&suffix, src + 1, u32, Efault);
>
>
>
> cheers
^ permalink raw reply
* Re: [PATCH v5 5/5] powerpc/inst: Optimise copy_inst_from_kernel_nofault()
From: Christophe Leroy @ 2021-12-07 5:45 UTC (permalink / raw)
To: Nathan Chancellor, Michael Ellerman
Cc: kbuild-all@lists.01.org, kernel test robot, llvm@lists.linux.dev,
Nick Desaulniers, linux-kernel@vger.kernel.org, Paul Mackerras,
Bill Wendling, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <Ya7ntJ0ehZPy6HKA@archlinux-ax161>
Le 07/12/2021 à 05:48, Nathan Chancellor a écrit :
> On Tue, Dec 07, 2021 at 02:37:26PM +1100, Michael Ellerman wrote:
>> Bill Wendling <morbo@google.com> writes:
>>> On Tue, Nov 30, 2021 at 10:38 AM Bill Wendling <morbo@google.com> wrote:
>>>> On Tue, Nov 30, 2021 at 10:17 AM Nathan Chancellor <nathan@kernel.org> wrote:
>>>>> On Tue, Nov 30, 2021 at 10:25:43PM +1100, Michael Ellerman wrote:
>>>>>> Christophe Leroy <christophe.leroy@csgroup.eu> writes:
>>>>>>> Le 29/11/2021 à 23:55, kernel test robot a écrit :
>> ...
>>>>>>>> All warnings (new ones prefixed by >>):
>>>>>>>>
>>>>>>>> In file included from arch/powerpc/kernel/asm-offsets.c:71:
>>>>>>>> In file included from arch/powerpc/kernel/../xmon/xmon_bpts.h:7:
>>>>>>>>>> arch/powerpc/include/asm/inst.h:165:20: warning: variable 'val' is uninitialized when used here [-Wuninitialized]
>>>>>>>> *inst = ppc_inst(val);
>>>>>>>> ^~~
>>>>>>>> arch/powerpc/include/asm/inst.h:53:22: note: expanded from macro 'ppc_inst'
>>>>>>>> #define ppc_inst(x) (x)
>>>>>>>> ^
>>>>>>>> arch/powerpc/include/asm/inst.h:155:18: note: initialize the variable 'val' to silence this warning
>>>>>>>> unsigned int val, suffix;
>>>>>>>> ^
>>>>>>>> = 0
>>>>>>>
>>>>>>> I can't understand what's wrong here.
>> ...
>>>>>>>
>>>>>>> I see no possibility, no alternative path where val wouldn't be set. The
>>>>>>> asm clearly has *addr as an output param so it is always set.
>>>>>>
>>>>>> I guess clang can't convince itself of that?
>> ...
>>>>>
>>>>> It certainly looks like there is something wrong with how clang is
>>>>> tracking the initialization of the variable because it looks to me like
>>>>> val is only used in the fallthrough path, which happens after it is
>>>>> initialized via lwz. Perhaps something is wrong with the logic of
>>>>> https://reviews.llvm.org/D71314? I've added Bill to CC (LLVM issues are
>>>>> being migrated from Bugzilla to GitHub Issues right now so I cannot file
>>>>> this upstream at the moment).
>>>>>
>>>> If I remove the casts of "val" the warning doesn't appear. I suspect
>>>> that when I wrote that patch I forgot to remove those when checking.
>>>> #include "Captain_Picard_facepalm.h"
>>>>
>>>> I'll look into it.
>>>>
>>> Small retraction. It's the "*(<cast>)&val" that's the issue. (I.e. the "*&")
>>
>> I guess for now I'll just squash this in as a workaround?
>>
>>
>> diff --git a/arch/powerpc/include/asm/inst.h b/arch/powerpc/include/asm/inst.h
>> index 631436f3f5c3..5b591c51fec9 100644
>> --- a/arch/powerpc/include/asm/inst.h
>> +++ b/arch/powerpc/include/asm/inst.h
>> @@ -157,6 +157,9 @@ static inline int copy_inst_from_kernel_nofault(ppc_inst_t *inst, u32 *src)
>> if (unlikely(!is_kernel_addr((unsigned long)src)))
>> return -ERANGE;
>
> Could we add a version check to this and a link to our bug tracker:
>
> /* https://github.com/ClangBuiltLinux/linux/issues/1521 */
> #if defined(CONFIG_CC_IS_CLANG) && CONFIG_CLANG_VERSION < 140000
The robot reported the problem on:
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project
df08b2fe8b35cb63dfb3b49738a3494b9b4e6f8e)
Should it be CONFIG_CLANG_VERSION <= 140000 ?
>
>> +#ifdef CONFIG_CC_IS_CLANG
>> + val = suffix = 0;
>> +#endif
>> __get_kernel_nofault(&val, src, u32, Efault);
>> if (IS_ENABLED(CONFIG_PPC64) && get_op(val) == OP_PREFIX) {
>> __get_kernel_nofault(&suffix, src + 1, u32, Efault);
>>
Christophe
^ permalink raw reply
* Re: Fail to boot 5.15 on mpc8347 with either debug_pagealloc or nobats
From: Christophe Leroy @ 2021-12-07 5:50 UTC (permalink / raw)
To: mbizon@freebox.fr; +Cc: linuxppc-dev@lists.ozlabs.org
In-Reply-To: <69b0ffeb98a641c74f3beccf9dfc752bef96c51b.camel@freebox.fr>
Le 06/12/2021 à 16:48, Maxime Bizon a écrit :
>
> On Mon, 2021-12-06 at 14:22 +0000, Christophe Leroy wrote:
>
>> Fixed both in v2.
>
> Works fine, many thanks
>
Great.
Could you then reply to the patch with the following line ?
Reported-by: Maxime Bizon <mbizon@freebox.fr>
That way it will be taken into account in patchwork at
https://patchwork.ozlabs.org/project/linuxppc-dev/list/?submitter=79086
Thanks
Christophe
^ permalink raw reply
* Re: Fail to boot 5.15 on mpc8347 with either debug_pagealloc or nobats
From: Christophe Leroy @ 2021-12-07 5:54 UTC (permalink / raw)
To: Maxime Bizon; +Cc: linuxppc-dev@lists.ozlabs.org
In-Reply-To: <20211205164217.GA29658@sakura>
Le 05/12/2021 à 17:42, Maxime Bizon a écrit :
>
>
> On Saturday 04 Dec 2021 à 17:42:44 (+0000), Christophe Leroy wrote:
>
> Also when mem=2G, I have physical memory mapped twice:
>
> CONFIG_PAGE_OFFSET=0x80000000
> CONFIG_LOWMEM_SIZE=0x60000000
>
> 0: 0x80000000-0x8fffffff 0x00000000 256M Kernel rw m
> 1: 0x90000000-0x9fffffff 0x10000000 256M Kernel rw m
> 2: 0xa0000000-0xafffffff 0x20000000 256M Kernel rw m
> 3: 0xb0000000-0xbfffffff 0x30000000 256M Kernel rw m
> 4: 0xc0000000-0xcfffffff 0x40000000 256M Kernel rw m
> 5: 0xd0000000-0xdfffffff 0x50000000 256M Kernel rw m
> 6: 0xf0000000-0xf7ffffff 0x50000000 128M Kernel rw m
>
> BAT5 comes from __mmu_mapin_ram(), BAT6 from kasan init
>
> Is BAT5 needed here ?
Did you check with my latest patch (v2) ?
It should now allocate a block outside lowmem, most likely 0x78000000.
Christophe
^ permalink raw reply
* [PATCH] powerpc/603: Fix boot failure with DEBUG_PAGEALLOC and KFENCE
From: Christophe Leroy @ 2021-12-07 6:10 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman
Cc: Maxime Bizon, stable@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Allthough kernel text is always mapped with BATs, we still have
inittext mapped with pages, so TLB miss handling is required
when CONFIG_DEBUG_PAGEALLOC or CONFIG_KFENCE is set.
The final solution should be to set a BAT that also maps inittext
but that BAT then needs to be cleared at end of init, and it will
require more changes to be able to do it properly.
As DEBUG_PAGEALLOC or KFENCE are debugging, performance is not a big
deal so let's fix it simply for now to enable easy stable application.
Reported-by: Maxime Bizon <mbizon@freebox.fr>
Fixes: 035b19a15a98 ("powerpc/32s: Always map kernel text and rodata with BATs")
Cc: stable@vger.kernel.org
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
arch/powerpc/kernel/head_book3s_32.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 68e5c0a7e99d..2e2a8211b17b 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -421,14 +421,14 @@ InstructionTLBMiss:
*/
/* Get PTE (linux-style) and check access */
mfspr r3,SPRN_IMISS
-#ifdef CONFIG_MODULES
+#if defined(CONFIG_MODULES) || defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_KFENCE)
lis r1, TASK_SIZE@h /* check if kernel address */
cmplw 0,r1,r3
#endif
mfspr r2, SPRN_SDR1
li r1,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC | _PAGE_USER
rlwinm r2, r2, 28, 0xfffff000
-#ifdef CONFIG_MODULES
+#if defined(CONFIG_MODULES) || defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_KFENCE)
bgt- 112f
lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */
li r1,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC
--
2.33.1
^ permalink raw reply related
* Re: Fail to boot 5.15 on mpc8347 with either debug_pagealloc or nobats
From: Christophe Leroy @ 2021-12-07 6:11 UTC (permalink / raw)
To: mbizon@freebox.fr; +Cc: linuxppc-dev@lists.ozlabs.org
In-Reply-To: <3f99df92-0c3e-70cc-623b-7ebd6eca1e55@csgroup.eu>
Le 07/12/2021 à 06:50, Christophe Leroy a écrit :
>
>
> Le 06/12/2021 à 16:48, Maxime Bizon a écrit :
>>
>> On Mon, 2021-12-06 at 14:22 +0000, Christophe Leroy wrote:
>>
>>> Fixed both in v2.
>>
>> Works fine, many thanks
>>
>
> Great.
>
> Could you then reply to the patch with the following line ?
>
> Reported-by: Maxime Bizon <mbizon@freebox.fr>
I meant
Tested-by: Maxime Bizon <mbizon@freebox.fr>
The Reported-by: is already in the patch.
>
> That way it will be taken into account in patchwork at
> https://patchwork.ozlabs.org/project/linuxppc-dev/list/?submitter=79086
>
> Thanks
> Christophe
>
^ permalink raw reply
* Re: [PATCH v5 5/5] powerpc/inst: Optimise copy_inst_from_kernel_nofault()
From: Nathan Chancellor @ 2021-12-07 6:41 UTC (permalink / raw)
To: Christophe Leroy
Cc: kbuild-all@lists.01.org, kernel test robot, llvm@lists.linux.dev,
Nick Desaulniers, linux-kernel@vger.kernel.org, Paul Mackerras,
Bill Wendling, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <861ec7f6-ba1f-2c7d-7e20-cad6e6bc1d1a@csgroup.eu>
On Tue, Dec 07, 2021 at 05:45:08AM +0000, Christophe Leroy wrote:
>
>
> Le 07/12/2021 à 05:48, Nathan Chancellor a écrit :
> > On Tue, Dec 07, 2021 at 02:37:26PM +1100, Michael Ellerman wrote:
> >> Bill Wendling <morbo@google.com> writes:
> >>> On Tue, Nov 30, 2021 at 10:38 AM Bill Wendling <morbo@google.com> wrote:
> >>>> On Tue, Nov 30, 2021 at 10:17 AM Nathan Chancellor <nathan@kernel.org> wrote:
> >>>>> On Tue, Nov 30, 2021 at 10:25:43PM +1100, Michael Ellerman wrote:
> >>>>>> Christophe Leroy <christophe.leroy@csgroup.eu> writes:
> >>>>>>> Le 29/11/2021 à 23:55, kernel test robot a écrit :
> >> ...
> >>>>>>>> All warnings (new ones prefixed by >>):
> >>>>>>>>
> >>>>>>>> In file included from arch/powerpc/kernel/asm-offsets.c:71:
> >>>>>>>> In file included from arch/powerpc/kernel/../xmon/xmon_bpts.h:7:
> >>>>>>>>>> arch/powerpc/include/asm/inst.h:165:20: warning: variable 'val' is uninitialized when used here [-Wuninitialized]
> >>>>>>>> *inst = ppc_inst(val);
> >>>>>>>> ^~~
> >>>>>>>> arch/powerpc/include/asm/inst.h:53:22: note: expanded from macro 'ppc_inst'
> >>>>>>>> #define ppc_inst(x) (x)
> >>>>>>>> ^
> >>>>>>>> arch/powerpc/include/asm/inst.h:155:18: note: initialize the variable 'val' to silence this warning
> >>>>>>>> unsigned int val, suffix;
> >>>>>>>> ^
> >>>>>>>> = 0
> >>>>>>>
> >>>>>>> I can't understand what's wrong here.
> >> ...
> >>>>>>>
> >>>>>>> I see no possibility, no alternative path where val wouldn't be set. The
> >>>>>>> asm clearly has *addr as an output param so it is always set.
> >>>>>>
> >>>>>> I guess clang can't convince itself of that?
> >> ...
> >>>>>
> >>>>> It certainly looks like there is something wrong with how clang is
> >>>>> tracking the initialization of the variable because it looks to me like
> >>>>> val is only used in the fallthrough path, which happens after it is
> >>>>> initialized via lwz. Perhaps something is wrong with the logic of
> >>>>> https://reviews.llvm.org/D71314? I've added Bill to CC (LLVM issues are
> >>>>> being migrated from Bugzilla to GitHub Issues right now so I cannot file
> >>>>> this upstream at the moment).
> >>>>>
> >>>> If I remove the casts of "val" the warning doesn't appear. I suspect
> >>>> that when I wrote that patch I forgot to remove those when checking.
> >>>> #include "Captain_Picard_facepalm.h"
> >>>>
> >>>> I'll look into it.
> >>>>
> >>> Small retraction. It's the "*(<cast>)&val" that's the issue. (I.e. the "*&")
> >>
> >> I guess for now I'll just squash this in as a workaround?
> >>
> >>
> >> diff --git a/arch/powerpc/include/asm/inst.h b/arch/powerpc/include/asm/inst.h
> >> index 631436f3f5c3..5b591c51fec9 100644
> >> --- a/arch/powerpc/include/asm/inst.h
> >> +++ b/arch/powerpc/include/asm/inst.h
> >> @@ -157,6 +157,9 @@ static inline int copy_inst_from_kernel_nofault(ppc_inst_t *inst, u32 *src)
> >> if (unlikely(!is_kernel_addr((unsigned long)src)))
> >> return -ERANGE;
> >
> > Could we add a version check to this and a link to our bug tracker:
> >
> > /* https://github.com/ClangBuiltLinux/linux/issues/1521 */
> > #if defined(CONFIG_CC_IS_CLANG) && CONFIG_CLANG_VERSION < 140000
>
> The robot reported the problem on:
>
> compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project
> df08b2fe8b35cb63dfb3b49738a3494b9b4e6f8e)
>
> Should it be CONFIG_CLANG_VERSION <= 140000 ?
The robot tests clang from tip of tree, rebuilding every week or so. The
fix is getting ready to land so it will be released in 14.0.0 final. We
have always written tip of tree version checks with the expectation that
if people are testing tip of tree clang, they are frequently rebuilding.
If that is not true, they need to be using released/stable versions,
otherwise the model is broken.
If that is too problematic, we could add a version check to Kconfig
(cannot think of a great name for the config off the top of my head)
that checks for this issue and ifdef on that. That might be nice in
case another instance of this crops up in the future.
Cheers,
Nathan
> >
> >> +#ifdef CONFIG_CC_IS_CLANG
> >> + val = suffix = 0;
> >> +#endif
> >> __get_kernel_nofault(&val, src, u32, Efault);
> >> if (IS_ENABLED(CONFIG_PPC64) && get_op(val) == OP_PREFIX) {
> >> __get_kernel_nofault(&suffix, src + 1, u32, Efault);
> >>
>
> Christophe
^ permalink raw reply
* Re: [patch V2 01/23] powerpc/4xx: Remove MSI support which never worked
From: Cédric Le Goater @ 2021-12-07 7:21 UTC (permalink / raw)
To: Thomas Gleixner, LKML
Cc: linux-hyperv, Paul Mackerras, sparclinux, Wei Liu, Ashok Raj,
Marc Zygnier, x86, Christian Borntraeger, Bjorn Helgaas,
Megha Dey, Jason Gunthorpe, linux-pci, xen-devel, ath11k,
Kevin Tian, Heiko Carstens, Alex Williamson, Kalle Valo,
Juergen Gross, Thomas Bogendoerfer, Greg Kroah-Hartman,
linux-mips, linuxppc-dev
In-Reply-To: <20211206210223.872249537@linutronix.de>
Hello Thomas,
On 12/6/21 23:27, Thomas Gleixner wrote:
> This code is broken since day one. ppc4xx_setup_msi_irqs() has the
> following gems:
>
> 1) The handling of the result of msi_bitmap_alloc_hwirqs() is completely
> broken:
>
> When the result is greater than or equal 0 (bitmap allocation
> successful) then the loop terminates and the function returns 0
> (success) despite not having installed an interrupt.
>
> When the result is less than 0 (bitmap allocation fails), it prints an
> error message and continues to "work" with that error code which would
> eventually end up in the MSI message data.
>
> 2) On every invocation the file global pp4xx_msi::msi_virqs bitmap is
> allocated thereby leaking the previous one.
>
> IOW, this has never worked and for more than 10 years nobody cared. Remove
> the gunk.
>
> Fixes: 3fb7933850fa ("powerpc/4xx: Adding PCIe MSI support")
Shouldn't we remove all of it ? including the updates in the device trees
and the Kconfig changes under :
arch/powerpc/platforms/44x/Kconfig: select PPC4xx_MSI
arch/powerpc/platforms/44x/Kconfig: select PPC4xx_MSI
arch/powerpc/platforms/44x/Kconfig: select PPC4xx_MSI
arch/powerpc/platforms/44x/Kconfig: select PPC4xx_MSI
arch/powerpc/platforms/40x/Kconfig: select PPC4xx_MSI
Thanks,
C.
> Fixes: 247540b03bfc ("powerpc/44x: Fix PCI MSI support for Maui APM821xx SoC and Bluestone board")
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
> Cc: Michael Ellerman <mpe@ellerman.id.au>
> Cc: Paul Mackerras <paulus@samba.org>
> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Cc: linuxppc-dev@lists.ozlabs.org
> ---
> arch/powerpc/platforms/4xx/Makefile | 1
> arch/powerpc/platforms/4xx/msi.c | 281 ------------------------------------
> arch/powerpc/sysdev/Kconfig | 6
> 3 files changed, 288 deletions(-)
>
> --- a/arch/powerpc/platforms/4xx/Makefile
> +++ b/arch/powerpc/platforms/4xx/Makefile
> @@ -3,6 +3,5 @@ obj-y += uic.o machine_check.o
> obj-$(CONFIG_4xx_SOC) += soc.o
> obj-$(CONFIG_PCI) += pci.o
> obj-$(CONFIG_PPC4xx_HSTA_MSI) += hsta_msi.o
> -obj-$(CONFIG_PPC4xx_MSI) += msi.o
> obj-$(CONFIG_PPC4xx_CPM) += cpm.o
> obj-$(CONFIG_PPC4xx_GPIO) += gpio.o
> --- a/arch/powerpc/platforms/4xx/msi.c
> +++ /dev/null
> @@ -1,281 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0-or-later
> -/*
> - * Adding PCI-E MSI support for PPC4XX SoCs.
> - *
> - * Copyright (c) 2010, Applied Micro Circuits Corporation
> - * Authors: Tirumala R Marri <tmarri@apm.com>
> - * Feng Kan <fkan@apm.com>
> - */
> -
> -#include <linux/irq.h>
> -#include <linux/pci.h>
> -#include <linux/msi.h>
> -#include <linux/of_platform.h>
> -#include <linux/interrupt.h>
> -#include <linux/export.h>
> -#include <linux/kernel.h>
> -#include <asm/prom.h>
> -#include <asm/hw_irq.h>
> -#include <asm/ppc-pci.h>
> -#include <asm/dcr.h>
> -#include <asm/dcr-regs.h>
> -#include <asm/msi_bitmap.h>
> -
> -#define PEIH_TERMADH 0x00
> -#define PEIH_TERMADL 0x08
> -#define PEIH_MSIED 0x10
> -#define PEIH_MSIMK 0x18
> -#define PEIH_MSIASS 0x20
> -#define PEIH_FLUSH0 0x30
> -#define PEIH_FLUSH1 0x38
> -#define PEIH_CNTRST 0x48
> -
> -static int msi_irqs;
> -
> -struct ppc4xx_msi {
> - u32 msi_addr_lo;
> - u32 msi_addr_hi;
> - void __iomem *msi_regs;
> - int *msi_virqs;
> - struct msi_bitmap bitmap;
> - struct device_node *msi_dev;
> -};
> -
> -static struct ppc4xx_msi ppc4xx_msi;
> -
> -static int ppc4xx_msi_init_allocator(struct platform_device *dev,
> - struct ppc4xx_msi *msi_data)
> -{
> - int err;
> -
> - err = msi_bitmap_alloc(&msi_data->bitmap, msi_irqs,
> - dev->dev.of_node);
> - if (err)
> - return err;
> -
> - err = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap);
> - if (err < 0) {
> - msi_bitmap_free(&msi_data->bitmap);
> - return err;
> - }
> -
> - return 0;
> -}
> -
> -static int ppc4xx_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
> -{
> - int int_no = -ENOMEM;
> - unsigned int virq;
> - struct msi_msg msg;
> - struct msi_desc *entry;
> - struct ppc4xx_msi *msi_data = &ppc4xx_msi;
> -
> - dev_dbg(&dev->dev, "PCIE-MSI:%s called. vec %x type %d\n",
> - __func__, nvec, type);
> - if (type == PCI_CAP_ID_MSIX)
> - pr_debug("ppc4xx msi: MSI-X untested, trying anyway.\n");
> -
> - msi_data->msi_virqs = kmalloc_array(msi_irqs, sizeof(int), GFP_KERNEL);
> - if (!msi_data->msi_virqs)
> - return -ENOMEM;
> -
> - for_each_pci_msi_entry(entry, dev) {
> - int_no = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
> - if (int_no >= 0)
> - break;
> - if (int_no < 0) {
> - pr_debug("%s: fail allocating msi interrupt\n",
> - __func__);
> - }
> - virq = irq_of_parse_and_map(msi_data->msi_dev, int_no);
> - if (!virq) {
> - dev_err(&dev->dev, "%s: fail mapping irq\n", __func__);
> - msi_bitmap_free_hwirqs(&msi_data->bitmap, int_no, 1);
> - return -ENOSPC;
> - }
> - dev_dbg(&dev->dev, "%s: virq = %d\n", __func__, virq);
> -
> - /* Setup msi address space */
> - msg.address_hi = msi_data->msi_addr_hi;
> - msg.address_lo = msi_data->msi_addr_lo;
> -
> - irq_set_msi_desc(virq, entry);
> - msg.data = int_no;
> - pci_write_msi_msg(virq, &msg);
> - }
> - return 0;
> -}
> -
> -void ppc4xx_teardown_msi_irqs(struct pci_dev *dev)
> -{
> - struct msi_desc *entry;
> - struct ppc4xx_msi *msi_data = &ppc4xx_msi;
> - irq_hw_number_t hwirq;
> -
> - dev_dbg(&dev->dev, "PCIE-MSI: tearing down msi irqs\n");
> -
> - for_each_pci_msi_entry(entry, dev) {
> - if (!entry->irq)
> - continue;
> - hwirq = virq_to_hw(entry->irq);
> - irq_set_msi_desc(entry->irq, NULL);
> - irq_dispose_mapping(entry->irq);
> - msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1);
> - }
> -}
> -
> -static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
> - struct resource res, struct ppc4xx_msi *msi)
> -{
> - const u32 *msi_data;
> - const u32 *msi_mask;
> - const u32 *sdr_addr;
> - dma_addr_t msi_phys;
> - void *msi_virt;
> - int err;
> -
> - sdr_addr = of_get_property(dev->dev.of_node, "sdr-base", NULL);
> - if (!sdr_addr)
> - return -EINVAL;
> -
> - msi_data = of_get_property(dev->dev.of_node, "msi-data", NULL);
> - if (!msi_data)
> - return -EINVAL;
> -
> - msi_mask = of_get_property(dev->dev.of_node, "msi-mask", NULL);
> - if (!msi_mask)
> - return -EINVAL;
> -
> - msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");
> - if (!msi->msi_dev)
> - return -ENODEV;
> -
> - msi->msi_regs = of_iomap(msi->msi_dev, 0);
> - if (!msi->msi_regs) {
> - dev_err(&dev->dev, "of_iomap failed\n");
> - err = -ENOMEM;
> - goto node_put;
> - }
> - dev_dbg(&dev->dev, "PCIE-MSI: msi register mapped 0x%x 0x%x\n",
> - (u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs));
> -
> - msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL);
> - if (!msi_virt) {
> - err = -ENOMEM;
> - goto iounmap;
> - }
> - msi->msi_addr_hi = upper_32_bits(msi_phys);
> - msi->msi_addr_lo = lower_32_bits(msi_phys & 0xffffffff);
> - dev_dbg(&dev->dev, "PCIE-MSI: msi address high 0x%x, low 0x%x\n",
> - msi->msi_addr_hi, msi->msi_addr_lo);
> -
> - mtdcri(SDR0, *sdr_addr, upper_32_bits(res.start)); /*HIGH addr */
> - mtdcri(SDR0, *sdr_addr + 1, lower_32_bits(res.start)); /* Low addr */
> -
> - /* Progam the Interrupt handler Termination addr registers */
> - out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi);
> - out_be32(msi->msi_regs + PEIH_TERMADL, msi->msi_addr_lo);
> -
> - /* Program MSI Expected data and Mask bits */
> - out_be32(msi->msi_regs + PEIH_MSIED, *msi_data);
> - out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask);
> -
> - dma_free_coherent(&dev->dev, 64, msi_virt, msi_phys);
> -
> - return 0;
> -
> -iounmap:
> - iounmap(msi->msi_regs);
> -node_put:
> - of_node_put(msi->msi_dev);
> - return err;
> -}
> -
> -static int ppc4xx_of_msi_remove(struct platform_device *dev)
> -{
> - struct ppc4xx_msi *msi = dev->dev.platform_data;
> - int i;
> - int virq;
> -
> - for (i = 0; i < msi_irqs; i++) {
> - virq = msi->msi_virqs[i];
> - if (virq)
> - irq_dispose_mapping(virq);
> - }
> -
> - if (msi->bitmap.bitmap)
> - msi_bitmap_free(&msi->bitmap);
> - iounmap(msi->msi_regs);
> - of_node_put(msi->msi_dev);
> -
> - return 0;
> -}
> -
> -static int ppc4xx_msi_probe(struct platform_device *dev)
> -{
> - struct ppc4xx_msi *msi;
> - struct resource res;
> - int err = 0;
> - struct pci_controller *phb;
> -
> - dev_dbg(&dev->dev, "PCIE-MSI: Setting up MSI support...\n");
> -
> - msi = devm_kzalloc(&dev->dev, sizeof(*msi), GFP_KERNEL);
> - if (!msi)
> - return -ENOMEM;
> - dev->dev.platform_data = msi;
> -
> - /* Get MSI ranges */
> - err = of_address_to_resource(dev->dev.of_node, 0, &res);
> - if (err) {
> - dev_err(&dev->dev, "%pOF resource error!\n", dev->dev.of_node);
> - return err;
> - }
> -
> - msi_irqs = of_irq_count(dev->dev.of_node);
> - if (!msi_irqs)
> - return -ENODEV;
> -
> - err = ppc4xx_setup_pcieh_hw(dev, res, msi);
> - if (err)
> - return err;
> -
> - err = ppc4xx_msi_init_allocator(dev, msi);
> - if (err) {
> - dev_err(&dev->dev, "Error allocating MSI bitmap\n");
> - goto error_out;
> - }
> - ppc4xx_msi = *msi;
> -
> - list_for_each_entry(phb, &hose_list, list_node) {
> - phb->controller_ops.setup_msi_irqs = ppc4xx_setup_msi_irqs;
> - phb->controller_ops.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;
> - }
> - return 0;
> -
> -error_out:
> - ppc4xx_of_msi_remove(dev);
> - return err;
> -}
> -static const struct of_device_id ppc4xx_msi_ids[] = {
> - {
> - .compatible = "amcc,ppc4xx-msi",
> - },
> - {}
> -};
> -static struct platform_driver ppc4xx_msi_driver = {
> - .probe = ppc4xx_msi_probe,
> - .remove = ppc4xx_of_msi_remove,
> - .driver = {
> - .name = "ppc4xx-msi",
> - .of_match_table = ppc4xx_msi_ids,
> - },
> -
> -};
> -
> -static __init int ppc4xx_msi_init(void)
> -{
> - return platform_driver_register(&ppc4xx_msi_driver);
> -}
> -
> -subsys_initcall(ppc4xx_msi_init);
> --- a/arch/powerpc/sysdev/Kconfig
> +++ b/arch/powerpc/sysdev/Kconfig
> @@ -12,17 +12,11 @@ config PPC4xx_HSTA_MSI
> depends on PCI_MSI
> depends on PCI && 4xx
>
> -config PPC4xx_MSI
> - bool
> - depends on PCI_MSI
> - depends on PCI && 4xx
> -
> config PPC_MSI_BITMAP
> bool
> depends on PCI_MSI
> default y if MPIC
> default y if FSL_PCI
> - default y if PPC4xx_MSI
> default y if PPC_POWERNV
>
> source "arch/powerpc/sysdev/xics/Kconfig"
>
^ permalink raw reply
* Re: [patch V2 03/23] genirq/msi: Guard sysfs code
From: Greg Kroah-Hartman @ 2021-12-07 7:42 UTC (permalink / raw)
To: Thomas Gleixner
Cc: linux-hyperv, linux-mips, Paul Mackerras, sparclinux, Wei Liu,
Ashok Raj, x86, Christian Borntraeger, Bjorn Helgaas, Megha Dey,
Jason Gunthorpe, linux-pci, xen-devel, ath11k, Kevin Tian,
Heiko Carstens, Alex Williamson, Cedric Le Goater, Kalle Valo,
Juergen Gross, Thomas Bogendoerfer, LKML, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210223.985907940@linutronix.de>
On Mon, Dec 06, 2021 at 11:27:28PM +0100, Thomas Gleixner wrote:
> No point in building unused code when CONFIG_SYSFS=n.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Tested-by: Juergen Gross <jgross@suse.com>
> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
^ permalink raw reply
* Re: [patch V2 05/23] genirq/msi: Fixup includes
From: Greg Kroah-Hartman @ 2021-12-07 7:43 UTC (permalink / raw)
To: Thomas Gleixner
Cc: linux-hyperv, linux-mips, Paul Mackerras, sparclinux, Wei Liu,
Ashok Raj, x86, Christian Borntraeger, Bjorn Helgaas, Megha Dey,
Jason Gunthorpe, linux-pci, xen-devel, ath11k, Kevin Tian,
Heiko Carstens, Alex Williamson, Cedric Le Goater, Kalle Valo,
Juergen Gross, Thomas Bogendoerfer, LKML, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210224.103502021@linutronix.de>
On Mon, Dec 06, 2021 at 11:27:31PM +0100, Thomas Gleixner wrote:
> Remove the kobject.h include from msi.h as it's not required and add a
> sysfs.h include to the core code instead.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Tested-by: Juergen Gross <jgross@suse.com>
> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
^ permalink raw reply
* Re: [patch V2 08/23] PCI/sysfs: Use pci_irq_vector()
From: Greg Kroah-Hartman @ 2021-12-07 7:43 UTC (permalink / raw)
To: Thomas Gleixner
Cc: linux-hyperv, linux-mips, Paul Mackerras, sparclinux, Wei Liu,
Ashok Raj, x86, Christian Borntraeger, Bjorn Helgaas, Megha Dey,
Jason Gunthorpe, linux-pci, xen-devel, ath11k, Kevin Tian,
Heiko Carstens, Alex Williamson, Cedric Le Goater, Kalle Valo,
Juergen Gross, Thomas Bogendoerfer, LKML, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210224.265589103@linutronix.de>
On Mon, Dec 06, 2021 at 11:27:36PM +0100, Thomas Gleixner wrote:
> instead of fiddling with msi descriptors.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Tested-by: Juergen Gross <jgross@suse.com>
> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
^ permalink raw reply
* Re: [patch V2 10/23] genirq/msi, treewide: Use a named struct for PCI/MSI attributes
From: Greg Kroah-Hartman @ 2021-12-07 7:44 UTC (permalink / raw)
To: Thomas Gleixner
Cc: linux-hyperv, linux-mips, Paul Mackerras, sparclinux, Wei Liu,
Ashok Raj, x86, Christian Borntraeger, Bjorn Helgaas, Megha Dey,
Jason Gunthorpe, linux-pci, xen-devel, ath11k, Kevin Tian,
Heiko Carstens, Alex Williamson, Cedric Le Goater, Kalle Valo,
Juergen Gross, Thomas Bogendoerfer, LKML, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210224.374863119@linutronix.de>
On Mon, Dec 06, 2021 at 11:27:39PM +0100, Thomas Gleixner wrote:
> The unnamed struct sucks and is in the way of further cleanups. Stick the
> PCI related MSI data into a real data structure and cleanup all users.
>
> No functional change.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Tested-by: Juergen Gross <jgross@suse.com>
> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
> Acked-by: Kalle Valo <kvalo@codeaurora.org>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: sparclinux@vger.kernel.org
> Cc: x86@kernel.org
> Cc: xen-devel@lists.xenproject.org
> Cc: ath11k@lists.infradead.org
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
^ permalink raw reply
* Re: [patch V2 14/23] PCI/MSI: Make msix_update_entries() smarter
From: Greg Kroah-Hartman @ 2021-12-07 7:44 UTC (permalink / raw)
To: Thomas Gleixner
Cc: linux-hyperv, linux-mips, Paul Mackerras, sparclinux, Wei Liu,
Ashok Raj, x86, Christian Borntraeger, Bjorn Helgaas, Megha Dey,
Jason Gunthorpe, linux-pci, xen-devel, ath11k, Kevin Tian,
Heiko Carstens, Alex Williamson, Cedric Le Goater, Kalle Valo,
Juergen Gross, Thomas Bogendoerfer, LKML, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210224.600351129@linutronix.de>
On Mon, Dec 06, 2021 at 11:27:46PM +0100, Thomas Gleixner wrote:
> No need to walk the descriptors and check for each one whether the entries
> pointer function argument is NULL. Do it once.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Tested-by: Juergen Gross <jgross@suse.com>
> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
^ permalink raw reply
* Re: [patch V2 16/23] PCI/MSI: Split out CONFIG_PCI_MSI independent part
From: Greg Kroah-Hartman @ 2021-12-07 7:45 UTC (permalink / raw)
To: Thomas Gleixner
Cc: linux-hyperv, linux-mips, Paul Mackerras, sparclinux, Wei Liu,
Ashok Raj, x86, Christian Borntraeger, Bjorn Helgaas, Megha Dey,
Jason Gunthorpe, linux-pci, xen-devel, ath11k, Kevin Tian,
Heiko Carstens, Alex Williamson, Cedric Le Goater, Kalle Valo,
Juergen Gross, Thomas Bogendoerfer, LKML, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210224.710137730@linutronix.de>
On Mon, Dec 06, 2021 at 11:27:49PM +0100, Thomas Gleixner wrote:
> These functions are required even when CONFIG_PCI_MSI is not set. Move them
> to their own file.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Tested-by: Juergen Gross <jgross@suse.com>
> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
^ permalink raw reply
* Re: [patch V2 17/23] PCI/MSI: Split out !IRQDOMAIN code
From: Greg Kroah-Hartman @ 2021-12-07 7:45 UTC (permalink / raw)
To: Thomas Gleixner
Cc: linux-hyperv, linux-mips, Paul Mackerras, sparclinux, Wei Liu,
Ashok Raj, x86, Christian Borntraeger, Bjorn Helgaas, Megha Dey,
Jason Gunthorpe, linux-pci, xen-devel, ath11k, Kevin Tian,
Heiko Carstens, Alex Williamson, Cedric Le Goater, Kalle Valo,
Juergen Gross, Thomas Bogendoerfer, LKML, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210224.763574089@linutronix.de>
On Mon, Dec 06, 2021 at 11:27:51PM +0100, Thomas Gleixner wrote:
> Split out the non irqdomain code into its own file.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Tested-by: Juergen Gross <jgross@suse.com>
> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
^ permalink raw reply
* Re: [patch V2 18/23] PCI/MSI: Split out irqdomain code
From: Greg Kroah-Hartman @ 2021-12-07 7:46 UTC (permalink / raw)
To: Thomas Gleixner
Cc: linux-hyperv, linux-mips, Paul Mackerras, sparclinux, Wei Liu,
Ashok Raj, x86, Christian Borntraeger, Bjorn Helgaas, Megha Dey,
Jason Gunthorpe, linux-pci, xen-devel, ath11k, Kevin Tian,
Heiko Carstens, Alex Williamson, Cedric Le Goater, Kalle Valo,
Juergen Gross, Thomas Bogendoerfer, LKML, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210224.817754783@linutronix.de>
On Mon, Dec 06, 2021 at 11:27:52PM +0100, Thomas Gleixner wrote:
> Move the irqdomain specific code into it's own file.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Tested-by: Juergen Gross <jgross@suse.com>
> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
^ permalink raw reply
* Re: [patch V2 20/23] PCI/MSI: Move msi_lock to struct pci_dev
From: Greg Kroah-Hartman @ 2021-12-07 7:47 UTC (permalink / raw)
To: Thomas Gleixner
Cc: linux-hyperv, linux-mips, Paul Mackerras, sparclinux, Wei Liu,
Ashok Raj, x86, Christian Borntraeger, Bjorn Helgaas, Megha Dey,
Jason Gunthorpe, linux-pci, xen-devel, ath11k, Kevin Tian,
Heiko Carstens, Alex Williamson, Cedric Le Goater, Kalle Valo,
Juergen Gross, Thomas Bogendoerfer, LKML, Marc Zygnier,
linuxppc-dev
In-Reply-To: <20211206210224.925241961@linutronix.de>
On Mon, Dec 06, 2021 at 11:27:56PM +0100, Thomas Gleixner wrote:
> It's only required for PCI/MSI. So no point in having it in every struct
> device.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Yes!!!
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
^ permalink raw reply
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