[GIT PULL] Compute Express Link (CXL) Fixes for 6.15-rc4

[GIT PULL] Compute Express Link (CXL) Fixes for 6.15-rc4

[Dave Jiang]

Hi Linus, please pull from

git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git cxl-fixes-6.15-rc4

...to receive a small set of CXL fixes.

The fixes address global persistent flush (GPF) changes and CXL Features
support changes that went in the 6.15 merge window. And also a fix to
an issue observed on CXL 1.1 platform during device enumeration.

These have all appeared in -next for a few days with no reported issues.

---
The following changes since commit 0af2f6be1b4281385b618cb86ad946eded089ac8:

  Linux 6.15-rc1 (2025-04-06 13:11:33 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git cxl-fixes-6.15-rc4

for you to fetch changes up to 078d3ee7c162cd66d76171579c02d7890bd77daf:

  cxl/core/regs.c: Skip Memory Space Enable check for RCD and RCH Ports (2025-04-21 08:30:13 -0700)

----------------------------------------------------------------
cxl fixes for v6.15-rc4

- Series to fix using the wrong GPF DVSEC location
  - Fix caching of dport GPF DVSEC from the first endpoint
  - Ensure that the GPF phase timeout is only updated once by first endpoint
  - Drop is_port parameter for cxl_gpf_get_dvsec()

- Fix the devm_* call host device for CXL fwctl setup

- Set the out_len in Set Features failure case

- Fix RCD initialization by skipping unneeded mem_en check

----------------------------------------------------------------
Dave Jiang (1):
      cxl: Fix devm host device for CXL fwctl initialization

Li Ming (4):
      cxl/core: Fix caching dport GPF DVSEC issue
      cxl/pci: Update Port GPF timeout only when the first EP attaching
      cxl/pci: Drop the parameter is_port of cxl_gpf_get_dvsec()
      cxl/feature: Update out_len in set feature failure case

Smita Koralahalli (1):
      cxl/core/regs.c: Skip Memory Space Enable check for RCD and RCH Ports

 drivers/cxl/core/core.h      |  2 +-
 drivers/cxl/core/features.c  | 16 ++++++++--------
 drivers/cxl/core/pci.c       | 30 +++++++++++++++++-------------
 drivers/cxl/core/port.c      |  2 +-
 drivers/cxl/core/regs.c      |  4 ----
 drivers/cxl/cxl.h            |  6 +++---
 drivers/cxl/pci.c            |  2 +-
 drivers/cxl/pmem.c           |  2 +-
 include/cxl/features.h       |  5 +++--
 tools/testing/cxl/test/mem.c |  2 +-
 10 files changed, 36 insertions(+), 35 deletions(-)

Re: [GIT PULL] Compute Express Link (CXL) Fixes for 6.15-rc4

[pr-tracker-bot]

The pull request you sent on Fri, 25 Apr 2025 10:27:16 -0700:

> git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git cxl-fixes-6.15-rc4

has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/4017040ad7a08fc78dc0729545d6e1050d3e629d

Thank you!

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