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* [patch] x86, pat: return EINVAL for pci mmap WC request for !pat_enabled
@ 2009-10-23 22:26 Suresh Siddha
  2009-10-26 21:12 ` Jesse Barnes
  0 siblings, 1 reply; 2+ messages in thread
From: Suresh Siddha @ 2009-10-23 22:26 UTC (permalink / raw)
  To: Ingo Molnar, Thomas Schlichter, LKML
  Cc: Eric Anholt, Barnes, Jesse, Thomas Hellstrom, Jan Beulich

Thomas Schlichter reported:
> X.org uses libpciaccess which tries to mmap with write combining enabled via
> /sys/bus/pci/devices/*/resource0_wc. Currently, when PAT is not enabled, the
> kernel does fall back to uncached mmap. Then libpciaccess thinks it succeeded
> mapping with write combining enabled and does not set up suited MTRR entries.
> ;-(

Instead of silently mapping pci mmap region as UC minus in the case
of !pat_enabled and wc request, we can return error. Eric Anholt mentioned
that caller (like X) typically follows up with UC minus pci mmap request and
if there is a free mtrr slot, caller will manage adding WC mtrr.

Jesse Barnes says:
> Older versions of libpciaccess will behave better if we do it that way
> (iirc it only allocates an MTRR if the resource_wc file doesn't exist or
> fails to get mapped).

Reported-by: Thomas Schlichter <thomas.schlichter@web.de>
Signed-off-by: Thomas Schlichter <thomas.schlichter@web.de>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---

diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index b22d13b..a672f12 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -282,6 +282,15 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
 		return -EINVAL;
 
 	prot = pgprot_val(vma->vm_page_prot);
+
+	/*
+ 	 * Return error if pat is not enabled and write_combine is requested.
+ 	 * Caller can followup with UC MINUS request and add a WC mtrr if there
+ 	 * is a free mtrr slot.
+ 	 */
+	if (!pat_enabled && write_combine)
+		return -EINVAL;
+
 	if (pat_enabled && write_combine)
 		prot |= _PAGE_CACHE_WC;
 	else if (pat_enabled || boot_cpu_data.x86 > 3)



^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [patch] x86, pat: return EINVAL for pci mmap WC request for !pat_enabled
  2009-10-23 22:26 [patch] x86, pat: return EINVAL for pci mmap WC request for !pat_enabled Suresh Siddha
@ 2009-10-26 21:12 ` Jesse Barnes
  0 siblings, 0 replies; 2+ messages in thread
From: Jesse Barnes @ 2009-10-26 21:12 UTC (permalink / raw)
  To: Suresh Siddha
  Cc: Ingo Molnar, Thomas Schlichter, LKML, Eric Anholt,
	Thomas Hellstrom, Jan Beulich

On Mon, 26 Oct 2009 13:21:32 -0800
Suresh Siddha <suresh.b.siddha@intel.com> wrote:

> Thomas Schlichter reported:
> > X.org uses libpciaccess which tries to mmap with write combining
> > enabled via /sys/bus/pci/devices/*/resource0_wc. Currently, when
> > PAT is not enabled, the kernel does fall back to uncached mmap.
> > Then libpciaccess thinks it succeeded mapping with write combining
> > enabled and does not set up suited MTRR entries. ;-(
> 
> Instead of silently mapping pci mmap region as UC minus in the case
> of !pat_enabled and wc request, we can return error. Eric Anholt
> mentioned that caller (like X) typically follows up with UC minus pci
> mmap request and if there is a free mtrr slot, caller will manage
> adding WC mtrr.
> 
> Jesse Barnes says:
> > Older versions of libpciaccess will behave better if we do it that
> > way (iirc it only allocates an MTRR if the resource_wc file doesn't
> > exist or fails to get mapped).
> 
> Reported-by: Thomas Schlichter <thomas.schlichter@web.de>
> Signed-off-by: Thomas Schlichter <thomas.schlichter@web.de>
> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
> Acked-by: Eric Anholt <eric@anholt.net>
> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
> 

Applied to my linux-next branch, thanks.

-- 
Jesse Barnes, Intel Open Source Technology Center

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2009-10-23 22:26 [patch] x86, pat: return EINVAL for pci mmap WC request for !pat_enabled Suresh Siddha
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