From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: Andi Kleen <andi@firstfloor.org>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
Andi Kleen <ak@linux.intel.com>
Subject: Re: [PATCH 2/5] perf, x86: Enable PDIR precise instruction profiling on IvyBridge
Date: Mon, 02 Jul 2012 21:18:53 +0200 [thread overview]
Message-ID: <1341256733.23484.11.camel@twins> (raw)
In-Reply-To: <1341254598-1379-3-git-send-email-andi@firstfloor.org>
On Mon, 2012-07-02 at 11:43 -0700, Andi Kleen wrote:
> From: Andi Kleen <ak@linux.intel.com>
>
> Even with precise profiling Intel CPUs have a "skid". The sample
> triggers a few cycles later than the instruction, so in some
> cases there can be systematic errors where expensive instructions never
> show up in the profile log.
>
> Sandy Bridge added a new PDIR instruction retired event that randomizes
> the sampling slightly. This corrects for systematic errors, so that
> you should in most cases see the correct instruction getting profile hits.
>
> Unfortunately the SandyBridge version could only work with a otherwise
> quiescent CPU and was difficult to use. But now on IvyBridge this
> restriction is gone and can be more widely used.
>
> This only works for retired instructions.
>
> I enabled it -- somewhat arbitarily -- for two 'p's or more.
>
> To use it
>
> perf record -e instructions:pp ...
>
> This provides a more precise alternative to the usual cycles:pp,
> however it will not account for expensive instructions.
Already told you no.
next prev parent reply other threads:[~2012-07-02 19:19 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-02 18:43 Updated and combined Sandy Bridge/Ivy Bridge perf patchkits Andi Kleen
2012-07-02 18:43 ` [PATCH 1/5] perf, x86: Improve basic Ivy Bridge support v3 Andi Kleen
2012-07-02 19:26 ` Peter Zijlstra
2012-07-02 19:58 ` Andi Kleen
2012-07-02 20:18 ` Peter Zijlstra
2012-07-02 18:43 ` [PATCH 2/5] perf, x86: Enable PDIR precise instruction profiling on IvyBridge Andi Kleen
2012-07-02 19:18 ` Peter Zijlstra [this message]
2012-07-02 19:57 ` Andi Kleen
2012-07-02 20:22 ` Peter Zijlstra
2012-07-02 21:00 ` Andi Kleen
2012-07-02 21:36 ` Peter Zijlstra
2012-07-02 21:57 ` Andi Kleen
2012-07-02 23:13 ` Stephane Eranian
2012-07-03 4:04 ` Andi Kleen
2012-07-05 15:45 ` Stephane Eranian
2012-07-05 17:26 ` Andi Kleen
2012-07-06 1:04 ` Stephane Eranian
2012-07-02 18:43 ` [PATCH 3/5] x86: Do microcode updates at CPU_STARTING, not CPU_ONLINE v2 Andi Kleen
2012-07-02 18:43 ` [PATCH 4/5] perf, x86: check ucode before disabling PEBS on SandyBridge v4 Andi Kleen
2012-07-02 18:43 ` [PATCH 5/5] perf, x86: Spell Romley correctly Andi Kleen
-- strict thread matches above, loose matches on Subject: below --
2012-07-02 20:40 Another IvyBridge/SandyBridge patchkit Andi Kleen
2012-07-02 20:40 ` [PATCH 2/5] perf, x86: Enable PDIR precise instruction profiling on IvyBridge Andi Kleen
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