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From: anish kumar <anish198519851985@gmail.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: "Liu, Chuansheng" <chuansheng.liu@intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH] genirq: for edge interrupt IRQS_ONESHOT support with irq thread
Date: Sun, 21 Oct 2012 23:45:08 +0900	[thread overview]
Message-ID: <1350830708.9435.0.camel@anish-Inspiron-N5050> (raw)
In-Reply-To: <1350105663.8329.50.camel@anish-Inspiron-N5050>

On Sat, 2012-10-13 at 14:21 +0900, anish kumar wrote:
> On Fri, 2012-10-12 at 22:52 +0200, Thomas Gleixner wrote:
> > On Fri, 12 Oct 2012, Liu, Chuansheng wrote:
> > > > -----Original Message-----
> > > > From: anish kumar [mailto:anish198519851985@gmail.com]
> > > > Sent: Friday, October 12, 2012 11:25 PM
> > > > To: Liu, Chuansheng
> > > > Cc: Thomas Gleixner; linux-kernel@vger.kernel.org
> > > > Subject: RE: [PATCH] genirq: for edge interrupt IRQS_ONESHOT support with irq
> > > > thread
> > > > 
> > > > On Fri, 2012-10-12 at 14:57 +0000, Liu, Chuansheng wrote:
> > > > > > On SMP an interrupt which is raised after the ack() again before the
> > > > > > handler finishes, can invoke another delivery on a different CPU,
> > > > > > which then sees the IRQ_INPROGESS flag, masks it and flags it
> > > > > > PENDING. When the primary handler on the first CPU returns, it sees
> > > > > > the PENDING flag, unmasks and invokes the handler another time.
> > > > > In this case, when IRQ_INPROGRESS flag is set, on another CPU, it will
> > > > > mask and ack it, if before the primary handler on the first CPU returns,
> > > > > the edge interrupt is raised again, it will be lost, right?
> > > > Why will the interrupt be raised again?Is not it masked?I read tglx
> > > I means because it is masked, if at this time device issues edge irq,
> > > It will not be delivered and lost.
> > 
> > No, it is NOT lost. The irq is marked PENDING already, so we invoke
> It is fairly easy for an edge triggered interrupt to be missed - for
> example if interrupts have to be masked for a period - and unless there
> is some type of hardware latch that records the event it is impossible
> to recover.
> tglx, explanation will only work if we have a hardware latch which when
> unmasked sends all those edge interrupts again (which had come when it
> was masked while the CPU was handling the same interrupts).
> 
> PS:http://kernel.org/doc/htmldocs/genericirq.html
Hello tglx,
Does this explanation makes sense?
> > the handler again and handle it. And before we invoke the handler
> > another time we unmask it.
> > 
> > It does not matter at all whether the interrupt has been sent five
> > times while it was masked. What matters is that we recorded the first
> > one and set the PENDING flag. That way we invoke the interrupt handler
> > again and keep stuff rolling.
> > 
> > Thanks,
> > 
> > 	tglx
> 



  reply	other threads:[~2012-10-21 14:46 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-12 12:31 [PATCH] genirq: for edge interrupt IRQS_ONESHOT support with irq thread Chuansheng Liu
2012-10-12 12:31 ` Thomas Gleixner
2012-10-12 12:38   ` Liu, Chuansheng
2012-10-12 12:46     ` Thomas Gleixner
2012-10-12 13:03       ` Liu, Chuansheng
2012-10-12 13:47         ` Thomas Gleixner
2012-10-12 14:35           ` Liu, Chuansheng
2012-10-12 20:58             ` Thomas Gleixner
2012-10-12 14:57           ` Liu, Chuansheng
2012-10-12 15:24             ` anish kumar
2012-10-12 15:29               ` Liu, Chuansheng
2012-10-12 15:37                 ` anish kumar
2012-10-12 20:52                 ` Thomas Gleixner
2012-10-13  5:21                   ` anish kumar
2012-10-21 14:45                     ` anish kumar [this message]
2012-10-12 20:53             ` Thomas Gleixner
2012-10-12 13:39       ` Liu, Chuansheng
2012-10-12 15:32       ` irq/manage.c wrong comment( ? ) anish kumar
2012-10-21 14:46         ` anish kumar
2012-10-24  9:28           ` Thomas Gleixner

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