From: Elliot Berman <eberman@codeaurora.org>
To: bjorn.andersson@linaro.org, saipraka@codeaurora.org, agross@kernel.org
Cc: tsoni@codeaurora.org, sidgup@codeaurora.org,
psodagud@codeaurora.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org,
Elliot Berman <eberman@codeaurora.org>
Subject: [RFC 14/17] firmware: qcom_scm-32: Add device argument to atomic calls
Date: Tue, 29 Oct 2019 12:41:02 -0700 [thread overview]
Message-ID: <1572378065-4490-15-git-send-email-eberman@codeaurora.org> (raw)
In-Reply-To: <1572378065-4490-1-git-send-email-eberman@codeaurora.org>
Add this unused parameter to reduce merge friction between SMCCC and
legacy based conventions.
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
---
drivers/firmware/qcom_scm-32.c | 18 ++++++++++--------
drivers/firmware/qcom_scm-64.c | 5 +++--
drivers/firmware/qcom_scm.c | 4 ++--
drivers/firmware/qcom_scm.h | 5 +++--
4 files changed, 18 insertions(+), 14 deletions(-)
diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c
index f9eb490..a33fdf1 100644
--- a/drivers/firmware/qcom_scm-32.c
+++ b/drivers/firmware/qcom_scm-32.c
@@ -273,7 +273,7 @@ static int qcom_scm_call(struct device *dev, struct qcom_scm_desc *desc)
* This shall only be used with commands that are guaranteed to be
* uninterruptable, atomic and SMP safe.
*/
-static int qcom_scm_call_atomic(struct qcom_scm_desc *desc)
+static int qcom_scm_call_atomic(struct device *dev, struct qcom_scm_desc *desc)
{
int context_id;
struct arm_smccc_args smc = {0};
@@ -306,7 +306,8 @@ static int qcom_scm_call_atomic(struct qcom_scm_desc *desc)
* Set the cold boot address of the cpus. Any cpu outside the supported
* range would be removed from the cpu present mask.
*/
-int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
+int __qcom_scm_set_cold_boot_addr(struct device *dev, void *entry,
+ const cpumask_t *cpus)
{
int flags = 0;
int cpu;
@@ -336,7 +337,7 @@ int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
desc.args[1] = virt_to_phys(entry);
desc.arginfo = QCOM_SCM_ARGS(2);
- return qcom_scm_call_atomic(&desc);
+ return qcom_scm_call_atomic(dev, &desc);
}
/**
@@ -391,7 +392,7 @@ int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry,
* the control would return from this function, otherwise, the cpu jumps to the
* warm boot entry point set for this cpu upon reset.
*/
-void __qcom_scm_cpu_power_down(u32 flags)
+void __qcom_scm_cpu_power_down(struct device *dev, u32 flags)
{
struct qcom_scm_desc desc = {
.svc = QCOM_SCM_SVC_BOOT,
@@ -401,7 +402,7 @@ void __qcom_scm_cpu_power_down(u32 flags)
.owner = ARM_SMCCC_OWNER_SIP,
};
- qcom_scm_call_atomic(&desc);
+ qcom_scm_call_atomic(dev, &desc);
}
int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id)
@@ -434,7 +435,7 @@ int __qcom_scm_set_dload_mode(struct device *dev, bool enable)
desc.args[1] = enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0;
desc.arginfo = QCOM_SCM_ARGS(2);
- return qcom_scm_call_atomic(&desc);
+ return qcom_scm_call_atomic(dev, &desc);
}
bool __qcom_scm_pas_supported(struct device *dev, u32 peripheral)
@@ -555,11 +556,12 @@ int __qcom_scm_io_readl(struct device *dev, phys_addr_t addr,
desc.args[0] = addr;
desc.arginfo = QCOM_SCM_ARGS(1);
- ret = qcom_scm_call_atomic(&desc);
+ ret = qcom_scm_call_atomic(dev, &desc);
if (ret >= 0)
*val = desc.res[0];
return ret < 0 ? ret : 0;
+
}
int __qcom_scm_io_writel(struct device *dev, phys_addr_t addr, unsigned int val)
@@ -574,7 +576,7 @@ int __qcom_scm_io_writel(struct device *dev, phys_addr_t addr, unsigned int val)
desc.args[1] = val;
desc.arginfo = QCOM_SCM_ARGS(2);
- return qcom_scm_call_atomic(&desc);
+ return qcom_scm_call_atomic(dev, &desc);
}
int __qcom_scm_is_call_available(struct device *dev, u32 svc_id, u32 cmd_id)
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
index 4d7fd3e..9f39483 100644
--- a/drivers/firmware/qcom_scm-64.c
+++ b/drivers/firmware/qcom_scm-64.c
@@ -221,7 +221,8 @@ static int qcom_scm_call_atomic(struct device *dev, struct qcom_scm_desc *desc)
* Set the cold boot address of the cpus. Any cpu outside the supported
* range would be removed from the cpu present mask.
*/
-int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
+int __qcom_scm_set_cold_boot_addr(struct device *dev, void *entry,
+ const cpumask_t *cpus)
{
return -ENOTSUPP;
}
@@ -249,7 +250,7 @@ int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry,
* the control would return from this function, otherwise, the cpu jumps to the
* warm boot entry point set for this cpu upon reset.
*/
-void __qcom_scm_cpu_power_down(u32 flags)
+void __qcom_scm_cpu_power_down(struct device *dev, u32 flags)
{
}
diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index 7244236..bb57fad 100644
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -97,7 +97,7 @@ static void qcom_scm_clk_disable(void)
*/
int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
{
- return __qcom_scm_set_cold_boot_addr(entry, cpus);
+ return __qcom_scm_set_cold_boot_addr(__scm->dev, entry, cpus);
}
EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
@@ -125,7 +125,7 @@ EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
*/
void qcom_scm_cpu_power_down(u32 flags)
{
- __qcom_scm_cpu_power_down(flags);
+ __qcom_scm_cpu_power_down(__scm->dev, flags);
}
EXPORT_SYMBOL(qcom_scm_cpu_power_down);
diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
index 6f63ca6..ce2c396 100644
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -9,10 +9,11 @@
#define QCOM_SCM_BOOT_TERMINATE_PC 0x02
#define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a
#define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10
-extern int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
+extern int __qcom_scm_set_cold_boot_addr(struct device *dev, void *entry,
+ const cpumask_t *cpus);
extern int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry,
const cpumask_t *cpus);
-extern void __qcom_scm_cpu_power_down(u32 flags);
+extern void __qcom_scm_cpu_power_down(struct device *dev, u32 flags);
extern int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id);
extern int __qcom_scm_set_dload_mode(struct device *dev, bool enable);
#define QCOM_SCM_FLUSH_FLAG_MASK 0x3
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2019-10-29 19:41 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-29 19:40 [RFC 00/17] Restructure, improve target support for qcom_scm driver Elliot Berman
2019-10-29 19:40 ` [RFC 01/17] firmware: qcom_scm: Rename macros and structures Elliot Berman
2019-10-29 19:40 ` [RFC 02/17] firmware: qcom_scm: Apply consistent naming scheme to command IDs Elliot Berman
2019-10-29 19:40 ` [RFC 03/17] firmware: qcom_scm: Order functions, definitions by service/command Elliot Berman
2019-10-29 19:40 ` [RFC 04/17] firmware: qcom_scm: Remove unused qcom_scm_get_version Elliot Berman
2019-10-29 19:40 ` [RFC 05/17] firmware: qcom_scm-64: Move svc/cmd/owner into qcom_scm_desc Elliot Berman
2019-10-29 19:40 ` [RFC 06/17] firmware: qcom_scm-64: Add SCM results to descriptor Elliot Berman
2019-10-29 19:40 ` [RFC 07/17] firmware: qcom_scm-64: Remove qcom_scm_call_do_smccc Elliot Berman
2019-10-29 19:40 ` [RFC 08/17] firmware: qcom_scm-64: Move SMC register filling to qcom_scm_call_smccc Elliot Berman
2019-10-29 19:40 ` [RFC 09/17] firmware: qcom_scm-64: Improve SMC convention detection Elliot Berman
2019-10-29 19:40 ` [RFC 10/17] firmware: qcom_scm-32: Use SMC arch wrappers Elliot Berman
2019-10-29 19:40 ` [RFC 11/17] firmware: qcom_scm-32: Use qcom_scm_desc in non-atomic calls Elliot Berman
2019-10-29 19:41 ` [RFC 12/17] firmware: qcom_scm-32: Move SMCCC register filling to qcom_scm_call Elliot Berman
2019-10-29 19:41 ` [RFC 13/17] firmware: qcom_scm-32: Create common legacy atomic call Elliot Berman
2019-10-29 19:41 ` Elliot Berman [this message]
2019-10-29 19:41 ` [RFC 15/17] firmware: qcom_scm: Merge legacy and SMCCC conventions Elliot Berman
2019-10-29 19:41 ` [RFC 16/17] firmware: qcom_scm: Enable legacy calling convention in qcom_scm-64.c Elliot Berman
2019-10-29 19:41 ` [RFC 17/17] firmware: qcom_scm: Rename -64 -> -smc, remove -32 Elliot Berman
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1572378065-4490-15-git-send-email-eberman@codeaurora.org \
--to=eberman@codeaurora.org \
--cc=agross@kernel.org \
--cc=bjorn.andersson@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=psodagud@codeaurora.org \
--cc=saipraka@codeaurora.org \
--cc=sidgup@codeaurora.org \
--cc=tsoni@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox