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* [PATCH] net: phy: ti: add PHY_RST_AFTER_CLK_EN flag
@ 2024-11-02 15:15 Diogo Silva
  2024-11-02 17:03 ` Andrew Lunn
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Diogo Silva @ 2024-11-02 15:15 UTC (permalink / raw)
  To: andrew, hkallweit1, linux, davem, edumazet, kuba, pabeni
  Cc: netdev, linux-kernel, marex, tolvupostur, Diogo Silva

From: Diogo Silva <diogompaissilva@gmail.com>

DP83848	datasheet (section 4.7.2) indicates that the reset pin should be
toggled after the clocks are running. Add the PHY_RST_AFTER_CLK_EN to
make sure that this indication is respected.

In my experience not having this flag enabled would lead to, on some
boots, the wrong MII mode being selected if the PHY was initialized on
the bootloader and was receiving data during Linux boot.

Signed-off-by: Diogo Silva <diogompaissilva@gmail.com>
---
 drivers/net/phy/dp83848.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/phy/dp83848.c b/drivers/net/phy/dp83848.c
index 937061acfc61..351411f0aa6f 100644
--- a/drivers/net/phy/dp83848.c
+++ b/drivers/net/phy/dp83848.c
@@ -147,6 +147,8 @@ MODULE_DEVICE_TABLE(mdio, dp83848_tbl);
 		/* IRQ related */				\
 		.config_intr	= dp83848_config_intr,		\
 		.handle_interrupt = dp83848_handle_interrupt,	\
+								\
+		.flags		= PHY_RST_AFTER_CLK_EN,		\
 	}
 
 static struct phy_driver dp83848_driver[] = {
-- 
2.46.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2024-11-06  1:50 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-11-02 15:15 [PATCH] net: phy: ti: add PHY_RST_AFTER_CLK_EN flag Diogo Silva
2024-11-02 17:03 ` Andrew Lunn
2024-11-03 10:24   ` Diogo Silva
2024-11-03 15:20 ` Andrew Lunn
2024-11-06  1:50 ` patchwork-bot+netdevbpf

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