From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Yicong Yang <yang.yicong@picoheart.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
linux-serial <linux-serial@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
geshijian@picoheart.com, yangyang.8776@picoheart.com,
yanligen@picoheart.com
Subject: Re: [PATCH] serial: 8250_dw: Prefer SRBR in bogus RX timeout workaround if available
Date: Mon, 29 Jun 2026 18:56:28 +0300 (EEST) [thread overview]
Message-ID: <1ef5a875-2c01-5b4b-7d2b-07e6ea3db2b3@linux.intel.com> (raw)
In-Reply-To: <20260629075510.32854-1-yang.yicong@picoheart.com>
On Mon, 29 Jun 2026, Yicong Yang wrote:
> The DW uart could get into the cases where a bogus RX timeout
> interrupt is asserted but no available data. This could be
> workaround by doing a bogus read.
>
> Currently the driver's using the standard RBR (receive buffer
> register) for this bogus read. However the reading of RBR
> in this case is allowed to raise a hardware error if vendor
> choose to implement in this way (our platform). It's also
> allowed to do the bogus read using SRBR (shadow RBR) for
> workaround which won't raise the hardware error. So change
> to use the SRBR to workaround the issue if it's available.
>
> Signed-off-by: Yicong Yang <yang.yicong@picoheart.com>
> ---
> drivers/tty/serial/8250/8250_dw.c | 15 +++++++++++++--
> drivers/tty/serial/8250/8250_dwlib.c | 3 +++
> drivers/tty/serial/8250/8250_dwlib.h | 4 ++++
> 3 files changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
> index 84ffba045ffa..fea7dfa30e78 100644
> --- a/drivers/tty/serial/8250/8250_dw.c
> +++ b/drivers/tty/serial/8250/8250_dw.c
> @@ -440,8 +440,19 @@ static int dw8250_handle_irq(struct uart_port *p)
> if (!up->dma && rx_timeout) {
> status = serial_lsr_in(up);
>
> - if (!(status & (UART_LSR_DR | UART_LSR_BI)))
> - serial_port_in(p, UART_RX);
> + if (!(status & (UART_LSR_DR | UART_LSR_BI))) {
> + /*
> + * Do the bogus read from Shadow RBR (SRBR) if provided.
> + * Both RBR and SRBR are supported ways to workaround
Hi,
I've not come across this being mentioned anywhere else than in kernel
related context, but you seem to imply there something that tells about
"supported ways"?
If there's no such thing, I'm bit hesitant to declare presence of SRBR
guarantees reading it universally solves this issue.
BUT, I suppose it does on your HW since you must have hit this code path,
and thus PSLVERR, yourself to actually discover this issue so I assume
you've then also confirmed that this patch solves the issue in your case
which isn't entirely without merit either.
> + * this problem. But read RBR can cause hardware error
> + * (PSLVERR) if hardware choose to implement in this way
> + * (implement REG_TIMEOUT_WIDTH to 0), whereas SRBR won't.
> + */
> + if (d->data.shadow_support)
> + serial_port_in(p, DW_UART_SRBR_0);
> + else
> + serial_port_in(p, UART_RX);
How about:
serial_port_in(p, d->data.shadow_support ? DW_UART_SRBR_0
: UART_RX);
--
i.
> + }
> }
>
> /* Manually stop the Rx DMA transfer when acting as flow controller */
> diff --git a/drivers/tty/serial/8250/8250_dwlib.c b/drivers/tty/serial/8250/8250_dwlib.c
> index 8859e66d2d71..19d997a59541 100644
> --- a/drivers/tty/serial/8250/8250_dwlib.c
> +++ b/drivers/tty/serial/8250/8250_dwlib.c
> @@ -247,5 +247,8 @@ void dw8250_setup_port(struct uart_port *p)
>
> if (reg & DW_UART_CPR_SIR_MODE)
> up->capabilities |= UART_CAP_IRDA;
> +
> + if (reg & DW_UART_CPR_SHADOW)
> + pd->shadow_support = true;
> }
> EXPORT_SYMBOL_GPL(dw8250_setup_port);
> diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h
> index 1fe52332e774..3ad412d984ed 100644
> --- a/drivers/tty/serial/8250/8250_dwlib.h
> +++ b/drivers/tty/serial/8250/8250_dwlib.h
> @@ -13,6 +13,7 @@
> #include "8250.h"
>
> /* Offsets for the DesignWare specific registers */
> +#define DW_UART_SRBR_0 0x0c /* Shadow Receive Buffer Register */
> #define DW_UART_USR 0x1f /* UART Status Register */
It seems USR and now SRBR_0 are without regshift whereas the reset of
the register defines are with it.
Somewhat unrelated to this patch, I really hate this
dw8250_readl/writel_ext() mess even more now... Why are those needed
anyway, should the .serial_in/out callbacks handle those byte-order, etc.
variations just fine?
Are those _ext calls only required for some early things during probe?
I guess 8250_lpss hasn't setup the callbacks yet before calling
dw8250_setup_port() (I'm not even sure where it gets set with it after
looking for it for a few minutes)?
--
i.
> #define DW_UART_DMASA 0xa8 /* DMA Software Ack */
> #define DW_UART_TCR 0xac /* Transceiver Control Register (RS485) */
> @@ -90,6 +91,9 @@ struct dw8250_port_data {
>
> /* RS485 variables */
> bool hw_rs485_support;
> +
> + /* Support Shadow registers */
> + bool shadow_support;
> };
>
> void dw8250_do_set_termios(struct uart_port *p, struct ktermios *termios, const struct ktermios *old);
>
next prev parent reply other threads:[~2026-06-29 15:56 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-29 7:55 [PATCH] serial: 8250_dw: Prefer SRBR in bogus RX timeout workaround if available Yicong Yang
2026-06-29 14:56 ` Andy Shevchenko
2026-06-29 15:14 ` Ilpo Järvinen
2026-06-29 15:16 ` Andy Shevchenko
2026-06-29 15:56 ` Ilpo Järvinen [this message]
2026-06-29 16:07 ` Andy Shevchenko
2026-06-30 17:51 ` Yicong Yang
2026-06-30 18:18 ` Ilpo Järvinen
2026-06-30 18:42 ` Yicong Yang
2026-07-01 8:45 ` Ilpo Järvinen
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