* [PATCH 2/2] Use the new percpu interface for shared data -- version 3
[not found] <1162040333.1178030136225.JavaMail.was6@nci57003d.marriott.com>
@ 2007-05-22 18:20 ` Fenghua Yu
2007-05-22 18:55 ` Christoph Lameter
0 siblings, 1 reply; 3+ messages in thread
From: Fenghua Yu @ 2007-05-22 18:20 UTC (permalink / raw)
To: akpm, suresh.b.siddha, clameter, kiran, rmk, linux-kernel; +Cc: fenghua.yu
Currently most of the per cpu data, which is accessed by different cpus, has a
____cacheline_aligned_in_smp attribute. Move all this data to the new per cpu
shared data section: .data.percpu.shared_aligned.
This will seperate the percpu data which is referenced frequently by other cpus
from the local only percpu data.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Acked-by: Suresh Siddha <suresh.b.siddha@intel.com>
---
arch/i386/kernel/init_task.c | 2 +-
arch/i386/kernel/irq.c | 2 +-
arch/ia64/kernel/smp.c | 2 +-
arch/x86_64/kernel/init_task.c | 2 +-
kernel/sched.c | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff -Nurp linux-2.6.22-rc1-mm1.0/arch/i386/kernel/init_task.c linux-2.6.22-rc1-mm1.1/arch/i386/kernel/init_task.c
--- linux-2.6.22-rc1-mm1.0/arch/i386/kernel/init_task.c 2007-04-25 20:08:32.000000000 -0700
+++ linux-2.6.22-rc1-mm1.1/arch/i386/kernel/init_task.c 2007-05-18 15:40:08.000000000 -0700
@@ -42,5 +42,5 @@ EXPORT_SYMBOL(init_task);
* per-CPU TSS segments. Threads are completely 'soft' on Linux,
* no more per-task TSS's.
*/
-DEFINE_PER_CPU(struct tss_struct, init_tss) ____cacheline_internodealigned_in_smp = INIT_TSS;
+DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, init_tss) = INIT_TSS;
diff -Nurp linux-2.6.22-rc1-mm1.0/arch/i386/kernel/irq.c linux-2.6.22-rc1-mm1.1/arch/i386/kernel/irq.c
--- linux-2.6.22-rc1-mm1.0/arch/i386/kernel/irq.c 2007-05-18 15:37:16.000000000 -0700
+++ linux-2.6.22-rc1-mm1.1/arch/i386/kernel/irq.c 2007-05-18 15:40:08.000000000 -0700
@@ -21,7 +21,7 @@
#include <asm/apic.h>
#include <asm/uaccess.h>
-DEFINE_PER_CPU(irq_cpustat_t, irq_stat) ____cacheline_internodealigned_in_smp;
+DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
EXPORT_PER_CPU_SYMBOL(irq_stat);
DEFINE_PER_CPU(struct pt_regs *, irq_regs);
diff -Nurp linux-2.6.22-rc1-mm1.0/arch/ia64/kernel/smp.c linux-2.6.22-rc1-mm1.1/arch/ia64/kernel/smp.c
--- linux-2.6.22-rc1-mm1.0/arch/ia64/kernel/smp.c 2007-05-18 15:38:09.000000000 -0700
+++ linux-2.6.22-rc1-mm1.1/arch/ia64/kernel/smp.c 2007-05-18 15:40:08.000000000 -0700
@@ -82,7 +82,7 @@ static volatile struct call_data_struct
#define IPI_KDUMP_CPU_STOP 3
/* This needs to be cacheline aligned because it is written to by *other* CPUs. */
-static DEFINE_PER_CPU(u64, ipi_operation) ____cacheline_aligned;
+static DEFINE_PER_CPU_SHARED_ALIGNED(u64, ipi_operation);
extern void cpu_halt (void);
diff -Nurp linux-2.6.22-rc1-mm1.0/arch/x86_64/kernel/init_task.c linux-2.6.22-rc1-mm1.1/arch/x86_64/kernel/init_task.c
--- linux-2.6.22-rc1-mm1.0/arch/x86_64/kernel/init_task.c 2007-04-25 20:08:32.000000000 -0700
+++ linux-2.6.22-rc1-mm1.1/arch/x86_64/kernel/init_task.c 2007-05-18 15:40:08.000000000 -0700
@@ -44,7 +44,7 @@ EXPORT_SYMBOL(init_task);
* section. Since TSS's are completely CPU-local, we want them
* on exact cacheline boundaries, to eliminate cacheline ping-pong.
*/
-DEFINE_PER_CPU(struct tss_struct, init_tss) ____cacheline_internodealigned_in_smp = INIT_TSS;
+DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, init_tss) = INIT_TSS;
/* Copies of the original ist values from the tss are only accessed during
* debugging, no special alignment required.
diff -Nurp linux-2.6.22-rc1-mm1.0/kernel/sched.c linux-2.6.22-rc1-mm1.1/kernel/sched.c
--- linux-2.6.22-rc1-mm1.0/kernel/sched.c 2007-05-18 15:38:10.000000000 -0700
+++ linux-2.6.22-rc1-mm1.1/kernel/sched.c 2007-05-18 15:40:08.000000000 -0700
@@ -305,7 +305,7 @@ struct rq {
struct lock_class_key rq_lock_key;
};
-static DEFINE_PER_CPU(struct rq, runqueues) ____cacheline_aligned_in_smp;
+static DEFINE_PER_CPU_SHARED_ALIGNED(struct rq, runqueues);
static DEFINE_MUTEX(sched_hotcpu_mutex);
static inline int cpu_of(struct rq *rq)
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