TI PCIe-PCI bridge quirks

TI PCIe-PCI bridge quirks

[Gabe Black]

Hi,

The TI XIO2000A/XIO2200A PCIe-PCI bridge (VID: 104C, DID: 8231)
erroneously handles fast back-to-back transfers on its subordinate bus
segment.  The behavior is seen when there are multiple devices
downstream and transfers from both devices result in a fast b2b
transfer.  This confuses the PCIe-PCI bridge and results in data
corruption.

One way to work around the buggy bridge would be to disable fast b2b
transfers on any device on the subordinate bus-segment by writing the
appropriate bits in the device's pci-configspace command register.

Are there any suggestions on how this might be handled?  Should this
be addressed in the kernel?

Thanks,
Gabe Black

Re: TI PCIe-PCI bridge quirks

[Arjan van de Ven]

On Tue, 22 Sep 2009 14:01:06 -0500
Gabe Black <gabebblack@gmail.com> wrote:

> Hi,
> 
> The TI XIO2000A/XIO2200A PCIe-PCI bridge (VID: 104C, DID: 8231)
> erroneously handles fast back-to-back transfers on its subordinate bus
> segment.  The behavior is seen when there are multiple devices
> downstream and transfers from both devices result in a fast b2b
> transfer.  This confuses the PCIe-PCI bridge and results in data
> corruption.
> 
> One way to work around the buggy bridge would be to disable fast b2b
> transfers on any device on the subordinate bus-segment by writing the
> appropriate bits in the device's pci-configspace command register.
> 
> Are there any suggestions on how this might be handled?  Should this
> be addressed in the kernel?

sounds like this is worth a PCI quirk in the kernel...


-- 
Arjan van de Ven 	Intel Open Source Technology Centre
For development, discussion and tips for power savings, 
visit http://www.lesswatts.org

Re: TI PCIe-PCI bridge quirks

[Gabe Black]

On Tue, Sep 22, 2009 at 2:11 PM, Arjan van de Ven <arjan@infradead.org> wrote:
>
> sounds like this is worth a PCI quirk in the kernel...
>

Is there documentation on how one would go about writing a "PCI quirk"?

Thanks,
Gabe

Re: TI PCIe-PCI bridge quirks

[Arjan van de Ven]

On Tue, 22 Sep 2009 14:37:16 -0500
Gabe Black <gabebblack@gmail.com> wrote:

> On Tue, Sep 22, 2009 at 2:11 PM, Arjan van de Ven
> <arjan@infradead.org> wrote:
> >
> > sounds like this is worth a PCI quirk in the kernel...
> >
> 
> Is there documentation on how one would go about writing a "PCI
> quirk"?
> 

I would look at the existing quirks in the drivers/pci/quirks.c file...
plenty of good (or bad, depending on how you look at it) examples...

--  
Arjan van de Ven 	Intel Open Source Technology Centre
For development, discussion and tips for power savings, 
visit http://www.lesswatts.org

Re: TI PCIe-PCI bridge quirks

[Jesse Barnes]

On Tue, 22 Sep 2009 22:07:47 +0200
Arjan van de Ven <arjan@infradead.org> wrote:

> On Tue, 22 Sep 2009 14:37:16 -0500
> Gabe Black <gabebblack@gmail.com> wrote:
> 
> > On Tue, Sep 22, 2009 at 2:11 PM, Arjan van de Ven
> > <arjan@infradead.org> wrote:
> > >
> > > sounds like this is worth a PCI quirk in the kernel...
> > >
> > 
> > Is there documentation on how one would go about writing a "PCI
> > quirk"?
> > 
> 
> I would look at the existing quirks in the drivers/pci/quirks.c
> file... plenty of good (or bad, depending on how you look at it)
> examples...

Gabe, did you figure out how to do this?  Do you need any more help?

-- 
Jesse Barnes, Intel Open Source Technology Center

Re: TI PCIe-PCI bridge quirks

[Gabe Black]

On Mon, Oct 5, 2009 at 7:09 PM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
>
> Gabe, did you figure out how to do this?  Do you need any more help?
>

Yes, I have a patch tested and ready to go.  Unfortunately, I'm
waiting on approval from the company I work at to submit it.  I really
don't understand what they are so scared of; but they own me :-(

Hopefully it won't be much longer before they let me submit.

-- Gabe

[PATCH] TI XIO200a bridge quirk: erroneously reports support for fast b2b transfers

[Gabe Black]

This quirk will disable fast back to back transfer on the secondary bus
segment of the TI Bridge.

Signed-off-by: Gabe Black <gabe.black@ni.com>
---
 drivers/pci/quirks.c    |   19 +++++++++++++++++++
 include/linux/pci_ids.h |    1 +
 2 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 6099fac..efa6534 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -670,6 +670,25 @@ static void __devinit quirk_vt8235_acpi(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA,	PCI_DEVICE_ID_VIA_8235,	quirk_vt8235_acpi);
 
+/*
+ * TI XIO2000a PCIe-PCI Bridge erroneously reports it supports fast back-to-back:
+ *	Disable fast back-to-back on the secondary bus segment
+ */
+static void __devinit quirk_xio2000a(struct pci_dev *dev)
+{
+	struct pci_dev *pdev;
+	u16 command;
+
+	dev_warn(&dev->dev, "TI XIO2000a quirk detected; "
+		"secondary bus fast back-to-back transfers disabled\n");
+	list_for_each_entry(pdev, &dev->subordinate->devices, bus_list) {
+		pci_read_config_word(pdev, PCI_COMMAND, &command);
+		if (command & PCI_COMMAND_FAST_BACK)
+			pci_write_config_word(pdev, PCI_COMMAND, command & ~PCI_COMMAND_FAST_BACK);
+	}
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XIO2000A,
+			quirk_xio2000a);
 
 #ifdef CONFIG_X86_IO_APIC 
 
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index da1fda8..f490e7a 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -776,6 +776,7 @@
 #define PCI_DEVICE_ID_TI_X515		0x8036
 #define PCI_DEVICE_ID_TI_XX12		0x8039
 #define PCI_DEVICE_ID_TI_XX12_FM	0x803b
+#define PCI_DEVICE_ID_TI_XIO2000A	0x8231
 #define PCI_DEVICE_ID_TI_1130		0xac12
 #define PCI_DEVICE_ID_TI_1031		0xac13
 #define PCI_DEVICE_ID_TI_1131		0xac15
-- 
1.6.0.4

Re: [PATCH] TI XIO200a bridge quirk: erroneously reports support for fast b2b transfers

[Jesse Barnes]

On Tue, 6 Oct 2009 09:19:45 -0500
Gabe Black <gabe.black@ni.com> wrote:

> This quirk will disable fast back to back transfer on the secondary
> bus segment of the TI Bridge.
> 
> Signed-off-by: Gabe Black <gabe.black@ni.com>

Applied to my for-linus branch.

-- 
Jesse Barnes, Intel Open Source Technology Center