From: Andi Kleen <ak@linux.intel.com>
To: Stephane Eranian <eranian@google.com>
Cc: Andi Kleen <andi@firstfloor.org>,
linux-kernel@vger.kernel.org, peterz@infradead.org,
mingo@elte.hu
Subject: Re: [PATCH 1/2] perf, x86: Add basic Ivy Bridge support
Date: Thu, 7 Jun 2012 15:43:03 -0700 [thread overview]
Message-ID: <20120607224303.GN28225@tassilo.jf.intel.com> (raw)
In-Reply-To: <CABPqkBSEknXdTQWCrxeeeFgREX02ARRzxJ8bj6uh+0yOi0nAjg@mail.gmail.com>
> But as far as I know for the other generic stall event:
> /* UOPS_DISPATCHED.THREAD,c=1,i=1 to count stall cycles*/
> intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =
> X86_CONFIG(.event=0xb1, .umask=0x01, .inv=1, .cmask=1);
Okay. I'll just undefine it.
-Andi
--
ak@linux.intel.com -- Speaking for myself only
next prev parent reply other threads:[~2012-06-07 22:43 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-07 22:29 [PATCH 1/2] perf, x86: Add basic Ivy Bridge support Andi Kleen
2012-06-07 22:29 ` [PATCH 2/2] perf, x86: Enable PDIR precise instruction profiling on IvyBridge Andi Kleen
2012-06-07 22:37 ` [PATCH 1/2] perf, x86: Add basic Ivy Bridge support Stephane Eranian
2012-06-07 22:43 ` Andi Kleen [this message]
2012-06-08 7:42 ` Stephane Eranian
2012-06-08 16:44 ` Andi Kleen
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