From: Andi Kleen <andi@firstfloor.org>
To: Stephane Eranian <eranian@google.com>
Cc: Andi Kleen <ak@linux.intel.com>, Andi Kleen <andi@firstfloor.org>,
linux-kernel@vger.kernel.org, peterz@infradead.org,
mingo@elte.hu
Subject: Re: [PATCH 1/2] perf, x86: Add basic Ivy Bridge support
Date: Fri, 8 Jun 2012 18:44:59 +0200 [thread overview]
Message-ID: <20120608164459.GA27374@one.firstfloor.org> (raw)
In-Reply-To: <CABPqkBTQMGX8qcy_HapkjabWUS_2hs4kVeEDputL5Kjk1kjMLg@mail.gmail.com>
On Fri, Jun 08, 2012 at 09:42:42AM +0200, Stephane Eranian wrote:
> Also IVB needs its own pebs_constraint table as there is a new PEBS
> event (0xd3):
Ok. Will add.
-Andi
>
> +struct event_constraint intel_ivb_pebs_event_constraints[] = {
> + INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.ALL */
> + INTEL_EVENT_CONSTRAINT(0xc2, 0xf), /* UOPS_RETIRED.* */
> + INTEL_EVENT_CONSTRAINT(0xc4, 0xf), /* BR_INST_RETIRED.* */
> + INTEL_EVENT_CONSTRAINT(0xc5, 0xf), /* BR_MISP_RETIRED.* */
> + INTEL_EVENT_CONSTRAINT(0xcd, 0x8), /* MEM_TRANS_RETIRED.* */
> + INTEL_EVENT_CONSTRAINT(0xd0, 0xf), /* MEM_UOP_RETIRED.* */
> + INTEL_EVENT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */
> + INTEL_EVENT_CONSTRAINT(0xd2, 0xf), /*
> MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */
> + INTEL_EVENT_CONSTRAINT(0xd3, 0xf), /*
> MEM_LOAD_UOPS_LLC_MISS.LOCAL_DRAM */
> + EVENT_CONSTRAINT_END
> +};
> +
prev parent reply other threads:[~2012-06-08 16:45 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-07 22:29 [PATCH 1/2] perf, x86: Add basic Ivy Bridge support Andi Kleen
2012-06-07 22:29 ` [PATCH 2/2] perf, x86: Enable PDIR precise instruction profiling on IvyBridge Andi Kleen
2012-06-07 22:37 ` [PATCH 1/2] perf, x86: Add basic Ivy Bridge support Stephane Eranian
2012-06-07 22:43 ` Andi Kleen
2012-06-08 7:42 ` Stephane Eranian
2012-06-08 16:44 ` Andi Kleen [this message]
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