From: Grant Likely <grant.likely@secretlab.ca>
To: Qing Xu <qingx@marvell.com>,
qingx@marvell.com, rob@landley.net, sameo@linux.intel.com,
haojian.zhuang@gmail.com, rob.herring@calxeda.com,
zhouqiao@marvell.com, cxie4@marvell.com,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] Documentation: add docs for 88pm80x dt
Date: Wed, 05 Dec 2012 22:55:38 +0000 [thread overview]
Message-ID: <20121205225538.731E73E0E22@localhost> (raw)
In-Reply-To: <1354686120-26169-1-git-send-email-qingx@marvell.com>
On Wed, 5 Dec 2012 13:42:00 +0800, Qing Xu <qingx@marvell.com> wrote:
> From: Qing Xu <qingx@marvell.com>
>
> Signed-off-by: Qing Xu <qingx@marvell.com>
No commit text?
This patch needs to be squashed together with the patch that changes the
driver. There is no value in separating them.
> ---
> Documentation/devicetree/bindings/mfd/88pm80x.txt | 52 +++++++++++++++++++++
> 1 files changed, 52 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/mfd/88pm80x.txt
>
> diff --git a/Documentation/devicetree/bindings/mfd/88pm80x.txt b/Documentation/devicetree/bindings/mfd/88pm80x.txt
> new file mode 100644
> index 0000000..8a0ed07
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/88pm80x.txt
> @@ -0,0 +1,52 @@
> +* Marvell 88pm80x Power Management IC
> +
> +Required parent device properties:
> +- compatible : "marvell,88pm80x"
> +- reg : the I2C slave address for the 88pm80x chip
> +- interrupts : IRQ line for the 88pm80x chip
> +- interrupt-controller: describes the 88pm80x as an interrupt controller (has its own domain)
> +- #interrupt-cells : should be 1.
> + - The cell is the 88pm80x local IRQ number
> +
> +Optional parent device properties:
> +- marvell,88pm80x-irqmode: inicates whether interrupt status is cleared by read
> +- marvell,88pm80x-poweraddr: 88pm80x are multi-chips solution. <reg> stores the I2C address
> + of one chip, and this property stores the I2C address of
> + power related chip.
> +- marvell,88pm80x-gpadcaddr: 88pm80x are multi-chips solution. <reg> stores the I2C address
> + of one chip, and this property stores the I2C address of
> + gpadc related chip.
If it is multichip, then I would expect either a separate node for each
chip and these properties use phandles (instead of i2c addresses) to
point to the other chip nodes.
Alternately, if the cluster is described using a single node, then you
can put all three i2c addresses into the 'reg' property.
g.
next prev parent reply other threads:[~2012-12-05 22:55 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-05 5:42 [PATCH 2/2] Documentation: add docs for 88pm80x dt Qing Xu
2012-12-05 22:55 ` Grant Likely [this message]
2012-12-06 1:58 ` Qing Xu
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