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From: Borislav Petkov <bp@alien8.de>
To: tthayer@altera.com
Cc: robherring2@gmail.com, dougthompson@xmission.com,
	grant.likely@linaro.org, pawel.moll@arm.com,
	mark.rutland@arm.com, ijc+devicetree@hellion.org.uk,
	galak@codeaurora.org, rob@landley.net, linux@arm.linux.org.uk,
	dinguyen@altera.com, devicetree@vger.kernel.org,
	linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/3] edac: altera: Add SDRAM EDAC support for CycloneV/ArriaV
Date: Tue, 8 Apr 2014 12:08:51 +0200	[thread overview]
Message-ID: <20140408100851.GF30077@pd.tnic> (raw)
In-Reply-To: <1396907649-20212-4-git-send-email-tthayer@altera.com>

On Mon, Apr 07, 2014 at 04:54:09PM -0500, tthayer@altera.com wrote:
> From: Thor Thayer <tthayer@altera.com>
> 
> Added EDAC support for reporting ECC errors of CycloneV
> and ArriaV SDRAM controller.
> - The SDRAM Controller registers are used by the FPGA bridge so
>   these are accessed through the syscon interface.
> - The configuration of the SDRAM memory size for the EDAC framework
>   is discovered from the memory node of the device tree.
> - Documentation of the bindings in devicetree/bindings/arm/altera/
>   socfpga-sdram-edac.txt
> - Correction of single bit errors, detection of double bit errors.

Before I go and take a look at this further, is anyone at Altera going
to maintain this driver in case of bug reports and issues with it?

Also, I see patch 3/3. Are the other two related? I see they are
devicetree additions and, as such, all three should go together...

-- 
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
--

  reply	other threads:[~2014-04-08 10:08 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1396907649-20212-1-git-send-email-tthayer@altera.com>
2014-04-07 21:54 ` [PATCH 1/3] dts: socfpga: Add bindings for Altera SoC SDRAM controller tthayer
2014-04-08 10:48   ` Mark Rutland
2014-04-08 13:38   ` Steffen Trumtrar
2014-04-08 14:29     ` Thor Thayer
2014-04-08 14:33       ` Steffen Trumtrar
2014-04-08 16:02         ` delicious quinoa
2014-04-08 18:52           ` Rob Herring
2014-04-11 14:21             ` Thor Thayer
2014-04-11 14:43             ` Thor Thayer
2014-04-11 14:49             ` Thor Thayer
2014-07-10 21:02             ` Alan Tull
2014-04-07 21:54 ` [PATCH 2/3] dts: socfpga: Add bindings for Altera SoC SDRAM EDAC tthayer
2014-04-08 10:51   ` Mark Rutland
2014-04-07 21:54 ` [PATCH 3/3] edac: altera: Add SDRAM EDAC support for CycloneV/ArriaV tthayer
2014-04-08 10:08   ` Borislav Petkov [this message]
2014-04-08 13:57     ` Thor Thayer
2014-04-08 15:24       ` Borislav Petkov
2014-04-08 15:40         ` Mark Rutland
2014-04-08 16:03           ` Borislav Petkov
2014-04-08 16:10             ` Mark Rutland
2014-04-08 16:22               ` Borislav Petkov
2014-04-08 21:15                 ` Thor Thayer
2014-04-08 10:45   ` Mark Rutland
2014-04-08 12:45     ` Steffen Trumtrar
2014-04-08 14:00       ` Thor Thayer

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