From: Rob Herring <robh@kernel.org>
To: tthayer@opensource.altera.com
Cc: bp@alien8.de, dougthompson@xmission.com, m.chehab@samsung.com,
pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
linux@arm.linux.org.uk, dinguyen@opensource.altera.com,
grant.likely@linaro.org, devicetree@vger.kernel.org,
linux-doc@vger.kernel.org, linux-edac@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, tthayer.linux@gmail.com
Subject: Re: [PATCH 2/5] Documentation: dt: socfpga: Add Altera Arri10 L2 cache binding
Date: Fri, 4 Mar 2016 22:26:13 -0600 [thread overview]
Message-ID: <20160305042613.GI13525@rob-hp-laptop> (raw)
In-Reply-To: <1456850301-22066-2-git-send-email-tthayer@opensource.altera.com>
On Tue, Mar 01, 2016 at 10:38:18AM -0600, tthayer@opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
>
> Add the device tree binding string needed to support the Altera L2
> cache on the Arria10 chip.
>
> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
> ---
> .../bindings/arm/altera/socfpga-eccmgr.txt | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Acked-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2016-03-05 4:26 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-01 16:38 [PATCH 1/5] EDAC: Altera L2 Kconfig change from select to depends upon tthayer
2016-03-01 16:38 ` [PATCH 2/5] Documentation: dt: socfpga: Add Altera Arri10 L2 cache binding tthayer
2016-03-05 4:26 ` Rob Herring [this message]
2016-03-01 16:38 ` [PATCH 3/5] EDAC, altera: Addition of Arria10 L2 Cache ECC tthayer
2016-03-04 10:38 ` Borislav Petkov
2016-03-04 15:42 ` Thor Thayer
2016-03-01 16:38 ` [PATCH 4/5] ARM: socfpga: Enable Arria10 L2 cache ECC on startup tthayer
2016-03-05 6:36 ` Dinh Nguyen
2016-03-01 16:38 ` [PATCH 5/5] ARM: dts: Add Altera Arria10 L2 Cache EDAC devicetree entry tthayer
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