From: Peter Zijlstra <peterz@infradead.org>
To: Will Deacon <will.deacon@arm.com>
Cc: linux-kernel@vger.kernel.org,
"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
Subject: Re: [PATCH] atomic/bitops: Clarify ordering semantics for failed test_and_{}_bit()
Date: Tue, 13 Feb 2018 14:51:24 +0100 [thread overview]
Message-ID: <20180213135124.GL25201@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <1518528619-20049-1-git-send-email-will.deacon@arm.com>
On Tue, Feb 13, 2018 at 01:30:19PM +0000, Will Deacon wrote:
> A test_and_{}_bit() operation fails if the value of the bit is such that
> the modification does not take place. For example, if test_and_set_bit()
> returns 1. In these cases, follow the behaviour of cmpxchg and allow the
> operation to be unordered. This also applies to test_and_set_bit_lock()
> if the lock is found to be be taken already.
You also looked at a bunch of users, right? And while you found some
dodgy ones, they were not more broken because of this IIRC.
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
> Signed-off-by: Will Deacon <will.deacon@arm.com>
> ---
> Documentation/atomic_bitops.txt | 7 ++++++-
> include/asm-generic/bitops/lock.h | 3 ++-
> 2 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/atomic_bitops.txt b/Documentation/atomic_bitops.txt
> index 5550bfdcce5f..be70b32c95d9 100644
> --- a/Documentation/atomic_bitops.txt
> +++ b/Documentation/atomic_bitops.txt
> @@ -58,7 +58,12 @@ Like with atomic_t, the rule of thumb is:
>
> - RMW operations that have a return value are fully ordered.
>
> -Except for test_and_set_bit_lock() which has ACQUIRE semantics and
> + - RMW operations that are conditional are unordered on FAILURE,
> + otherwise the above rules apply. In the case of test_and_{}_bit() operations,
> + if the bit in memory is unchanged by the operation then it is deemed to have
> + failed.
> +
> +Except for a successful test_and_set_bit_lock() which has ACQUIRE semantics and
> clear_bit_unlock() which has RELEASE semantics.
>
> Since a platform only has a single means of achieving atomic operations
> diff --git a/include/asm-generic/bitops/lock.h b/include/asm-generic/bitops/lock.h
> index bc397573c43a..67ab280ad134 100644
> --- a/include/asm-generic/bitops/lock.h
> +++ b/include/asm-generic/bitops/lock.h
> @@ -7,7 +7,8 @@
> * @nr: Bit to set
> * @addr: Address to count from
> *
> - * This operation is atomic and provides acquire barrier semantics.
> + * This operation is atomic and provides acquire barrier semantics if
> + * the returned value is 0.
> * It can be used to implement bit locks.
> */
> #define test_and_set_bit_lock(nr, addr) test_and_set_bit(nr, addr)
> --
> 2.1.4
>
next prev parent reply other threads:[~2018-02-13 13:51 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-13 13:30 [PATCH] atomic/bitops: Clarify ordering semantics for failed test_and_{}_bit() Will Deacon
2018-02-13 13:51 ` Peter Zijlstra [this message]
2018-02-13 15:28 ` [tip:locking/urgent] locking/atomic/bitops: Document and clarify " tip-bot for Will Deacon
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