From: Mark Brown <broonie@kernel.org>
To: "Andreas Färber" <afaerber@suse.de>
Cc: linux-mips@linux-mips.org, Ralf Baechle <ralf@linux-mips.org>,
Paul Burton <paul.burton@mips.com>,
James Hogan <jhogan@kernel.org>,
linux-kernel@vger.kernel.org,
Ionela Voinescu <ionela.voinescu@imgtec.com>,
linux-spi@vger.kernel.org
Subject: Re: [PATCH 13/15] spi: img-spfi: RX maximum burst size for DMA is 8
Date: Mon, 30 Jul 2018 16:34:46 +0100 [thread overview]
Message-ID: <20180730153446.GN5789@sirena.org.uk> (raw)
In-Reply-To: <20180722212010.3979-14-afaerber@suse.de>
[-- Attachment #1: Type: text/plain, Size: 1174 bytes --]
On Sun, Jul 22, 2018 at 11:20:08PM +0200, Andreas Färber wrote:
> From: Ionela Voinescu <ionela.voinescu@imgtec.com>
>
> The depth of the FIFOs is 16 bytes. The DMA request line is tied
> to the half full/empty (depending on the use of the TX or RX FIFO)
> threshold. For the TX FIFO, if you set a burst size of 8 (equal to
> half the depth) the first burst goes into FIFO without any issues,
> but due the latency involved (the time the data leaves the DMA
> engine to the time it arrives at the FIFO), the DMA might trigger
> another burst of 8. But given that there is no space for 2 additonal
> bursts of 8, this would result in a failure. Therefore, we have to
> keep the burst size for TX to 4 to accomodate for an extra burst.
This seems like something that should be sent as a bug fix - doesn't it
fix anything? If it is a fix then it should've gone at the start of the
series so it's got no dependencies and could be sent to Linus for the
current release.
> While here, move the burst size setting outside of the if/else branches
> as they have the same value for both 8 and 32 bit data widths.
Though this refactoring probably less so.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
next prev parent reply other threads:[~2018-07-30 15:34 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-22 21:19 [PATCH 00/15] MIPS: pistachio: Creator Ci40 aka Marduk SPI-UART Andreas Färber
2018-07-22 21:19 ` [PATCH 01/15] MIPS: dts: img: pistachio_marduk: Reorder nodes Andreas Färber
2018-07-22 21:19 ` [PATCH 02/15] MIPS: dts: img: pistachio_marduk: Cleanups Andreas Färber
2018-07-22 21:19 ` [PATCH 03/15] MIPS: dts: img: pistachio: Rename spim0-clk pin node label Andreas Färber
2018-07-22 21:19 ` [PATCH 04/15] MIPS: dts: img: pistachio_marduk: Switch mmc to 1 bit mode Andreas Färber
2018-07-24 22:15 ` Andreas Färber
2018-07-22 21:20 ` [PATCH 05/15] MIPS: dts: img: pistachio_marduk: Enable SPIM0 Andreas Färber
2018-07-22 21:20 ` [PATCH 06/15] MIPS: dts: img: pistachio_marduk: Add 6Lowpan node Andreas Färber
2018-07-24 0:06 ` Paul Burton
2018-07-22 21:20 ` [PATCH 07/15] MIPS: dts: img: pistachio_marduk: Add SPI UART node Andreas Färber
2018-07-22 21:20 ` [PATCH 08/15] MIPS: dts: img: pistachio_marduk: Add user LEDs Andreas Färber
2018-07-22 21:20 ` [PATCH 09/15] dmaengine: img-mdc: Handle early status read Andreas Färber
2018-07-24 11:36 ` Vinod Koul
2018-07-22 21:20 ` [PATCH 10/15] spi: img-spfi: Implement dual and quad mode Andreas Färber
2018-07-30 15:30 ` Mark Brown
2018-07-22 21:20 ` [PATCH 11/15] spi: img-spfi: Set device select bits for SPFI port state Andreas Färber
2018-07-22 21:20 ` [PATCH 12/15] spi: img-spfi: Use device 0 configuration for all devices Andreas Färber
2018-07-22 21:20 ` [PATCH 13/15] spi: img-spfi: RX maximum burst size for DMA is 8 Andreas Färber
2018-07-30 15:34 ` Mark Brown [this message]
2018-07-22 21:20 ` [PATCH 14/15] spi: img-spfi: Finish every transfer cleanly Andreas Färber
2018-07-30 15:35 ` Mark Brown
2018-07-22 21:20 ` [PATCH 15/15] clk: pistachio: Fix wrong SDHost card speed Andreas Färber
2018-07-25 23:43 ` Stephen Boyd
2018-07-31 21:21 ` Rob Herring
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180730153446.GN5789@sirena.org.uk \
--to=broonie@kernel.org \
--cc=afaerber@suse.de \
--cc=ionela.voinescu@imgtec.com \
--cc=jhogan@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@linux-mips.org \
--cc=linux-spi@vger.kernel.org \
--cc=paul.burton@mips.com \
--cc=ralf@linux-mips.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox