From: Peter Zijlstra <peterz@infradead.org>
To: kan.liang@linux.intel.com
Cc: acme@kernel.org, mingo@redhat.com, linux-kernel@vger.kernel.org,
tglx@linutronix.de, jolsa@kernel.org, eranian@google.com,
alexander.shishkin@linux.intel.com, ak@linux.intel.com
Subject: Re: [PATCH 2/9] perf/x86/intel: Basic support for metrics counters
Date: Tue, 28 May 2019 14:15:08 +0200 [thread overview]
Message-ID: <20190528121508.GS2606@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20190521214055.31060-3-kan.liang@linux.intel.com>
On Tue, May 21, 2019 at 02:40:48PM -0700, kan.liang@linux.intel.com wrote:
> +/*
> + * We model PERF_METRICS as more magic fixed-mode PMCs, one for each metric
> + * and another for the whole slots counter
> + *
> + * Internally they all map to Fixed Ctr 3 (SLOTS), and allocate PERF_METRICS
> + * as an extra_reg. PERF_METRICS has no own configuration, but we fill in
> + * the configuration of FxCtr3 to enforce that all the shared users of SLOTS
> + * have the same configuration.
> + */
> +#define INTEL_PMC_IDX_FIXED_METRIC_BASE (INTEL_PMC_IDX_FIXED + 17)
> +#define INTEL_PMC_IDX_TD_RETIRING (INTEL_PMC_IDX_FIXED_METRIC_BASE + 0)
> +#define INTEL_PMC_IDX_TD_BAD_SPEC (INTEL_PMC_IDX_FIXED_METRIC_BASE + 1)
> +#define INTEL_PMC_IDX_TD_FE_BOUND (INTEL_PMC_IDX_FIXED_METRIC_BASE + 2)
> +#define INTEL_PMC_IDX_TD_BE_BOUND (INTEL_PMC_IDX_FIXED_METRIC_BASE + 3)
> +#define INTEL_PMC_MSK_ANY_SLOTS ((0xfull << INTEL_PMC_IDX_FIXED_METRIC_BASE) | \
> + INTEL_PMC_MSK_FIXED_SLOTS)
> +static inline bool is_metric_idx(int idx)
> +{
> + return idx >= INTEL_PMC_IDX_FIXED_METRIC_BASE && idx <= INTEL_PMC_IDX_TD_BE_BOUND;
> +}
Something like:
return (idx >> INTEL_PMC_IDX_FIXED_METRIC_BASE) & 0xf;
might be faster code... (if it wasn't for 64bit literals being a pain,
it could be a simple test instruction).
next prev parent reply other threads:[~2019-05-28 12:15 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-21 21:40 [PATCH 0/9] TopDown metrics support for Icelake kan.liang
2019-05-21 21:40 ` [PATCH 1/9] perf/core: Support a REMOVE transaction kan.liang
2019-05-21 21:40 ` [PATCH 2/9] perf/x86/intel: Basic support for metrics counters kan.liang
2019-05-28 12:05 ` Peter Zijlstra
2019-05-28 18:20 ` Liang, Kan
2019-05-28 12:15 ` Peter Zijlstra [this message]
2019-05-28 18:21 ` Liang, Kan
2019-05-29 7:28 ` Peter Zijlstra
2019-05-29 14:40 ` Liang, Kan
2019-05-29 16:46 ` Peter Zijlstra
2019-05-29 8:14 ` Peter Zijlstra
2019-05-21 21:40 ` [PATCH 3/9] perf/x86/intel: Support overflows on SLOTS kan.liang
2019-05-28 12:20 ` Peter Zijlstra
2019-05-28 18:22 ` Liang, Kan
2019-05-21 21:40 ` [PATCH 4/9] perf/x86/intel: Support hardware TopDown metrics kan.liang
2019-05-28 12:43 ` Peter Zijlstra
2019-05-28 18:23 ` Liang, Kan
2019-05-29 7:30 ` Peter Zijlstra
2019-05-28 12:53 ` Peter Zijlstra
2019-05-28 12:56 ` Peter Zijlstra
2019-05-28 13:32 ` Peter Zijlstra
2019-05-28 13:30 ` Peter Zijlstra
2019-05-28 18:24 ` Liang, Kan
2019-05-29 7:34 ` Peter Zijlstra
2019-05-29 14:41 ` Liang, Kan
2019-05-28 13:43 ` Peter Zijlstra
2019-05-28 18:24 ` Liang, Kan
2019-05-29 7:54 ` Peter Zijlstra
2019-05-29 14:42 ` Liang, Kan
2019-05-29 16:58 ` Peter Zijlstra
2019-06-04 20:39 ` Liang, Kan
2019-05-28 13:48 ` Peter Zijlstra
2019-05-28 18:24 ` Liang, Kan
2019-05-29 7:57 ` Peter Zijlstra
2019-05-29 14:42 ` Liang, Kan
2019-05-21 21:40 ` [PATCH 5/9] perf/x86/intel: Set correct weight for TopDown metrics events kan.liang
2019-05-28 13:50 ` Peter Zijlstra
2019-05-21 21:40 ` [PATCH 6/9] perf/x86/intel: Export new TopDown metrics events for Icelake kan.liang
2019-05-21 21:40 ` [PATCH 7/9] perf/x86/intel: Disable sampling read slots and topdown kan.liang
2019-05-28 13:52 ` Peter Zijlstra
2019-05-28 18:25 ` Liang, Kan
2019-05-29 7:58 ` Peter Zijlstra
2019-05-21 21:40 ` [PATCH 8/9] perf, tools, stat: Support new per thread TopDown metrics kan.liang
2019-05-21 21:40 ` [PATCH 9/9] perf, tools: Add documentation for topdown metrics kan.liang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190528121508.GS2606@hirez.programming.kicks-ass.net \
--to=peterz@infradead.org \
--cc=acme@kernel.org \
--cc=ak@linux.intel.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=eranian@google.com \
--cc=jolsa@kernel.org \
--cc=kan.liang@linux.intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox