* drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c:123:39: sparse: sparse: restricted __le32 degrades to integer
@ 2020-07-28 5:10 kernel test robot
2020-07-28 6:00 ` [PATCH] crypto: sun8i-ce - Fix writel byte-order on big-endian Herbert Xu
0 siblings, 1 reply; 4+ messages in thread
From: kernel test robot @ 2020-07-28 5:10 UTC (permalink / raw)
To: Corentin Labbe; +Cc: kbuild-all, linux-kernel, Herbert Xu
[-- Attachment #1: Type: text/plain, Size: 5166 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 92ed301919932f777713b9172e525674157e983d
commit: 93c7f4d357de68f1e3a998b2fc775466d75c4c07 crypto: sun8i-ce - enable working on big endian
date: 8 months ago
config: arm64-randconfig-s031-20200728 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.2-94-geb6779f6-dirty
git checkout 93c7f4d357de68f1e3a998b2fc775466d75c4c07
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c:123:39: sparse: sparse: restricted __le32 degrades to integer
vim +123 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
06f751b613296c Corentin Labbe 2019-10-23 109
06f751b613296c Corentin Labbe 2019-10-23 110 mutex_lock(&ce->mlock);
06f751b613296c Corentin Labbe 2019-10-23 111
06f751b613296c Corentin Labbe 2019-10-23 112 v = readl(ce->base + CE_ICR);
06f751b613296c Corentin Labbe 2019-10-23 113 v |= 1 << flow;
06f751b613296c Corentin Labbe 2019-10-23 114 writel(v, ce->base + CE_ICR);
06f751b613296c Corentin Labbe 2019-10-23 115
06f751b613296c Corentin Labbe 2019-10-23 116 reinit_completion(&ce->chanlist[flow].complete);
06f751b613296c Corentin Labbe 2019-10-23 117 writel(ce->chanlist[flow].t_phy, ce->base + CE_TDQ);
06f751b613296c Corentin Labbe 2019-10-23 118
06f751b613296c Corentin Labbe 2019-10-23 119 ce->chanlist[flow].status = 0;
06f751b613296c Corentin Labbe 2019-10-23 120 /* Be sure all data is written before enabling the task */
06f751b613296c Corentin Labbe 2019-10-23 121 wmb();
06f751b613296c Corentin Labbe 2019-10-23 122
06f751b613296c Corentin Labbe 2019-10-23 @123 v = 1 | (ce->chanlist[flow].tl->t_common_ctl & 0x7F) << 8;
06f751b613296c Corentin Labbe 2019-10-23 124 writel(v, ce->base + CE_TLR);
06f751b613296c Corentin Labbe 2019-10-23 125 mutex_unlock(&ce->mlock);
06f751b613296c Corentin Labbe 2019-10-23 126
06f751b613296c Corentin Labbe 2019-10-23 127 wait_for_completion_interruptible_timeout(&ce->chanlist[flow].complete,
06f751b613296c Corentin Labbe 2019-10-23 128 msecs_to_jiffies(ce->chanlist[flow].timeout));
06f751b613296c Corentin Labbe 2019-10-23 129
06f751b613296c Corentin Labbe 2019-10-23 130 if (ce->chanlist[flow].status == 0) {
06f751b613296c Corentin Labbe 2019-10-23 131 dev_err(ce->dev, "DMA timeout for %s\n", name);
06f751b613296c Corentin Labbe 2019-10-23 132 err = -EFAULT;
06f751b613296c Corentin Labbe 2019-10-23 133 }
06f751b613296c Corentin Labbe 2019-10-23 134 /* No need to lock for this read, the channel is locked so
06f751b613296c Corentin Labbe 2019-10-23 135 * nothing could modify the error value for this channel
06f751b613296c Corentin Labbe 2019-10-23 136 */
06f751b613296c Corentin Labbe 2019-10-23 137 v = readl(ce->base + CE_ESR);
06f751b613296c Corentin Labbe 2019-10-23 138 if (v) {
06f751b613296c Corentin Labbe 2019-10-23 139 v >>= (flow * 4);
06f751b613296c Corentin Labbe 2019-10-23 140 v &= 0xFF;
06f751b613296c Corentin Labbe 2019-10-23 141 if (v) {
06f751b613296c Corentin Labbe 2019-10-23 142 dev_err(ce->dev, "CE ERROR: %x for flow %x\n", v, flow);
06f751b613296c Corentin Labbe 2019-10-23 143 err = -EFAULT;
06f751b613296c Corentin Labbe 2019-10-23 144 }
06f751b613296c Corentin Labbe 2019-10-23 145 if (v & CE_ERR_ALGO_NOTSUP)
06f751b613296c Corentin Labbe 2019-10-23 146 dev_err(ce->dev, "CE ERROR: algorithm not supported\n");
06f751b613296c Corentin Labbe 2019-10-23 147 if (v & CE_ERR_DATALEN)
06f751b613296c Corentin Labbe 2019-10-23 148 dev_err(ce->dev, "CE ERROR: data length error\n");
06f751b613296c Corentin Labbe 2019-10-23 149 if (v & CE_ERR_KEYSRAM)
06f751b613296c Corentin Labbe 2019-10-23 150 dev_err(ce->dev, "CE ERROR: keysram access error for AES\n");
06f751b613296c Corentin Labbe 2019-10-23 151 if (v & CE_ERR_ADDR_INVALID)
06f751b613296c Corentin Labbe 2019-10-23 152 dev_err(ce->dev, "CE ERROR: address invalid\n");
06f751b613296c Corentin Labbe 2019-10-23 153 }
06f751b613296c Corentin Labbe 2019-10-23 154
06f751b613296c Corentin Labbe 2019-10-23 155 return err;
06f751b613296c Corentin Labbe 2019-10-23 156 }
06f751b613296c Corentin Labbe 2019-10-23 157
:::::: The code at line 123 was first introduced by commit
:::::: 06f751b613296cc34b86fc83fccaf30d646eb8bc crypto: allwinner - Add sun8i-ce Crypto Engine
:::::: TO: Corentin Labbe <clabbe.montjoie@gmail.com>
:::::: CC: Herbert Xu <herbert@gondor.apana.org.au>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
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^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH] crypto: sun8i-ce - Fix writel byte-order on big-endian
2020-07-28 5:10 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c:123:39: sparse: sparse: restricted __le32 degrades to integer kernel test robot
@ 2020-07-28 6:00 ` Herbert Xu
2020-08-01 6:47 ` Corentin Labbe
0 siblings, 1 reply; 4+ messages in thread
From: Herbert Xu @ 2020-07-28 6:00 UTC (permalink / raw)
To: kernel test robot; +Cc: Corentin Labbe, kbuild-all, linux-kernel
On Tue, Jul 28, 2020 at 01:10:13PM +0800, kernel test robot wrote:
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> head: 92ed301919932f777713b9172e525674157e983d
> commit: 93c7f4d357de68f1e3a998b2fc775466d75c4c07 crypto: sun8i-ce - enable working on big endian
> date: 8 months ago
> config: arm64-randconfig-s031-20200728 (attached as .config)
> compiler: aarch64-linux-gcc (GCC) 9.3.0
> reproduce:
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # apt-get install sparse
> # sparse version: v0.6.2-94-geb6779f6-dirty
> git checkout 93c7f4d357de68f1e3a998b2fc775466d75c4c07
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm64
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
This looks like a real bug.
---8<---
As writel does endianness swapping by default we need to undo
any swapping that we have done before using it.
Reported-by: kernel test robot <lkp@intel.com>
Fixes: 93c7f4d357de ("crypto: sun8i-ce - enable working on big...")
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 138759dc8190..703a60d4e2f6 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -120,7 +120,7 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow, const char *name)
/* Be sure all data is written before enabling the task */
wmb();
- v = 1 | (ce->chanlist[flow].tl->t_common_ctl & 0x7F) << 8;
+ v = 1 | (le32_to_cpu(ce->chanlist[flow].tl->t_common_ctl) & 0x7F) << 8;
writel(v, ce->base + CE_TLR);
mutex_unlock(&ce->mlock);
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] crypto: sun8i-ce - Fix writel byte-order on big-endian
2020-07-28 6:00 ` [PATCH] crypto: sun8i-ce - Fix writel byte-order on big-endian Herbert Xu
@ 2020-08-01 6:47 ` Corentin Labbe
2020-08-01 12:48 ` Herbert Xu
0 siblings, 1 reply; 4+ messages in thread
From: Corentin Labbe @ 2020-08-01 6:47 UTC (permalink / raw)
To: Herbert Xu; +Cc: kernel test robot, kbuild-all, linux-kernel
On Tue, Jul 28, 2020 at 04:00:40PM +1000, Herbert Xu wrote:
> On Tue, Jul 28, 2020 at 01:10:13PM +0800, kernel test robot wrote:
> > tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> > head: 92ed301919932f777713b9172e525674157e983d
> > commit: 93c7f4d357de68f1e3a998b2fc775466d75c4c07 crypto: sun8i-ce - enable working on big endian
> > date: 8 months ago
> > config: arm64-randconfig-s031-20200728 (attached as .config)
> > compiler: aarch64-linux-gcc (GCC) 9.3.0
> > reproduce:
> > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> > chmod +x ~/bin/make.cross
> > # apt-get install sparse
> > # sparse version: v0.6.2-94-geb6779f6-dirty
> > git checkout 93c7f4d357de68f1e3a998b2fc775466d75c4c07
> > # save the attached .config to linux build tree
> > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm64
> >
> > If you fix the issue, kindly add following tag as appropriate
> > Reported-by: kernel test robot <lkp@intel.com>
>
> This looks like a real bug.
>
> ---8<---
> As writel does endianness swapping by default we need to undo
> any swapping that we have done before using it.
>
> Reported-by: kernel test robot <lkp@intel.com>
> Fixes: 93c7f4d357de ("crypto: sun8i-ce - enable working on big...")
> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
>
> diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
> index 138759dc8190..703a60d4e2f6 100644
> --- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
> +++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
> @@ -120,7 +120,7 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow, const char *name)
> /* Be sure all data is written before enabling the task */
> wmb();
>
> - v = 1 | (ce->chanlist[flow].tl->t_common_ctl & 0x7F) << 8;
> + v = 1 | (le32_to_cpu(ce->chanlist[flow].tl->t_common_ctl) & 0x7F) << 8;
> writel(v, ce->base + CE_TLR);
> mutex_unlock(&ce->mlock);
>
> --
> Email: Herbert Xu <herbert@gondor.apana.org.au>
> Home Page: http://gondor.apana.org.au/~herbert/
> PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
This is fixed in my v4 serie and the current driver is unaffected, only hashes/rng could hit a problem and v4 bring them along with the fix.
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-08-01 12:49 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2020-07-28 5:10 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c:123:39: sparse: sparse: restricted __le32 degrades to integer kernel test robot
2020-07-28 6:00 ` [PATCH] crypto: sun8i-ce - Fix writel byte-order on big-endian Herbert Xu
2020-08-01 6:47 ` Corentin Labbe
2020-08-01 12:48 ` Herbert Xu
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