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From: Sia Jee Heng <jee.heng.sia@intel.com>
To: vkoul@kernel.org, Eugeniy.Paltsev@synopsys.com
Cc: andriy.shevchenko@linux.intel.com, dmaengine@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA
Date: Tue, 27 Oct 2020 14:38:43 +0800	[thread overview]
Message-ID: <20201027063858.4877-1-jee.heng.sia@intel.com> (raw)

The below patch series are to support AxiDMA running on Intel KeemBay SoC.
The base driver is dw-axi-dmac. This driver only support DMA memory copy
transfers. Code refactoring is needed so that additional features can be
supported.

The features added in this patch series are:
- Replacing Linked List with virtual descriptor management.
- Remove unrelated hw desc stuff from dma memory pool.
- Manage dma memory pool alloc/destroy based on channel activity.
- Support dmaengine device_sync() callback.
- Support dmaengine device_config().
- Support dmaengine device_prep_slave_sg().
- Support dmaengine device_prep_dma_cyclic().
- Support of_dma_controller_register().
- Support burst residue granularity.
- Support Intel KeemBay AxiDMA registers.
- Support Intel KeemBay AxiDMA device handshake.
- Support Intel KeemBay AxiDMA BYTE and HALFWORD device operation.
- Add constraint to Max segment size.

This patch series are tested on Intel KeemBay platform.

v2:
- Rebased to v5.10-rc1 kernel.
- Added support for dmaengine device_config().
- Added support for dmaengine device_prep_slave_sg().
- Added support for dmaengine device_prep_dma_cyclic().
- Added support for of_dma_controller_register().
- Added support for burst residue granularity.
- Added support for Intel KeemBay AxiDMA registers.
- Added support for Intel KeemBay AxiDMA device handshake.
- Added support for Intel KeemBay AxiDMA BYTE and HALFWORD device operation.
- Added constraint to Max segment size.

v1:
- Initial version. Patch on top of dw-axi-dma driver. This version improve
  the descriptor management by replacing Linked List Item (LLI) with
  virtual descriptor management, only allocate hardware LLI memories from
  DMA memory pool, manage DMA memory pool alloc/destroy based on channel
  activity and to support device_sync callback.

Sia Jee Heng (15):
  dt-bindings: dma: Add YAML schemas for dw-axi-dmac
  dmaengine: dw-axi-dmac: simplify descriptor management
  dmaengine: dw-axi-dmac: move dma_pool_create() to
    alloc_chan_resources()
  dmaengine: dw-axi-dmac: Add device_synchronize() callback
  dmaengine: dw-axi-dmac: Add device_config operation
  dmaengine: dw-axi-dmac: Support device_prep_slave_sg
  dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic()
  dmaengine: dw-axi-dmac: Support of_dma_controller_register()
  dmaengine: dw-axi-dmac: Support burst residue granularity
  dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support
  dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA
  dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields
  dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake
  dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD
    registers
  dmaengine: dw-axi-dmac: Set constraint to the Max segment size

 .../bindings/dma/snps,dw-axi-dmac.txt         |  39 -
 .../bindings/dma/snps,dw-axi-dmac.yaml        | 149 ++++
 .../dma/dw-axi-dmac/dw-axi-dmac-platform.c    | 696 +++++++++++++++---
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h         |  33 +-
 4 files changed, 783 insertions(+), 134 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt
 create mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml


base-commit: 4525c8781ec0701ce824e8bd379ae1b129e26568
-- 
2.18.0


             reply	other threads:[~2020-10-27  6:55 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-27  6:38 Sia Jee Heng [this message]
2020-10-27  6:38 ` [PATCH v2 01/15] dt-bindings: dma: Add YAML schemas for dw-axi-dmac Sia Jee Heng
2020-11-09  9:26   ` Vinod Koul
2020-11-11  1:36     ` Sia, Jee Heng
2020-10-27  6:38 ` [PATCH v2 02/15] dmaengine: dw-axi-dmac: simplify descriptor management Sia Jee Heng
2020-10-27  6:38 ` [PATCH v2 03/15] dmaengine: dw-axi-dmac: move dma_pool_create() to alloc_chan_resources() Sia Jee Heng
2020-10-27  6:38 ` [PATCH v2 04/15] dmaengine: dw-axi-dmac: Add device_synchronize() callback Sia Jee Heng
2020-10-27  6:38 ` [PATCH v2 05/15] dmaengine: dw-axi-dmac: Add device_config operation Sia Jee Heng
2020-10-27  6:38 ` [PATCH v2 06/15] dmaengine: dw-axi-dmac: Support device_prep_slave_sg Sia Jee Heng
2020-10-27  6:38 ` [PATCH v2 07/15] dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic() Sia Jee Heng
2020-11-09  9:42   ` Vinod Koul
2020-11-11  1:38     ` Sia, Jee Heng
2020-10-27  6:38 ` [PATCH v2 08/15] dmaengine: dw-axi-dmac: Support of_dma_controller_register() Sia Jee Heng
2020-10-27  6:38 ` [PATCH v2 09/15] dmaengine: dw-axi-dmac: Support burst residue granularity Sia Jee Heng
2020-11-09  9:51   ` Vinod Koul
2020-11-11  1:44     ` Sia, Jee Heng
2020-10-27  6:38 ` [PATCH v2 10/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support Sia Jee Heng
2020-10-27  6:38 ` [PATCH v2 11/15] dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA Sia Jee Heng
2020-11-09  9:54   ` Vinod Koul
2020-11-11  1:50     ` Sia, Jee Heng
2020-10-27  6:38 ` [PATCH v2 12/15] dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields Sia Jee Heng
2020-11-09  9:57   ` Vinod Koul
2020-11-11  1:53     ` Sia, Jee Heng
2020-10-27  6:38 ` [PATCH v2 13/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake Sia Jee Heng
2020-10-27  6:38 ` [PATCH v2 14/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD registers Sia Jee Heng
2020-10-27  6:38 ` [PATCH v2 15/15] dmaengine: dw-axi-dmac: Set constraint to the Max segment size Sia Jee Heng

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