From: Vinod Koul <vkoul@kernel.org>
To: Sia Jee Heng <jee.heng.sia@intel.com>
Cc: Eugeniy.Paltsev@synopsys.com, andriy.shevchenko@linux.intel.com,
dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 12/15] dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields
Date: Mon, 9 Nov 2020 15:27:10 +0530 [thread overview]
Message-ID: <20201109095710.GF3171@vkoul-mobl> (raw)
In-Reply-To: <20201027063858.4877-13-jee.heng.sia@intel.com>
On 27-10-20, 14:38, Sia Jee Heng wrote:
> Add support for Intel KeemBay DMA registers. These registers are required
> to run data transfer between device to memory and memory to device on Intel
> KeemBay SoC.
Again this should come first, you need to add all the bits required to
support this soc and then add compatible..
--
~Vinod
next prev parent reply other threads:[~2020-11-09 9:57 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-27 6:38 [PATCH v2 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 01/15] dt-bindings: dma: Add YAML schemas for dw-axi-dmac Sia Jee Heng
2020-11-09 9:26 ` Vinod Koul
2020-11-11 1:36 ` Sia, Jee Heng
2020-10-27 6:38 ` [PATCH v2 02/15] dmaengine: dw-axi-dmac: simplify descriptor management Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 03/15] dmaengine: dw-axi-dmac: move dma_pool_create() to alloc_chan_resources() Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 04/15] dmaengine: dw-axi-dmac: Add device_synchronize() callback Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 05/15] dmaengine: dw-axi-dmac: Add device_config operation Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 06/15] dmaengine: dw-axi-dmac: Support device_prep_slave_sg Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 07/15] dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic() Sia Jee Heng
2020-11-09 9:42 ` Vinod Koul
2020-11-11 1:38 ` Sia, Jee Heng
2020-10-27 6:38 ` [PATCH v2 08/15] dmaengine: dw-axi-dmac: Support of_dma_controller_register() Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 09/15] dmaengine: dw-axi-dmac: Support burst residue granularity Sia Jee Heng
2020-11-09 9:51 ` Vinod Koul
2020-11-11 1:44 ` Sia, Jee Heng
2020-10-27 6:38 ` [PATCH v2 10/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 11/15] dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA Sia Jee Heng
2020-11-09 9:54 ` Vinod Koul
2020-11-11 1:50 ` Sia, Jee Heng
2020-10-27 6:38 ` [PATCH v2 12/15] dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields Sia Jee Heng
2020-11-09 9:57 ` Vinod Koul [this message]
2020-11-11 1:53 ` Sia, Jee Heng
2020-10-27 6:38 ` [PATCH v2 13/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 14/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD registers Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 15/15] dmaengine: dw-axi-dmac: Set constraint to the Max segment size Sia Jee Heng
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201109095710.GF3171@vkoul-mobl \
--to=vkoul@kernel.org \
--cc=Eugeniy.Paltsev@synopsys.com \
--cc=andriy.shevchenko@linux.intel.com \
--cc=dmaengine@vger.kernel.org \
--cc=jee.heng.sia@intel.com \
--cc=linux-kernel@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox