Re: [PATCH v3 1/2] thermal: armada: ap806: use firmware SiP services for thermal operations

[kernel test robot <lkp@intel.com>]

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Hi,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on clk/clk-next]
[also build test WARNING on linus/master v5.11-rc7 next-20210211]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/kostap-marvell-com/Enable-usage-of-Marvell-FW-SIP-services/20210211-220917
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: i386-randconfig-s002-20210211 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce:
        # apt-get install sparse
        # sparse version: v0.6.3-215-g0fb77bb6-dirty
        # https://github.com/0day-ci/linux/commit/f3d1a200c085eb2518257982a822f06711a7ce95
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review kostap-marvell-com/Enable-usage-of-Marvell-FW-SIP-services/20210211-220917
        git checkout f3d1a200c085eb2518257982a822f06711a7ce95
        # save the attached .config to linux build tree
        make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=i386 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>


"sparse warnings: (new ones prefixed by >>)"
>> drivers/thermal/armada_thermal.c:295:52: sparse: sparse: Using plain integer as NULL pointer
   drivers/thermal/armada_thermal.c:644:57: sparse: sparse: Using plain integer as NULL pointer

vim +295 drivers/thermal/armada_thermal.c

   279	
   280	static void armada_ap806_init(struct platform_device *pdev,
   281				      struct armada_thermal_priv *priv)
   282	{
   283		struct armada_thermal_data *data = priv->data;
   284		u32 reg;
   285		int ret;
   286	
   287		/*
   288		 * The ap806 thermal sensor registers are part of DFX which is secured
   289		 * by latest firmware, therefore accessing relevant registers from
   290		 * not-secure world will not be possible. In that case Arm Trusted
   291		 * Firmware exposes thermal operations as firmware run-time service. If
   292		 * SMC initialization succeeds, perform other thermal operations using
   293		 * SMC, otherwise (old fw case) fallback to regmap handling.
   294		 */
 > 295		ret = thermal_smc(MV_SIP_DFX_THERMAL_INIT, 0x0, 0, 0);
   296		if (ret == SMCCC_RET_SUCCESS) {
   297			dev_info(&pdev->dev, "firmware support\n");
   298			THERMAL_SUPPORTED_IN_FIRMWARE(priv) = true;
   299			return;
   300		}
   301	
   302		regmap_read(priv->syscon, data->syscon_control0_off, &reg);
   303		reg &= ~CONTROL0_TSEN_RESET;
   304		reg |= CONTROL0_TSEN_START | CONTROL0_TSEN_ENABLE;
   305	
   306		/* Sample every ~2ms */
   307		reg |= CONTROL0_TSEN_OSR_MAX << CONTROL0_TSEN_OSR_SHIFT;
   308	
   309		/* Enable average (2 samples by default) */
   310		reg &= ~CONTROL0_TSEN_AVG_BYPASS;
   311	
   312		regmap_write(priv->syscon, data->syscon_control0_off, reg);
   313	}
   314	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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