[PATCH 2/2] drm/msm/gpu: Respect PM QoS constraints

[Rob Clark <robdclark@gmail.com>]

From: Rob Clark <robdclark@chromium.org>

Signed-off-by: Rob Clark <robdclark@chromium.org>
---
 drivers/gpu/drm/msm/msm_gpu_devfreq.c | 31 +++++++++++++++++++++++++--
 1 file changed, 29 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/msm_gpu_devfreq.c b/drivers/gpu/drm/msm/msm_gpu_devfreq.c
index b24e5475cafb..427c55002f4d 100644
--- a/drivers/gpu/drm/msm/msm_gpu_devfreq.c
+++ b/drivers/gpu/drm/msm/msm_gpu_devfreq.c
@@ -158,6 +158,33 @@ void msm_devfreq_suspend(struct msm_gpu *gpu)
 	devfreq_suspend_device(gpu->devfreq.devfreq);
 }
 
+static void set_target(struct msm_gpu *gpu, unsigned long freq)
+{
+	struct msm_gpu_devfreq *df = &gpu->devfreq;
+	unsigned long min_freq, max_freq;
+	u32 flags = 0;
+
+	/*
+	 * When setting the target freq internally, we need to apply PM QoS
+	 * constraints (such as cooling):
+	 */
+	min_freq = dev_pm_qos_read_value(df->devfreq->dev.parent,
+					 DEV_PM_QOS_MIN_FREQUENCY);
+	max_freq = dev_pm_qos_read_value(df->devfreq->dev.parent,
+					 DEV_PM_QOS_MAX_FREQUENCY);
+
+	if (freq < min_freq) {
+		freq = min_freq;
+		flags &= ~DEVFREQ_FLAG_LEAST_UPPER_BOUND; /* Use GLB */
+	}
+	if (freq > max_freq) {
+		freq = max_freq;
+		flags |= DEVFREQ_FLAG_LEAST_UPPER_BOUND; /* Use LUB */
+	}
+
+	msm_devfreq_target(&gpu->pdev->dev, &freq, flags);
+}
+
 void msm_devfreq_boost(struct msm_gpu *gpu, unsigned factor)
 {
 	struct msm_gpu_devfreq *df = &gpu->devfreq;
@@ -173,7 +200,7 @@ void msm_devfreq_boost(struct msm_gpu *gpu, unsigned factor)
 
 	freq *= factor;
 
-	msm_devfreq_target(&gpu->pdev->dev, &freq, 0);
+	set_target(gpu, freq);
 
 	mutex_unlock(&df->devfreq->lock);
 }
@@ -212,7 +239,7 @@ void msm_devfreq_active(struct msm_gpu *gpu)
 
 	df->idle_freq = 0;
 
-	msm_devfreq_target(&gpu->pdev->dev, &target_freq, 0);
+	set_target(gpu, target_freq);
 
 	/*
 	 * Reset the polling interval so we aren't inconsistent
-- 
2.31.1