* Re: [PATCH 3/3] firmware: stratix10-svc: add new FCS commands
2022-03-14 10:28 [PATCH 3/3] firmware: stratix10-svc: add new FCS commands tien.sung.ang
@ 2022-03-14 4:52 ` kernel test robot
2022-03-14 5:03 ` kernel test robot
2022-03-14 6:24 ` kernel test robot
2 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2022-03-14 4:52 UTC (permalink / raw)
To: tien.sung.ang, Dinh Nguyen; +Cc: kbuild-all, linux-kernel, Ang Tien Sung
Hi,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linux/master]
[also build test WARNING on linus/master v5.17-rc8]
[cannot apply to next-20220310]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/tien-sung-ang-intel-com/firmware-stratix10-svc-Add-new-FCS-support/20220314-102938
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 2c271fe77d52a0555161926c232cd5bc07178b39
config: h8300-allyesconfig (https://download.01.org/0day-ci/archive/20220314/202203141217.H2LzQEuO-lkp@intel.com/config)
compiler: h8300-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/21427534c2a95b30f967d178ee997d8ca94b34e6
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review tien-sung-ang-intel-com/firmware-stratix10-svc-Add-new-FCS-support/20220314-102938
git checkout 21427534c2a95b30f967d178ee997d8ca94b34e6
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=h8300 SHELL=/bin/bash drivers/net/ethernet/stmicro/stmmac/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from include/linux/mfd/altera-sysmgr.h:13,
from drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:7:
include/linux/firmware/intel/stratix10-smc.h:406:12: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'INTEL_SIP_SMC_SERVICE_COMPLETED'
406 | * Request INTEL_SIP_SMC_SERVICE_COMPLETED
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/firmware/intel/stratix10-smc.h:406:12: error: unknown type name 'INTEL_SIP_SMC_SERVICE_COMPLETED'
In file included from drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:7:
>> include/linux/mfd/altera-sysmgr.h:22:45: warning: 'struct device_node' declared inside parameter list will not be visible outside of this definition or declaration
22 | altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
| ^~~~~~~~~~~
In file included from include/linux/err.h:5,
from include/linux/mfd/altera-sysmgr.h:11,
from drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:7:
include/linux/scatterlist.h: In function 'sg_set_buf':
include/asm-generic/page.h:89:51: warning: ordered comparison of pointer with null pointer [-Wextra]
89 | #define virt_addr_valid(kaddr) (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \
| ^~
include/linux/compiler.h:78:45: note: in definition of macro 'unlikely'
78 | # define unlikely(x) __builtin_expect(!!(x), 0)
| ^
include/linux/scatterlist.h:160:9: note: in expansion of macro 'BUG_ON'
160 | BUG_ON(!virt_addr_valid(buf));
| ^~~~~~
include/linux/scatterlist.h:160:17: note: in expansion of macro 'virt_addr_valid'
160 | BUG_ON(!virt_addr_valid(buf));
| ^~~~~~~~~~~~~~~
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c: In function 'socfpga_dwmac_parse_data':
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:113:54: error: passing argument 1 of 'altr_sysmgr_regmap_lookup_by_phandle' from incompatible pointer type [-Werror=incompatible-pointer-types]
113 | altr_sysmgr_regmap_lookup_by_phandle(np, "altr,sysmgr-syscon");
| ^~
| |
| struct device_node *
In file included from drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:7:
include/linux/mfd/altera-sysmgr.h:22:58: note: expected 'struct device_node *' but argument is of type 'struct device_node *'
22 | altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
| ~~~~~~~~~~~~~~~~~~~~^~
cc1: some warnings being treated as errors
vim +22 include/linux/mfd/altera-sysmgr.h
f36e789a1f8d0b Thor Thayer 2019-03-11 10
f36e789a1f8d0b Thor Thayer 2019-03-11 11 #include <linux/err.h>
f36e789a1f8d0b Thor Thayer 2019-03-11 12 #include <linux/errno.h>
f36e789a1f8d0b Thor Thayer 2019-03-11 @13 #include <linux/firmware/intel/stratix10-smc.h>
f36e789a1f8d0b Thor Thayer 2019-03-11 14
f36e789a1f8d0b Thor Thayer 2019-03-11 15 struct device_node;
f36e789a1f8d0b Thor Thayer 2019-03-11 16
f36e789a1f8d0b Thor Thayer 2019-03-11 17 #ifdef CONFIG_MFD_ALTERA_SYSMGR
f36e789a1f8d0b Thor Thayer 2019-03-11 18 struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
f36e789a1f8d0b Thor Thayer 2019-03-11 19 const char *property);
f36e789a1f8d0b Thor Thayer 2019-03-11 20 #else
f36e789a1f8d0b Thor Thayer 2019-03-11 21 static inline struct regmap *
f36e789a1f8d0b Thor Thayer 2019-03-11 @22 altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
f36e789a1f8d0b Thor Thayer 2019-03-11 23 const char *property)
f36e789a1f8d0b Thor Thayer 2019-03-11 24 {
f36e789a1f8d0b Thor Thayer 2019-03-11 25 return ERR_PTR(-ENOTSUPP);
f36e789a1f8d0b Thor Thayer 2019-03-11 26 }
f36e789a1f8d0b Thor Thayer 2019-03-11 27 #endif
f36e789a1f8d0b Thor Thayer 2019-03-11 28
---
0-DAY CI Kernel Test Service
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 3/3] firmware: stratix10-svc: add new FCS commands
2022-03-14 10:28 [PATCH 3/3] firmware: stratix10-svc: add new FCS commands tien.sung.ang
2022-03-14 4:52 ` kernel test robot
@ 2022-03-14 5:03 ` kernel test robot
2022-03-14 6:24 ` kernel test robot
2 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2022-03-14 5:03 UTC (permalink / raw)
To: tien.sung.ang, Dinh Nguyen; +Cc: llvm, kbuild-all, linux-kernel, Ang Tien Sung
Hi,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linux/master]
[also build test WARNING on linus/master v5.17-rc8]
[cannot apply to next-20220310]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/tien-sung-ang-intel-com/firmware-stratix10-svc-Add-new-FCS-support/20220314-102938
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 2c271fe77d52a0555161926c232cd5bc07178b39
config: arm-socfpga_defconfig (https://download.01.org/0day-ci/archive/20220314/202203141252.lZgnKwUr-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 3e4950d7fa78ac83f33bbf1658e2f49a73719236)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://github.com/0day-ci/linux/commit/21427534c2a95b30f967d178ee997d8ca94b34e6
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review tien-sung-ang-intel-com/firmware-stratix10-svc-Add-new-FCS-support/20220314-102938
git checkout 21427534c2a95b30f967d178ee997d8ca94b34e6
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/mfd/ drivers/net/ethernet/stmicro/stmmac/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from drivers/mfd/altera-sysmgr.c:13:
In file included from include/linux/mfd/altera-sysmgr.h:13:
>> include/linux/firmware/intel/stratix10-smc.h:406:4: warning: declaration specifier missing, defaulting to 'int'
* Request INTEL_SIP_SMC_SERVICE_COMPLETED
^
int
include/linux/firmware/intel/stratix10-smc.h:406:11: error: expected ';' after top level declarator
* Request INTEL_SIP_SMC_SERVICE_COMPLETED
^
;
In file included from drivers/mfd/altera-sysmgr.c:13:
>> include/linux/mfd/altera-sysmgr.h:18:60: warning: declaration of 'struct device_node' will not be visible outside of this function [-Wvisibility]
struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
^
drivers/mfd/altera-sysmgr.c:96:16: error: conflicting types for 'altr_sysmgr_regmap_lookup_by_phandle'
struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
^
include/linux/mfd/altera-sysmgr.h:18:16: note: previous declaration is here
struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
^
2 warnings and 2 errors generated.
--
In file included from drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:7:
In file included from include/linux/mfd/altera-sysmgr.h:13:
>> include/linux/firmware/intel/stratix10-smc.h:406:4: warning: declaration specifier missing, defaulting to 'int'
* Request INTEL_SIP_SMC_SERVICE_COMPLETED
^
int
include/linux/firmware/intel/stratix10-smc.h:406:11: error: expected ';' after top level declarator
* Request INTEL_SIP_SMC_SERVICE_COMPLETED
^
;
In file included from drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:7:
>> include/linux/mfd/altera-sysmgr.h:18:60: warning: declaration of 'struct device_node' will not be visible outside of this function [-Wvisibility]
struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
^
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:113:40: error: incompatible pointer types passing 'struct device_node *' to parameter of type 'struct device_node *' [-Werror,-Wincompatible-pointer-types]
altr_sysmgr_regmap_lookup_by_phandle(np, "altr,sysmgr-syscon");
^~
include/linux/mfd/altera-sysmgr.h:18:73: note: passing argument to parameter 'np' here
struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
^
2 warnings and 2 errors generated.
vim +/int +406 include/linux/firmware/intel/stratix10-smc.h
7ca5ce896524f5 Richard Gong 2018-11-13 147
7ca5ce896524f5 Richard Gong 2018-11-13 148 /**
7ca5ce896524f5 Richard Gong 2018-11-13 149 * Request INTEL_SIP_SMC_FPGA_CONFIG_ISDONE
7ca5ce896524f5 Richard Gong 2018-11-13 150 *
7ca5ce896524f5 Richard Gong 2018-11-13 151 * Sync call used by service driver at EL1 to inform secure world that all
7ca5ce896524f5 Richard Gong 2018-11-13 152 * data are sent, to check whether or not the secure world had completed
7ca5ce896524f5 Richard Gong 2018-11-13 153 * the FPGA configuration process.
7ca5ce896524f5 Richard Gong 2018-11-13 154 *
7ca5ce896524f5 Richard Gong 2018-11-13 155 * Call register usage:
7ca5ce896524f5 Richard Gong 2018-11-13 156 * a0: INTEL_SIP_SMC_FPGA_CONFIG_ISDONE.
7ca5ce896524f5 Richard Gong 2018-11-13 157 * a1-7: not used.
7ca5ce896524f5 Richard Gong 2018-11-13 158 *
7ca5ce896524f5 Richard Gong 2018-11-13 159 * Return status:
7536ad8dbfcfd5 Richard Gong 2020-04-14 160 * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_BUSY or
7536ad8dbfcfd5 Richard Gong 2020-04-14 161 * INTEL_SIP_SMC_STATUS_ERROR.
7ca5ce896524f5 Richard Gong 2018-11-13 162 * a1-3: not used.
7ca5ce896524f5 Richard Gong 2018-11-13 163 */
7ca5ce896524f5 Richard Gong 2018-11-13 164 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE 4
7ca5ce896524f5 Richard Gong 2018-11-13 165 #define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE \
7ca5ce896524f5 Richard Gong 2018-11-13 166 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE)
7ca5ce896524f5 Richard Gong 2018-11-13 167
7ca5ce896524f5 Richard Gong 2018-11-13 168 /**
7ca5ce896524f5 Richard Gong 2018-11-13 169 * Request INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM
7ca5ce896524f5 Richard Gong 2018-11-13 170 *
7ca5ce896524f5 Richard Gong 2018-11-13 171 * Sync call used by service driver at EL1 to query the physical address of
7ca5ce896524f5 Richard Gong 2018-11-13 172 * memory block reserved by secure monitor software.
7ca5ce896524f5 Richard Gong 2018-11-13 173 *
7ca5ce896524f5 Richard Gong 2018-11-13 174 * Call register usage:
7ca5ce896524f5 Richard Gong 2018-11-13 175 * a0:INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM.
7ca5ce896524f5 Richard Gong 2018-11-13 176 * a1-7: not used.
7ca5ce896524f5 Richard Gong 2018-11-13 177 *
7ca5ce896524f5 Richard Gong 2018-11-13 178 * Return status:
7536ad8dbfcfd5 Richard Gong 2020-04-14 179 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR.
7ca5ce896524f5 Richard Gong 2018-11-13 180 * a1: start of physical address of reserved memory block.
7ca5ce896524f5 Richard Gong 2018-11-13 181 * a2: size of reserved memory block.
7ca5ce896524f5 Richard Gong 2018-11-13 182 * a3: not used.
7ca5ce896524f5 Richard Gong 2018-11-13 183 */
7ca5ce896524f5 Richard Gong 2018-11-13 184 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM 5
7ca5ce896524f5 Richard Gong 2018-11-13 185 #define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM \
7ca5ce896524f5 Richard Gong 2018-11-13 186 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM)
7ca5ce896524f5 Richard Gong 2018-11-13 187
7ca5ce896524f5 Richard Gong 2018-11-13 188 /**
7ca5ce896524f5 Richard Gong 2018-11-13 189 * Request INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK
7ca5ce896524f5 Richard Gong 2018-11-13 190 *
7ca5ce896524f5 Richard Gong 2018-11-13 191 * For SMC loop-back mode only, used for internal integration, debugging
7ca5ce896524f5 Richard Gong 2018-11-13 192 * or troubleshooting.
7ca5ce896524f5 Richard Gong 2018-11-13 193 *
7ca5ce896524f5 Richard Gong 2018-11-13 194 * Call register usage:
7ca5ce896524f5 Richard Gong 2018-11-13 195 * a0: INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK.
7ca5ce896524f5 Richard Gong 2018-11-13 196 * a1-7: not used.
7ca5ce896524f5 Richard Gong 2018-11-13 197 *
7ca5ce896524f5 Richard Gong 2018-11-13 198 * Return status:
7536ad8dbfcfd5 Richard Gong 2020-04-14 199 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR.
7ca5ce896524f5 Richard Gong 2018-11-13 200 * a1-3: not used.
7ca5ce896524f5 Richard Gong 2018-11-13 201 */
7ca5ce896524f5 Richard Gong 2018-11-13 202 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK 6
7ca5ce896524f5 Richard Gong 2018-11-13 203 #define INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK \
7ca5ce896524f5 Richard Gong 2018-11-13 204 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK)
7ca5ce896524f5 Richard Gong 2018-11-13 205
b5dc75c915cdae Richard Gong 2019-09-03 206 /**
7ca5ce896524f5 Richard Gong 2018-11-13 207 * Request INTEL_SIP_SMC_REG_READ
7ca5ce896524f5 Richard Gong 2018-11-13 208 *
7ca5ce896524f5 Richard Gong 2018-11-13 209 * Read a protected register at EL3
7ca5ce896524f5 Richard Gong 2018-11-13 210 *
7ca5ce896524f5 Richard Gong 2018-11-13 211 * Call register usage:
7ca5ce896524f5 Richard Gong 2018-11-13 212 * a0: INTEL_SIP_SMC_REG_READ.
7ca5ce896524f5 Richard Gong 2018-11-13 213 * a1: register address.
7ca5ce896524f5 Richard Gong 2018-11-13 214 * a2-7: not used.
7ca5ce896524f5 Richard Gong 2018-11-13 215 *
7ca5ce896524f5 Richard Gong 2018-11-13 216 * Return status:
7ca5ce896524f5 Richard Gong 2018-11-13 217 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
7ca5ce896524f5 Richard Gong 2018-11-13 218 * a1: value in the register
7ca5ce896524f5 Richard Gong 2018-11-13 219 * a2-3: not used.
7ca5ce896524f5 Richard Gong 2018-11-13 220 */
7ca5ce896524f5 Richard Gong 2018-11-13 221 #define INTEL_SIP_SMC_FUNCID_REG_READ 7
7ca5ce896524f5 Richard Gong 2018-11-13 222 #define INTEL_SIP_SMC_REG_READ \
7ca5ce896524f5 Richard Gong 2018-11-13 223 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_READ)
7ca5ce896524f5 Richard Gong 2018-11-13 224
b5dc75c915cdae Richard Gong 2019-09-03 225 /**
7ca5ce896524f5 Richard Gong 2018-11-13 226 * Request INTEL_SIP_SMC_REG_WRITE
7ca5ce896524f5 Richard Gong 2018-11-13 227 *
7ca5ce896524f5 Richard Gong 2018-11-13 228 * Write a protected register at EL3
7ca5ce896524f5 Richard Gong 2018-11-13 229 *
7ca5ce896524f5 Richard Gong 2018-11-13 230 * Call register usage:
7ca5ce896524f5 Richard Gong 2018-11-13 231 * a0: INTEL_SIP_SMC_REG_WRITE.
7ca5ce896524f5 Richard Gong 2018-11-13 232 * a1: register address
7ca5ce896524f5 Richard Gong 2018-11-13 233 * a2: value to program into register.
7ca5ce896524f5 Richard Gong 2018-11-13 234 * a3-7: not used.
7ca5ce896524f5 Richard Gong 2018-11-13 235 *
7ca5ce896524f5 Richard Gong 2018-11-13 236 * Return status:
7ca5ce896524f5 Richard Gong 2018-11-13 237 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
7ca5ce896524f5 Richard Gong 2018-11-13 238 * a1-3: not used.
7ca5ce896524f5 Richard Gong 2018-11-13 239 */
7ca5ce896524f5 Richard Gong 2018-11-13 240 #define INTEL_SIP_SMC_FUNCID_REG_WRITE 8
7ca5ce896524f5 Richard Gong 2018-11-13 241 #define INTEL_SIP_SMC_REG_WRITE \
7ca5ce896524f5 Richard Gong 2018-11-13 242 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_WRITE)
7ca5ce896524f5 Richard Gong 2018-11-13 243
b5dc75c915cdae Richard Gong 2019-09-03 244 /**
7ca5ce896524f5 Richard Gong 2018-11-13 245 * Request INTEL_SIP_SMC_FUNCID_REG_UPDATE
7ca5ce896524f5 Richard Gong 2018-11-13 246 *
7ca5ce896524f5 Richard Gong 2018-11-13 247 * Update one or more bits in a protected register at EL3 using a
7ca5ce896524f5 Richard Gong 2018-11-13 248 * read-modify-write operation.
7ca5ce896524f5 Richard Gong 2018-11-13 249 *
7ca5ce896524f5 Richard Gong 2018-11-13 250 * Call register usage:
7ca5ce896524f5 Richard Gong 2018-11-13 251 * a0: INTEL_SIP_SMC_REG_UPDATE.
7ca5ce896524f5 Richard Gong 2018-11-13 252 * a1: register address
7ca5ce896524f5 Richard Gong 2018-11-13 253 * a2: write Mask.
7ca5ce896524f5 Richard Gong 2018-11-13 254 * a3: value to write.
7ca5ce896524f5 Richard Gong 2018-11-13 255 * a4-7: not used.
7ca5ce896524f5 Richard Gong 2018-11-13 256 *
7ca5ce896524f5 Richard Gong 2018-11-13 257 * Return status:
7ca5ce896524f5 Richard Gong 2018-11-13 258 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
7ca5ce896524f5 Richard Gong 2018-11-13 259 * a1-3: Not used.
7ca5ce896524f5 Richard Gong 2018-11-13 260 */
7ca5ce896524f5 Richard Gong 2018-11-13 261 #define INTEL_SIP_SMC_FUNCID_REG_UPDATE 9
7ca5ce896524f5 Richard Gong 2018-11-13 262 #define INTEL_SIP_SMC_REG_UPDATE \
7ca5ce896524f5 Richard Gong 2018-11-13 263 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_UPDATE)
7ca5ce896524f5 Richard Gong 2018-11-13 264
b5dc75c915cdae Richard Gong 2019-09-03 265 /**
6b50d882d38d5a Richard Gong 2018-11-13 266 * Request INTEL_SIP_SMC_RSU_STATUS
6b50d882d38d5a Richard Gong 2018-11-13 267 *
6b50d882d38d5a Richard Gong 2018-11-13 268 * Request remote status update boot log, call is synchronous.
6b50d882d38d5a Richard Gong 2018-11-13 269 *
6b50d882d38d5a Richard Gong 2018-11-13 270 * Call register usage:
6b50d882d38d5a Richard Gong 2018-11-13 271 * a0 INTEL_SIP_SMC_RSU_STATUS
6b50d882d38d5a Richard Gong 2018-11-13 272 * a1-7 not used
6b50d882d38d5a Richard Gong 2018-11-13 273 *
6b50d882d38d5a Richard Gong 2018-11-13 274 * Return status
6b50d882d38d5a Richard Gong 2018-11-13 275 * a0: Current Image
6b50d882d38d5a Richard Gong 2018-11-13 276 * a1: Last Failing Image
6b50d882d38d5a Richard Gong 2018-11-13 277 * a2: Version | State
6b50d882d38d5a Richard Gong 2018-11-13 278 * a3: Error details | Error location
6b50d882d38d5a Richard Gong 2018-11-13 279 *
6b50d882d38d5a Richard Gong 2018-11-13 280 * Or
6b50d882d38d5a Richard Gong 2018-11-13 281 *
6b50d882d38d5a Richard Gong 2018-11-13 282 * a0: INTEL_SIP_SMC_RSU_ERROR
6b50d882d38d5a Richard Gong 2018-11-13 283 */
6b50d882d38d5a Richard Gong 2018-11-13 284 #define INTEL_SIP_SMC_FUNCID_RSU_STATUS 11
6b50d882d38d5a Richard Gong 2018-11-13 285 #define INTEL_SIP_SMC_RSU_STATUS \
6b50d882d38d5a Richard Gong 2018-11-13 286 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_STATUS)
6b50d882d38d5a Richard Gong 2018-11-13 287
b5dc75c915cdae Richard Gong 2019-09-03 288 /**
6b50d882d38d5a Richard Gong 2018-11-13 289 * Request INTEL_SIP_SMC_RSU_UPDATE
6b50d882d38d5a Richard Gong 2018-11-13 290 *
6b50d882d38d5a Richard Gong 2018-11-13 291 * Request to set the offset of the bitstream to boot after reboot, call
6b50d882d38d5a Richard Gong 2018-11-13 292 * is synchronous.
6b50d882d38d5a Richard Gong 2018-11-13 293 *
6b50d882d38d5a Richard Gong 2018-11-13 294 * Call register usage:
6b50d882d38d5a Richard Gong 2018-11-13 295 * a0 INTEL_SIP_SMC_RSU_UPDATE
6b50d882d38d5a Richard Gong 2018-11-13 296 * a1 64bit physical address of the configuration data memory in flash
6b50d882d38d5a Richard Gong 2018-11-13 297 * a2-7 not used
6b50d882d38d5a Richard Gong 2018-11-13 298 *
6b50d882d38d5a Richard Gong 2018-11-13 299 * Return status
6b50d882d38d5a Richard Gong 2018-11-13 300 * a0 INTEL_SIP_SMC_STATUS_OK
6b50d882d38d5a Richard Gong 2018-11-13 301 */
6b50d882d38d5a Richard Gong 2018-11-13 302 #define INTEL_SIP_SMC_FUNCID_RSU_UPDATE 12
6b50d882d38d5a Richard Gong 2018-11-13 303 #define INTEL_SIP_SMC_RSU_UPDATE \
6b50d882d38d5a Richard Gong 2018-11-13 304 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_UPDATE)
fad9fab975cb9f Thor Thayer 2019-04-02 305
b5dc75c915cdae Richard Gong 2019-09-03 306 /**
fad9fab975cb9f Thor Thayer 2019-04-02 307 * Request INTEL_SIP_SMC_ECC_DBE
fad9fab975cb9f Thor Thayer 2019-04-02 308 *
fad9fab975cb9f Thor Thayer 2019-04-02 309 * Sync call used by service driver at EL1 to alert EL3 that a Double
fad9fab975cb9f Thor Thayer 2019-04-02 310 * Bit ECC error has occurred.
fad9fab975cb9f Thor Thayer 2019-04-02 311 *
fad9fab975cb9f Thor Thayer 2019-04-02 312 * Call register usage:
fad9fab975cb9f Thor Thayer 2019-04-02 313 * a0 INTEL_SIP_SMC_ECC_DBE
fad9fab975cb9f Thor Thayer 2019-04-02 314 * a1 SysManager Double Bit Error value
fad9fab975cb9f Thor Thayer 2019-04-02 315 * a2-7 not used
fad9fab975cb9f Thor Thayer 2019-04-02 316 *
fad9fab975cb9f Thor Thayer 2019-04-02 317 * Return status
fad9fab975cb9f Thor Thayer 2019-04-02 318 * a0 INTEL_SIP_SMC_STATUS_OK
fad9fab975cb9f Thor Thayer 2019-04-02 319 */
fad9fab975cb9f Thor Thayer 2019-04-02 320 #define INTEL_SIP_SMC_FUNCID_ECC_DBE 13
fad9fab975cb9f Thor Thayer 2019-04-02 321 #define INTEL_SIP_SMC_ECC_DBE \
fad9fab975cb9f Thor Thayer 2019-04-02 322 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_ECC_DBE)
fad9fab975cb9f Thor Thayer 2019-04-02 323
b5dc75c915cdae Richard Gong 2019-09-03 324 /**
b5dc75c915cdae Richard Gong 2019-09-03 325 * Request INTEL_SIP_SMC_RSU_NOTIFY
b5dc75c915cdae Richard Gong 2019-09-03 326 *
b5dc75c915cdae Richard Gong 2019-09-03 327 * Sync call used by service driver at EL1 to report hard processor
b5dc75c915cdae Richard Gong 2019-09-03 328 * system execution stage to firmware
b5dc75c915cdae Richard Gong 2019-09-03 329 *
b5dc75c915cdae Richard Gong 2019-09-03 330 * Call register usage:
b5dc75c915cdae Richard Gong 2019-09-03 331 * a0 INTEL_SIP_SMC_RSU_NOTIFY
b5dc75c915cdae Richard Gong 2019-09-03 332 * a1 32bit value representing hard processor system execution stage
b5dc75c915cdae Richard Gong 2019-09-03 333 * a2-7 not used
b5dc75c915cdae Richard Gong 2019-09-03 334 *
b5dc75c915cdae Richard Gong 2019-09-03 335 * Return status
b5dc75c915cdae Richard Gong 2019-09-03 336 * a0 INTEL_SIP_SMC_STATUS_OK
b5dc75c915cdae Richard Gong 2019-09-03 337 */
b5dc75c915cdae Richard Gong 2019-09-03 338 #define INTEL_SIP_SMC_FUNCID_RSU_NOTIFY 14
b5dc75c915cdae Richard Gong 2019-09-03 339 #define INTEL_SIP_SMC_RSU_NOTIFY \
b5dc75c915cdae Richard Gong 2019-09-03 340 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_NOTIFY)
b5dc75c915cdae Richard Gong 2019-09-03 341
b5dc75c915cdae Richard Gong 2019-09-03 342 /**
b5dc75c915cdae Richard Gong 2019-09-03 343 * Request INTEL_SIP_SMC_RSU_RETRY_COUNTER
b5dc75c915cdae Richard Gong 2019-09-03 344 *
b5dc75c915cdae Richard Gong 2019-09-03 345 * Sync call used by service driver at EL1 to query RSU retry counter
b5dc75c915cdae Richard Gong 2019-09-03 346 *
b5dc75c915cdae Richard Gong 2019-09-03 347 * Call register usage:
b5dc75c915cdae Richard Gong 2019-09-03 348 * a0 INTEL_SIP_SMC_RSU_RETRY_COUNTER
b5dc75c915cdae Richard Gong 2019-09-03 349 * a1-7 not used
b5dc75c915cdae Richard Gong 2019-09-03 350 *
b5dc75c915cdae Richard Gong 2019-09-03 351 * Return status
b5dc75c915cdae Richard Gong 2019-09-03 352 * a0 INTEL_SIP_SMC_STATUS_OK
b5dc75c915cdae Richard Gong 2019-09-03 353 * a1 the retry counter
b5dc75c915cdae Richard Gong 2019-09-03 354 *
b5dc75c915cdae Richard Gong 2019-09-03 355 * Or
b5dc75c915cdae Richard Gong 2019-09-03 356 *
b5dc75c915cdae Richard Gong 2019-09-03 357 * a0 INTEL_SIP_SMC_RSU_ERROR
b5dc75c915cdae Richard Gong 2019-09-03 358 */
b5dc75c915cdae Richard Gong 2019-09-03 359 #define INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER 15
b5dc75c915cdae Richard Gong 2019-09-03 360 #define INTEL_SIP_SMC_RSU_RETRY_COUNTER \
b5dc75c915cdae Richard Gong 2019-09-03 361 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER)
bf0e5bf68a207b Richard Gong 2020-06-15 362
bf0e5bf68a207b Richard Gong 2020-06-15 363 /**
bf0e5bf68a207b Richard Gong 2020-06-15 364 * Request INTEL_SIP_SMC_RSU_DCMF_VERSION
bf0e5bf68a207b Richard Gong 2020-06-15 365 *
bf0e5bf68a207b Richard Gong 2020-06-15 366 * Sync call used by service driver at EL1 to query DCMF (Decision
bf0e5bf68a207b Richard Gong 2020-06-15 367 * Configuration Management Firmware) version from FW
bf0e5bf68a207b Richard Gong 2020-06-15 368 *
bf0e5bf68a207b Richard Gong 2020-06-15 369 * Call register usage:
bf0e5bf68a207b Richard Gong 2020-06-15 370 * a0 INTEL_SIP_SMC_RSU_DCMF_VERSION
bf0e5bf68a207b Richard Gong 2020-06-15 371 * a1-7 not used
bf0e5bf68a207b Richard Gong 2020-06-15 372 *
bf0e5bf68a207b Richard Gong 2020-06-15 373 * Return status
bf0e5bf68a207b Richard Gong 2020-06-15 374 * a0 INTEL_SIP_SMC_STATUS_OK
bf0e5bf68a207b Richard Gong 2020-06-15 375 * a1 dcmf1 | dcmf0
bf0e5bf68a207b Richard Gong 2020-06-15 376 * a2 dcmf3 | dcmf2
bf0e5bf68a207b Richard Gong 2020-06-15 377 *
bf0e5bf68a207b Richard Gong 2020-06-15 378 * Or
bf0e5bf68a207b Richard Gong 2020-06-15 379 *
bf0e5bf68a207b Richard Gong 2020-06-15 380 * a0 INTEL_SIP_SMC_RSU_ERROR
bf0e5bf68a207b Richard Gong 2020-06-15 381 */
bf0e5bf68a207b Richard Gong 2020-06-15 382 #define INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION 16
bf0e5bf68a207b Richard Gong 2020-06-15 383 #define INTEL_SIP_SMC_RSU_DCMF_VERSION \
bf0e5bf68a207b Richard Gong 2020-06-15 384 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION)
bf0e5bf68a207b Richard Gong 2020-06-15 385
bf0e5bf68a207b Richard Gong 2020-06-15 386 /**
bf0e5bf68a207b Richard Gong 2020-06-15 387 * Request INTEL_SIP_SMC_RSU_MAX_RETRY
bf0e5bf68a207b Richard Gong 2020-06-15 388 *
bf0e5bf68a207b Richard Gong 2020-06-15 389 * Sync call used by service driver at EL1 to query max retry value from FW
bf0e5bf68a207b Richard Gong 2020-06-15 390 *
bf0e5bf68a207b Richard Gong 2020-06-15 391 * Call register usage:
bf0e5bf68a207b Richard Gong 2020-06-15 392 * a0 INTEL_SIP_SMC_RSU_MAX_RETRY
bf0e5bf68a207b Richard Gong 2020-06-15 393 * a1-7 not used
bf0e5bf68a207b Richard Gong 2020-06-15 394 *
bf0e5bf68a207b Richard Gong 2020-06-15 395 * Return status
bf0e5bf68a207b Richard Gong 2020-06-15 396 * a0 INTEL_SIP_SMC_STATUS_OK
bf0e5bf68a207b Richard Gong 2020-06-15 397 * a1 max retry value
bf0e5bf68a207b Richard Gong 2020-06-15 398 *
bf0e5bf68a207b Richard Gong 2020-06-15 399 * Or
bf0e5bf68a207b Richard Gong 2020-06-15 400 * a0 INTEL_SIP_SMC_RSU_ERROR
bf0e5bf68a207b Richard Gong 2020-06-15 401 */
bf0e5bf68a207b Richard Gong 2020-06-15 402 #define INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY 18
bf0e5bf68a207b Richard Gong 2020-06-15 403 #define INTEL_SIP_SMC_RSU_MAX_RETRY \
bf0e5bf68a207b Richard Gong 2020-06-15 404 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY)
19e0bcb19109ac Ang Tien Sung 2022-03-14 405
19e0bcb19109ac Ang Tien Sung 2022-03-14 @406 * Request INTEL_SIP_SMC_SERVICE_COMPLETED
19e0bcb19109ac Ang Tien Sung 2022-03-14 407 * Sync call to check if the secure world have completed service request
19e0bcb19109ac Ang Tien Sung 2022-03-14 408 * or not.
19e0bcb19109ac Ang Tien Sung 2022-03-14 409 *
19e0bcb19109ac Ang Tien Sung 2022-03-14 410 * Call register usage:
19e0bcb19109ac Ang Tien Sung 2022-03-14 411 * a0: INTEL_SIP_SMC_SERVICE_COMPLETED
19e0bcb19109ac Ang Tien Sung 2022-03-14 412 * a1: the physical address for secure firmware to put output data
19e0bcb19109ac Ang Tien Sung 2022-03-14 413 * a2: size
19e0bcb19109ac Ang Tien Sung 2022-03-14 414 * a3-a7: not used
19e0bcb19109ac Ang Tien Sung 2022-03-14 415 *
19e0bcb19109ac Ang Tien Sung 2022-03-14 416 * Return status:
19e0bcb19109ac Ang Tien Sung 2022-03-14 417 * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_ERROR,
19e0bcb19109ac Ang Tien Sung 2022-03-14 418 * INTEL_SIP_SMC_REJECTED or INTEL_SIP_SMC_STATUS_BUSY
19e0bcb19109ac Ang Tien Sung 2022-03-14 419 * a1: physical address for the output daat
19e0bcb19109ac Ang Tien Sung 2022-03-14 420 * a2: output data size
19e0bcb19109ac Ang Tien Sung 2022-03-14 421 */
19e0bcb19109ac Ang Tien Sung 2022-03-14 422 #define INTEL_SIP_SMC_FUNCID_SERVICE_COMPLETED 30
19e0bcb19109ac Ang Tien Sung 2022-03-14 423 #define INTEL_SIP_SMC_SERVICE_COMPLETED \
19e0bcb19109ac Ang Tien Sung 2022-03-14 424 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_SERVICE_COMPLETED)
19e0bcb19109ac Ang Tien Sung 2022-03-14 425
---
0-DAY CI Kernel Test Service
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 3/3] firmware: stratix10-svc: add new FCS commands
2022-03-14 10:28 [PATCH 3/3] firmware: stratix10-svc: add new FCS commands tien.sung.ang
2022-03-14 4:52 ` kernel test robot
2022-03-14 5:03 ` kernel test robot
@ 2022-03-14 6:24 ` kernel test robot
2 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2022-03-14 6:24 UTC (permalink / raw)
To: tien.sung.ang, Dinh Nguyen; +Cc: llvm, kbuild-all, linux-kernel, Ang Tien Sung
Hi,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linux/master]
[also build test ERROR on linus/master v5.17-rc8]
[cannot apply to next-20220310]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/tien-sung-ang-intel-com/firmware-stratix10-svc-Add-new-FCS-support/20220314-102938
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 2c271fe77d52a0555161926c232cd5bc07178b39
config: arm-socfpga_defconfig (https://download.01.org/0day-ci/archive/20220314/202203141422.aNYTcoGn-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 3e4950d7fa78ac83f33bbf1658e2f49a73719236)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://github.com/0day-ci/linux/commit/21427534c2a95b30f967d178ee997d8ca94b34e6
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review tien-sung-ang-intel-com/firmware-stratix10-svc-Add-new-FCS-support/20220314-102938
git checkout 21427534c2a95b30f967d178ee997d8ca94b34e6
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
In file included from drivers/mfd/altera-sysmgr.c:13:
In file included from include/linux/mfd/altera-sysmgr.h:13:
include/linux/firmware/intel/stratix10-smc.h:406:4: warning: declaration specifier missing, defaulting to 'int'
* Request INTEL_SIP_SMC_SERVICE_COMPLETED
^
int
>> include/linux/firmware/intel/stratix10-smc.h:406:11: error: expected ';' after top level declarator
* Request INTEL_SIP_SMC_SERVICE_COMPLETED
^
;
In file included from drivers/mfd/altera-sysmgr.c:13:
include/linux/mfd/altera-sysmgr.h:18:60: warning: declaration of 'struct device_node' will not be visible outside of this function [-Wvisibility]
struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
^
>> drivers/mfd/altera-sysmgr.c:96:16: error: conflicting types for 'altr_sysmgr_regmap_lookup_by_phandle'
struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
^
include/linux/mfd/altera-sysmgr.h:18:16: note: previous declaration is here
struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
^
2 warnings and 2 errors generated.
--
In file included from drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:7:
In file included from include/linux/mfd/altera-sysmgr.h:13:
include/linux/firmware/intel/stratix10-smc.h:406:4: warning: declaration specifier missing, defaulting to 'int'
* Request INTEL_SIP_SMC_SERVICE_COMPLETED
^
int
>> include/linux/firmware/intel/stratix10-smc.h:406:11: error: expected ';' after top level declarator
* Request INTEL_SIP_SMC_SERVICE_COMPLETED
^
;
In file included from drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:7:
include/linux/mfd/altera-sysmgr.h:18:60: warning: declaration of 'struct device_node' will not be visible outside of this function [-Wvisibility]
struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
^
>> drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:113:40: error: incompatible pointer types passing 'struct device_node *' to parameter of type 'struct device_node *' [-Werror,-Wincompatible-pointer-types]
altr_sysmgr_regmap_lookup_by_phandle(np, "altr,sysmgr-syscon");
^~
include/linux/mfd/altera-sysmgr.h:18:73: note: passing argument to parameter 'np' here
struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
^
2 warnings and 2 errors generated.
vim +406 include/linux/firmware/intel/stratix10-smc.h
7ca5ce896524f52 Richard Gong 2018-11-13 147
7ca5ce896524f52 Richard Gong 2018-11-13 148 /**
7ca5ce896524f52 Richard Gong 2018-11-13 149 * Request INTEL_SIP_SMC_FPGA_CONFIG_ISDONE
7ca5ce896524f52 Richard Gong 2018-11-13 150 *
7ca5ce896524f52 Richard Gong 2018-11-13 151 * Sync call used by service driver at EL1 to inform secure world that all
7ca5ce896524f52 Richard Gong 2018-11-13 152 * data are sent, to check whether or not the secure world had completed
7ca5ce896524f52 Richard Gong 2018-11-13 153 * the FPGA configuration process.
7ca5ce896524f52 Richard Gong 2018-11-13 154 *
7ca5ce896524f52 Richard Gong 2018-11-13 155 * Call register usage:
7ca5ce896524f52 Richard Gong 2018-11-13 156 * a0: INTEL_SIP_SMC_FPGA_CONFIG_ISDONE.
7ca5ce896524f52 Richard Gong 2018-11-13 157 * a1-7: not used.
7ca5ce896524f52 Richard Gong 2018-11-13 158 *
7ca5ce896524f52 Richard Gong 2018-11-13 159 * Return status:
7536ad8dbfcfd56 Richard Gong 2020-04-14 160 * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_BUSY or
7536ad8dbfcfd56 Richard Gong 2020-04-14 161 * INTEL_SIP_SMC_STATUS_ERROR.
7ca5ce896524f52 Richard Gong 2018-11-13 162 * a1-3: not used.
7ca5ce896524f52 Richard Gong 2018-11-13 163 */
7ca5ce896524f52 Richard Gong 2018-11-13 164 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE 4
7ca5ce896524f52 Richard Gong 2018-11-13 165 #define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE \
7ca5ce896524f52 Richard Gong 2018-11-13 166 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE)
7ca5ce896524f52 Richard Gong 2018-11-13 167
7ca5ce896524f52 Richard Gong 2018-11-13 168 /**
7ca5ce896524f52 Richard Gong 2018-11-13 169 * Request INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM
7ca5ce896524f52 Richard Gong 2018-11-13 170 *
7ca5ce896524f52 Richard Gong 2018-11-13 171 * Sync call used by service driver at EL1 to query the physical address of
7ca5ce896524f52 Richard Gong 2018-11-13 172 * memory block reserved by secure monitor software.
7ca5ce896524f52 Richard Gong 2018-11-13 173 *
7ca5ce896524f52 Richard Gong 2018-11-13 174 * Call register usage:
7ca5ce896524f52 Richard Gong 2018-11-13 175 * a0:INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM.
7ca5ce896524f52 Richard Gong 2018-11-13 176 * a1-7: not used.
7ca5ce896524f52 Richard Gong 2018-11-13 177 *
7ca5ce896524f52 Richard Gong 2018-11-13 178 * Return status:
7536ad8dbfcfd56 Richard Gong 2020-04-14 179 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR.
7ca5ce896524f52 Richard Gong 2018-11-13 180 * a1: start of physical address of reserved memory block.
7ca5ce896524f52 Richard Gong 2018-11-13 181 * a2: size of reserved memory block.
7ca5ce896524f52 Richard Gong 2018-11-13 182 * a3: not used.
7ca5ce896524f52 Richard Gong 2018-11-13 183 */
7ca5ce896524f52 Richard Gong 2018-11-13 184 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM 5
7ca5ce896524f52 Richard Gong 2018-11-13 185 #define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM \
7ca5ce896524f52 Richard Gong 2018-11-13 186 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM)
7ca5ce896524f52 Richard Gong 2018-11-13 187
7ca5ce896524f52 Richard Gong 2018-11-13 188 /**
7ca5ce896524f52 Richard Gong 2018-11-13 189 * Request INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK
7ca5ce896524f52 Richard Gong 2018-11-13 190 *
7ca5ce896524f52 Richard Gong 2018-11-13 191 * For SMC loop-back mode only, used for internal integration, debugging
7ca5ce896524f52 Richard Gong 2018-11-13 192 * or troubleshooting.
7ca5ce896524f52 Richard Gong 2018-11-13 193 *
7ca5ce896524f52 Richard Gong 2018-11-13 194 * Call register usage:
7ca5ce896524f52 Richard Gong 2018-11-13 195 * a0: INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK.
7ca5ce896524f52 Richard Gong 2018-11-13 196 * a1-7: not used.
7ca5ce896524f52 Richard Gong 2018-11-13 197 *
7ca5ce896524f52 Richard Gong 2018-11-13 198 * Return status:
7536ad8dbfcfd56 Richard Gong 2020-04-14 199 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR.
7ca5ce896524f52 Richard Gong 2018-11-13 200 * a1-3: not used.
7ca5ce896524f52 Richard Gong 2018-11-13 201 */
7ca5ce896524f52 Richard Gong 2018-11-13 202 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK 6
7ca5ce896524f52 Richard Gong 2018-11-13 203 #define INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK \
7ca5ce896524f52 Richard Gong 2018-11-13 204 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK)
7ca5ce896524f52 Richard Gong 2018-11-13 205
b5dc75c915cdaeb Richard Gong 2019-09-03 206 /**
7ca5ce896524f52 Richard Gong 2018-11-13 207 * Request INTEL_SIP_SMC_REG_READ
7ca5ce896524f52 Richard Gong 2018-11-13 208 *
7ca5ce896524f52 Richard Gong 2018-11-13 209 * Read a protected register at EL3
7ca5ce896524f52 Richard Gong 2018-11-13 210 *
7ca5ce896524f52 Richard Gong 2018-11-13 211 * Call register usage:
7ca5ce896524f52 Richard Gong 2018-11-13 212 * a0: INTEL_SIP_SMC_REG_READ.
7ca5ce896524f52 Richard Gong 2018-11-13 213 * a1: register address.
7ca5ce896524f52 Richard Gong 2018-11-13 214 * a2-7: not used.
7ca5ce896524f52 Richard Gong 2018-11-13 215 *
7ca5ce896524f52 Richard Gong 2018-11-13 216 * Return status:
7ca5ce896524f52 Richard Gong 2018-11-13 217 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
7ca5ce896524f52 Richard Gong 2018-11-13 218 * a1: value in the register
7ca5ce896524f52 Richard Gong 2018-11-13 219 * a2-3: not used.
7ca5ce896524f52 Richard Gong 2018-11-13 220 */
7ca5ce896524f52 Richard Gong 2018-11-13 221 #define INTEL_SIP_SMC_FUNCID_REG_READ 7
7ca5ce896524f52 Richard Gong 2018-11-13 222 #define INTEL_SIP_SMC_REG_READ \
7ca5ce896524f52 Richard Gong 2018-11-13 223 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_READ)
7ca5ce896524f52 Richard Gong 2018-11-13 224
b5dc75c915cdaeb Richard Gong 2019-09-03 225 /**
7ca5ce896524f52 Richard Gong 2018-11-13 226 * Request INTEL_SIP_SMC_REG_WRITE
7ca5ce896524f52 Richard Gong 2018-11-13 227 *
7ca5ce896524f52 Richard Gong 2018-11-13 228 * Write a protected register at EL3
7ca5ce896524f52 Richard Gong 2018-11-13 229 *
7ca5ce896524f52 Richard Gong 2018-11-13 230 * Call register usage:
7ca5ce896524f52 Richard Gong 2018-11-13 231 * a0: INTEL_SIP_SMC_REG_WRITE.
7ca5ce896524f52 Richard Gong 2018-11-13 232 * a1: register address
7ca5ce896524f52 Richard Gong 2018-11-13 233 * a2: value to program into register.
7ca5ce896524f52 Richard Gong 2018-11-13 234 * a3-7: not used.
7ca5ce896524f52 Richard Gong 2018-11-13 235 *
7ca5ce896524f52 Richard Gong 2018-11-13 236 * Return status:
7ca5ce896524f52 Richard Gong 2018-11-13 237 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
7ca5ce896524f52 Richard Gong 2018-11-13 238 * a1-3: not used.
7ca5ce896524f52 Richard Gong 2018-11-13 239 */
7ca5ce896524f52 Richard Gong 2018-11-13 240 #define INTEL_SIP_SMC_FUNCID_REG_WRITE 8
7ca5ce896524f52 Richard Gong 2018-11-13 241 #define INTEL_SIP_SMC_REG_WRITE \
7ca5ce896524f52 Richard Gong 2018-11-13 242 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_WRITE)
7ca5ce896524f52 Richard Gong 2018-11-13 243
b5dc75c915cdaeb Richard Gong 2019-09-03 244 /**
7ca5ce896524f52 Richard Gong 2018-11-13 245 * Request INTEL_SIP_SMC_FUNCID_REG_UPDATE
7ca5ce896524f52 Richard Gong 2018-11-13 246 *
7ca5ce896524f52 Richard Gong 2018-11-13 247 * Update one or more bits in a protected register at EL3 using a
7ca5ce896524f52 Richard Gong 2018-11-13 248 * read-modify-write operation.
7ca5ce896524f52 Richard Gong 2018-11-13 249 *
7ca5ce896524f52 Richard Gong 2018-11-13 250 * Call register usage:
7ca5ce896524f52 Richard Gong 2018-11-13 251 * a0: INTEL_SIP_SMC_REG_UPDATE.
7ca5ce896524f52 Richard Gong 2018-11-13 252 * a1: register address
7ca5ce896524f52 Richard Gong 2018-11-13 253 * a2: write Mask.
7ca5ce896524f52 Richard Gong 2018-11-13 254 * a3: value to write.
7ca5ce896524f52 Richard Gong 2018-11-13 255 * a4-7: not used.
7ca5ce896524f52 Richard Gong 2018-11-13 256 *
7ca5ce896524f52 Richard Gong 2018-11-13 257 * Return status:
7ca5ce896524f52 Richard Gong 2018-11-13 258 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
7ca5ce896524f52 Richard Gong 2018-11-13 259 * a1-3: Not used.
7ca5ce896524f52 Richard Gong 2018-11-13 260 */
7ca5ce896524f52 Richard Gong 2018-11-13 261 #define INTEL_SIP_SMC_FUNCID_REG_UPDATE 9
7ca5ce896524f52 Richard Gong 2018-11-13 262 #define INTEL_SIP_SMC_REG_UPDATE \
7ca5ce896524f52 Richard Gong 2018-11-13 263 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_UPDATE)
7ca5ce896524f52 Richard Gong 2018-11-13 264
b5dc75c915cdaeb Richard Gong 2019-09-03 265 /**
6b50d882d38d5a1 Richard Gong 2018-11-13 266 * Request INTEL_SIP_SMC_RSU_STATUS
6b50d882d38d5a1 Richard Gong 2018-11-13 267 *
6b50d882d38d5a1 Richard Gong 2018-11-13 268 * Request remote status update boot log, call is synchronous.
6b50d882d38d5a1 Richard Gong 2018-11-13 269 *
6b50d882d38d5a1 Richard Gong 2018-11-13 270 * Call register usage:
6b50d882d38d5a1 Richard Gong 2018-11-13 271 * a0 INTEL_SIP_SMC_RSU_STATUS
6b50d882d38d5a1 Richard Gong 2018-11-13 272 * a1-7 not used
6b50d882d38d5a1 Richard Gong 2018-11-13 273 *
6b50d882d38d5a1 Richard Gong 2018-11-13 274 * Return status
6b50d882d38d5a1 Richard Gong 2018-11-13 275 * a0: Current Image
6b50d882d38d5a1 Richard Gong 2018-11-13 276 * a1: Last Failing Image
6b50d882d38d5a1 Richard Gong 2018-11-13 277 * a2: Version | State
6b50d882d38d5a1 Richard Gong 2018-11-13 278 * a3: Error details | Error location
6b50d882d38d5a1 Richard Gong 2018-11-13 279 *
6b50d882d38d5a1 Richard Gong 2018-11-13 280 * Or
6b50d882d38d5a1 Richard Gong 2018-11-13 281 *
6b50d882d38d5a1 Richard Gong 2018-11-13 282 * a0: INTEL_SIP_SMC_RSU_ERROR
6b50d882d38d5a1 Richard Gong 2018-11-13 283 */
6b50d882d38d5a1 Richard Gong 2018-11-13 284 #define INTEL_SIP_SMC_FUNCID_RSU_STATUS 11
6b50d882d38d5a1 Richard Gong 2018-11-13 285 #define INTEL_SIP_SMC_RSU_STATUS \
6b50d882d38d5a1 Richard Gong 2018-11-13 286 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_STATUS)
6b50d882d38d5a1 Richard Gong 2018-11-13 287
b5dc75c915cdaeb Richard Gong 2019-09-03 288 /**
6b50d882d38d5a1 Richard Gong 2018-11-13 289 * Request INTEL_SIP_SMC_RSU_UPDATE
6b50d882d38d5a1 Richard Gong 2018-11-13 290 *
6b50d882d38d5a1 Richard Gong 2018-11-13 291 * Request to set the offset of the bitstream to boot after reboot, call
6b50d882d38d5a1 Richard Gong 2018-11-13 292 * is synchronous.
6b50d882d38d5a1 Richard Gong 2018-11-13 293 *
6b50d882d38d5a1 Richard Gong 2018-11-13 294 * Call register usage:
6b50d882d38d5a1 Richard Gong 2018-11-13 295 * a0 INTEL_SIP_SMC_RSU_UPDATE
6b50d882d38d5a1 Richard Gong 2018-11-13 296 * a1 64bit physical address of the configuration data memory in flash
6b50d882d38d5a1 Richard Gong 2018-11-13 297 * a2-7 not used
6b50d882d38d5a1 Richard Gong 2018-11-13 298 *
6b50d882d38d5a1 Richard Gong 2018-11-13 299 * Return status
6b50d882d38d5a1 Richard Gong 2018-11-13 300 * a0 INTEL_SIP_SMC_STATUS_OK
6b50d882d38d5a1 Richard Gong 2018-11-13 301 */
6b50d882d38d5a1 Richard Gong 2018-11-13 302 #define INTEL_SIP_SMC_FUNCID_RSU_UPDATE 12
6b50d882d38d5a1 Richard Gong 2018-11-13 303 #define INTEL_SIP_SMC_RSU_UPDATE \
6b50d882d38d5a1 Richard Gong 2018-11-13 304 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_UPDATE)
fad9fab975cb9fa Thor Thayer 2019-04-02 305
b5dc75c915cdaeb Richard Gong 2019-09-03 306 /**
fad9fab975cb9fa Thor Thayer 2019-04-02 307 * Request INTEL_SIP_SMC_ECC_DBE
fad9fab975cb9fa Thor Thayer 2019-04-02 308 *
fad9fab975cb9fa Thor Thayer 2019-04-02 309 * Sync call used by service driver at EL1 to alert EL3 that a Double
fad9fab975cb9fa Thor Thayer 2019-04-02 310 * Bit ECC error has occurred.
fad9fab975cb9fa Thor Thayer 2019-04-02 311 *
fad9fab975cb9fa Thor Thayer 2019-04-02 312 * Call register usage:
fad9fab975cb9fa Thor Thayer 2019-04-02 313 * a0 INTEL_SIP_SMC_ECC_DBE
fad9fab975cb9fa Thor Thayer 2019-04-02 314 * a1 SysManager Double Bit Error value
fad9fab975cb9fa Thor Thayer 2019-04-02 315 * a2-7 not used
fad9fab975cb9fa Thor Thayer 2019-04-02 316 *
fad9fab975cb9fa Thor Thayer 2019-04-02 317 * Return status
fad9fab975cb9fa Thor Thayer 2019-04-02 318 * a0 INTEL_SIP_SMC_STATUS_OK
fad9fab975cb9fa Thor Thayer 2019-04-02 319 */
fad9fab975cb9fa Thor Thayer 2019-04-02 320 #define INTEL_SIP_SMC_FUNCID_ECC_DBE 13
fad9fab975cb9fa Thor Thayer 2019-04-02 321 #define INTEL_SIP_SMC_ECC_DBE \
fad9fab975cb9fa Thor Thayer 2019-04-02 322 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_ECC_DBE)
fad9fab975cb9fa Thor Thayer 2019-04-02 323
b5dc75c915cdaeb Richard Gong 2019-09-03 324 /**
b5dc75c915cdaeb Richard Gong 2019-09-03 325 * Request INTEL_SIP_SMC_RSU_NOTIFY
b5dc75c915cdaeb Richard Gong 2019-09-03 326 *
b5dc75c915cdaeb Richard Gong 2019-09-03 327 * Sync call used by service driver at EL1 to report hard processor
b5dc75c915cdaeb Richard Gong 2019-09-03 328 * system execution stage to firmware
b5dc75c915cdaeb Richard Gong 2019-09-03 329 *
b5dc75c915cdaeb Richard Gong 2019-09-03 330 * Call register usage:
b5dc75c915cdaeb Richard Gong 2019-09-03 331 * a0 INTEL_SIP_SMC_RSU_NOTIFY
b5dc75c915cdaeb Richard Gong 2019-09-03 332 * a1 32bit value representing hard processor system execution stage
b5dc75c915cdaeb Richard Gong 2019-09-03 333 * a2-7 not used
b5dc75c915cdaeb Richard Gong 2019-09-03 334 *
b5dc75c915cdaeb Richard Gong 2019-09-03 335 * Return status
b5dc75c915cdaeb Richard Gong 2019-09-03 336 * a0 INTEL_SIP_SMC_STATUS_OK
b5dc75c915cdaeb Richard Gong 2019-09-03 337 */
b5dc75c915cdaeb Richard Gong 2019-09-03 338 #define INTEL_SIP_SMC_FUNCID_RSU_NOTIFY 14
b5dc75c915cdaeb Richard Gong 2019-09-03 339 #define INTEL_SIP_SMC_RSU_NOTIFY \
b5dc75c915cdaeb Richard Gong 2019-09-03 340 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_NOTIFY)
b5dc75c915cdaeb Richard Gong 2019-09-03 341
b5dc75c915cdaeb Richard Gong 2019-09-03 342 /**
b5dc75c915cdaeb Richard Gong 2019-09-03 343 * Request INTEL_SIP_SMC_RSU_RETRY_COUNTER
b5dc75c915cdaeb Richard Gong 2019-09-03 344 *
b5dc75c915cdaeb Richard Gong 2019-09-03 345 * Sync call used by service driver at EL1 to query RSU retry counter
b5dc75c915cdaeb Richard Gong 2019-09-03 346 *
b5dc75c915cdaeb Richard Gong 2019-09-03 347 * Call register usage:
b5dc75c915cdaeb Richard Gong 2019-09-03 348 * a0 INTEL_SIP_SMC_RSU_RETRY_COUNTER
b5dc75c915cdaeb Richard Gong 2019-09-03 349 * a1-7 not used
b5dc75c915cdaeb Richard Gong 2019-09-03 350 *
b5dc75c915cdaeb Richard Gong 2019-09-03 351 * Return status
b5dc75c915cdaeb Richard Gong 2019-09-03 352 * a0 INTEL_SIP_SMC_STATUS_OK
b5dc75c915cdaeb Richard Gong 2019-09-03 353 * a1 the retry counter
b5dc75c915cdaeb Richard Gong 2019-09-03 354 *
b5dc75c915cdaeb Richard Gong 2019-09-03 355 * Or
b5dc75c915cdaeb Richard Gong 2019-09-03 356 *
b5dc75c915cdaeb Richard Gong 2019-09-03 357 * a0 INTEL_SIP_SMC_RSU_ERROR
b5dc75c915cdaeb Richard Gong 2019-09-03 358 */
b5dc75c915cdaeb Richard Gong 2019-09-03 359 #define INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER 15
b5dc75c915cdaeb Richard Gong 2019-09-03 360 #define INTEL_SIP_SMC_RSU_RETRY_COUNTER \
b5dc75c915cdaeb Richard Gong 2019-09-03 361 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER)
bf0e5bf68a207b1 Richard Gong 2020-06-15 362
bf0e5bf68a207b1 Richard Gong 2020-06-15 363 /**
bf0e5bf68a207b1 Richard Gong 2020-06-15 364 * Request INTEL_SIP_SMC_RSU_DCMF_VERSION
bf0e5bf68a207b1 Richard Gong 2020-06-15 365 *
bf0e5bf68a207b1 Richard Gong 2020-06-15 366 * Sync call used by service driver at EL1 to query DCMF (Decision
bf0e5bf68a207b1 Richard Gong 2020-06-15 367 * Configuration Management Firmware) version from FW
bf0e5bf68a207b1 Richard Gong 2020-06-15 368 *
bf0e5bf68a207b1 Richard Gong 2020-06-15 369 * Call register usage:
bf0e5bf68a207b1 Richard Gong 2020-06-15 370 * a0 INTEL_SIP_SMC_RSU_DCMF_VERSION
bf0e5bf68a207b1 Richard Gong 2020-06-15 371 * a1-7 not used
bf0e5bf68a207b1 Richard Gong 2020-06-15 372 *
bf0e5bf68a207b1 Richard Gong 2020-06-15 373 * Return status
bf0e5bf68a207b1 Richard Gong 2020-06-15 374 * a0 INTEL_SIP_SMC_STATUS_OK
bf0e5bf68a207b1 Richard Gong 2020-06-15 375 * a1 dcmf1 | dcmf0
bf0e5bf68a207b1 Richard Gong 2020-06-15 376 * a2 dcmf3 | dcmf2
bf0e5bf68a207b1 Richard Gong 2020-06-15 377 *
bf0e5bf68a207b1 Richard Gong 2020-06-15 378 * Or
bf0e5bf68a207b1 Richard Gong 2020-06-15 379 *
bf0e5bf68a207b1 Richard Gong 2020-06-15 380 * a0 INTEL_SIP_SMC_RSU_ERROR
bf0e5bf68a207b1 Richard Gong 2020-06-15 381 */
bf0e5bf68a207b1 Richard Gong 2020-06-15 382 #define INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION 16
bf0e5bf68a207b1 Richard Gong 2020-06-15 383 #define INTEL_SIP_SMC_RSU_DCMF_VERSION \
bf0e5bf68a207b1 Richard Gong 2020-06-15 384 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION)
bf0e5bf68a207b1 Richard Gong 2020-06-15 385
bf0e5bf68a207b1 Richard Gong 2020-06-15 386 /**
bf0e5bf68a207b1 Richard Gong 2020-06-15 387 * Request INTEL_SIP_SMC_RSU_MAX_RETRY
bf0e5bf68a207b1 Richard Gong 2020-06-15 388 *
bf0e5bf68a207b1 Richard Gong 2020-06-15 389 * Sync call used by service driver at EL1 to query max retry value from FW
bf0e5bf68a207b1 Richard Gong 2020-06-15 390 *
bf0e5bf68a207b1 Richard Gong 2020-06-15 391 * Call register usage:
bf0e5bf68a207b1 Richard Gong 2020-06-15 392 * a0 INTEL_SIP_SMC_RSU_MAX_RETRY
bf0e5bf68a207b1 Richard Gong 2020-06-15 393 * a1-7 not used
bf0e5bf68a207b1 Richard Gong 2020-06-15 394 *
bf0e5bf68a207b1 Richard Gong 2020-06-15 395 * Return status
bf0e5bf68a207b1 Richard Gong 2020-06-15 396 * a0 INTEL_SIP_SMC_STATUS_OK
bf0e5bf68a207b1 Richard Gong 2020-06-15 397 * a1 max retry value
bf0e5bf68a207b1 Richard Gong 2020-06-15 398 *
bf0e5bf68a207b1 Richard Gong 2020-06-15 399 * Or
bf0e5bf68a207b1 Richard Gong 2020-06-15 400 * a0 INTEL_SIP_SMC_RSU_ERROR
bf0e5bf68a207b1 Richard Gong 2020-06-15 401 */
bf0e5bf68a207b1 Richard Gong 2020-06-15 402 #define INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY 18
bf0e5bf68a207b1 Richard Gong 2020-06-15 403 #define INTEL_SIP_SMC_RSU_MAX_RETRY \
bf0e5bf68a207b1 Richard Gong 2020-06-15 404 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY)
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 405
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 @406 * Request INTEL_SIP_SMC_SERVICE_COMPLETED
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 407 * Sync call to check if the secure world have completed service request
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 408 * or not.
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 409 *
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 410 * Call register usage:
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 411 * a0: INTEL_SIP_SMC_SERVICE_COMPLETED
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 412 * a1: the physical address for secure firmware to put output data
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 413 * a2: size
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 414 * a3-a7: not used
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 415 *
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 416 * Return status:
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 417 * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_ERROR,
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 418 * INTEL_SIP_SMC_REJECTED or INTEL_SIP_SMC_STATUS_BUSY
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 419 * a1: physical address for the output daat
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 420 * a2: output data size
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 421 */
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 422 #define INTEL_SIP_SMC_FUNCID_SERVICE_COMPLETED 30
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 423 #define INTEL_SIP_SMC_SERVICE_COMPLETED \
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 424 INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_SERVICE_COMPLETED)
19e0bcb19109ac6 Ang Tien Sung 2022-03-14 425
---
0-DAY CI Kernel Test Service
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 3/3] firmware: stratix10-svc: add new FCS commands
@ 2022-03-14 10:28 tien.sung.ang
2022-03-14 4:52 ` kernel test robot
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: tien.sung.ang @ 2022-03-14 10:28 UTC (permalink / raw)
To: Dinh Nguyen; +Cc: linux-kernel, Ang Tien Sung
From: Ang Tien Sung <tien.sung.ang@intel.com>
Extending the fpga svc driver to support 6 new FPGA Crypto
Service(FCS) commands.
We are adding FCS SDOS data encryption and decryption,
random number generator, image validation request,
reading the data provision and certificate validation.
Signed-off-by: Ang Tien Sung <tien.sung.ang@intel.com>
---
drivers/firmware/stratix10-svc.c | 92 +++++++++++++-
include/linux/firmware/intel/stratix10-smc.h | 114 +++++++++++++++++-
.../firmware/intel/stratix10-svc-client.h | 41 ++++++-
3 files changed, 238 insertions(+), 9 deletions(-)
diff --git a/drivers/firmware/stratix10-svc.c b/drivers/firmware/stratix10-svc.c
index 59dfc997684c..55b3078b9aef 100644
--- a/drivers/firmware/stratix10-svc.c
+++ b/drivers/firmware/stratix10-svc.c
@@ -99,8 +99,10 @@ struct stratix10_svc_data_mem {
/**
* struct stratix10_svc_data - service data structure
* @chan: service channel
- * @paddr: playload physical address
- * @size: playload size
+ * @paddr: physical address of to be processed payload
+ * @size: to be processed playload size
+ * @paddr_output: physical address of processed payload
+ * @size_output: processed payload size
* @command: service command requested by client
* @flag: configuration type (full or partial)
* @arg: args to be passed via registers and not physically mapped buffers
@@ -111,6 +113,8 @@ struct stratix10_svc_data {
struct stratix10_svc_chan *chan;
phys_addr_t paddr;
size_t size;
+ phys_addr_t paddr_output;
+ size_t size_output;
u32 command;
u32 flag;
u64 arg[3];
@@ -317,6 +321,8 @@ static void svc_thread_recv_status_ok(struct stratix10_svc_data *p_data,
case COMMAND_RECONFIG:
case COMMAND_RSU_UPDATE:
case COMMAND_RSU_NOTIFY:
+ case COMMAND_FCS_REQUEST_SERVICE:
+ case COMMAND_FCS_SEND_CERTIFICATE:
case COMMAND_POLL_SERVICE_STATUS:
cb_data->status = BIT(SVC_STATUS_OK);
break;
@@ -336,6 +342,15 @@ static void svc_thread_recv_status_ok(struct stratix10_svc_data *p_data,
cb_data->kaddr1 = &res.a1;
cb_data->kaddr2 = &res.a2;
break;
+ case COMMAND_FCS_RANDOM_NUMBER_GEN:
+ case COMMAND_FCS_DATA_ENCRYPTION:
+ case COMMAND_FCS_DATA_DECRYPTION:
+ case COMMAND_FCS_GET_PROVISION_DATA:
+ cb_data->status = BIT(SVC_STATUS_OK);
+ cb_data->kaddr1 = &res.a1;
+ cb_data->kaddr2 = svc_pa_to_va(res.a2);
+ cb_data->kaddr3 = &res.a3;
+ break;
default:
pr_warn("it shouldn't happen\n");
break;
@@ -362,7 +377,7 @@ static int svc_normal_to_secure_thread(void *data)
struct stratix10_svc_data *pdata;
struct stratix10_svc_cb_data *cbdata;
struct arm_smccc_res res;
- unsigned long a0, a1, a2;
+ unsigned long a0, a1, a2, a3, a4, a5;
int ret_fifo = 0;
pdata = kmalloc(sizeof(*pdata), GFP_KERNEL);
@@ -379,6 +394,9 @@ static int svc_normal_to_secure_thread(void *data)
a0 = INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK;
a1 = 0;
a2 = 0;
+ a3 = 0;
+ a4 = 0;
+ a5 = 0;
pr_debug("smc_hvc_shm_thread is running\n");
@@ -444,6 +462,45 @@ static int svc_normal_to_secure_thread(void *data)
a1 = 0;
a2 = 0;
break;
+
+ /* for FCS */
+ case COMMAND_FCS_DATA_ENCRYPTION:
+ a0 = INTEL_SIP_SMC_FCS_CRYPTION;
+ a1 = 1;
+ a2 = (unsigned long)pdata->paddr;
+ a3 = (unsigned long)pdata->size;
+ a4 = (unsigned long)pdata->paddr_output;
+ a5 = (unsigned long)pdata->size_output;
+ break;
+ case COMMAND_FCS_DATA_DECRYPTION:
+ a0 = INTEL_SIP_SMC_FCS_CRYPTION;
+ a1 = 0;
+ a2 = (unsigned long)pdata->paddr;
+ a3 = (unsigned long)pdata->size;
+ a4 = (unsigned long)pdata->paddr_output;
+ a5 = (unsigned long)pdata->size_output;
+ break;
+ case COMMAND_FCS_RANDOM_NUMBER_GEN:
+ a0 = INTEL_SIP_SMC_FCS_RANDOM_NUMBER;
+ a1 = (unsigned long)pdata->paddr;
+ a2 = (unsigned long)pdata->size;
+ break;
+ case COMMAND_FCS_REQUEST_SERVICE:
+ a0 = INTEL_SIP_SMC_FCS_SERVICE_REQUEST;
+ a1 = (unsigned long)pdata->paddr;
+ a2 = (unsigned long)pdata->size;
+ break;
+ case COMMAND_FCS_SEND_CERTIFICATE:
+ a0 = INTEL_SIP_SMC_FCS_SEND_CERTIFICATE;
+ a1 = (unsigned long)pdata->paddr;
+ a2 = (unsigned long)pdata->size;
+ break;
+ case COMMAND_FCS_GET_PROVISION_DATA:
+ a0 = INTEL_SIP_SMC_FCS_GET_PROVISION_DATA;
+ a1 = (unsigned long)pdata->paddr;
+ a2 = (unsigned long)pdata->size;
+ break;
+
/* for polling */
case COMMAND_POLL_SERVICE_STATUS:
a0 = INTEL_SIP_SMC_SERVICE_COMPLETED;
@@ -502,6 +559,22 @@ static int svc_normal_to_secure_thread(void *data)
break;
case INTEL_SIP_SMC_STATUS_REJECTED:
pr_debug("%s: STATUS_REJECTED\n", __func__);
+ /* for FCS */
+ switch (pdata->command) {
+ case COMMAND_FCS_REQUEST_SERVICE:
+ case COMMAND_FCS_SEND_CERTIFICATE:
+ case COMMAND_FCS_GET_PROVISION_DATA:
+ case COMMAND_FCS_DATA_ENCRYPTION:
+ case COMMAND_FCS_DATA_DECRYPTION:
+ case COMMAND_FCS_RANDOM_NUMBER_GEN:
+ cbdata->status = BIT(SVC_STATUS_INVALID_PARAM);
+ cbdata->kaddr1 = NULL;
+ cbdata->kaddr2 = NULL;
+ cbdata->kaddr3 = NULL;
+ pdata->chan->scl->receive_cb(pdata->chan->scl,
+ cbdata);
+ break;
+ }
break;
case INTEL_SIP_SMC_STATUS_ERROR:
case INTEL_SIP_SMC_RSU_ERROR:
@@ -875,15 +948,25 @@ int stratix10_svc_send(struct stratix10_svc_chan *chan, void *msg)
list_for_each_entry(p_mem, &svc_data_mem, node)
if (p_mem->vaddr == p_msg->payload) {
p_data->paddr = p_mem->paddr;
+ p_data->size = p_msg->payload_length;
break;
}
+ if (p_msg->payload_output) {
+ list_for_each_entry(p_mem, &svc_data_mem, node)
+ if (p_mem->vaddr == p_msg->payload_output) {
+ p_data->paddr_output =
+ p_mem->paddr;
+ p_data->size_output =
+ p_msg->payload_length_output;
+ break;
+ }
+ }
}
p_data->command = p_msg->command;
p_data->arg[0] = p_msg->arg[0];
p_data->arg[1] = p_msg->arg[1];
p_data->arg[2] = p_msg->arg[2];
- p_data->size = p_msg->payload_length;
p_data->chan = chan;
pr_debug("%s: put to FIFO pa=0x%016x, cmd=%x, size=%u\n", __func__,
(unsigned int)p_data->paddr, p_data->command,
@@ -979,6 +1062,7 @@ void stratix10_svc_free_memory(struct stratix10_svc_chan *chan, void *kaddr)
break;
}
+ memset(kaddr, 0, size);
gen_pool_free(chan->ctrl->genpool, (unsigned long)kaddr, size);
pmem->vaddr = NULL;
list_del(&pmem->node);
diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h
index 579efb14cfb4..548bbf362a3a 100644
--- a/include/linux/firmware/intel/stratix10-smc.h
+++ b/include/linux/firmware/intel/stratix10-smc.h
@@ -403,7 +403,6 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
#define INTEL_SIP_SMC_RSU_MAX_RETRY \
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY)
-/**
* Request INTEL_SIP_SMC_SERVICE_COMPLETED
* Sync call to check if the secure world have completed service request
* or not.
@@ -424,4 +423,117 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
#define INTEL_SIP_SMC_SERVICE_COMPLETED \
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_SERVICE_COMPLETED)
+/**
+ * SMC call protocol for FPGA Crypto Service (FCS)
+ * FUNCID starts from 90
+ */
+
+/**
+ * Request INTEL_SIP_SMC_FCS_RANDOM_NUMBER
+ *
+ * Sync call used to query the random number generated by the firmware
+ *
+ * Call register usage:
+ * a0 INTEL_SIP_SMC_FCS_RANDOM_NUMBER
+ * a1 the physical address for firmware to write generated random data
+ * a2-a7 not used
+ *
+ * Return status:
+ * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_FCS_ERROR or
+ * INTEL_SIP_SMC_FCS_REJECTED
+ * a1 the physical address of generated random number
+ * a2 the size
+ * a3 not used
+ */
+#define INTEL_SIP_SMC_FUNCID_FCS_RANDOM_NUMBER 90
+#define INTEL_SIP_SMC_FCS_RANDOM_NUMBER \
+ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_RANDOM_NUMBER)
+
+/**
+ * Request INTEL_SIP_SMC_FCS_CRYPTION
+ * Async call for data encryption and HMAC signature generation, or for
+ * data decryption and HMAC verification.
+ *
+ * Call register usage:
+ * a0 INTEL_SIP_SMC_FCS_CRYPTION
+ * a1 cryption mode (1 for encryption and 0 for decryption)
+ * a2 physical address which stores to be encrypted or decrypted data
+ * a3 input data size
+ * a4 physical address which will hold the encrypted or decrypted output data
+ * a5 output data size
+ * a6-a7 not used
+ *
+ * Return status:
+ * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_ERROR or
+ * INTEL_SIP_SMC_STATUS_REJECTED
+ * a1 mbox return code
+ * a2 physical address of output data which stores encrypted or decrypted data
+ * a3 output data size
+ */
+#define INTEL_SIP_SMC_FUNCID_FCS_CRYPTION 91
+#define INTEL_SIP_SMC_FCS_CRYPTION \
+ INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_CRYPTION)
+
+/**
+ * Request INTEL_SIP_SMC_FCS_SERVICE_REQUEST
+ * Async call for authentication service of HPS software
+ *
+ * Sync call used by service driver at EL1 to query DCMF (Decision
+ * Configuration Management Firmware) version from FW
+ * Call register usage:
+ * a0 INTEL_SIP_SMC_FCS_SERVICE_REQUEST
+ * a1 the physical address of data block
+ * a2 size of data block
+ * a3-a7 not used
+ *
+ * Return status:
+ * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_ERROR or
+ * INTEL_SIP_SMC_REJECTED
+ * a1-a3 not used
+ */
+#define INTEL_SIP_SMC_FUNCID_FCS_SERVICE_REQUEST 92
+#define INTEL_SIP_SMC_FCS_SERVICE_REQUEST \
+ INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_SERVICE_REQUEST)
+
+/**
+ * Request INTEL_SIP_SMC_FUNCID_FCS_SEND_CERTIFICATE
+ * Sync call to send a signed certificate
+ *
+ * Call register usage:
+ * a0 INTEL_SIP_SMC_FCS_SEND_CERTIFICATE
+ * a1 the physical address of CERTIFICATE block
+ * a2 size of data block
+ * a3-a7 not used
+ *
+ * Return status:
+ * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_FCS_ERROR or
+ * INTEL_SIP_SMC_FCS_REJECTED
+ * a1-a3 not used
+ */
+#define INTEL_SIP_SMC_FUNCID_FCS_SEND_CERTIFICATE 93
+#define INTEL_SIP_SMC_FCS_SEND_CERTIFICATE \
+ INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_SEND_CERTIFICATE)
+
+/**
+ * Request INTEL_SIP_SMC_FCS_GET_PROVISION_DATA
+ * Sync call to dump all the fuses and key hashes
+ *
+ * Call register usage:
+ * a0 INTEL_SIP_SMC_FCS_GET_PROVISION_DATA
+ * a1 the physical address for firmware to write structure of fuse and
+ * key hashes
+ * a2-a7 not used
+ *
+ * Return status:
+ * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_FCS_ERROR or
+ * INTEL_SIP_SMC_FCS_REJECTED
+ * a1 physical address for the structure of fuse and key hashes
+ * a2 the size of structure
+ * a3 not used
+ *
+ */
+#define INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA 94
+#define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA \
+ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA)
+
#endif
diff --git a/include/linux/firmware/intel/stratix10-svc-client.h b/include/linux/firmware/intel/stratix10-svc-client.h
index 82e8c9336cf4..1010f14d927b 100644
--- a/include/linux/firmware/intel/stratix10-svc-client.h
+++ b/include/linux/firmware/intel/stratix10-svc-client.h
@@ -49,8 +49,8 @@
#define SVC_STATUS_BUSY 4
#define SVC_STATUS_ERROR 5
#define SVC_STATUS_NO_SUPPORT 6
-
-/*
+#define SVC_STATUS_INVALID_PARAM 7
+/**
* Flag bit for COMMAND_RECONFIG
*
* COMMAND_RECONFIG_FLAG_PARTIAL:
@@ -66,6 +66,8 @@
#define SVC_RECONFIG_REQUEST_TIMEOUT_MS 300
#define SVC_RECONFIG_BUFFER_TIMEOUT_MS 720
#define SVC_RSU_REQUEST_TIMEOUT_MS 300
+#define SVC_FCS_REQUEST_TIMEOUT_MS 2000
+#define SVC_COMPLETED_TIMEOUT_MS 30000
struct stratix10_svc_chan;
@@ -105,21 +107,48 @@ struct stratix10_svc_chan;
* @COMMAND_RSU_DCMF_VERSION: query firmware for the DCMF version, return status
* is SVC_STATUS_OK or SVC_STATUS_ERROR
*
+ * @COMMAND_FCS_REQUEST_SERVICE: request validation of image from firmware,
+ * return status is SVC_STATUS_OK, SVC_STATUS_INVALID_PARAM
+ *
+ * @COMMAND_FCS_SEND_CERTIFICATE: send a certificate, return status is
+ * SVC_STATUS_OK, SVC_STATUS_INVALID_PARAM, SVC_STATUS_ERROR
+ *
+ * @COMMAND_FCS_GET_PROVISION_DATA: read the provisioning data, return status is
+ * SVC_STATUS_OK, SVC_STATUS_INVALID_PARAM, SVC_STATUS_ERROR
+ *
+ * @COMMAND_FCS_DATA_ENCRYPTION: encrypt the data, return status is
+ * SVC_STATUS_OK, SVC_STATUS_INVALID_PARAM, SVC_STATUS_ERROR
+ *
+ * @COMMAND_FCS_DATA_DECRYPTION: decrypt the data, return status is
+ * SVC_STATUS_OK, SVC_STATUS_INVALID_PARAM, SVC_STATUS_ERROR
+ *
+ * @COMMAND_FCS_RANDOM_NUMBER_GEN: generate a random number, return status
+ * is SVC_STATUS_OK, SVC_STATUS_ERROR
+ *
* @COMMAND_POLL_SERVICE_STATUS: poll if the service request is complete,
* return statis is SVC_STATUS_OK, SVC_STATUS_ERROR or SVC_STATUS_BUSY
*/
enum stratix10_svc_command_code {
+ /* for FPGA */
COMMAND_NOOP = 0,
COMMAND_RECONFIG,
COMMAND_RECONFIG_DATA_SUBMIT,
COMMAND_RECONFIG_DATA_CLAIM,
COMMAND_RECONFIG_STATUS,
- COMMAND_RSU_STATUS,
+ /* for RSU */
+ COMMAND_RSU_STATUS = 10,
COMMAND_RSU_UPDATE,
COMMAND_RSU_NOTIFY,
COMMAND_RSU_RETRY,
COMMAND_RSU_MAX_RETRY,
COMMAND_RSU_DCMF_VERSION,
+ /* for FCS */
+ COMMAND_FCS_REQUEST_SERVICE = 20,
+ COMMAND_FCS_SEND_CERTIFICATE,
+ COMMAND_FCS_GET_PROVISION_DATA,
+ COMMAND_FCS_DATA_ENCRYPTION,
+ COMMAND_FCS_DATA_DECRYPTION,
+ COMMAND_FCS_RANDOM_NUMBER_GEN,
/* for general status poll */
COMMAND_POLL_SERVICE_STATUS = 40,
};
@@ -127,13 +156,17 @@ enum stratix10_svc_command_code {
/**
* struct stratix10_svc_client_msg - message sent by client to service
* @payload: starting address of data need be processed
- * @payload_length: data size in bytes
+ * @payload_length: to be processed data size in bytes
+ * @payload_output: starting address of processed data
+ * @payload_length_output: processed data size in bytes
* @command: service command
* @arg: args to be passed via registers and not physically mapped buffers
*/
struct stratix10_svc_client_msg {
void *payload;
size_t payload_length;
+ void *payload_output;
+ size_t payload_length_output;
enum stratix10_svc_command_code command;
u64 arg[3];
};
--
2.25.1
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2022-03-14 10:28 [PATCH 3/3] firmware: stratix10-svc: add new FCS commands tien.sung.ang
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