From: Andrea Parri <parri.andrea@gmail.com>
To: Guo Ren <guoren@kernel.org>
Cc: Boqun Feng <boqun.feng@gmail.com>,
Daniel Lustig <dlustig@nvidia.com>,
"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
Arnd Bergmann <arnd@arndb.de>,
Palmer Dabbelt <palmer@dabbelt.com>,
Mark Rutland <mark.rutland@arm.com>,
Will Deacon <will@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
linux-arch <linux-arch@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-riscv <linux-riscv@lists.infradead.org>,
Guo Ren <guoren@linux.alibaba.com>
Subject: Re: [PATCH V2 0/3] riscv: atomic: Optimize AMO instructions usage
Date: Tue, 19 Apr 2022 01:41:37 +0200 [thread overview]
Message-ID: <20220418234137.GA444607@anparri> (raw)
In-Reply-To: <CAJF2gTRws6RqKmJHBdKsycWSkFgYna_MocJ+qp3Z9r1v7mQzsg@mail.gmail.com>
> > Seems to me that you are basically reverting 5ce6c1f3535f
> > ("riscv/atomic: Strengthen implementations with fences"). That commit
> > fixed an memory ordering issue, could you explain why the issue no
> > longer needs a fix?
>
> I'm not reverting the prior patch, just optimizing it.
>
> In RISC-V “A” Standard Extension for Atomic Instructions spec, it said:
With reference to the RISC-V herd specification at:
https://github.com/riscv/riscv-isa-manual.git
the issue, better, lr-sc-aqrl-pair-vs-full-barrier seems to _no longer_
need a fix since commit:
03a5e722fc0f ("Updates to the memory consistency model spec")
(here a template, to double check:
https://github.com/litmus-tests/litmus-tests-riscv/blob/master/tests/non-mixed-size/HAND/LR-SC-NOT-FENCE.litmus )
I defer to Daniel/others for a "bi-section" of the prose specification.
;-)
Andrea
next prev parent reply other threads:[~2022-04-18 23:41 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-12 3:49 [PATCH V2 0/3] riscv: atomic: Optimize AMO instructions usage guoren
2022-04-12 3:49 ` [PATCH V2 1/3] riscv: atomic: Cleanup unnecessary definition guoren
2022-04-12 3:49 ` [PATCH V2 2/3] riscv: atomic: Optimize acquire and release for AMO operations guoren
2022-04-12 3:49 ` [PATCH V2 3/3] riscv: atomic: Optimize memory barrier semantics of LRSC-pairs guoren
2022-04-13 15:46 ` [PATCH V2 0/3] riscv: atomic: Optimize AMO instructions usage Boqun Feng
2022-04-16 16:49 ` Guo Ren
2022-04-17 2:26 ` Boqun Feng
2022-04-17 4:51 ` Guo Ren
2022-04-17 6:30 ` Boqun Feng
2022-04-17 6:45 ` Guo Ren
2022-04-19 17:12 ` Dan Lustig
2022-04-20 5:33 ` Guo Ren
2022-04-20 17:03 ` Dan Lustig
2022-04-21 9:39 ` Guo Ren
2022-04-21 22:56 ` Boqun Feng
2022-04-22 1:56 ` Guo Ren
2022-04-22 3:11 ` Boqun Feng
2022-04-24 7:52 ` Guo Ren
2022-04-18 23:41 ` Andrea Parri [this message]
2022-04-19 17:13 ` Dan Lustig
2022-04-24 8:33 ` Guo Ren
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