[GIT PULL] x86/urgent for 6.4-rc4

[GIT PULL] x86/urgent for 6.4-rc4

[Dave Hansen]

Hi Linus,

Please pull a single x86/urgent change for 6.4-rc4.  This works around
and issue where the INVLPG instruction may miss invalidating kernel
TLB entries.  I do expect an eventual microcode fix for this.  When
the microcode version numbers are known, we can circle back around and
add them the model table to disable this workaround.

--

The following changes since commit 7d8accfaa0ab65e4282c8e58950f7d688342cd86:

  hwmon: (k10temp) Add PCI ID for family 19, model 78h (2023-05-08 11:36:19 +0200)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git tags/x86_urgent_for_6.4-rc4

for you to fetch changes up to ce0b15d11ad837fbacc5356941712218e38a0a83:

  x86/mm: Avoid incomplete Global INVLPG flushes (2023-05-17 08:55:02 -0700)

----------------------------------------------------------------
Work around a TLB invalidation issue in recent hybrid CPUs

----------------------------------------------------------------
Dave Hansen (1):
      x86/mm: Avoid incomplete Global INVLPG flushes

 arch/x86/mm/init.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

Re: [GIT PULL] x86/urgent for 6.4-rc4

[pr-tracker-bot]

The pull request you sent on Mon, 22 May 2023 16:15:48 -0700:

> https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git tags/x86_urgent_for_6.4-rc4

has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/ae8373a5add4ea39f032563cf12a02946d1e3546

Thank you!

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[GIT pull] x86/urgent for 6.4-rc4

[Thomas Gleixner]

Linus,

please pull the latest x86/urgent branch from:

   git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-urgent-2023-05-28

up to:  edc0a2b59576: x86/topology: Fix erroneous smp_num_siblings on Intel Hybrid platforms


A single fix for x86:

 - Prevent a bogus setting for the number of HT siblings, which is caused
   by the CPUID evaluation trainwreck of X86. That recomputes the value
   for each CPU, so the last CPU "wins". That can cause completely bogus
   sibling values.

Thanks,

	tglx

------------------>
Zhang Rui (1):
      x86/topology: Fix erroneous smp_num_siblings on Intel Hybrid platforms


 arch/x86/kernel/cpu/topology.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/topology.c b/arch/x86/kernel/cpu/topology.c
index 5e868b62a7c4..0270925fe013 100644
--- a/arch/x86/kernel/cpu/topology.c
+++ b/arch/x86/kernel/cpu/topology.c
@@ -79,7 +79,7 @@ int detect_extended_topology_early(struct cpuinfo_x86 *c)
 	 * initial apic id, which also represents 32-bit extended x2apic id.
 	 */
 	c->initial_apicid = edx;
-	smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
+	smp_num_siblings = max_t(int, smp_num_siblings, LEVEL_MAX_SIBLINGS(ebx));
 #endif
 	return 0;
 }
@@ -109,7 +109,8 @@ int detect_extended_topology(struct cpuinfo_x86 *c)
 	 */
 	cpuid_count(leaf, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
 	c->initial_apicid = edx;
-	core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
+	core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
+	smp_num_siblings = max_t(int, smp_num_siblings, LEVEL_MAX_SIBLINGS(ebx));
 	core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
 	die_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
 	pkg_mask_width = die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);

Re: [GIT pull] x86/urgent for 6.4-rc4

[pr-tracker-bot]

The pull request you sent on Sun, 28 May 2023 09:53:02 +0200 (CEST):

> git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-urgent-2023-05-28

has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/f8b2507c263d6c1478d179c7c260064a61f14542

Thank you!

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