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From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Mario Limonciello <mario.limonciello@amd.com>
Cc: Esther Shimanovich <eshimanovich@chromium.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rajat Jain <rajatja@google.com>,
	"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
	iommu@lists.linux.dev, Lukas Wunner <lukas@wunner.de>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3] PCI: Detect and trust built-in Thunderbolt chips
Date: Fri, 23 Aug 2024 08:01:20 +0300	[thread overview]
Message-ID: <20240823050120.GJ1532424@black.fi.intel.com> (raw)
In-Reply-To: <54feb448-b8b9-49ca-bf29-02b9884c048c@amd.com>

Hi,

On Thu, Aug 22, 2024 at 10:56:44AM -0500, Mario Limonciello wrote:
> > > Here's the snippet from the kernel log with the patch in place.  You can see
> > > it flagged 00:02.0 as untrusted and removable, but it definitely isn't.
> > 
> > Is it marked as ExternalFacingPort in the ACPI tables?
> 
> No; it doesn't have an ACPI companion device.

Hm, how can it pass this then?

static bool pcie_is_tunneled(struct pci_dev *pdev)
{
	...
	/* Internal PCIe devices are not tunneled. */
	if (!root->external_facing)
		return false;
	...

Would you mind adding some debug statements there so we can see
(hopefully) what goes wrong?

The intention is that pcie_switch_directly_under() is only called on
Intel pre-USB4 discrete controllers (well and Maple Ridge as that's
still using the Connection Manager firmware).

  reply	other threads:[~2024-08-23  5:01 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-15 19:07 [PATCH v3] PCI: Detect and trust built-in Thunderbolt chips Esther Shimanovich
2024-08-20 16:13 ` Ilpo Järvinen
2024-08-22 15:29 ` Mario Limonciello
2024-08-22 15:53   ` Mika Westerberg
2024-08-22 15:56     ` Mario Limonciello
2024-08-23  5:01       ` Mika Westerberg [this message]
2024-08-23 15:36         ` Mario Limonciello

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