* [PATCH net-next] net: ag71xx: update FIFO bits and descriptions
@ 2024-08-28 20:42 Rosen Penev
2024-08-28 22:29 ` Jakub Kicinski
0 siblings, 1 reply; 3+ messages in thread
From: Rosen Penev @ 2024-08-28 20:42 UTC (permalink / raw)
Cc: davem, edumazet, kuba, pabeni, linux, linux-kernel, o.rempel,
p.zabel
Taken from QCA SDK. No functional difference as same bits get applied.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
---
drivers/net/ethernet/atheros/ag71xx.c | 48 +++++++++++++--------------
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/drivers/net/ethernet/atheros/ag71xx.c b/drivers/net/ethernet/atheros/ag71xx.c
index 5ef76f3d3f1a..0674a042e8d3 100644
--- a/drivers/net/ethernet/atheros/ag71xx.c
+++ b/drivers/net/ethernet/atheros/ag71xx.c
@@ -149,11 +149,11 @@
#define FIFO_CFG4_MC BIT(8) /* Multicast Packet */
#define FIFO_CFG4_BC BIT(9) /* Broadcast Packet */
#define FIFO_CFG4_DR BIT(10) /* Dribble */
-#define FIFO_CFG4_LE BIT(11) /* Long Event */
-#define FIFO_CFG4_CF BIT(12) /* Control Frame */
-#define FIFO_CFG4_PF BIT(13) /* Pause Frame */
-#define FIFO_CFG4_UO BIT(14) /* Unsupported Opcode */
-#define FIFO_CFG4_VT BIT(15) /* VLAN tag detected */
+#define FIFO_CFG4_CF BIT(11) /* Control Frame */
+#define FIFO_CFG4_PF BIT(12) /* Pause Frame */
+#define FIFO_CFG4_UO BIT(13) /* Unsupported Opcode */
+#define FIFO_CFG4_VT BIT(14) /* VLAN tag detected */
+#define FIFO_CFG4_LE BIT(15) /* Long Event */
#define FIFO_CFG4_FT BIT(16) /* Frame Truncated */
#define FIFO_CFG4_UC BIT(17) /* Unicast Packet */
#define FIFO_CFG4_INIT (FIFO_CFG4_DE | FIFO_CFG4_DV | FIFO_CFG4_FC | \
@@ -168,28 +168,28 @@
#define FIFO_CFG5_DV BIT(1) /* RX_DV Event */
#define FIFO_CFG5_FC BIT(2) /* False Carrier */
#define FIFO_CFG5_CE BIT(3) /* Code Error */
-#define FIFO_CFG5_LM BIT(4) /* Length Mismatch */
-#define FIFO_CFG5_LO BIT(5) /* Length Out of Range */
-#define FIFO_CFG5_OK BIT(6) /* Packet is OK */
-#define FIFO_CFG5_MC BIT(7) /* Multicast Packet */
-#define FIFO_CFG5_BC BIT(8) /* Broadcast Packet */
-#define FIFO_CFG5_DR BIT(9) /* Dribble */
-#define FIFO_CFG5_CF BIT(10) /* Control Frame */
-#define FIFO_CFG5_PF BIT(11) /* Pause Frame */
-#define FIFO_CFG5_UO BIT(12) /* Unsupported Opcode */
-#define FIFO_CFG5_VT BIT(13) /* VLAN tag detected */
-#define FIFO_CFG5_LE BIT(14) /* Long Event */
-#define FIFO_CFG5_FT BIT(15) /* Frame Truncated */
-#define FIFO_CFG5_16 BIT(16) /* unknown */
-#define FIFO_CFG5_17 BIT(17) /* unknown */
+#define FIFO_CFG5_CR BIT(4) /* CRC error */
+#define FIFO_CFG5_LM BIT(5) /* Length Mismatch */
+#define FIFO_CFG5_LO BIT(6) /* Length Out of Range */
+#define FIFO_CFG5_OK BIT(7) /* Packet is OK */
+#define FIFO_CFG5_MC BIT(8) /* Multicast Packet */
+#define FIFO_CFG5_BC BIT(9) /* Broadcast Packet */
+#define FIFO_CFG5_DR BIT(10) /* Dribble */
+#define FIFO_CFG5_CF BIT(11) /* Control Frame */
+#define FIFO_CFG5_PF BIT(12) /* Pause Frame */
+#define FIFO_CFG5_UO BIT(13) /* Unsupported Opcode */
+#define FIFO_CFG5_VT BIT(14) /* VLAN tag detected */
+#define FIFO_CFG5_LE BIT(15) /* Long Event */
+#define FIFO_CFG5_FT BIT(16) /* Frame Truncated */
+#define FIFO_CFG5_UC BIT(17) /* Unicast Packet */
#define FIFO_CFG5_SF BIT(18) /* Short Frame */
#define FIFO_CFG5_BM BIT(19) /* Byte Mode */
#define FIFO_CFG5_INIT (FIFO_CFG5_DE | FIFO_CFG5_DV | FIFO_CFG5_FC | \
- FIFO_CFG5_CE | FIFO_CFG5_LO | FIFO_CFG5_OK | \
- FIFO_CFG5_MC | FIFO_CFG5_BC | FIFO_CFG5_DR | \
- FIFO_CFG5_CF | FIFO_CFG5_PF | FIFO_CFG5_VT | \
- FIFO_CFG5_LE | FIFO_CFG5_FT | FIFO_CFG5_16 | \
- FIFO_CFG5_17 | FIFO_CFG5_SF)
+ FIFO_CFG5_CE | FIFO_CFG5_LM | FIFO_CFG5_L0 | \
+ FIFO_CFG5_OK | FIFO_CFG5_MC | FIFO_CFG5_BC | \
+ FIFO_CFG5_DR | FIFO_CFG5_CF | FIFO_CFG5_UO | \
+ FIFO_CFG5_VT | FIFO_CFG5_LE | FIFO_CFG5_FT | \
+ FIFO_CFG5_UC | FIFO_CFG5_SF)
#define AG71XX_REG_TX_CTRL 0x0180
#define TX_CTRL_TXE BIT(0) /* Tx Enable */
--
2.46.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH net-next] net: ag71xx: update FIFO bits and descriptions
2024-08-28 20:42 [PATCH net-next] net: ag71xx: update FIFO bits and descriptions Rosen Penev
@ 2024-08-28 22:29 ` Jakub Kicinski
2024-08-28 22:36 ` Rosen Penev
0 siblings, 1 reply; 3+ messages in thread
From: Jakub Kicinski @ 2024-08-28 22:29 UTC (permalink / raw)
To: Rosen Penev
Cc: davem, edumazet, pabeni, linux, linux-kernel, o.rempel, p.zabel
On Wed, 28 Aug 2024 13:42:49 -0700 Rosen Penev wrote:
> Taken from QCA SDK. No functional difference as same bits get applied.
Are these used? Would be nice to heave your best guess on the impact
this change will have in the commit message, for posterity scanning
git logs a few months/years from now.
BTW missing CC netdev, feel free to resend without 24h wait.
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH net-next] net: ag71xx: update FIFO bits and descriptions
2024-08-28 22:29 ` Jakub Kicinski
@ 2024-08-28 22:36 ` Rosen Penev
0 siblings, 0 replies; 3+ messages in thread
From: Rosen Penev @ 2024-08-28 22:36 UTC (permalink / raw)
To: Jakub Kicinski
Cc: davem, edumazet, pabeni, linux, linux-kernel, o.rempel, p.zabel
On Wed, Aug 28, 2024 at 3:29 PM Jakub Kicinski <kuba@kernel.org> wrote:
>
> On Wed, 28 Aug 2024 13:42:49 -0700 Rosen Penev wrote:
> > Taken from QCA SDK. No functional difference as same bits get applied.
>
> Are these used? Would be nice to heave your best guess on the impact
> this change will have in the commit message, for posterity scanning
> git logs a few months/years from now.
No impact. It's effectively a documentation fix.
I see ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, FIFO_CFG5_INIT); so yes, they're used.
>
> BTW missing CC netdev, feel free to resend without 24h wait.
That's embarrassing. Will do.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2024-08-28 20:42 [PATCH net-next] net: ag71xx: update FIFO bits and descriptions Rosen Penev
2024-08-28 22:29 ` Jakub Kicinski
2024-08-28 22:36 ` Rosen Penev
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