Re: [PATCH v5 2/4] rtc: s32g: add NXP S32G2/S32G3 SoC support

[kernel test robot <lkp@intel.com>]

Hi Ciprian,

kernel test robot noticed the following build warnings:

[auto build test WARNING on robh/for-next]
[also build test WARNING on arm64/for-next/core linus/master v6.12]
[cannot apply to abelloni/rtc-next next-20241128]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Ciprian-Costea/dt-bindings-rtc-add-schema-for-NXP-S32G2-S32G3-SoCs/20241128-100010
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link:    https://lore.kernel.org/r/20241126114940.421143-3-ciprianmarian.costea%40oss.nxp.com
patch subject: [PATCH v5 2/4] rtc: s32g: add NXP S32G2/S32G3 SoC support
config: loongarch-allyesconfig (https://download.01.org/0day-ci/archive/20241129/202411290700.vbqI1pTY-lkp@intel.com/config)
compiler: loongarch64-linux-gcc (GCC) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241129/202411290700.vbqI1pTY-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202411290700.vbqI1pTY-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/rtc/rtc-s32g.c:109: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * Convert a number of seconds to a value suitable for RTCVAL in our clock's


vim +109 drivers/rtc/rtc-s32g.c

   107	
   108	/**
 > 109	 * Convert a number of seconds to a value suitable for RTCVAL in our clock's
   110	 * current configuration.
   111	 * @rtcval: The value to go into RTCVAL[RTCVAL]
   112	 * Returns: 0 for success, -EINVAL if @seconds push the counter past the
   113	 *          32bit register range
   114	 */
   115	static int sec_to_rtcval(const struct rtc_priv *priv,
   116				 unsigned long seconds, u32 *rtcval)
   117	{
   118		u32 delta_cnt;
   119	
   120		if (!seconds || seconds > cycles_to_sec(priv->rtc_hz, RTCCNT_MAX_VAL))
   121			return -EINVAL;
   122	
   123		/*
   124		 * RTCCNT is read-only; we must return a value relative to the
   125		 * current value of the counter (and hope we don't linger around
   126		 * too much before we get to enable the interrupt)
   127		 */
   128		delta_cnt = seconds * priv->rtc_hz;
   129		*rtcval = delta_cnt + ioread32(priv->rtc_base + RTCCNT_OFFSET);
   130	
   131		return 0;
   132	}
   133	

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