From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: Robert Richter <rrichter@amd.com>
Cc: Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Dave Jiang <dave.jiang@intel.com>,
"Davidlohr Bueso" <dave@stgolabs.net>,
<linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Gregory Price <gourry@gourry.net>,
"Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>,
Terry Bowman <terry.bowman@amd.com>
Subject: Re: [PATCH v3 04/18] cxl/pci: Add comments to cxl_hdm_decode_init()
Date: Fri, 14 Feb 2025 15:51:20 +0000 [thread overview]
Message-ID: <20250214155120.00004461@huawei.com> (raw)
In-Reply-To: <20250211095349.981096-5-rrichter@amd.com>
On Tue, 11 Feb 2025 10:53:34 +0100
Robert Richter <rrichter@amd.com> wrote:
> There are various configuration cases of HDM decoder registers causing
> different code paths. Add comments to cxl_hdm_decode_init() to better
> explain them.
>
> Signed-off-by: Robert Richter <rrichter@amd.com>
> Reviewed-by: Gregory Price <gourry@gourry.net>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Tested-by: Gregory Price <gourry@gourry.net>
> ---
> drivers/cxl/core/pci.c | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
> index c49efc419285..6333a01e4f19 100644
> --- a/drivers/cxl/core/pci.c
> +++ b/drivers/cxl/core/pci.c
> @@ -416,9 +416,17 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm,
> if (global_ctrl & CXL_HDM_DECODER_ENABLE || (!hdm && info->mem_enabled))
> return devm_cxl_enable_mem(&port->dev, cxlds);
>
> + /*
> + * If the HDM Decoder Capability does not exist and DVSEC was
> + * not setup, the DVSEC based emulation cannot be used.
> + */
> if (!hdm)
> return -ENODEV;
>
> + /*
> + * The HDM Decoder Capability exists but is globally disabled.
> + */
> +
> /*
> * Per CXL 2.0 Section 8.1.3.8.3 and 8.1.3.8.4 DVSEC CXL Range 1 Base
> * [High,Low] when HDM operation is enabled the range register values
> @@ -426,7 +434,8 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm,
> * DVSEC Range 1,2 to HDM Decoder Range 0,1. So, non-zero info->ranges
> * are expected even though Linux does not require or maintain that
> * match. If at least one DVSEC range is enabled and allowed, skip HDM
> - * Decoder Capability Enable.
> + * Decoder Capability Enable. Else, use the HDM Decoder Capability and
> + * enable it.
As per previous. Having an 'else' comment that refers to what happens if the
following if is true, just adds to confusion :(
So if you are going to move the comment it needs a more substantial rewrite
to reflect that we care 'here' about that last bit only.
> */
> if (!info->mem_enabled) {
> rc = devm_cxl_enable_hdm(&port->dev, cxlhdm);
next prev parent reply other threads:[~2025-02-14 15:51 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-11 9:53 [PATCH v3 00/18] cxl: Address translation support, part 1: Cleanups and refactoring Robert Richter
2025-02-11 9:53 ` [PATCH v3 01/18] cxl: Remove else after return Robert Richter
2025-02-11 9:53 ` [PATCH v3 02/18] cxl/pci: Moving code in cxl_hdm_decode_init() Robert Richter
2025-02-12 17:57 ` Jonathan Cameron
2025-02-20 1:03 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 03/18] cxl/pci: cxl_hdm_decode_init: Move comment Robert Richter
2025-02-12 18:09 ` Jonathan Cameron
2025-02-13 0:35 ` Robert Richter
2025-02-14 15:49 ` Jonathan Cameron
2025-03-06 9:38 ` Robert Richter
2025-02-11 9:53 ` [PATCH v3 04/18] cxl/pci: Add comments to cxl_hdm_decode_init() Robert Richter
2025-02-14 15:51 ` Jonathan Cameron [this message]
2025-02-11 9:53 ` [PATCH v3 05/18] cxl: Introduce parent_port_of() helper Robert Richter
2025-02-20 16:12 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 06/18] cxl/region: Rename function to cxl_find_decoder_early() Robert Richter
2025-02-14 15:58 ` Jonathan Cameron
2025-03-05 12:48 ` Robert Richter
2025-02-11 9:53 ` [PATCH v3 07/18] cxl/region: Avoid duplicate call of cxl_find_decoder_early() Robert Richter
2025-02-14 16:07 ` Jonathan Cameron
2025-03-06 9:16 ` Robert Richter
2025-02-11 9:53 ` [PATCH v3 08/18] cxl/region: Move find_cxl_root() to cxl_add_to_region() Robert Richter
2025-02-20 16:39 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 09/18] cxl/region: Factor out code to find the root decoder Robert Richter
2025-02-20 16:48 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 10/18] cxl/region: Factor out code to find a root decoder's region Robert Richter
2025-02-14 16:15 ` Jonathan Cameron
2025-02-20 16:50 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 11/18] cxl/region: Split region registration into an initialization and adding part Robert Richter
2025-02-14 16:24 ` Jonathan Cameron
2025-02-11 9:53 ` [PATCH v3 12/18] cxl/region: Use iterator to find the root port in cxl_find_root_decoder() Robert Richter
2025-02-20 17:17 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 13/18] cxl/region: Add function to find a port's switch decoder by range Robert Richter
2025-02-14 16:29 ` Jonathan Cameron
2025-02-20 17:23 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 14/18] cxl/region: Unfold cxl_find_root_decoder() into cxl_endpoint_decoder_initialize() Robert Richter
2025-02-14 16:33 ` Jonathan Cameron
2025-03-06 16:18 ` Robert Richter
2025-02-11 9:53 ` [PATCH v3 15/18] cxl/region: Add a dev_warn() on registration failure Robert Richter
2025-02-14 16:35 ` Jonathan Cameron
2025-02-20 17:35 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 16/18] cxl/region: Add a dev_err() on missing target list entries Robert Richter
2025-02-14 16:36 ` Jonathan Cameron
2025-02-20 17:44 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 17/18] cxl: Add a dev_dbg() when a decoder was added to a port Robert Richter
2025-02-14 16:37 ` Jonathan Cameron
2025-02-20 17:45 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 18/18] cxl/acpi: Unify CFMWS memory log messages with SRAT messages Robert Richter
2025-02-14 16:37 ` Jonathan Cameron
2025-02-20 17:46 ` Dave Jiang
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