From: Boris Brezillon <boris.brezillon@collabora.com>
To: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
robh@kernel.org, steven.price@arm.com,
maarten.lankhorst@linux.intel.com, mripard@kernel.org,
tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch
Subject: Re: [RFC PATCH 3/4] drm/panfrost: Support ARM_64_LPAE_S1 page table
Date: Thu, 27 Feb 2025 09:32:37 +0100 [thread overview]
Message-ID: <20250227093237.33aaf496@collabora.com> (raw)
In-Reply-To: <20250227093030.1a45b4b7@collabora.com>
On Thu, 27 Feb 2025 09:30:30 +0100
Boris Brezillon <boris.brezillon@collabora.com> wrote:
> > Bifrost MMUs support AArch64 4kB granule specification. However,
> > panfrost only enables MMU in legacy mode, despite the presence of the
> > HW_FEATURE_AARCH64_MMU feature flag.
> >
> > This commit adds support to use page tables according to AArch64 4kB
> > granule specification. This feature is enabled conditionally based on
> > the GPU model's HW_FEATURE_AARCH64_MMU feature flag.
> >
> > Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
> > ---
> > drivers/gpu/drm/panfrost/panfrost_device.h | 1 +
> > drivers/gpu/drm/panfrost/panfrost_mmu.c | 118 +++++++++++++++++----
> > drivers/gpu/drm/panfrost/panfrost_regs.h | 29 +++++
> > 3 files changed, 128 insertions(+), 20 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h
> > index cffcb0ac7c11..dea252f43c58 100644
> > --- a/drivers/gpu/drm/panfrost/panfrost_device.h
> > +++ b/drivers/gpu/drm/panfrost/panfrost_device.h
> > @@ -153,6 +153,7 @@ struct panfrost_device {
> > };
> >
> > struct panfrost_mmu {
> > + void (*enable)(struct panfrost_device *pfdev, struct panfrost_mmu *mmu);
>
> The enable sequence is the same, it's just the transtab, memattr and
> transcfg values that differ depending on the format, so let's prepare
> them at panfrost_mmu init time, and cache them here.
Just to be clear, I meant replace this ->enable() function pointer by a
struct {
u64 transtab;
u64 memattr;
u64 transcfg;
} cfg;
field.
>
> > struct panfrost_device *pfdev;
> > struct kref refcount;
> > struct io_pgtable_cfg pgtbl_cfg;
next prev parent reply other threads:[~2025-02-27 8:32 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-26 18:30 [RFC PATCH 0/4] drm/panfrost: Support ARM_64_LPAE_S1 page table Ariel D'Alessandro
2025-02-26 18:30 ` [RFC PATCH 1/4] drm/panfrost: Use GPU_MMU_FEATURES_VA_BITS/PA_BITS macros Ariel D'Alessandro
2025-02-27 8:21 ` Boris Brezillon
2025-02-27 14:44 ` Steven Price
2025-02-26 18:30 ` [RFC PATCH 2/4] drm/panfrost: Split LPAE MMU TRANSTAB register values Ariel D'Alessandro
2025-02-27 8:25 ` Boris Brezillon
2025-03-07 14:02 ` Ariel D'Alessandro
2025-02-26 18:30 ` [RFC PATCH 3/4] drm/panfrost: Support ARM_64_LPAE_S1 page table Ariel D'Alessandro
2025-02-27 8:30 ` Boris Brezillon
2025-02-27 8:32 ` Boris Brezillon [this message]
2025-03-07 14:42 ` Ariel D'Alessandro
2025-02-27 14:44 ` Steven Price
2025-03-10 15:46 ` Ariel D'Alessandro
2025-02-27 14:55 ` Boris Brezillon
2025-03-10 15:34 ` Ariel D'Alessandro
2025-03-10 19:25 ` Boris Brezillon
2025-02-26 18:30 ` [RFC PATCH 4/4] drm/panfrost: Set HW_FEATURE_AARCH64_MMU feature flag on Bifrost models Ariel D'Alessandro
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