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From: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	robh@kernel.org, steven.price@arm.com,
	maarten.lankhorst@linux.intel.com, mripard@kernel.org,
	tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch
Subject: Re: [RFC PATCH 3/4] drm/panfrost: Support ARM_64_LPAE_S1 page table
Date: Mon, 10 Mar 2025 12:34:30 -0300	[thread overview]
Message-ID: <ec151d39-2cb2-4f67-a23a-dafc421fff75@collabora.com> (raw)
In-Reply-To: <20250227155539.59944e18@collabora.com>

Hi Boris,

On 2/27/25 11:55 AM, Boris Brezillon wrote:
> On Wed, 26 Feb 2025 15:30:42 -0300
> Ariel D'Alessandro <ariel.dalessandro@collabora.com> wrote:
> 
>> @@ -642,8 +713,15 @@ struct panfrost_mmu *panfrost_mmu_ctx_create(struct panfrost_device *pfdev)
>>   		.iommu_dev	= pfdev->dev,
>>   	};
>>   
>> -	mmu->pgtbl_ops = alloc_io_pgtable_ops(ARM_MALI_LPAE, &mmu->pgtbl_cfg,
>> -					      mmu);
>> +	if (panfrost_has_hw_feature(pfdev, HW_FEATURE_AARCH64_MMU)) {
>> +		fmt = ARM_64_LPAE_S1;
>> +		mmu->enable = mmu_lpae_s1_enable;
>> +	} else {
>> +		fmt = ARM_MALI_LPAE;
>> +		mmu->enable = mmu_mali_lpae_enable;
>> +	}
> 
> How about we stick to the legacy pgtable format for all currently
> supported GPUs, and make this an opt-in property attached to the
> compatible. This way, we can progressively move away from the legacy
> format once enough testing has been done, while allowing support for
> GPUs that can't use the old format because the cachability/shareability
> configuration is too limited.

Indeed, that's a better way to go.

Specifically, what you mean is: keep the same compatible string and add 
a new property to the `panfrost_compatible` private data for that 
specific variant? E.g.

In drivers/gpu/drm/panfrost/panfrost_drv.c:
```
struct panfrost_compatible mediatek_mt8188_data
[...]
{ .compatible = "mediatek,mt8188-mali", .data = &mediatek_mt8188_data },
```

Thanks,

-- 
Ariel D'Alessandro
Software Engineer

Collabora Ltd.
Platinum Building, St John's Innovation Park, Cambridge CB4 0DS, UK 
Registered in England & Wales, no. 5513718


  reply	other threads:[~2025-03-10 15:35 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-26 18:30 [RFC PATCH 0/4] drm/panfrost: Support ARM_64_LPAE_S1 page table Ariel D'Alessandro
2025-02-26 18:30 ` [RFC PATCH 1/4] drm/panfrost: Use GPU_MMU_FEATURES_VA_BITS/PA_BITS macros Ariel D'Alessandro
2025-02-27  8:21   ` Boris Brezillon
2025-02-27 14:44   ` Steven Price
2025-02-26 18:30 ` [RFC PATCH 2/4] drm/panfrost: Split LPAE MMU TRANSTAB register values Ariel D'Alessandro
2025-02-27  8:25   ` Boris Brezillon
2025-03-07 14:02     ` Ariel D'Alessandro
2025-02-26 18:30 ` [RFC PATCH 3/4] drm/panfrost: Support ARM_64_LPAE_S1 page table Ariel D'Alessandro
2025-02-27  8:30   ` Boris Brezillon
2025-02-27  8:32     ` Boris Brezillon
2025-03-07 14:42     ` Ariel D'Alessandro
2025-02-27 14:44   ` Steven Price
2025-03-10 15:46     ` Ariel D'Alessandro
2025-02-27 14:55   ` Boris Brezillon
2025-03-10 15:34     ` Ariel D'Alessandro [this message]
2025-03-10 19:25       ` Boris Brezillon
2025-02-26 18:30 ` [RFC PATCH 4/4] drm/panfrost: Set HW_FEATURE_AARCH64_MMU feature flag on Bifrost models Ariel D'Alessandro

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