[PATCH v2 1/2] PCI: plda: Remove unused IRQ handler and simplify IRQ request logic

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* [PATCH v2 1/2] PCI: plda: Remove unused IRQ handler and simplify IRQ request logic
@ 2025-03-16 17:12 Anand Moon
  2025-03-16 17:12 ` [PATCH v2 2/2] PCI: starfive: Simplify event doorbell bitmap initialization in pcie-starfive Anand Moon
                   ` (2 more replies)
  0 siblings, 3 replies; 8+ messages in thread
From: Anand Moon @ 2025-03-16 17:12 UTC (permalink / raw)
  To: Daire McNamara, Lorenzo Pieralisi, Krzysztof Wilczyński,
	Manivannan Sadhasivam, Rob Herring, Bjorn Helgaas, Kevin Xie,
	Minda Chen, Conor Dooley, Mason Huo,
	open list:PCI DRIVER FOR PLDA PCIE IP, open list
  Cc: Anand Moon

The plda_event_handler() function has been removed since it only returned
IRQ_HANDLED without performing any processing. Additionally, the IRQ
request logic in plda_init_interrupts() has been streamlined by removing
the redundant devm_request_irq() call when the request_event_irq()
callback is not defined.

Change ensures that interrupts are requested exclusively through the
request_event_irq() callback when available, enhancing code clarity
and maintainability.

Changes help fix kmemleak reported following debug log.

$ sudo cat /sys/kernel/debug/kmemleak
unreferenced object 0xffffffd6c47c2600 (size 128):
  comm "kworker/u16:2", pid 38, jiffies 4294942263
  hex dump (first 32 bytes):
    cc 7c 5a 8d ff ff ff ff 40 b0 47 c8 d6 ff ff ff  .|Z.....@.G.....
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
  backtrace (crc 4f07ff07):
    __create_object+0x2a/0xfc
    kmemleak_alloc+0x38/0x98
    __kmalloc_cache_noprof+0x296/0x444
    request_threaded_irq+0x168/0x284
    devm_request_threaded_irq+0xa8/0x13c
    plda_init_interrupts+0x46e/0x858
    plda_pcie_host_init+0x356/0x468
    starfive_pcie_probe+0x2f6/0x398
    platform_probe+0x106/0x150
    really_probe+0x30e/0x746
    __driver_probe_device+0x11c/0x2c2
    driver_probe_device+0x5e/0x316
    __device_attach_driver+0x296/0x3a4
    bus_for_each_drv+0x1d0/0x260
    __device_attach+0x1fa/0x2d6
    device_initial_probe+0x14/0x28
unreferenced object 0xffffffd6c47c2900 (size 128):
  comm "kworker/u16:2", pid 38, jiffies 4294942281

Fixes: 4602c370bdf6 ("PCI: microchip: Move IRQ functions to pcie-plda-host.c")
Cc: Minda Chen <minda.chen@starfivetech.com>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
v1: drop the dummy IRQ handler used in previous version
   [0] https://lore.kernel.org/linux-pci/20250224144155.omzrmls7hpjqw6yl@thinkpad/T/
---
 drivers/pci/controller/plda/pcie-plda-host.c | 20 ++++++--------------
 1 file changed, 6 insertions(+), 14 deletions(-)

diff --git a/drivers/pci/controller/plda/pcie-plda-host.c b/drivers/pci/controller/plda/pcie-plda-host.c
index 4153214ca4103..f7edfa97723f8 100644
--- a/drivers/pci/controller/plda/pcie-plda-host.c
+++ b/drivers/pci/controller/plda/pcie-plda-host.c
@@ -280,11 +280,6 @@ static u32 plda_get_events(struct plda_pcie_rp *port)
 	return events;
 }
 
-static irqreturn_t plda_event_handler(int irq, void *dev_id)
-{
-	return IRQ_HANDLED;
-}
-
 static void plda_handle_event(struct irq_desc *desc)
 {
 	struct plda_pcie_rp *port = irq_desc_get_handler_data(desc);
@@ -452,16 +447,13 @@ int plda_init_interrupts(struct platform_device *pdev,
 			return -ENXIO;
 		}
 
-		if (event->request_event_irq)
+		if (event->request_event_irq) {
 			ret = event->request_event_irq(port, event_irq, i);
-		else
-			ret = devm_request_irq(dev, event_irq,
-					       plda_event_handler,
-					       0, NULL, port);
-
-		if (ret) {
-			dev_err(dev, "failed to request IRQ %d\n", event_irq);
-			return ret;
+			if (ret) {
+				dev_err(dev, "failed to request IRQ %d\n",
+					event_irq);
+				return ret;
+			}
 		}
 	}
 

base-commit: cb82ca153949c6204af793de24b18a04236e79fd
-- 
2.48.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH v2 2/2] PCI: starfive: Simplify event doorbell bitmap initialization in pcie-starfive
  2025-03-16 17:12 [PATCH v2 1/2] PCI: plda: Remove unused IRQ handler and simplify IRQ request logic Anand Moon
@ 2025-03-16 17:12 ` Anand Moon
  2025-03-17  2:23   ` Minda Chen
  2025-04-19 10:32   ` Manivannan Sadhasivam
  2025-04-02  7:40 ` [PATCH v2 1/2] PCI: plda: Remove unused IRQ handler and simplify IRQ request logic Anand Moon
  2025-04-19 10:25 ` Manivannan Sadhasivam
  2 siblings, 2 replies; 8+ messages in thread
From: Anand Moon @ 2025-03-16 17:12 UTC (permalink / raw)
  To: Daire McNamara, Lorenzo Pieralisi, Krzysztof Wilczyński,
	Manivannan Sadhasivam, Rob Herring, Bjorn Helgaas, Kevin Xie,
	Conor Dooley, Minda Chen, Mason Huo,
	open list:PCI DRIVER FOR PLDA PCIE IP, open list
  Cc: Anand Moon

The events_bitmap initialization in starfive_pcie_probe() previously
masked out the PLDA_AXI_DOORBELL and PLDA_PCIE_DOORBELL events.

These masking has been removed, allowing these events to be included
in the bitmap. With this change ensures that all interrupt events are
properly accounted for and may be necessary for handling doorbell
events in certain use cases.

PCIe Doorbell Events: These are typically used to notify a device about
an event or to trigger an action. For example, a host system can write
to a doorbell register on a PCIe device to signal that new data is
available or that an operation should start12.

AXI-PCIe Bridge: This bridge acts as a protocol converter between AXI
(Advanced eXtensible Interface) and PCIe (Peripheral Component Interconnect
Express) domains. It allows transactions to be converted and communicated
between these two different protocols3.

Fixes: 39b91eb40c6a ("PCI: starfive: Add JH7110 PCIe controller")
Cc: Minda Chen <minda.chen@starfivetech.com>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
v2: new patch
---
 drivers/pci/controller/plda/pcie-starfive.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/pci/controller/plda/pcie-starfive.c b/drivers/pci/controller/plda/pcie-starfive.c
index e73c1b7bc8efc..d2c2a8e039e10 100644
--- a/drivers/pci/controller/plda/pcie-starfive.c
+++ b/drivers/pci/controller/plda/pcie-starfive.c
@@ -410,9 +410,7 @@ static int starfive_pcie_probe(struct platform_device *pdev)
 	plda->host_ops = &sf_host_ops;
 	plda->num_events = PLDA_MAX_EVENT_NUM;
 	/* mask doorbell event */
-	plda->events_bitmap = GENMASK(PLDA_INT_EVENT_NUM - 1, 0)
-			     & ~BIT(PLDA_AXI_DOORBELL)
-			     & ~BIT(PLDA_PCIE_DOORBELL);
+	plda->events_bitmap = GENMASK(PLDA_INT_EVENT_NUM - 1, 0);
 	plda->events_bitmap <<= PLDA_NUM_DMA_EVENTS;
 	ret = plda_pcie_host_init(&pcie->plda, &starfive_pcie_ops,
 				  &stf_pcie_event);
-- 
2.48.1

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH v2 2/2] PCI: starfive: Simplify event doorbell bitmap initialization in pcie-starfive
  2025-03-16 17:12 ` [PATCH v2 2/2] PCI: starfive: Simplify event doorbell bitmap initialization in pcie-starfive Anand Moon
@ 2025-03-17  2:23   ` Minda Chen
  2025-03-17  3:26     ` Anand Moon
  2025-04-19 10:32   ` Manivannan Sadhasivam
  1 sibling, 1 reply; 8+ messages in thread
From: Minda Chen @ 2025-03-17  2:23 UTC (permalink / raw)
  To: Anand Moon, Daire McNamara, Lorenzo Pieralisi,
	Krzysztof Wilczyński, Manivannan Sadhasivam, Rob Herring,
	Bjorn Helgaas, Kevin Xie, Conor Dooley, Mason Huo,
	open list:PCI DRIVER FOR PLDA PCIE IP, open list



> 
> The events_bitmap initialization in starfive_pcie_probe() previously masked out
> the PLDA_AXI_DOORBELL and PLDA_PCIE_DOORBELL events.
> 
> These masking has been removed, allowing these events to be included in the
> bitmap. With this change ensures that all interrupt events are properly
> accounted for and may be necessary for handling doorbell events in certain use
> cases.
> 
> PCIe Doorbell Events: These are typically used to notify a device about an event
> or to trigger an action. For example, a host system can write to a doorbell
> register on a PCIe device to signal that new data is available or that an
> operation should start12.
> 
> AXI-PCIe Bridge: This bridge acts as a protocol converter between AXI
> (Advanced eXtensible Interface) and PCIe (Peripheral Component Interconnect
> Express) domains. It allows transactions to be converted and communicated
> between these two different protocols3.
> 
> Fixes: 39b91eb40c6a ("PCI: starfive: Add JH7110 PCIe controller")
> Cc: Minda Chen <minda.chen@starfivetech.com>
> Signed-off-by: Anand Moon <linux.amoon@gmail.com>
> ---
> v2: new patch
> ---
>  drivers/pci/controller/plda/pcie-starfive.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/drivers/pci/controller/plda/pcie-starfive.c
> b/drivers/pci/controller/plda/pcie-starfive.c
> index e73c1b7bc8efc..d2c2a8e039e10 100644
> --- a/drivers/pci/controller/plda/pcie-starfive.c
> +++ b/drivers/pci/controller/plda/pcie-starfive.c
> @@ -410,9 +410,7 @@ static int starfive_pcie_probe(struct platform_device
> *pdev)
>  	plda->host_ops = &sf_host_ops;
>  	plda->num_events = PLDA_MAX_EVENT_NUM;
>  	/* mask doorbell event */
> -	plda->events_bitmap = GENMASK(PLDA_INT_EVENT_NUM - 1, 0)
> -			     & ~BIT(PLDA_AXI_DOORBELL)
> -			     & ~BIT(PLDA_PCIE_DOORBELL);
> +	plda->events_bitmap = GENMASK(PLDA_INT_EVENT_NUM - 1, 0);
>  	plda->events_bitmap <<= PLDA_NUM_DMA_EVENTS;
>  	ret = plda_pcie_host_init(&pcie->plda, &starfive_pcie_ops,
>  				  &stf_pcie_event);
> --
> 2.48.1

Hi Anand
   Mask the door bell interrupt is required. In some case, ( eg :NVMe read/write mass data) found error.

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2 2/2] PCI: starfive: Simplify event doorbell bitmap initialization in pcie-starfive
  2025-03-17  2:23   ` Minda Chen
@ 2025-03-17  3:26     ` Anand Moon
       [not found]       ` <SJ1PR11MB6249AC13C9F44545FF18A31C96DE2@SJ1PR11MB6249.namprd11.prod.outlook.com>
  0 siblings, 1 reply; 8+ messages in thread
From: Anand Moon @ 2025-03-17  3:26 UTC (permalink / raw)
  To: Minda Chen
  Cc: Daire McNamara, Lorenzo Pieralisi, Krzysztof Wilczyński,
	Manivannan Sadhasivam, Rob Herring, Bjorn Helgaas, Kevin Xie,
	Conor Dooley, Mason Huo, open list:PCI DRIVER FOR PLDA PCIE IP,
	open list

Hi Minda

On Mon, 17 Mar 2025 at 07:53, Minda Chen <minda.chen@starfivetech.com> wrote:
>
>
>
> >
> > The events_bitmap initialization in starfive_pcie_probe() previously masked out
> > the PLDA_AXI_DOORBELL and PLDA_PCIE_DOORBELL events.
> >
> > These masking has been removed, allowing these events to be included in the
> > bitmap. With this change ensures that all interrupt events are properly
> > accounted for and may be necessary for handling doorbell events in certain use
> > cases.
> >
> > PCIe Doorbell Events: These are typically used to notify a device about an event
> > or to trigger an action. For example, a host system can write to a doorbell
> > register on a PCIe device to signal that new data is available or that an
> > operation should start12.
> >
> > AXI-PCIe Bridge: This bridge acts as a protocol converter between AXI
> > (Advanced eXtensible Interface) and PCIe (Peripheral Component Interconnect
> > Express) domains. It allows transactions to be converted and communicated
> > between these two different protocols3.
> >
> > Fixes: 39b91eb40c6a ("PCI: starfive: Add JH7110 PCIe controller")
> > Cc: Minda Chen <minda.chen@starfivetech.com>
> > Signed-off-by: Anand Moon <linux.amoon@gmail.com>
> > ---
> > v2: new patch
> > ---
> >  drivers/pci/controller/plda/pcie-starfive.c | 4 +---
> >  1 file changed, 1 insertion(+), 3 deletions(-)
> >
> > diff --git a/drivers/pci/controller/plda/pcie-starfive.c
> > b/drivers/pci/controller/plda/pcie-starfive.c
> > index e73c1b7bc8efc..d2c2a8e039e10 100644
> > --- a/drivers/pci/controller/plda/pcie-starfive.c
> > +++ b/drivers/pci/controller/plda/pcie-starfive.c
> > @@ -410,9 +410,7 @@ static int starfive_pcie_probe(struct platform_device
> > *pdev)
> >       plda->host_ops = &sf_host_ops;
> >       plda->num_events = PLDA_MAX_EVENT_NUM;
> >       /* mask doorbell event */
> > -     plda->events_bitmap = GENMASK(PLDA_INT_EVENT_NUM - 1, 0)
> > -                          & ~BIT(PLDA_AXI_DOORBELL)
> > -                          & ~BIT(PLDA_PCIE_DOORBELL);
> > +     plda->events_bitmap = GENMASK(PLDA_INT_EVENT_NUM - 1, 0);
> >       plda->events_bitmap <<= PLDA_NUM_DMA_EVENTS;
> >       ret = plda_pcie_host_init(&pcie->plda, &starfive_pcie_ops,
> >                                 &stf_pcie_event);
> > --
> > 2.48.1
>
> Hi Anand
>    Mask the door bell interrupt is required. In some case, ( eg :NVMe read/write mass data) found error.

Thank you for your review comments.

I have tested using the Starfive Vision Five 2 board with a Samsung NVMe drive
and did not encounter any data read/write errors.
However, we can consider dropping this patch if there are issues with
other development boards.
I am also available to test with different NVMe modules if needed.

Thanks
-Anand

^ permalink raw reply	[flat|nested] 8+ messages in thread

[parent not found: <SJ1PR11MB6249AC13C9F44545FF18A31C96DE2@SJ1PR11MB6249.namprd11.prod.outlook.com>]

* Re: [PATCH v2 2/2] PCI: starfive: Simplify event doorbell bitmap initialization in pcie-starfive
       [not found]       ` <SJ1PR11MB6249AC13C9F44545FF18A31C96DE2@SJ1PR11MB6249.namprd11.prod.outlook.com>
@ 2025-03-18 15:46         ` Anand Moon
  0 siblings, 0 replies; 8+ messages in thread
From: Anand Moon @ 2025-03-18 15:46 UTC (permalink / raw)
  To: Daire.McNamara
  Cc: minda.chen, lpieralisi, kw, manivannan.sadhasivam, robh, bhelgaas,
	kevin.xie, Conor.Dooley, mason.huo, linux-pci, linux-kernel

Hi Daier,

On Tue, 18 Mar 2025 at 16:28, <Daire.McNamara@microchip.com> wrote:
>
> Hi Anand,
>
>
>
> Just a general point.  It might be wise to count the number of doorbell interrupts you see being generated if you apply this patch.  On the Polarfire variant of this driver, they appeared excessive to me
>
I understand the StarFive PCIe supports a PCI bridge: PLDA XpressRich-AXI,
which is integrated with USB and PCIe NVMe drivers, as mentioned in the
StarFive JH-7110 Datasheet.

[1] https://doc-en.rvspace.org/JH7110/PDF/JH7110_Datasheet.pdf

I am looking for the document for register maps for Starfive PCIe but
could not find it.

Since the PLDA  PCIe driver is generic to the PolarFire variant and
StarFive PCIe architecture,
I chose to maskout the AXI and PCIe doorbell.

I have checked before and after the doorbell interrupts, with no major
difference.

$ cat /proc/interrupts
           CPU0       CPU1       CPU2       CPU3
 10:     751464     533527     506565     458964 RISC-V INTC   5 Edge
    riscv-timer
 12:          3          0          0          0 SiFive PLIC 111 Edge
    17030000.power-controller
 13:         77          0          0          0 SiFive PLIC  30 Edge
    1600c000.rng
 14:          0          0          0          0 SiFive PLIC   1 Edge
    ccache_ecc
 15:          0          0          0          0 SiFive PLIC   3 Edge
    ccache_ecc
 16:          0          0          0          0 SiFive PLIC   4 Edge
    ccache_ecc
 17:          0          0          0          0 SiFive PLIC   2 Edge
    ccache_ecc
 20:          0          0          0          0 SiFive PLIC  73 Edge
    dw_axi_dmac_platform
 21:       1973          0          0          0 SiFive PLIC  32 Edge      ttyS0
 22:          0          0          0          0 SiFive PLIC  35 Edge
    10030000.i2c
 23:          0          0          0          0 SiFive PLIC  75 Edge
    dw-mci
 24:          0          0          0          0 SiFive PLIC  37 Edge
    10050000.i2c
 25:        949          0          0          0 SiFive PLIC  50 Edge
    12050000.i2c
 26:          0          0          0          0 SiFive PLIC  51 Edge
    12060000.i2c
 27:      22491          0          0          0 SiFive PLIC  74 Edge
    dw-mci
 28:          6          0          0          0 SiFive PLIC  25 Edge
    13010000.spi
 29:          0          0          0          0 SiFive PLIC  38 Edge      pl022
 41:          0          0          0          0 17020000.pinctrl  41
Edge      16020000.mmc cd
 46:          0          0          0          0 PLDA PCIe MSI   0
Edge      PCIe PME, PCIe bwctrl
 62:          0          0          0          0 PLDA PCIe MSI
134217728 Edge      PCIe PME, PCIe bwctrl
 63:       1431          0          0          0 SiFive PLIC   7 Edge      end0
 64:          0          0          0          0 SiFive PLIC   6 Edge      end0
 65:          0          0          0          0 SiFive PLIC   5 Edge      end0
 66:         13          0          0          0 PLDA PCIe MSI
134742016 Edge      nvme0q0
 67:          0          0          0          0 SiFive PLIC  78 Edge      end1
 68:          0          0          0          0 SiFive PLIC  77 Edge      end1
 69:          0          0          0          0 SiFive PLIC  76 Edge      end1
-----8<----------8<----------
 70:       7420          0          0          0 PLDA PCIe MSI
134742017 Edge      nvme0q1
 71:      15898          0          0          0 PLDA PCIe MSI
134742018 Edge      nvme0q2
 72:      16890          0          0          0 PLDA PCIe MSI
134742019 Edge      nvme0q3
 73:      44615          0          0          0 PLDA PCIe MSI
134742020 Edge      nvme0q4
-----8<----------8<----------
 75:          0          0          0          0 SiFive PLIC 108 Edge
    10100000.usb
 76:          0          0          0          0 SiFive PLIC 110 Edge
    10100000.usb
 77:      32525          0          0          0 PLDA PCIe MSI 524288
Edge      xhci_hcd
IPI0:      1834       5317       5230       3479  Rescheduling interrupts
IPI1:    175653     135005     114705     111404  Function call interrupts
IPI2:         0          0          0          0  CPU stop interrupts
IPI3:         0          0          0          0  CPU stop (for crash
dump) interrupts
IPI4:      9845       6986       6327       5227  IRQ work interrupts
IPI5:         0          0          0          0  Timer broadcast interrupts
IPI6:         0          0          0          0  CPU backtrace interrupts
IPI7:         0          0          0          0  KGDB roundup interrupts

 $ sudo lspci  -vv
0000:00:00.0 PCI bridge: PLDA XpressRich-AXI Ref Design (rev 02)
(prog-if 00 [Normal decode])
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop-
ParErr- Stepping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0, Cache Line Size: 32 bytes
        Interrupt: pin A routed to IRQ 46
        Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
        Memory behind bridge: 30000000-300fffff [size=1M] [32-bit]
        Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- <SERR- <PERR-
        BridgeCtl: Parity- SERR+ NoISA- VGA- VGA16- MAbort- >Reset- FastB2B-
                PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
        Capabilities: [80] Express (v2) Root Port (Slot+), IntMsgNum 0
                DevCap: MaxPayload 128 bytes, PhantFunc 0
                        ExtTag+ RBE+ TEE-IO-
                DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
                        RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
                        MaxPayload 128 bytes, MaxReadReq 512 bytes
                DevSta: CorrErr+ NonFatalErr- FatalErr- UnsupReq-
AuxPwr- TransPend-
                LnkCap: Port #1, Speed 5GT/s, Width x1, ASPM L0s L1,
Exit Latency L0s <64ns, L1 <1us
                        ClockPM- Surprise- LLActRep- BwNot+ ASPMOptComp+
                LnkCtl: ASPM Disabled; RCB 64 bytes, LnkDisable- CommClk-
                        ExtSynch- ClockPM- AutWidDis- BWInt+ AutBWInt+
                LnkSta: Speed 5GT/s, Width x1
                        TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
                SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd-
HotPlug- Surprise-
                        Slot #0, PowerLimit 0W; Interlock- NoCompl-
                SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet-
CmdCplt- HPIrq- LinkChg-
                        Control: AttnInd Unknown, PwrInd Unknown,
Power- Interlock-
                SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt-
PresDet- Interlock-
                        Changed: MRL- PresDet- LinkState-
                RootCap: CRSVisible-
                RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal-
PMEIntEna+ CRSVisible-
                RootSta: PME ReqID 0000, PMEStatus- PMEPending-
                DevCap2: Completion Timeout: Range ABCD, TimeoutDis+
NROPrPrP- LTR+
                         10BitTagComp- 10BitTagReq- OBFF Not
Supported, ExtFmt+ EETLPPrefix-
                         EmergencyPowerReduction Not Supported,
EmergencyPowerReductionInit-
                         FRS- LN System CLS Not Supported, TPHComp-
ExtTPHComp- ARIFwd-
                         AtomicOpsCap: Routing- 32bit- 64bit- 128bitCAS-
                DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-
                         AtomicOpsCtl: ReqEn- EgressBlck-
                         IDOReq- IDOCompl- LTR+ EmergencyPowerReductionReq-
                         10BitTagReq- OBFF Disabled, EETLPPrefixBlk-
                LnkCap2: Supported Link Speeds: 2.5-5GT/s, Crosslink-
Retimer- 2Retimers- DRS-
                LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
                         Transmit Margin: Normal Operating Range,
EnterModifiedCompliance- ComplianceSOS-
                         Compliance Preset/De-emphasis: -6dB
de-emphasis, 0dB preshoot
                LnkSta2: Current De-emphasis Level: -3.5dB,
EqualizationComplete- EqualizationPhase1-
                         EqualizationPhase2- EqualizationPhase3-
LinkEqualizationRequest-
                         Retimer- 2Retimers- CrosslinkRes: unsupported
        Capabilities: [e0] MSI: Enable+ Count=1/32 Maskable+ 64bit+
                Address: 0000000000000190  Data: 0000
                Masking: fffffffe  Pending: 00000000
        Capabilities: [f8] Power Management version 3
                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA
PME(D0+,D1+,D2+,D3hot+,D3cold+)
                Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [100 v1] Vendor Specific Information: ID=1556
Rev=1 Len=008 <?>
        Capabilities: [200 v2] Advanced Error Reporting
                UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt-
UnxCmplt- RxOF- MalfTLP-
                        ECRC- UnsupReq- ACSViol- UncorrIntErr-
BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck-
MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
                UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt-
UnxCmplt- RxOF- MalfTLP-
                        ECRC- UnsupReq- ACSViol- UncorrIntErr+
BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck-
MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
                UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt-
UnxCmplt- RxOF+ MalfTLP+
                        ECRC- UnsupReq- ACSViol- UncorrIntErr+
BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck-
MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
                CESta:  RxErr+ BadTLP+ BadDLLP- Rollover- Timeout-
AdvNonFatalErr- CorrIntErr- HeaderOF-
                CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout-
AdvNonFatalErr+ CorrIntErr+ HeaderOF-
                AERCap: First Error Pointer: 00, ECRCGenCap-
ECRCGenEn- ECRCChkCap+ ECRCChkEn-
                        MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
                HeaderLog: 00000000 00000000 00000000 00000000
                RootCmd: CERptEn- NFERptEn- FERptEn-
                RootSta: CERcvd- MultCERcvd- UERcvd- MultUERcvd-
                         FirstFatal- NonFatalMsg- FatalMsg- IntMsgNum 0
                ErrorSrc: ERR_COR: 0000 ERR_FATAL/NONFATAL: 0000
        Kernel driver in use: pcieport

0000:01:00.0 USB controller: VIA Technologies, Inc. VL805/806 xHCI USB
3.0 Controller (rev 01) (prog-if 30 [XHCI])
        Subsystem: VIA Technologies, Inc. VL805/806 xHCI USB 3.0 Controller
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop-
ParErr- Stepping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0, Cache Line Size: 64 bytes
        Interrupt: pin A routed to IRQ 77
        Region 0: Memory at 30000000 (64-bit, non-prefetchable) [size=4K]
        Capabilities: [80] Power Management version 3
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA
PME(D0+,D1-,D2-,D3hot-,D3cold+)
                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [90] MSI: Enable+ Count=1/4 Maskable- 64bit+
                Address: 0000000000000190  Data: 0001
        Capabilities: [c4] Express (v2) Endpoint, IntMsgNum 0
                DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s
<64ns, L1 <1us
                        ExtTag- AttnBtn- AttnInd- PwrInd- RBE+
FLReset- SlotPowerLimit 0W TEE-IO-
                DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
                        RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
                        MaxPayload 128 bytes, MaxReadReq 512 bytes
                DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq-
AuxPwr+ TransPend-
                LnkCap: Port #0, Speed 5GT/s, Width x1, ASPM not supported
                        ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp-
                LnkCtl: ASPM Disabled; RCB 64 bytes, LnkDisable- CommClk-
                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed 5GT/s, Width x1
                        TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
                DevCap2: Completion Timeout: Range B, TimeoutDis+ NROPrPrP- LTR-
                         10BitTagComp- 10BitTagReq- OBFF Not
Supported, ExtFmt- EETLPPrefix-
                         EmergencyPowerReduction Not Supported,
EmergencyPowerReductionInit-
                         FRS- TPHComp- ExtTPHComp-
                         AtomicOpsCap: 32bit- 64bit- 128bitCAS-
                DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
                         AtomicOpsCtl: ReqEn-
                         IDOReq- IDOCompl- LTR- EmergencyPowerReductionReq-
                         10BitTagReq- OBFF Disabled, EETLPPrefixBlk-
                LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis+
                         Transmit Margin: Normal Operating Range,
EnterModifiedCompliance- ComplianceSOS-
                         Compliance Preset/De-emphasis: -6dB
de-emphasis, 0dB preshoot
                LnkSta2: Current De-emphasis Level: -3.5dB,
EqualizationComplete- EqualizationPhase1-
                         EqualizationPhase2- EqualizationPhase3-
LinkEqualizationRequest-
                         Retimer- 2Retimers- CrosslinkRes: unsupported
        Capabilities: [100 v1] Advanced Error Reporting
                UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt-
UnxCmplt- RxOF- MalfTLP-
                        ECRC- UnsupReq- ACSViol- UncorrIntErr-
BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck-
MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
                UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt-
UnxCmplt- RxOF- MalfTLP-
                        ECRC- UnsupReq- ACSViol- UncorrIntErr-
BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck-
MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
                UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt-
UnxCmplt- RxOF+ MalfTLP+
                        ECRC- UnsupReq- ACSViol- UncorrIntErr-
BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck-
MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
                CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout-
AdvNonFatalErr- CorrIntErr- HeaderOF-
                CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout-
AdvNonFatalErr+ CorrIntErr- HeaderOF-
                AERCap: First Error Pointer: 00, ECRCGenCap-
ECRCGenEn- ECRCChkCap- ECRCChkEn-
                        MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
                HeaderLog: 00000000 00000000 00000000 00000000
        Kernel driver in use: xhci_hcd
        Kernel modules: xhci_pci

0001:00:00.0 PCI bridge: PLDA XpressRich-AXI Ref Design (rev 02)
(prog-if 00 [Normal decode])
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop-
ParErr- Stepping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0, Cache Line Size: 32 bytes
        Interrupt: pin A routed to IRQ 62
        Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
        Memory behind bridge: 38000000-380fffff [size=1M] [32-bit]
        Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- <SERR- <PERR-
        BridgeCtl: Parity- SERR+ NoISA- VGA- VGA16- MAbort- >Reset- FastB2B-
                PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
        Capabilities: [80] Express (v2) Root Port (Slot+), IntMsgNum 0
                DevCap: MaxPayload 128 bytes, PhantFunc 0
                        ExtTag+ RBE+ TEE-IO-
                DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
                        RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
                        MaxPayload 128 bytes, MaxReadReq 512 bytes
                DevSta: CorrErr+ NonFatalErr- FatalErr- UnsupReq-
AuxPwr- TransPend-
                LnkCap: Port #1, Speed 5GT/s, Width x1, ASPM L0s L1,
Exit Latency L0s <64ns, L1 <1us
                        ClockPM- Surprise- LLActRep- BwNot+ ASPMOptComp+
                LnkCtl: ASPM Disabled; RCB 64 bytes, LnkDisable- CommClk-
                        ExtSynch- ClockPM- AutWidDis- BWInt+ AutBWInt+
                LnkSta: Speed 5GT/s, Width x1
                        TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
                SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd-
HotPlug- Surprise-
                        Slot #0, PowerLimit 0W; Interlock- NoCompl-
                SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet-
CmdCplt- HPIrq- LinkChg-
                        Control: AttnInd Unknown, PwrInd Unknown,
Power- Interlock-
                SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt-
PresDet- Interlock-
                        Changed: MRL- PresDet- LinkState-
                RootCap: CRSVisible-
                RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal-
PMEIntEna+ CRSVisible-
                RootSta: PME ReqID 0000, PMEStatus- PMEPending-
                DevCap2: Completion Timeout: Range ABCD, TimeoutDis+
NROPrPrP- LTR+
                         10BitTagComp- 10BitTagReq- OBFF Not
Supported, ExtFmt+ EETLPPrefix-
                         EmergencyPowerReduction Not Supported,
EmergencyPowerReductionInit-
                         FRS- LN System CLS Not Supported, TPHComp-
ExtTPHComp- ARIFwd-
                         AtomicOpsCap: Routing- 32bit- 64bit- 128bitCAS-
                DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-
                         AtomicOpsCtl: ReqEn- EgressBlck-
                         IDOReq- IDOCompl- LTR+ EmergencyPowerReductionReq-
                         10BitTagReq- OBFF Disabled, EETLPPrefixBlk-
                LnkCap2: Supported Link Speeds: 2.5-5GT/s, Crosslink-
Retimer- 2Retimers- DRS-
                LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
                         Transmit Margin: Normal Operating Range,
EnterModifiedCompliance- ComplianceSOS-
                         Compliance Preset/De-emphasis: -6dB
de-emphasis, 0dB preshoot
                LnkSta2: Current De-emphasis Level: -3.5dB,
EqualizationComplete- EqualizationPhase1-
                         EqualizationPhase2- EqualizationPhase3-
LinkEqualizationRequest-
                         Retimer- 2Retimers- CrosslinkRes: unsupported
        Capabilities: [e0] MSI: Enable+ Count=1/32 Maskable+ 64bit+
                Address: 0000000000000190  Data: 0000
                Masking: fffffffe  Pending: 00000000
        Capabilities: [f8] Power Management version 3
                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA
PME(D0+,D1+,D2+,D3hot+,D3cold+)
                Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [100 v1] Vendor Specific Information: ID=1556
Rev=1 Len=008 <?>
        Capabilities: [200 v2] Advanced Error Reporting
                UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt-
UnxCmplt- RxOF- MalfTLP-
                        ECRC- UnsupReq- ACSViol- UncorrIntErr-
BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck-
MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
                UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt-
UnxCmplt- RxOF- MalfTLP-
                        ECRC- UnsupReq- ACSViol- UncorrIntErr+
BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck-
MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
                UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt-
UnxCmplt- RxOF+ MalfTLP+
                        ECRC- UnsupReq- ACSViol- UncorrIntErr+
BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck-
MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
                CESta:  RxErr+ BadTLP- BadDLLP- Rollover- Timeout-
AdvNonFatalErr- CorrIntErr- HeaderOF-
                CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout-
AdvNonFatalErr+ CorrIntErr+ HeaderOF-
                AERCap: First Error Pointer: 00, ECRCGenCap-
ECRCGenEn- ECRCChkCap+ ECRCChkEn-
                        MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
                HeaderLog: 00000000 00000000 00000000 00000000
                RootCmd: CERptEn- NFERptEn- FERptEn-
                RootSta: CERcvd- MultCERcvd- UERcvd- MultUERcvd-
                         FirstFatal- NonFatalMsg- FatalMsg- IntMsgNum 0
                ErrorSrc: ERR_COR: 0000 ERR_FATAL/NONFATAL: 0000
        Kernel driver in use: pcieport

0001:01:00.0 Non-Volatile memory controller: Micron/Crucial Technology
P2 [Nick P2] / P3 / P3 Plus NVMe PCIe SSD (DRAM-less) (rev 01)
(prog-if 02 [NVM Express])
        Subsystem: Micron/Crucial Technology P2 [Nick P2] / P3 / P3
Plus NVMe PCIe SSD (DRAM-less)
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop-
ParErr- Stepping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin A routed to IRQ 61
        Region 0: Memory at 38000000 (64-bit, non-prefetchable) [size=16K]
        Capabilities: [80] Express (v2) Endpoint, IntMsgNum 0
                DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s
unlimited, L1 unlimited
                        ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+
FLReset+ SlotPowerLimit 0W TEE-IO-
                DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
                        RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ FLReset-
                        MaxPayload 128 bytes, MaxReadReq 512 bytes
                DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq-
AuxPwr- TransPend-
                LnkCap: Port #1, Speed 8GT/s, Width x4, ASPM L1, Exit
Latency L1 unlimited
                        ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
                LnkCtl: ASPM Disabled; RCB 64 bytes, LnkDisable- CommClk-
                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed 5GT/s (downgraded), Width x1 (downgraded)
                        TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
                DevCap2: Completion Timeout: Range ABCD, TimeoutDis+
NROPrPrP- LTR+
                         10BitTagComp- 10BitTagReq- OBFF Not
Supported, ExtFmt+ EETLPPrefix-
                         EmergencyPowerReduction Not Supported,
EmergencyPowerReductionInit-
                         FRS- TPHComp- ExtTPHComp-
                         AtomicOpsCap: 32bit- 64bit- 128bitCAS-
                DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
                         AtomicOpsCtl: ReqEn-
                         IDOReq- IDOCompl- LTR+ EmergencyPowerReductionReq-
                         10BitTagReq- OBFF Disabled, EETLPPrefixBlk-
                LnkCap2: Supported Link Speeds: 2.5-8GT/s, Crosslink-
Retimer- 2Retimers- DRS-
                LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-
                         Transmit Margin: Normal Operating Range,
EnterModifiedCompliance- ComplianceSOS-
                         Compliance Preset/De-emphasis: -6dB
de-emphasis, 0dB preshoot
                LnkSta2: Current De-emphasis Level: -3.5dB,
EqualizationComplete- EqualizationPhase1-
                         EqualizationPhase2- EqualizationPhase3-
LinkEqualizationRequest-
                         Retimer- 2Retimers- CrosslinkRes: Upstream Port
        Capabilities: [d0] MSI-X: Enable+ Count=9 Masked-
                Vector table: BAR=0 offset=00002000
                PBA: BAR=0 offset=00003000
        Capabilities: [e0] MSI: Enable- Count=1/8 Maskable+ 64bit+
                Address: 0000000000000000  Data: 0000
                Masking: 00000000  Pending: 00000000
        Capabilities: [f8] Power Management version 3
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA
PME(D0-,D1-,D2-,D3hot-,D3cold-)
                Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [100 v1] Latency Tolerance Reporting
                Max snoop latency: 0ns
                Max no snoop latency: 0ns
        Capabilities: [110 v1] L1 PM Substates
                L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+
ASPM_L1.1+ L1_PM_Substates+
                          PortCommonModeRestoreTime=10us PortTPowerOnTime=220us
                L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-
                           T_CommonMode=0us LTR1.2_Threshold=0ns
                L1SubCtl2: T_PwrOn=10us
        Capabilities: [200 v2] Advanced Error Reporting
                UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt-
UnxCmplt- RxOF- MalfTLP-
                        ECRC- UnsupReq- ACSViol- UncorrIntErr-
BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck-
MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
                UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt-
UnxCmplt- RxOF- MalfTLP-
                        ECRC- UnsupReq- ACSViol- UncorrIntErr+
BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck-
MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
                UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt-
UnxCmplt- RxOF- MalfTLP+
                        ECRC- UnsupReq- ACSViol- UncorrIntErr+
BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck-
MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
                CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout-
AdvNonFatalErr- CorrIntErr- HeaderOF-
                CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout-
AdvNonFatalErr+ CorrIntErr+ HeaderOF-
                AERCap: First Error Pointer: 00, ECRCGenCap-
ECRCGenEn- ECRCChkCap+ ECRCChkEn-
                        MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
                HeaderLog: 00000000 00000000 00000000 00000000
        Capabilities: [300 v1] Secondary PCI Express
                LnkCtl3: LnkEquIntrruptEn- PerformEqu-
                LaneErrStat: 0
        Kernel driver in use: nvme
        Kernel modules: nvme

> BR
>
> Daire
>
Thanks
-Anand

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2 2/2] PCI: starfive: Simplify event doorbell bitmap initialization in pcie-starfive
  2025-03-16 17:12 ` [PATCH v2 2/2] PCI: starfive: Simplify event doorbell bitmap initialization in pcie-starfive Anand Moon
  2025-03-17  2:23   ` Minda Chen
@ 2025-04-19 10:32   ` Manivannan Sadhasivam
  1 sibling, 0 replies; 8+ messages in thread
From: Manivannan Sadhasivam @ 2025-04-19 10:32 UTC (permalink / raw)
  To: Anand Moon
  Cc: Daire McNamara, Lorenzo Pieralisi, Krzysztof Wilczyński,
	Rob Herring, Bjorn Helgaas, Kevin Xie, Conor Dooley, Minda Chen,
	Mason Huo, open list:PCI DRIVER FOR PLDA PCIE IP, open list

On Sun, Mar 16, 2025 at 10:42:46PM +0530, Anand Moon wrote:
> The events_bitmap initialization in starfive_pcie_probe() previously
> masked out the PLDA_AXI_DOORBELL and PLDA_PCIE_DOORBELL events.
> 
> These masking has been removed, allowing these events to be included
> in the bitmap. With this change ensures that all interrupt events are
> properly accounted for and may be necessary for handling doorbell
> events in certain use cases.
> 
> PCIe Doorbell Events: These are typically used to notify a device about
> an event or to trigger an action. For example, a host system can write
> to a doorbell register on a PCIe device to signal that new data is
> available or that an operation should start12.
> 
> AXI-PCIe Bridge: This bridge acts as a protocol converter between AXI
> (Advanced eXtensible Interface) and PCIe (Peripheral Component Interconnect
> Express) domains. It allows transactions to be converted and communicated
> between these two different protocols3.
> 

Are these events used in the driver for any purpose? Others have mentioned a
potential irq storm issue with these interrupts also. So unless you want to
enable these events for a specific purpose/usecase, it is better to keep them
masked out.

- Mani

-- 
மணிவண்ணன் சதாசிவம்

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2 1/2] PCI: plda: Remove unused IRQ handler and simplify IRQ request logic
  2025-03-16 17:12 [PATCH v2 1/2] PCI: plda: Remove unused IRQ handler and simplify IRQ request logic Anand Moon
  2025-03-16 17:12 ` [PATCH v2 2/2] PCI: starfive: Simplify event doorbell bitmap initialization in pcie-starfive Anand Moon
@ 2025-04-02  7:40 ` Anand Moon
  2025-04-19 10:25 ` Manivannan Sadhasivam
  2 siblings, 0 replies; 8+ messages in thread
From: Anand Moon @ 2025-04-02  7:40 UTC (permalink / raw)
  To: Daire McNamara, Lorenzo Pieralisi, Krzysztof Wilczyński,
	Manivannan Sadhasivam, Rob Herring, Bjorn Helgaas, Kevin Xie,
	Minda Chen, Conor Dooley, Mason Huo,
	open list:PCI DRIVER FOR PLDA PCIE IP, open list

Hi All,

On Sun, 16 Mar 2025 at 22:43, Anand Moon <linux.amoon@gmail.com> wrote:
>
> The plda_event_handler() function has been removed since it only returned
> IRQ_HANDLED without performing any processing. Additionally, the IRQ
> request logic in plda_init_interrupts() has been streamlined by removing
> the redundant devm_request_irq() call when the request_event_irq()
> callback is not defined.
>
> Change ensures that interrupts are requested exclusively through the
> request_event_irq() callback when available, enhancing code clarity
> and maintainability.
>
> Changes help fix kmemleak reported following debug log.
>
> $ sudo cat /sys/kernel/debug/kmemleak
> unreferenced object 0xffffffd6c47c2600 (size 128):
>   comm "kworker/u16:2", pid 38, jiffies 4294942263
>   hex dump (first 32 bytes):
>     cc 7c 5a 8d ff ff ff ff 40 b0 47 c8 d6 ff ff ff  .|Z.....@.G.....
>     00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>   backtrace (crc 4f07ff07):
>     __create_object+0x2a/0xfc
>     kmemleak_alloc+0x38/0x98
>     __kmalloc_cache_noprof+0x296/0x444
>     request_threaded_irq+0x168/0x284
>     devm_request_threaded_irq+0xa8/0x13c
>     plda_init_interrupts+0x46e/0x858
>     plda_pcie_host_init+0x356/0x468
>     starfive_pcie_probe+0x2f6/0x398
>     platform_probe+0x106/0x150
>     really_probe+0x30e/0x746
>     __driver_probe_device+0x11c/0x2c2
>     driver_probe_device+0x5e/0x316
>     __device_attach_driver+0x296/0x3a4
>     bus_for_each_drv+0x1d0/0x260
>     __device_attach+0x1fa/0x2d6
>     device_initial_probe+0x14/0x28
> unreferenced object 0xffffffd6c47c2900 (size 128):
>   comm "kworker/u16:2", pid 38, jiffies 4294942281
>
> Fixes: 4602c370bdf6 ("PCI: microchip: Move IRQ functions to pcie-plda-host.c")
> Cc: Minda Chen <minda.chen@starfivetech.com>
> Signed-off-by: Anand Moon <linux.amoon@gmail.com>
> ---
> v1: drop the dummy IRQ handler used in previous version
>    [0] https://lore.kernel.org/linux-pci/20250224144155.omzrmls7hpjqw6yl@thinkpad/T/
> ---
Gentle ping?

Thanks
-Anand

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2 1/2] PCI: plda: Remove unused IRQ handler and simplify IRQ request logic
  2025-03-16 17:12 [PATCH v2 1/2] PCI: plda: Remove unused IRQ handler and simplify IRQ request logic Anand Moon
  2025-03-16 17:12 ` [PATCH v2 2/2] PCI: starfive: Simplify event doorbell bitmap initialization in pcie-starfive Anand Moon
  2025-04-02  7:40 ` [PATCH v2 1/2] PCI: plda: Remove unused IRQ handler and simplify IRQ request logic Anand Moon
@ 2025-04-19 10:25 ` Manivannan Sadhasivam
  2 siblings, 0 replies; 8+ messages in thread
From: Manivannan Sadhasivam @ 2025-04-19 10:25 UTC (permalink / raw)
  To: Anand Moon
  Cc: Daire McNamara, Lorenzo Pieralisi, Krzysztof Wilczyński,
	Rob Herring, Bjorn Helgaas, Kevin Xie, Minda Chen, Conor Dooley,
	Mason Huo, open list:PCI DRIVER FOR PLDA PCIE IP, open list

On Sun, Mar 16, 2025 at 10:42:45PM +0530, Anand Moon wrote:
> The plda_event_handler() function has been removed since it only returned
> IRQ_HANDLED without performing any processing. Additionally, the IRQ
> request logic in plda_init_interrupts() has been streamlined by removing
> the redundant devm_request_irq() call when the request_event_irq()
> callback is not defined.
> 
> Change ensures that interrupts are requested exclusively through the
> request_event_irq() callback when available, enhancing code clarity
> and maintainability.
> 

Could you please reword the description in the imperative form? I have
mentioned this a couple of times in the past, but you are still not following it
:(

> Changes help fix kmemleak reported following debug log.
> 

But you didn't say 'how'. In your last version you mentioned that it could be
due to passing NULL as the 'devname' to devm_request_irq(). Can you verify that
by passing an arbitrary name and see if the leak is disappearing?

> $ sudo cat /sys/kernel/debug/kmemleak
> unreferenced object 0xffffffd6c47c2600 (size 128):
>   comm "kworker/u16:2", pid 38, jiffies 4294942263
>   hex dump (first 32 bytes):
>     cc 7c 5a 8d ff ff ff ff 40 b0 47 c8 d6 ff ff ff  .|Z.....@.G.....
>     00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>   backtrace (crc 4f07ff07):
>     __create_object+0x2a/0xfc
>     kmemleak_alloc+0x38/0x98
>     __kmalloc_cache_noprof+0x296/0x444
>     request_threaded_irq+0x168/0x284
>     devm_request_threaded_irq+0xa8/0x13c
>     plda_init_interrupts+0x46e/0x858
>     plda_pcie_host_init+0x356/0x468
>     starfive_pcie_probe+0x2f6/0x398
>     platform_probe+0x106/0x150
>     really_probe+0x30e/0x746
>     __driver_probe_device+0x11c/0x2c2
>     driver_probe_device+0x5e/0x316
>     __device_attach_driver+0x296/0x3a4
>     bus_for_each_drv+0x1d0/0x260
>     __device_attach+0x1fa/0x2d6
>     device_initial_probe+0x14/0x28
> unreferenced object 0xffffffd6c47c2900 (size 128):
>   comm "kworker/u16:2", pid 38, jiffies 4294942281
> 
> Fixes: 4602c370bdf6 ("PCI: microchip: Move IRQ functions to pcie-plda-host.c")

This tag is not the one introduced the bug. It just moves the core around.

- Mani

-- 
மணிவண்ணன் சதாசிவம்

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2025-04-19 10:32 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-03-16 17:12 [PATCH v2 1/2] PCI: plda: Remove unused IRQ handler and simplify IRQ request logic Anand Moon
2025-03-16 17:12 ` [PATCH v2 2/2] PCI: starfive: Simplify event doorbell bitmap initialization in pcie-starfive Anand Moon
2025-03-17  2:23   ` Minda Chen
2025-03-17  3:26     ` Anand Moon
     [not found]       ` <SJ1PR11MB6249AC13C9F44545FF18A31C96DE2@SJ1PR11MB6249.namprd11.prod.outlook.com>
2025-03-18 15:46         ` Anand Moon
2025-04-19 10:32   ` Manivannan Sadhasivam
2025-04-02  7:40 ` [PATCH v2 1/2] PCI: plda: Remove unused IRQ handler and simplify IRQ request logic Anand Moon
2025-04-19 10:25 ` Manivannan Sadhasivam

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