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From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Cc: tomm.merciai@gmail.com, linux-renesas-soc@vger.kernel.org,
	linux-media@vger.kernel.org, biju.das.jz@bp.renesas.com,
	prabhakar.mahadev-lad.rj@bp.renesas.com,
	"Mauro Carvalho Chehab" <mchehab@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Magnus Damm" <magnus.damm@gmail.com>,
	"Hans Verkuil" <hverkuil@xs4all.nl>,
	"Uwe Kleine-König" <u.kleine-koenig@baylibre.com>,
	"Sakari Ailus" <sakari.ailus@linux.intel.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 13/17] media: rzg2l-cru: Add image_conv offset to OF data
Date: Wed, 2 Apr 2025 03:47:06 +0300	[thread overview]
Message-ID: <20250402004706.GE4845@pendragon.ideasonboard.com> (raw)
In-Reply-To: <20250328173032.423322-14-tommaso.merciai.xr@bp.renesas.com>

Hi Tommaso,

Thank you for the patch.

On Fri, Mar 28, 2025 at 06:29:49PM +0100, Tommaso Merciai wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Add `image_conv` field to the `rzg2l_cru_info` structure to store the
> register offset for image conversion control. RZ/G2L uses `ICnMC`, while
> RZ/G3E and RZ/V2H(P) use `ICnIPMC_C0`.
> 
> Update `rzg2l_cru_initialize_image_conv()` and `rzg2l_cru_csi2_setup()`
> to use this `image_conv` offset from the OF data, facilitating future
> support for RZ/G3E and RZ/V2H(P) SoCs.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
> ---
>  .../media/platform/renesas/rzg2l-cru/rzg2l-core.c  |  1 +
>  .../media/platform/renesas/rzg2l-cru/rzg2l-cru.h   |  1 +
>  .../media/platform/renesas/rzg2l-cru/rzg2l-video.c | 14 ++++++++------
>  3 files changed, 10 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-core.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-core.c
> index 19f93b7fe6fb9..7e94ae8039677 100644
> --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-core.c
> +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-core.c
> @@ -357,6 +357,7 @@ static const u16 rzg2l_cru_regs[] = {
>  static const struct rzg2l_cru_info rzgl2_cru_info = {
>  	.max_width = 2800,
>  	.max_height = 4095,
> +	.image_conv = ICnMC,
>  	.regs = rzg2l_cru_regs,
>  };
>  
> diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h
> index 6a621073948aa..ca156772b949b 100644
> --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h
> +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h
> @@ -81,6 +81,7 @@ struct rzg2l_cru_ip_format {
>  struct rzg2l_cru_info {
>  	unsigned int max_width;
>  	unsigned int max_height;
> +	u16 image_conv;
>  	const u16 *regs;
>  };
>  
> diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c
> index 395c4d3d0f0fa..e13f633a687b2 100644
> --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c
> +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c
> @@ -246,20 +246,22 @@ static void rzg2l_cru_csi2_setup(struct rzg2l_cru_dev *cru,
>  				 const struct rzg2l_cru_ip_format *ip_fmt,
>  				 u8 csi_vc)
>  {
> +	const struct rzg2l_cru_info *info = cru->info;
>  	u32 icnmc = ICnMC_INF(ip_fmt->datatype);
>  
> -	icnmc |= (rzg2l_cru_read(cru, ICnMC) & ~ICnMC_INF_MASK);
> +	icnmc |= (rzg2l_cru_read(cru, info->image_conv) & ~ICnMC_INF_MASK);

While at it you can drop the outer parentheses.

>  
>  	/* Set virtual channel CSI2 */
>  	icnmc |= ICnMC_VCSEL(csi_vc);
>  
> -	rzg2l_cru_write(cru, ICnMC, icnmc);
> +	rzg2l_cru_write(cru, info->image_conv, icnmc);
>  }
>  
>  static int rzg2l_cru_initialize_image_conv(struct rzg2l_cru_dev *cru,
>  					   struct v4l2_mbus_framefmt *ip_sd_fmt,
>  					   u8 csi_vc)
>  {
> +	const struct rzg2l_cru_info *info = cru->info;
>  	const struct rzg2l_cru_ip_format *cru_video_fmt;
>  	const struct rzg2l_cru_ip_format *cru_ip_fmt;
>  
> @@ -276,11 +278,11 @@ static int rzg2l_cru_initialize_image_conv(struct rzg2l_cru_dev *cru,
>  
>  	/* If input and output use same colorspace, do bypass mode */
>  	if (cru_ip_fmt->yuv == cru_video_fmt->yuv)
> -		rzg2l_cru_write(cru, ICnMC,
> -				rzg2l_cru_read(cru, ICnMC) | ICnMC_CSCTHR);
> +		rzg2l_cru_write(cru, info->image_conv,
> +				rzg2l_cru_read(cru, info->image_conv) | ICnMC_CSCTHR);
>  	else
> -		rzg2l_cru_write(cru, ICnMC,
> -				rzg2l_cru_read(cru, ICnMC) & (~ICnMC_CSCTHR));
> +		rzg2l_cru_write(cru, info->image_conv,
> +				rzg2l_cru_read(cru, info->image_conv) & (~ICnMC_CSCTHR));

And here you can drop the parentheses around ~ICnMC_CSCTHR.

Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

>  
>  	/* Set output data format */
>  	rzg2l_cru_write(cru, ICnDMR, cru_video_fmt->icndmr);

-- 
Regards,

Laurent Pinchart

  reply	other threads:[~2025-04-02  0:47 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-28 17:29 [PATCH v5 00/17] media: rzg2l-cru: Add support for RZ/G3E (CSI2, CRU) Tommaso Merciai
2025-03-28 17:29 ` [PATCH v5 01/17] media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/V2H(P) SoC Tommaso Merciai
2025-03-28 17:29 ` [PATCH v5 02/17] media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/G3E CSI-2 block Tommaso Merciai
2025-03-28 17:29 ` [PATCH v5 03/17] media: dt-bindings: renesas,rzg2l-cru: Document Renesas RZ/G3E SoC Tommaso Merciai
2025-03-28 17:29 ` [PATCH v5 04/17] media: rzg2l-cru: csi2: Use local variable for struct device in rzg2l_csi2_probe() Tommaso Merciai
2025-03-28 17:29 ` [PATCH v5 05/17] media: rzg2l-cru: csi2: Use devm_pm_runtime_enable() Tommaso Merciai
2025-03-28 17:29 ` [PATCH v5 06/17] media: rzg2l-cru: rzg2l-core: Use local variable for struct device in rzg2l_cru_probe() Tommaso Merciai
2025-03-28 17:29 ` [PATCH v5 07/17] media: rzg2l-cru: rzg2l-core: Use devm_pm_runtime_enable() Tommaso Merciai
2025-03-28 17:29 ` [PATCH v5 08/17] media: rzg2l-cru: csi2: Introduce SoC-specific D-PHY handling Tommaso Merciai
2025-03-28 17:29 ` [PATCH v5 09/17] media: rzg2l-cru: csi2: Skip system clock for RZ/V2H(P) SoC Tommaso Merciai
2025-04-02  0:44   ` Laurent Pinchart
2025-03-28 17:29 ` [PATCH v5 10/17] media: rzg2l-cru: csi2: Add support " Tommaso Merciai
2025-03-28 17:29 ` [PATCH v5 11/17] media: rzg2l-cru: Add register mapping support Tommaso Merciai
2025-04-02  6:31   ` Biju Das
2025-04-02  7:35     ` Lad, Prabhakar
2025-04-02  8:19       ` Biju Das
2025-04-02  8:25         ` Lad, Prabhakar
2025-04-02  8:29           ` Biju Das
2025-04-02  9:26           ` Laurent Pinchart
2025-04-02  9:36             ` Lad, Prabhakar
2025-04-02  9:39             ` Biju Das
2025-04-07 16:55               ` Lad, Prabhakar
2025-04-09  1:29                 ` Laurent Pinchart
2025-04-09  7:25                   ` Biju Das
2025-04-09 10:33                     ` Tommaso Merciai
2025-04-09 11:08                     ` Laurent Pinchart
2025-03-28 17:29 ` [PATCH v5 12/17] media: rzg2l-cru: Pass resolution limits via OF data Tommaso Merciai
2025-03-28 17:29 ` [PATCH v5 13/17] media: rzg2l-cru: Add image_conv offset to " Tommaso Merciai
2025-04-02  0:47   ` Laurent Pinchart [this message]
2025-03-28 17:29 ` [PATCH v5 14/17] media: rzg2l-cru: Add IRQ handler " Tommaso Merciai
2025-03-28 17:29 ` [PATCH v5 15/17] media: rzg2l-cru: Add function pointer to check if FIFO is empty Tommaso Merciai
2025-03-28 17:29 ` [PATCH v5 16/17] media: rzg2l-cru: Add function pointer to configure CSI Tommaso Merciai
2025-03-28 17:29 ` [PATCH v5 17/17] media: rzg2l-cru: Add support for RZ/G3E SoC Tommaso Merciai
2025-04-02  1:14   ` Laurent Pinchart

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