From: Shubhi Garg <shgarg@nvidia.com>
To: <lee@kernel.org>, <alexandre.belloni@bootlin.com>,
<thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-tegra@vger.kernel.org>
Cc: <shgarg@nvidia.com>
Subject: [PATCH 2/5] arm64: tegra: Add device-tree node for NVVRS PSEQ
Date: Wed, 16 Apr 2025 12:06:16 +0000 [thread overview]
Message-ID: <20250416120619.483793-3-shgarg@nvidia.com> (raw)
In-Reply-To: <20250416120619.483793-1-shgarg@nvidia.com>
Add NVIDIA VRS Power Sequencer device tree node for Tegra234 P3701 and
P3767 platforms.
Signed-off-by: Shubhi Garg <shgarg@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi | 11 +++++++++++
arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi | 17 +++++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi
index 9086a0d010e5..d3c1f13b2b99 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi
@@ -170,6 +170,17 @@ bpmp {
i2c {
status = "okay";
+ vrs@3c {
+ compatible = "nvidia,vrs-pseq";
+ reg = <0x3c>;
+ interrupt-parent = <&pmc>;
+ /* VRS Wake ID is 24 */
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ status = "okay";
+ };
+
thermal-sensor@4c {
compatible = "ti,tmp451";
status = "okay";
diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi
index 84db7132e8fc..93a787c57eba 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi
@@ -121,6 +121,23 @@ pmc@c360000 {
};
};
+ bpmp {
+ i2c {
+ status = "okay";
+
+ vrs@3c {
+ compatible = "nvidia,vrs-pseq";
+ reg = <0x3c>;
+ interrupt-parent = <&pmc>;
+ /* VRS Wake ID is 24 */
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ status = "okay";
+ };
+ };
+ };
+
vdd_5v0_sys: regulator-vdd-5v0-sys {
compatible = "regulator-fixed";
regulator-name = "VDD_5V0_SYS";
--
2.25.1
next prev parent reply other threads:[~2025-04-16 12:06 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-16 12:06 [PATCH 0/5] Add NVIDIA VRS PSEQ support Shubhi Garg
2025-04-16 12:06 ` [PATCH 1/5] dt-bindings: mfd: add bindings for NVIDIA VRS PSEQ Shubhi Garg
2025-04-21 22:02 ` Rob Herring
2025-04-21 22:03 ` Rob Herring
2025-04-16 12:06 ` Shubhi Garg [this message]
2025-04-17 5:25 ` [PATCH 2/5] arm64: tegra: Add device-tree node for NVVRS PSEQ Krzysztof Kozlowski
2025-04-16 12:06 ` [PATCH 3/5] mfd: nvvrs: add NVVRS PSEQ MFD driver Shubhi Garg
2025-04-17 5:26 ` Krzysztof Kozlowski
2025-04-16 12:06 ` [PATCH 4/5] rtc: nvvrs: add NVIDIA VRS PSEQ RTC device driver Shubhi Garg
2025-04-16 14:20 ` Alexandre Belloni
2025-04-16 12:06 ` [PATCH 5/5] arm64: defconfig: enable NVIDIA VRS PSEQ Shubhi Garg
2025-04-17 5:28 ` Krzysztof Kozlowski
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