* [PATCH] x86/sev: Fix operator precedence in GHCB_MSR_VMPL_REQ_LEVEL macro
@ 2025-05-10 16:27 Seongmanlee
2025-05-11 8:55 ` Borislav Petkov
0 siblings, 1 reply; 2+ messages in thread
From: Seongmanlee @ 2025-05-10 16:27 UTC (permalink / raw)
To: x86
Cc: leonardo-leecaprio, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, H. Peter Anvin,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)
From: leonardo-leecaprio <augustus92@kaist.ac.kr>
The GHCB_MSR_VMPL_REQ_LEVEL macro lacked parentheses around the bitmask
expression, causing the shift operation to bind too early. As a result,
when switching to VMPL2 from VMPL1 (e.g., GHCB_MSR_VMPL_REQ_LEVEL(1)),
incorrect values such as 0x000000016 were generated instead of the intended
0x100000016.
This patch fixes the precedence issue by grouping the masked value
before applying the shift.
Signed-off-by: leonardo-leecaprio <augustus92@kaist.ac.kr>
---
arch/x86/include/asm/sev-common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/sev-common.h b/arch/x86/include/asm/sev-common.h
index acb85b934..0020d77a0 100644
--- a/arch/x86/include/asm/sev-common.h
+++ b/arch/x86/include/asm/sev-common.h
@@ -116,7 +116,7 @@ enum psc_op {
#define GHCB_MSR_VMPL_REQ 0x016
#define GHCB_MSR_VMPL_REQ_LEVEL(v) \
/* GHCBData[39:32] */ \
- (((u64)(v) & GENMASK_ULL(7, 0) << 32) | \
+ ((((u64)(v) & GENMASK_ULL(7, 0)) << 32) | \
/* GHCBDdata[11:0] */ \
GHCB_MSR_VMPL_REQ)
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] x86/sev: Fix operator precedence in GHCB_MSR_VMPL_REQ_LEVEL macro
2025-05-10 16:27 [PATCH] x86/sev: Fix operator precedence in GHCB_MSR_VMPL_REQ_LEVEL macro Seongmanlee
@ 2025-05-11 8:55 ` Borislav Petkov
0 siblings, 0 replies; 2+ messages in thread
From: Borislav Petkov @ 2025-05-11 8:55 UTC (permalink / raw)
To: Seongmanlee, Tom Lendacky
Cc: x86, leonardo-leecaprio, Thomas Gleixner, Ingo Molnar,
Dave Hansen, H. Peter Anvin,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)
+ Tom.
On Sun, May 11, 2025 at 01:27:24AM +0900, Seongmanlee wrote:
> From: leonardo-leecaprio <augustus92@kaist.ac.kr>
>
> The GHCB_MSR_VMPL_REQ_LEVEL macro lacked parentheses around the bitmask
> expression, causing the shift operation to bind too early. As a result,
> when switching to VMPL2 from VMPL1 (e.g., GHCB_MSR_VMPL_REQ_LEVEL(1)),
> incorrect values such as 0x000000016 were generated instead of the intended
> 0x100000016.
>
> This patch fixes the precedence issue by grouping the masked value
Avoid having "This patch" or "This commit" in the commit message. It is
tautologically useless.
Also, do
$ git grep 'This patch' Documentation/process
for more details.
> before applying the shift.
>
Fixes: 34ff65901735 ("x86/sev: Use kernel provided SVSM Calling Areas")
> Signed-off-by: leonardo-leecaprio <augustus92@kaist.ac.kr>
Please use your real name.
> ---
> arch/x86/include/asm/sev-common.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/include/asm/sev-common.h b/arch/x86/include/asm/sev-common.h
> index acb85b934..0020d77a0 100644
> --- a/arch/x86/include/asm/sev-common.h
> +++ b/arch/x86/include/asm/sev-common.h
> @@ -116,7 +116,7 @@ enum psc_op {
> #define GHCB_MSR_VMPL_REQ 0x016
> #define GHCB_MSR_VMPL_REQ_LEVEL(v) \
> /* GHCBData[39:32] */ \
> - (((u64)(v) & GENMASK_ULL(7, 0) << 32) | \
> + ((((u64)(v) & GENMASK_ULL(7, 0)) << 32) | \
> /* GHCBDdata[11:0] */ \
> GHCB_MSR_VMPL_REQ)
>
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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