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From: Ard Biesheuvel <ardb+git@google.com>
To: linux-kernel@vger.kernel.org
Cc: x86@kernel.org, Ard Biesheuvel <ardb@kernel.org>,
	Ingo Molnar <mingo@kernel.org>,
	 Linus Torvalds <torvalds@linux-foundation.org>
Subject: [RFC PATCH v2 3/6] x86/cpu: Allow caps to be set arbitrarily early
Date: Tue, 13 May 2025 13:12:01 +0200	[thread overview]
Message-ID: <20250513111157.717727-11-ardb+git@google.com> (raw)
In-Reply-To: <20250513111157.717727-8-ardb+git@google.com>

From: Ard Biesheuvel <ardb@kernel.org>

cpu_feature_enabled() uses a ternary alternative, where the late variant
is based on code patching and the early variant accesses the capability
field in boot_cpu_data directly.

This allows cpu_feature_enabled() to be called quite early, but it still
requires that the CPU feature detection code runs before being able to
rely on the return value of cpu_feature_enabled().

This is a problem for the implementation of pgtable_l5_enabled(), which
is based on cpu_feature_enabled(X86_FEATURE_5LEVEL_PAGING), and may be
called extremely early. Currently, there is a hacky workaround where
some source files that may execute before (but also after) CPU feature
detection have a different version of pgtable_l5_enabled(), based on the
USE_EARLY_PGTABLE_L5 preprocessor macro.

Instead, let's make it possible to set CPU feature arbitrarily early, so
that the X86_FEATURE_5LEVEL_PAGING capability can be set before even
entering C code.

This involves relying on static initialization of boot_cpu_data and the
cpu_caps_set/cpu_caps_cleared arrays, so they all need to reside in
.data. This ensures that they won't be cleared along with the rest of
BSS.

Note that forcing a capability involves setting it in both
boot_cpu_data.x86_capability[] and cpu_caps_set[].

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/x86/kernel/cpu/common.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index bbec5c4cd8ed..aaa6d9e51ef1 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -704,8 +704,8 @@ static const char *table_lookup_model(struct cpuinfo_x86 *c)
 }
 
 /* Aligned to unsigned long to avoid split lock in atomic bitmap ops */
-__u32 cpu_caps_cleared[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long));
-__u32 cpu_caps_set[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long));
+__u32 __read_mostly cpu_caps_cleared[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long));
+__u32 __read_mostly cpu_caps_set[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long));
 
 #ifdef CONFIG_X86_32
 /* The 32-bit entry code needs to find cpu_entry_area. */
@@ -1628,9 +1628,6 @@ static void __init cpu_parse_early_param(void)
  */
 static void __init early_identify_cpu(struct cpuinfo_x86 *c)
 {
-	memset(&c->x86_capability, 0, sizeof(c->x86_capability));
-	c->extended_cpuid_level = 0;
-
 	if (!have_cpuid_p())
 		identify_cpu_without_cpuid(c);
 
@@ -1842,7 +1839,8 @@ static void identify_cpu(struct cpuinfo_x86 *c)
 	c->x86_virt_bits = 32;
 #endif
 	c->x86_cache_alignment = c->x86_clflush_size;
-	memset(&c->x86_capability, 0, sizeof(c->x86_capability));
+	if (c != &boot_cpu_data)
+		memset(&c->x86_capability, 0, sizeof(c->x86_capability));
 #ifdef CONFIG_X86_VMX_FEATURE_NAMES
 	memset(&c->vmx_capability, 0, sizeof(c->vmx_capability));
 #endif
-- 
2.49.0.1045.g170613ef41-goog


  parent reply	other threads:[~2025-05-13 11:12 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-13 11:11 [RFC PATCH v2 0/6] x86: Robustify pgtable_l5_enabled() Ard Biesheuvel
2025-05-13 11:11 ` [RFC PATCH v2 1/6] x86/boot: Defer initialization of VM space related global variables Ard Biesheuvel
2025-05-14  8:15   ` [tip: x86/core] " tip-bot2 for Ard Biesheuvel
2025-05-13 11:12 ` [RFC PATCH v2 2/6] x86/cpu: Use a new feature flag for 5 level paging Ard Biesheuvel
2025-05-13 19:49   ` Linus Torvalds
2025-05-14  7:32   ` Kirill A. Shutemov
2025-05-14  8:04     ` Ingo Molnar
2025-05-14  8:14       ` Ard Biesheuvel
2025-05-14  8:21         ` Kirill A. Shutemov
2025-05-14  8:31         ` Ingo Molnar
2025-05-14  8:39           ` Ingo Molnar
2025-05-14  8:19       ` Kirill A. Shutemov
2025-05-14  8:33         ` Ingo Molnar
2025-05-13 11:12 ` Ard Biesheuvel [this message]
2025-05-13 18:37   ` [RFC PATCH v2 3/6] x86/cpu: Allow caps to be set arbitrarily early Brian Gerst
2025-05-14  8:17     ` Ingo Molnar
2025-05-14  9:49       ` Ard Biesheuvel
2025-05-21 13:22     ` Ard Biesheuvel
2025-05-13 11:12 ` [RFC PATCH v2 4/6] x86/boot: Set 5-level paging CPU cap before entering C code Ard Biesheuvel
2025-05-14  8:15   ` Ingo Molnar
2025-05-14  8:18     ` Ard Biesheuvel
2025-05-14  8:37       ` Ingo Molnar
2025-05-14  8:40         ` Ard Biesheuvel
2025-05-13 11:12 ` [RFC PATCH v2 5/6] x86/boot: Drop the early variant of pgtable_l5_enabled() Ard Biesheuvel
2025-05-13 11:12 ` [RFC PATCH v2 6/6] x86/boot: Drop 5-level paging related variables and early updates Ard Biesheuvel

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