[PATCH v5 4/7] x86/mm: Derive pgtable_l5_enabled() from pgdir_shift()

[Ard Biesheuvel <ardb+git@google.com>]

From: Ard Biesheuvel <ardb@kernel.org>

Instead of using two versions of pgtable_l5_enabled() which go out of
sync a few times during boot, use a single implementation, and base it
on pgdir_shift(), which can be accessed cheaply when running in the core
kernel.

This is the most efficient way to obtain this information without
relying on code patching, on which the 'late' implementation depends
today (via the ternary alternative in cpu_feature_enabled()).

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/x86/include/asm/pgtable_64_types.h | 14 ++------------
 1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h
index d8e39c479387..ed847a90cf4f 100644
--- a/arch/x86/include/asm/pgtable_64_types.h
+++ b/arch/x86/include/asm/pgtable_64_types.h
@@ -33,18 +33,8 @@ static __always_inline __attribute_const__ u8 pgdir_shift(void)
 }
 #endif /* pgdir_shift */
 
-#ifdef USE_EARLY_PGTABLE_L5
-/*
- * cpu_feature_enabled() is not available in early boot code.
- * Use variable instead.
- */
-static inline bool pgtable_l5_enabled(void)
-{
-	return __pgtable_l5_enabled;
-}
-#else
-#define pgtable_l5_enabled() cpu_feature_enabled(X86_FEATURE_LA57)
-#endif /* USE_EARLY_PGTABLE_L5 */
+/* PGDIR shift == 39 -> L5 disabled, 48 -> L5 enabled */
+#define pgtable_l5_enabled() !(pgdir_shift() & 1)
 
 #endif	/* !__ASSEMBLER__ */
 
-- 
2.49.0.1101.gccaa498523-goog