From: Himanshu Chauhan <hchauhan@ventanamicro.com>
To: paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: Himanshu Chauhan <hchauhan@ventanamicro.com>
Subject: [PATCH v1 1/2] riscv: Add SBI debug trigger extension and function ids
Date: Thu, 10 Jul 2025 18:22:30 +0530 [thread overview]
Message-ID: <20250710125231.653967-2-hchauhan@ventanamicro.com> (raw)
In-Reply-To: <20250710125231.653967-1-hchauhan@ventanamicro.com>
Debug trigger extension is an SBI extension to support native debugging
in S-mode and VS-mode. This patch adds the extension and the function
IDs defined by the extension.
Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
---
arch/riscv/include/asm/sbi.h | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 341e74238aa0..d1d906bc5365 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -36,6 +36,7 @@ enum sbi_ext_id {
SBI_EXT_STA = 0x535441,
SBI_EXT_NACL = 0x4E41434C,
SBI_EXT_FWFT = 0x46574654,
+ SBI_EXT_DBTR = 0x44425452,
/* Experimentals extensions must lie within this range */
SBI_EXT_EXPERIMENTAL_START = 0x08000000,
@@ -430,6 +431,34 @@ enum sbi_fwft_feature_t {
#define SBI_FWFT_SET_FLAG_LOCK BIT(0)
+/* SBI debug triggers function IDs */
+enum sbi_ext_dbtr_fid {
+ SBI_EXT_DBTR_NUM_TRIGGERS = 0,
+ SBI_EXT_DBTR_SETUP_SHMEM,
+ SBI_EXT_DBTR_TRIG_READ,
+ SBI_EXT_DBTR_TRIG_INSTALL,
+ SBI_EXT_DBTR_TRIG_UPDATE,
+ SBI_EXT_DBTR_TRIG_UNINSTALL,
+ SBI_EXT_DBTR_TRIG_ENABLE,
+ SBI_EXT_DBTR_TRIG_DISABLE,
+};
+
+struct sbi_dbtr_data_msg {
+ unsigned long tstate;
+ unsigned long tdata1;
+ unsigned long tdata2;
+ unsigned long tdata3;
+};
+
+struct sbi_dbtr_id_msg {
+ unsigned long idx;
+};
+
+union sbi_dbtr_shmem_entry {
+ struct sbi_dbtr_data_msg data;
+ struct sbi_dbtr_id_msg id;
+};
+
/* SBI spec version fields */
#define SBI_SPEC_VERSION_DEFAULT 0x1
#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
--
2.45.2
next prev parent reply other threads:[~2025-07-10 12:53 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-10 12:52 [PATCH v1 0/2] riscv: Introduce support for hardware break/watchpoints Himanshu Chauhan
2025-07-10 12:52 ` Himanshu Chauhan [this message]
2025-11-27 0:47 ` [PATCH v1 1/2] riscv: Add SBI debug trigger extension and function ids Paul Walmsley
2025-07-10 12:52 ` [PATCH v1 2/2] riscv: Introduce support for hardware break/watchpoints Himanshu Chauhan
2025-11-27 0:49 ` Paul Walmsley
2025-11-27 10:17 ` Himanshu Chauhan
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