From: Yazen Ghannam <yazen.ghannam@amd.com>
To: Avadhut Naik <avadhut.naik@amd.com>
Cc: linux-edac@vger.kernel.org, bp@alien8.de, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 3/5] EDAC/amd64: Add support for AMD family 1Ah-based newer models
Date: Wed, 10 Sep 2025 11:13:33 -0400 [thread overview]
Message-ID: <20250910151333.GF11602@yaz-khff2.amd.com> (raw)
In-Reply-To: <20250909185748.1621098-4-avadhut.naik@amd.com>
On Tue, Sep 09, 2025 at 06:53:12PM +0000, Avadhut Naik wrote:
> Add support for family 1Ah-based models 50h-57h, 90h-9Fh, A0h-AFh, and
> C0h-C7h.
>
> Signed-off-by: Avadhut Naik <avadhut.naik@amd.com>
> ---
> Changes in v2:
> 1. Remove extra tabs
>
> Changes in v3:
> 1. Since ctl_name string is now assigned at runtime, group similar models
> together.
> ---
> drivers/edac/amd64_edac.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> index 0fade110c3fb..804d3c4c3f14 100644
> --- a/drivers/edac/amd64_edac.c
> +++ b/drivers/edac/amd64_edac.c
> @@ -3895,6 +3895,16 @@ static int per_family_init(struct amd64_pvt *pvt)
> case 0x40 ... 0x4f:
> pvt->flags.zn_regs_v2 = 1;
> break;
> + case 0x50 ... 0x57:
> + case 0xc0 ... 0xc7:
> + pvt->max_mcs = 16;
> + pvt->flags.zn_regs_v2 = 1;
> + break;
> + case 0x90 ... 0x9f:
> + case 0xa0 ... 0xaf:
> + pvt->max_mcs = 8;
> + pvt->flags.zn_regs_v2 = 1;
All of Family 1Ah uses 'zn_regs_v2', so this can go before the models
cases.
The register changes happened in Family 19h, so there are a mix of
models there.
We could be so bold to say 'zn_regs_v2 = (family >= 0x1A)' up top.
Family 19h would not set this, but then the individual model cases can
fix it up.
Thanks,
Yazen
next prev parent reply other threads:[~2025-09-10 15:13 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-09 18:53 [PATCH v3 0/5] Cleanup and add support for AMD Family 1Ah-based SOCs Avadhut Naik
2025-09-09 18:53 ` [PATCH v3 1/5] EDAC/amd64: Generate ctl_name string at runtime Avadhut Naik
2025-09-10 14:51 ` Yazen Ghannam
2025-09-10 15:53 ` Naik, Avadhut
2025-09-09 18:53 ` [PATCH v3 2/5] EDAC/amd64: Remove NUM_CONTROLLERS macro Avadhut Naik
2025-09-10 15:05 ` Yazen Ghannam
2025-09-10 15:48 ` Naik, Avadhut
2025-09-09 18:53 ` [PATCH v3 3/5] EDAC/amd64: Add support for AMD family 1Ah-based newer models Avadhut Naik
2025-09-10 15:13 ` Yazen Ghannam [this message]
2025-09-10 16:08 ` Naik, Avadhut
2025-09-09 18:53 ` [PATCH v3 4/5] EDAC/mc_sysfs: Increase legacy channel support to 16 Avadhut Naik
2025-09-10 15:17 ` Yazen Ghannam
2025-09-10 15:29 ` Naik, Avadhut
2025-09-09 18:53 ` [PATCH v3 5/5] EDAC/mc_sysfs: Begin deprecating legacy sysfs EDAC interface Avadhut Naik
2025-09-10 15:24 ` Yazen Ghannam
2025-09-10 17:38 ` Naik, Avadhut
2025-09-15 17:04 ` Yazen Ghannam
2025-09-16 16:09 ` Naik, Avadhut
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